1 /* tc-sh.c -- Assemble code for the Hitachi Super-H
2 Copyright (C) 1993, 94, 95, 96, 97, 98, 1999 Free Software Foundation.
4 This file is part of GAS, the GNU Assembler.
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 Written By Steve Chamberlain
31 #include "opcodes/sh-opc.h"
38 const char comment_chars
[] = "!";
39 const char line_separator_chars
[] = ";";
40 const char line_comment_chars
[] = "!#";
42 static void s_uses
PARAMS ((int));
44 static void sh_count_relocs
PARAMS ((bfd
*, segT
, PTR
));
45 static void sh_frob_section
PARAMS ((bfd
*, segT
, PTR
));
48 void s_align_bytes ();
49 static void s_uacons
PARAMS ((int));
50 static sh_opcode_info
*find_cooked_opcode
PARAMS ((char **));
51 static void assemble_ppi
PARAMS ((char *, sh_opcode_info
*));
60 target_big_endian
= 0;
63 /* This table describes all the machine specific pseudo-ops the assembler
64 has to support. The fields are:
65 pseudo-op name without dot
66 function to call to execute this pseudo-op
67 Integer arg to pass to the function
70 const pseudo_typeS md_pseudo_table
[] =
74 {"form", listing_psize
, 0},
75 {"little", little
, 0},
76 {"heading", listing_title
, 0},
77 {"import", s_ignore
, 0},
78 {"page", listing_eject
, 0},
79 {"program", s_ignore
, 0},
81 {"uaword", s_uacons
, 2},
82 {"ualong", s_uacons
, 4},
86 /*int md_reloc_size; */
88 int sh_relax
; /* set if -relax seen */
90 /* Whether -small was seen. */
94 /* Whether -dsp was seen. */
98 /* The bit mask of architectures that could
99 accomodate the insns seen so far. */
100 static int valid_arch
;
102 const char EXP_CHARS
[] = "eE";
104 /* Chars that mean this number is a floating point constant */
107 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
109 #define C(a,b) ENCODE_RELAX(a,b)
111 #define JREG 14 /* Register used as a temp when relaxing */
112 #define ENCODE_RELAX(what,length) (((what) << 4) + (length))
113 #define GET_WHAT(x) ((x>>4))
115 /* These are the three types of relaxable instrction */
117 #define COND_JUMP_DELAY 2
118 #define UNCOND_JUMP 3
127 #define UNDEF_WORD_DISP 4
132 /* Branch displacements are from the address of the branch plus
133 four, thus all minimum and maximum values have 4 added to them. */
136 #define COND8_LENGTH 2
138 /* There is one extra instruction before the branch, so we must add
139 two more bytes to account for it. */
140 #define COND12_F 4100
141 #define COND12_M -4090
142 #define COND12_LENGTH 6
144 #define COND12_DELAY_LENGTH 4
146 /* ??? The minimum and maximum values are wrong, but this does not matter
147 since this relocation type is not supported yet. */
148 #define COND32_F (1<<30)
149 #define COND32_M -(1<<30)
150 #define COND32_LENGTH 14
152 #define UNCOND12_F 4098
153 #define UNCOND12_M -4092
154 #define UNCOND12_LENGTH 2
156 /* ??? The minimum and maximum values are wrong, but this does not matter
157 since this relocation type is not supported yet. */
158 #define UNCOND32_F (1<<30)
159 #define UNCOND32_M -(1<<30)
160 #define UNCOND32_LENGTH 14
162 const relax_typeS md_relax_table
[C (END
, 0)] = {
163 { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
164 { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
167 /* C (COND_JUMP, COND8) */
168 { COND8_F
, COND8_M
, COND8_LENGTH
, C (COND_JUMP
, COND12
) },
169 /* C (COND_JUMP, COND12) */
170 { COND12_F
, COND12_M
, COND12_LENGTH
, C (COND_JUMP
, COND32
), },
171 /* C (COND_JUMP, COND32) */
172 { COND32_F
, COND32_M
, COND32_LENGTH
, 0, },
173 { 0 }, { 0 }, { 0 }, { 0 },
174 { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
177 /* C (COND_JUMP_DELAY, COND8) */
178 { COND8_F
, COND8_M
, COND8_LENGTH
, C (COND_JUMP_DELAY
, COND12
) },
179 /* C (COND_JUMP_DELAY, COND12) */
180 { COND12_F
, COND12_M
, COND12_DELAY_LENGTH
, C (COND_JUMP_DELAY
, COND32
), },
181 /* C (COND_JUMP_DELAY, COND32) */
182 { COND32_F
, COND32_M
, COND32_LENGTH
, 0, },
183 { 0 }, { 0 }, { 0 }, { 0 },
184 { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
187 /* C (UNCOND_JUMP, UNCOND12) */
188 { UNCOND12_F
, UNCOND12_M
, UNCOND12_LENGTH
, C (UNCOND_JUMP
, UNCOND32
), },
189 /* C (UNCOND_JUMP, UNCOND32) */
190 { UNCOND32_F
, UNCOND32_M
, UNCOND32_LENGTH
, 0, },
191 { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
192 { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
195 static struct hash_control
*opcode_hash_control
; /* Opcode mnemonics */
198 This function is called once, at assembler startup time. This should
199 set up all the tables, etc that the MD part of the assembler needs
205 sh_opcode_info
*opcode
;
206 char *prev_name
= "";
210 /* The WinCE OS only supports little endian executables. */
211 target_big_endian
= 0;
214 target_big_endian
= 1;
217 target_arch
= arch_sh1_up
& ~(sh_dsp
? arch_sh3e_up
: arch_sh_dsp_up
);
218 valid_arch
= target_arch
;
220 opcode_hash_control
= hash_new ();
222 /* Insert unique names into hash table */
223 for (opcode
= sh_table
; opcode
->name
; opcode
++)
225 if (opcode
->arch
& target_arch
&& strcmp (prev_name
, opcode
->name
))
227 prev_name
= opcode
->name
;
228 hash_insert (opcode_hash_control
, opcode
->name
, (char *) opcode
);
232 /* Make all the opcodes with the same name point to the same
234 opcode
->name
= prev_name
;
241 static int reg_x
, reg_y
;
245 static expressionS immediate
; /* absolute expression */
255 /* try and parse a reg name, returns number of chars consumed */
257 parse_reg (src
, mode
, reg
)
262 /* We use !isalnum for the next character after the register name, to
263 make sure that we won't accidentally recognize a symbol name such as
264 'sram' as being a reference to the register 'sr'. */
268 if (src
[1] >= '0' && src
[1] <= '7' && strncmp (&src
[2], "_bank", 5) == 0
269 && ! isalnum ((unsigned char) src
[7]))
272 *reg
= (src
[1] - '0');
277 if (src
[2] >= '0' && src
[2] <= '5'
278 && ! isalnum ((unsigned char) src
[3]))
281 *reg
= 10 + src
[2] - '0';
285 if (src
[1] >= '0' && src
[1] <= '9'
286 && ! isalnum ((unsigned char) src
[2]))
289 *reg
= (src
[1] - '0');
293 if (src
[1] == 'e' && ! isalnum ((unsigned char) src
[2]))
298 if (src
[1] == 's' && ! isalnum ((unsigned char) src
[2]))
309 if (! isalnum ((unsigned char) src
[2]))
315 if (src
[2] == 'g' && ! isalnum ((unsigned char) src
[3]))
324 if (! isalnum ((unsigned char) src
[2]))
330 if (src
[2] == 'g' && ! isalnum ((unsigned char) src
[3]))
338 if (src
[1] == 'x' && src
[2] >= '0' && src
[2] <= '1'
339 && ! isalnum ((unsigned char) src
[3]))
342 *reg
= 4 + (src
[1] - '0');
345 if (src
[1] == 'y' && src
[2] >= '0' && src
[2] <= '1'
346 && ! isalnum ((unsigned char) src
[3]))
349 *reg
= 6 + (src
[1] - '0');
352 if (src
[1] == 's' && src
[2] >= '0' && src
[2] <= '3'
353 && ! isalnum ((unsigned char) src
[3]))
355 int n
= src
[1] - '0';
358 *reg
= n
| ((~n
& 2) << 1);
363 if (src
[0] == 'i' && src
[1] && ! isalnum ((unsigned char) src
[3]))
385 if (src
[0] == 'x' && src
[1] >= '0' && src
[1] <= '1'
386 && ! isalnum ((unsigned char) src
[2]))
389 *reg
= A_X0_NUM
+ src
[1] - '0';
393 if (src
[0] == 'y' && src
[1] >= '0' && src
[1] <= '1'
394 && ! isalnum ((unsigned char) src
[2]))
397 *reg
= A_Y0_NUM
+ src
[1] - '0';
401 if (src
[0] == 'm' && src
[1] >= '0' && src
[1] <= '1'
402 && ! isalnum ((unsigned char) src
[2]))
405 *reg
= src
[1] == '0' ? A_M0_NUM
: A_M1_NUM
;
411 && src
[2] == 'r' && ! isalnum ((unsigned char) src
[3]))
417 if (src
[0] == 's' && src
[1] == 'p' && src
[2] == 'c'
418 && ! isalnum ((unsigned char) src
[3]))
424 if (src
[0] == 's' && src
[1] == 'g' && src
[2] == 'r'
425 && ! isalnum ((unsigned char) src
[3]))
431 if (src
[0] == 'd' && src
[1] == 's' && src
[2] == 'r'
432 && ! isalnum ((unsigned char) src
[3]))
438 if (src
[0] == 'd' && src
[1] == 'b' && src
[2] == 'r'
439 && ! isalnum ((unsigned char) src
[3]))
445 if (src
[0] == 's' && src
[1] == 'r' && ! isalnum ((unsigned char) src
[2]))
451 if (src
[0] == 's' && src
[1] == 'p' && ! isalnum ((unsigned char) src
[2]))
458 if (src
[0] == 'p' && src
[1] == 'r' && ! isalnum ((unsigned char) src
[2]))
463 if (src
[0] == 'p' && src
[1] == 'c' && ! isalnum ((unsigned char) src
[2]))
468 if (src
[0] == 'g' && src
[1] == 'b' && src
[2] == 'r'
469 && ! isalnum ((unsigned char) src
[3]))
474 if (src
[0] == 'v' && src
[1] == 'b' && src
[2] == 'r'
475 && ! isalnum ((unsigned char) src
[3]))
481 if (src
[0] == 'm' && src
[1] == 'a' && src
[2] == 'c'
482 && ! isalnum ((unsigned char) src
[4]))
495 if (src
[0] == 'm' && src
[1] == 'o' && src
[2] == 'd'
496 && ! isalnum ((unsigned char) src
[4]))
501 if (src
[0] == 'f' && src
[1] == 'r')
505 if (src
[3] >= '0' && src
[3] <= '5'
506 && ! isalnum ((unsigned char) src
[4]))
509 *reg
= 10 + src
[3] - '0';
513 if (src
[2] >= '0' && src
[2] <= '9'
514 && ! isalnum ((unsigned char) src
[3]))
517 *reg
= (src
[2] - '0');
521 if (src
[0] == 'd' && src
[1] == 'r')
525 if (src
[3] >= '0' && src
[3] <= '4' && ! ((src
[3] - '0') & 1)
526 && ! isalnum ((unsigned char) src
[4]))
529 *reg
= 10 + src
[3] - '0';
533 if (src
[2] >= '0' && src
[2] <= '8' && ! ((src
[2] - '0') & 1)
534 && ! isalnum ((unsigned char) src
[3]))
537 *reg
= (src
[2] - '0');
541 if (src
[0] == 'x' && src
[1] == 'd')
545 if (src
[3] >= '0' && src
[3] <= '4' && ! ((src
[3] - '0') & 1)
546 && ! isalnum ((unsigned char) src
[4]))
549 *reg
= 11 + src
[3] - '0';
553 if (src
[2] >= '0' && src
[2] <= '8' && ! ((src
[2] - '0') & 1)
554 && ! isalnum ((unsigned char) src
[3]))
557 *reg
= (src
[2] - '0') + 1;
561 if (src
[0] == 'f' && src
[1] == 'v')
563 if (src
[2] == '1'&& src
[3] == '2' && ! isalnum ((unsigned char) src
[4]))
569 if ((src
[2] == '0' || src
[2] == '4' || src
[2] == '8')
570 && ! isalnum ((unsigned char) src
[3]))
573 *reg
= (src
[2] - '0');
577 if (src
[0] == 'f' && src
[1] == 'p' && src
[2] == 'u' && src
[3] == 'l'
578 && ! isalnum ((unsigned char) src
[4]))
584 if (src
[0] == 'f' && src
[1] == 'p' && src
[2] == 's' && src
[3] == 'c'
585 && src
[4] == 'r' && ! isalnum ((unsigned char) src
[5]))
591 if (src
[0] == 'x' && src
[1] == 'm' && src
[2] == 't' && src
[3] == 'r'
592 && src
[4] == 'x' && ! isalnum ((unsigned char) src
[5]))
601 static symbolS
*dot()
605 /* JF: '.' is pseudo symbol with value of current location
606 in current segment. */
607 fake
= FAKE_LABEL_NAME
;
608 return symbol_new (fake
,
610 (valueT
) frag_now_fix (),
624 save
= input_line_pointer
;
625 input_line_pointer
= s
;
626 expression (&immediate
);
627 if (immediate
.X_op
== O_absent
)
628 as_bad (_("missing operand"));
629 new = input_line_pointer
;
630 input_line_pointer
= save
;
635 /* The many forms of operand:
638 @Rn Register indirect
651 pr, gbr, vbr, macl, mach
666 /* Must be predecrement */
669 len
= parse_reg (src
, &mode
, &(op
->reg
));
671 as_bad (_("illegal register after @-"));
676 else if (src
[0] == '(')
678 /* Could be @(disp, rn), @(disp, gbr), @(disp, pc), @(r0, gbr) or
681 len
= parse_reg (src
, &mode
, &(op
->reg
));
682 if (len
&& mode
== A_REG_N
)
687 as_bad (_("must be @(r0,...)"));
691 /* Now can be rn or gbr */
692 len
= parse_reg (src
, &mode
, &(op
->reg
));
697 else if (mode
== A_REG_N
)
699 op
->type
= A_IND_R0_REG_N
;
703 as_bad (_("syntax error in @(r0,...)"));
708 /* Must be an @(disp,.. thing) */
709 src
= parse_exp (src
);
712 /* Now can be rn, gbr or pc */
713 len
= parse_reg (src
, &mode
, &op
->reg
);
718 op
->type
= A_DISP_REG_N
;
720 else if (mode
== A_GBR
)
722 op
->type
= A_DISP_GBR
;
724 else if (mode
== A_DISP_PC
)
726 /* Turn a plain @(4,pc) into @(.+4,pc) */
727 if (immediate
.X_op
== O_constant
) {
728 immediate
.X_add_symbol
= dot();
729 immediate
.X_op
= O_symbol
;
731 op
->type
= A_DISP_PC
;
735 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
740 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
745 as_bad (_("expecting )"));
751 src
+= parse_reg (src
, &mode
, &(op
->reg
));
754 as_bad (_("illegal register after @"));
759 if ((src
[0] == 'r' && src
[1] == '8')
760 || (src
[0] == 'i' && (src
[1] == 'x' || src
[1] == 's')))
765 if ((src
[0] == 'r' && src
[1] == '9')
766 || (src
[0] == 'i' && src
[1] == 'y'))
769 op
->type
= A_PMODY_N
;
783 get_operand (ptr
, op
)
794 *ptr
= parse_exp (src
);
799 else if (src
[0] == '@')
801 *ptr
= parse_at (src
, op
);
804 len
= parse_reg (src
, &mode
, &(op
->reg
));
813 /* Not a reg, the only thing left is a displacement */
814 *ptr
= parse_exp (src
);
815 op
->type
= A_DISP_PC
;
822 get_operands (info
, args
, operand
)
823 sh_opcode_info
*info
;
825 sh_operand_info
*operand
;
831 /* The pre-processor will eliminate whitespace in front of '@'
832 after the first argument; we may be called multiple times
833 from assemble_ppi, so don't insist on finding whitespace here. */
837 get_operand (&ptr
, operand
+ 0);
844 get_operand (&ptr
, operand
+ 1);
851 get_operand (&ptr
, operand
+ 2);
873 /* Passed a pointer to a list of opcodes which use different
874 addressing modes, return the opcode which matches the opcodes
880 get_specific (opcode
, operands
)
881 sh_opcode_info
*opcode
;
882 sh_operand_info
*operands
;
884 sh_opcode_info
*this_try
= opcode
;
885 char *name
= opcode
->name
;
890 if (this_try
->name
!= name
)
892 /* We've looked so far down the table that we've run out of
893 opcodes with the same name */
896 /* look at both operands needed by the opcodes and provided by
897 the user - since an arg test will often fail on the same arg
898 again and again, we'll try and test the last failing arg the
899 first on each opcode try */
901 for (n
= 0; this_try
->arg
[n
]; n
++)
903 sh_operand_info
*user
= operands
+ n
;
904 sh_arg_type arg
= this_try
->arg
[n
];
915 if (user
->type
!= arg
)
919 /* opcode needs r0 */
920 if (user
->type
!= A_REG_N
|| user
->reg
!= 0)
924 if (user
->type
!= A_R0_GBR
|| user
->reg
!= 0)
928 if (user
->type
!= F_REG_N
|| user
->reg
!= 0)
947 /* Opcode needs rn */
948 if (user
->type
!= arg
)
953 if (user
->type
!= D_REG_N
&& user
->type
!= X_REG_N
)
968 if (user
->type
!= arg
)
973 if (user
->type
!= arg
)
985 /* Opcode needs rn */
986 if (user
->type
!= arg
- A_REG_M
+ A_REG_N
)
992 if (user
->type
!= DSP_REG_N
)
1014 if (user
->type
!= DSP_REG_N
)
1036 if (user
->type
!= DSP_REG_N
)
1058 if (user
->type
!= DSP_REG_N
)
1080 if (user
->type
!= DSP_REG_N
)
1102 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_A0_NUM
)
1106 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_X0_NUM
)
1110 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_X1_NUM
)
1114 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_Y0_NUM
)
1118 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_Y1_NUM
)
1128 /* Opcode needs rn */
1129 if (user
->type
!= arg
- F_REG_M
+ F_REG_N
)
1134 if (user
->type
!= D_REG_N
&& user
->type
!= X_REG_N
)
1139 if (user
->type
!= XMTRX_M4
)
1145 printf (_("unhandled %d\n"), arg
);
1149 valid_arch
&= this_try
->arch
;
1158 check (operand
, low
, high
)
1159 expressionS
*operand
;
1163 if (operand
->X_op
!= O_constant
1164 || operand
->X_add_number
< low
1165 || operand
->X_add_number
> high
)
1167 as_bad (_("operand must be absolute in range %d..%d"), low
, high
);
1169 return operand
->X_add_number
;
1174 insert (where
, how
, pcrel
)
1179 fix_new_exp (frag_now
,
1180 where
- frag_now
->fr_literal
,
1188 build_relax (opcode
)
1189 sh_opcode_info
*opcode
;
1191 int high_byte
= target_big_endian
? 0 : 1;
1194 if (opcode
->arg
[0] == A_BDISP8
)
1196 int what
= (opcode
->nibbles
[1] & 4) ? COND_JUMP_DELAY
: COND_JUMP
;
1197 p
= frag_var (rs_machine_dependent
,
1198 md_relax_table
[C (what
, COND32
)].rlx_length
,
1199 md_relax_table
[C (what
, COND8
)].rlx_length
,
1201 immediate
.X_add_symbol
,
1202 immediate
.X_add_number
,
1204 p
[high_byte
] = (opcode
->nibbles
[0] << 4) | (opcode
->nibbles
[1]);
1206 else if (opcode
->arg
[0] == A_BDISP12
)
1208 p
= frag_var (rs_machine_dependent
,
1209 md_relax_table
[C (UNCOND_JUMP
, UNCOND32
)].rlx_length
,
1210 md_relax_table
[C (UNCOND_JUMP
, UNCOND12
)].rlx_length
,
1212 immediate
.X_add_symbol
,
1213 immediate
.X_add_number
,
1215 p
[high_byte
] = (opcode
->nibbles
[0] << 4);
1220 /* Now we know what sort of opcodes it is, lets build the bytes -
1223 build_Mytes (opcode
, operand
)
1224 sh_opcode_info
*opcode
;
1225 sh_operand_info
*operand
;
1230 char *output
= frag_more (2);
1231 int low_byte
= target_big_endian
? 1 : 0;
1237 for (index
= 0; index
< 4; index
++)
1239 sh_nibble_type i
= opcode
->nibbles
[index
];
1249 nbuf
[index
] = reg_n
;
1252 nbuf
[index
] = reg_m
;
1255 if (reg_n
< 2 || reg_n
> 5)
1256 as_bad (_("Invalid register: 'r%d'"), reg_n
);
1257 nbuf
[index
] = (reg_n
& 3) | 4;
1260 nbuf
[index
] = reg_n
| (reg_m
>> 2);
1263 nbuf
[index
] = reg_b
| 0x08;
1266 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4
, 0);
1269 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY4
, 0);
1272 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY2
, 0);
1275 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4
, 0);
1278 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY4
, 0);
1281 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY2
, 0);
1284 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8
, 0);
1287 insert (output
, BFD_RELOC_SH_PCRELIMM8BY4
, 1);
1290 insert (output
, BFD_RELOC_SH_PCRELIMM8BY2
, 1);
1293 printf (_("failed for %d\n"), i
);
1297 if (! target_big_endian
) {
1298 output
[1] = (nbuf
[0] << 4) | (nbuf
[1]);
1299 output
[0] = (nbuf
[2] << 4) | (nbuf
[3]);
1302 output
[0] = (nbuf
[0] << 4) | (nbuf
[1]);
1303 output
[1] = (nbuf
[2] << 4) | (nbuf
[3]);
1307 /* Find an opcode at the start of *STR_P in the hash table, and set
1308 *STR_P to the first character after the last one read. */
1310 static sh_opcode_info
*
1311 find_cooked_opcode (str_p
)
1315 unsigned char *op_start
;
1316 unsigned char *op_end
;
1319 /* Drop leading whitespace */
1323 /* Find the op code end.
1324 The pre-processor will eliminate whitespace in front of
1325 any '@' after the first argument; we may be called from
1326 assemble_ppi, so the opcode might be terminated by an '@'. */
1327 for (op_start
= op_end
= (unsigned char *) (str
);
1330 && !is_end_of_line
[*op_end
] && *op_end
!= ' ' && *op_end
!= '@';
1333 unsigned char c
= op_start
[nlen
];
1335 /* The machine independent code will convert CMP/EQ into cmp/EQ
1336 because it thinks the '/' is the end of the symbol. Moreover,
1337 all but the first sub-insn is a parallel processing insn won't
1338 be capitailzed. Instead of hacking up the machine independent
1339 code, we just deal with it here. */
1340 c
= isupper (c
) ? tolower (c
) : c
;
1349 as_bad (_("can't find opcode "));
1352 return (sh_opcode_info
*) hash_find (opcode_hash_control
, name
);
1355 /* Assemble a parallel processing insn. */
1356 #define DDT_BASE 0xf000 /* Base value for double data transfer insns */
1358 assemble_ppi (op_end
, opcode
)
1360 sh_opcode_info
*opcode
;
1369 /* Some insn ignore one or more register fields, e.g. psts machl,a0.
1370 Make sure we encode a defined insn pattern. */
1376 sh_operand_info operand
[3];
1378 if (opcode
->arg
[0] != A_END
)
1379 op_end
= get_operands (opcode
, op_end
, operand
);
1380 opcode
= get_specific (opcode
, operand
);
1383 /* Couldn't find an opcode which matched the operands */
1384 char *where
= frag_more (2);
1388 as_bad (_("invalid operands for opcode"));
1391 if (opcode
->nibbles
[0] != PPI
)
1392 as_bad (_("insn can't be combined with parallel processing insn"));
1394 switch (opcode
->nibbles
[1])
1399 as_bad (_("multiple movx specifications"));
1404 as_bad (_("multiple movy specifications"));
1410 as_bad (_("multiple movx specifications"));
1411 if (reg_n
< 4 || reg_n
> 5)
1412 as_bad (_("invalid movx address register"));
1413 if (opcode
->nibbles
[2] & 8)
1415 if (reg_m
== A_A1_NUM
)
1417 else if (reg_m
!= A_A0_NUM
)
1418 as_bad (_("invalid movx dsp register"));
1423 as_bad (_("invalid movx dsp register"));
1426 movx
+= ((reg_n
- 4) << 9) + (opcode
->nibbles
[2] << 2) + DDT_BASE
;
1431 as_bad (_("multiple movy specifications"));
1432 if (opcode
->nibbles
[2] & 8)
1434 /* Bit 3 in nibbles[2] is intended for bit 4 of the opcode,
1437 if (reg_m
== A_A1_NUM
)
1439 else if (reg_m
!= A_A0_NUM
)
1440 as_bad (_("invalid movy dsp register"));
1445 as_bad (_("invalid movy dsp register"));
1448 if (reg_n
< 6 || reg_n
> 7)
1449 as_bad (_("invalid movy address register"));
1450 movy
+= ((reg_n
- 6) << 8) + opcode
->nibbles
[2] + DDT_BASE
;
1454 if (immediate
.X_op
!= O_constant
)
1455 as_bad (_("dsp immediate shift value not constant"));
1456 field_b
= ((opcode
->nibbles
[2] << 12)
1457 | (immediate
.X_add_number
& 127) << 4
1462 as_bad (_("multiple parallel processing specifications"));
1463 field_b
= ((opcode
->nibbles
[2] << 12) + (opcode
->nibbles
[3] << 8)
1464 + (reg_x
<< 6) + (reg_y
<< 4) + reg_n
);
1468 as_bad (_("multiple condition specifications"));
1469 cond
= opcode
->nibbles
[2] << 8;
1471 goto skip_cond_check
;
1475 as_bad (_("multiple parallel processing specifications"));
1476 field_b
= ((opcode
->nibbles
[2] << 12) + (opcode
->nibbles
[3] << 8)
1477 + cond
+ (reg_x
<< 6) + (reg_y
<< 4) + reg_n
);
1483 if ((field_b
& 0xef00) != 0xa100)
1484 as_bad (_("insn cannot be combined with pmuls"));
1486 switch (field_b
& 0xf)
1489 field_b
+= 0 - A_X0_NUM
;
1492 field_b
+= 1 - A_Y0_NUM
;
1495 field_b
+= 2 - A_A0_NUM
;
1498 field_b
+= 3 - A_A1_NUM
;
1501 as_bad (_("bad padd / psub pmuls output operand"));
1504 field_b
+= 0x4000 + reg_efg
;
1511 as_bad (_("condition not followed by conditionalizable insn"));
1517 opcode
= find_cooked_opcode (&op_end
);
1521 (_("unrecognized characters at end of parallel processing insn")));
1526 move_code
= movx
| movy
;
1529 /* Parallel processing insn. */
1530 unsigned long ppi_code
= (movx
| movy
| 0xf800) << 16 | field_b
;
1532 output
= frag_more (4);
1533 if (! target_big_endian
)
1535 output
[3] = ppi_code
>> 8;
1536 output
[2] = ppi_code
;
1540 output
[2] = ppi_code
>> 8;
1541 output
[3] = ppi_code
;
1543 move_code
|= 0xf800;
1546 /* Just a double data transfer. */
1547 output
= frag_more (2);
1548 if (! target_big_endian
)
1550 output
[1] = move_code
>> 8;
1551 output
[0] = move_code
;
1555 output
[0] = move_code
>> 8;
1556 output
[1] = move_code
;
1560 /* This is the guts of the machine-dependent assembler. STR points to a
1561 machine dependent instruction. This function is supposed to emit
1562 the frags/bytes it assembles to.
1569 unsigned char *op_end
;
1570 sh_operand_info operand
[3];
1571 sh_opcode_info
*opcode
;
1573 opcode
= find_cooked_opcode (&str
);
1578 as_bad (_("unknown opcode"));
1583 && ! seg_info (now_seg
)->tc_segment_info_data
.in_code
)
1585 /* Output a CODE reloc to tell the linker that the following
1586 bytes are instructions, not data. */
1587 fix_new (frag_now
, frag_now_fix (), 2, &abs_symbol
, 0, 0,
1589 seg_info (now_seg
)->tc_segment_info_data
.in_code
= 1;
1592 if (opcode
->nibbles
[0] == PPI
)
1594 assemble_ppi (op_end
, opcode
);
1598 if (opcode
->arg
[0] == A_BDISP12
1599 || opcode
->arg
[0] == A_BDISP8
)
1601 parse_exp (op_end
+ 1);
1602 build_relax (opcode
);
1606 if (opcode
->arg
[0] == A_END
)
1608 /* Ignore trailing whitespace. If there is any, it has already
1609 been compressed to a single space. */
1615 op_end
= get_operands (opcode
, op_end
, operand
);
1617 opcode
= get_specific (opcode
, operand
);
1621 /* Couldn't find an opcode which matched the operands */
1622 char *where
= frag_more (2);
1626 as_bad (_("invalid operands for opcode"));
1631 as_bad (_("excess operands: '%s'"), op_end
);
1633 build_Mytes (opcode
, operand
);
1638 /* This routine is called each time a label definition is seen. It
1639 emits a BFD_RELOC_SH_LABEL reloc if necessary. */
1644 static fragS
*last_label_frag
;
1645 static int last_label_offset
;
1648 && seg_info (now_seg
)->tc_segment_info_data
.in_code
)
1652 offset
= frag_now_fix ();
1653 if (frag_now
!= last_label_frag
1654 || offset
!= last_label_offset
)
1656 fix_new (frag_now
, offset
, 2, &abs_symbol
, 0, 0, BFD_RELOC_SH_LABEL
);
1657 last_label_frag
= frag_now
;
1658 last_label_offset
= offset
;
1663 /* This routine is called when the assembler is about to output some
1664 data. It emits a BFD_RELOC_SH_DATA reloc if necessary. */
1667 sh_flush_pending_output ()
1670 && seg_info (now_seg
)->tc_segment_info_data
.in_code
)
1672 fix_new (frag_now
, frag_now_fix (), 2, &abs_symbol
, 0, 0,
1674 seg_info (now_seg
)->tc_segment_info_data
.in_code
= 0;
1679 DEFUN (md_undefined_symbol
, (name
),
1686 #ifndef BFD_ASSEMBLER
1689 DEFUN (tc_crawl_symbol_chain
, (headers
),
1690 object_headers
* headers
)
1692 printf (_("call to tc_crawl_symbol_chain \n"));
1696 DEFUN (tc_headers_hook
, (headers
),
1697 object_headers
* headers
)
1699 printf (_("call to tc_headers_hook \n"));
1705 /* Various routines to kill one day */
1706 /* Equal to MAX_PRECISION in atof-ieee.c */
1707 #define MAX_LITTLENUMS 6
1709 /* Turn a string in input_line_pointer into a floating point constant of type
1710 type, and store the appropriate bytes in *litP. The number of LITTLENUMS
1711 emitted is stored in *sizeP . An error message is returned, or NULL on OK.
1714 md_atof (type
, litP
, sizeP
)
1720 LITTLENUM_TYPE words
[4];
1736 return _("bad call to md_atof");
1739 t
= atof_ieee (input_line_pointer
, type
, words
);
1741 input_line_pointer
= t
;
1745 if (! target_big_endian
)
1747 for (i
= prec
- 1; i
>= 0; i
--)
1749 md_number_to_chars (litP
, (valueT
) words
[i
], 2);
1755 for (i
= 0; i
< prec
; i
++)
1757 md_number_to_chars (litP
, (valueT
) words
[i
], 2);
1765 /* Handle the .uses pseudo-op. This pseudo-op is used just before a
1766 call instruction. It refers to a label of the instruction which
1767 loads the register which the call uses. We use it to generate a
1768 special reloc for the linker. */
1777 as_warn (_(".uses pseudo-op seen when not relaxing"));
1781 if (ex
.X_op
!= O_symbol
|| ex
.X_add_number
!= 0)
1783 as_bad (_("bad .uses format"));
1784 ignore_rest_of_line ();
1788 fix_new_exp (frag_now
, frag_now_fix (), 2, &ex
, 1, BFD_RELOC_SH_USES
);
1790 demand_empty_rest_of_line ();
1793 CONST
char *md_shortopts
= "";
1794 struct option md_longopts
[] = {
1796 #define OPTION_RELAX (OPTION_MD_BASE)
1797 #define OPTION_LITTLE (OPTION_MD_BASE + 1)
1798 #define OPTION_SMALL (OPTION_LITTLE + 1)
1799 #define OPTION_DSP (OPTION_SMALL + 1)
1801 {"relax", no_argument
, NULL
, OPTION_RELAX
},
1802 {"little", no_argument
, NULL
, OPTION_LITTLE
},
1803 {"small", no_argument
, NULL
, OPTION_SMALL
},
1804 {"dsp", no_argument
, NULL
, OPTION_DSP
},
1805 {NULL
, no_argument
, NULL
, 0}
1807 size_t md_longopts_size
= sizeof(md_longopts
);
1810 md_parse_option (c
, arg
)
1822 target_big_endian
= 0;
1841 md_show_usage (stream
)
1844 fprintf(stream
, _("\
1846 -little generate little endian code\n\
1847 -relax alter jump instructions for long displacements\n\
1848 -small align sections to 4 byte boundaries, not 16\n"));
1852 tc_Nout_fix_to_chars ()
1854 printf (_("call to tc_Nout_fix_to_chars \n"));
1858 /* This struct is used to pass arguments to sh_count_relocs through
1859 bfd_map_over_sections. */
1861 struct sh_count_relocs
1863 /* Symbol we are looking for. */
1865 /* Count of relocs found. */
1869 /* Count the number of fixups in a section which refer to a particular
1870 symbol. When using BFD_ASSEMBLER, this is called via
1871 bfd_map_over_sections. */
1875 sh_count_relocs (abfd
, sec
, data
)
1880 struct sh_count_relocs
*info
= (struct sh_count_relocs
*) data
;
1881 segment_info_type
*seginfo
;
1885 seginfo
= seg_info (sec
);
1886 if (seginfo
== NULL
)
1890 for (fix
= seginfo
->fix_root
; fix
!= NULL
; fix
= fix
->fx_next
)
1892 if (fix
->fx_addsy
== sym
)
1900 /* Handle the count relocs for a particular section. When using
1901 BFD_ASSEMBLER, this is called via bfd_map_over_sections. */
1905 sh_frob_section (abfd
, sec
, ignore
)
1910 segment_info_type
*seginfo
;
1913 seginfo
= seg_info (sec
);
1914 if (seginfo
== NULL
)
1917 for (fix
= seginfo
->fix_root
; fix
!= NULL
; fix
= fix
->fx_next
)
1922 struct sh_count_relocs info
;
1924 if (fix
->fx_r_type
!= BFD_RELOC_SH_USES
)
1927 /* The BFD_RELOC_SH_USES reloc should refer to a defined local
1928 symbol in the same section. */
1929 sym
= fix
->fx_addsy
;
1931 || fix
->fx_subsy
!= NULL
1932 || fix
->fx_addnumber
!= 0
1933 || S_GET_SEGMENT (sym
) != sec
1934 #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF)
1935 || S_GET_STORAGE_CLASS (sym
) == C_EXT
1937 || S_IS_EXTERNAL (sym
))
1939 as_warn_where (fix
->fx_file
, fix
->fx_line
,
1940 _(".uses does not refer to a local symbol in the same section"));
1944 /* Look through the fixups again, this time looking for one
1945 at the same location as sym. */
1946 val
= S_GET_VALUE (sym
);
1947 for (fscan
= seginfo
->fix_root
;
1949 fscan
= fscan
->fx_next
)
1950 if (val
== fscan
->fx_frag
->fr_address
+ fscan
->fx_where
1951 && fscan
->fx_r_type
!= BFD_RELOC_SH_ALIGN
1952 && fscan
->fx_r_type
!= BFD_RELOC_SH_CODE
1953 && fscan
->fx_r_type
!= BFD_RELOC_SH_DATA
1954 && fscan
->fx_r_type
!= BFD_RELOC_SH_LABEL
)
1958 as_warn_where (fix
->fx_file
, fix
->fx_line
,
1959 _("can't find fixup pointed to by .uses"));
1963 if (fscan
->fx_tcbit
)
1965 /* We've already done this one. */
1969 /* fscan should also be a fixup to a local symbol in the same
1971 sym
= fscan
->fx_addsy
;
1973 || fscan
->fx_subsy
!= NULL
1974 || fscan
->fx_addnumber
!= 0
1975 || S_GET_SEGMENT (sym
) != sec
1976 #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF)
1977 || S_GET_STORAGE_CLASS (sym
) == C_EXT
1979 || S_IS_EXTERNAL (sym
))
1981 as_warn_where (fix
->fx_file
, fix
->fx_line
,
1982 _(".uses target does not refer to a local symbol in the same section"));
1986 /* Now we look through all the fixups of all the sections,
1987 counting the number of times we find a reference to sym. */
1990 #ifdef BFD_ASSEMBLER
1991 bfd_map_over_sections (stdoutput
, sh_count_relocs
, (PTR
) &info
);
1996 for (iscan
= SEG_E0
; iscan
< SEG_UNKNOWN
; iscan
++)
1997 sh_count_relocs ((bfd
*) NULL
, iscan
, (PTR
) &info
);
2004 /* Generate a BFD_RELOC_SH_COUNT fixup at the location of sym.
2005 We have already adjusted the value of sym to include the
2006 fragment address, so we undo that adjustment here. */
2007 subseg_change (sec
, 0);
2008 fix_new (symbol_get_frag (sym
),
2009 S_GET_VALUE (sym
) - symbol_get_frag (sym
)->fr_address
,
2010 4, &abs_symbol
, info
.count
, 0, BFD_RELOC_SH_COUNT
);
2014 /* This function is called after the symbol table has been completed,
2015 but before the relocs or section contents have been written out.
2016 If we have seen any .uses pseudo-ops, they point to an instruction
2017 which loads a register with the address of a function. We look
2018 through the fixups to find where the function address is being
2019 loaded from. We then generate a COUNT reloc giving the number of
2020 times that function address is referred to. The linker uses this
2021 information when doing relaxing, to decide when it can eliminate
2022 the stored function address entirely. */
2030 #ifdef BFD_ASSEMBLER
2031 bfd_map_over_sections (stdoutput
, sh_frob_section
, (PTR
) NULL
);
2036 for (iseg
= SEG_E0
; iseg
< SEG_UNKNOWN
; iseg
++)
2037 sh_frob_section ((bfd
*) NULL
, iseg
, (PTR
) NULL
);
2042 /* Called after relaxing. Set the correct sizes of the fragments, and
2043 create relocs so that md_apply_fix will fill in the correct values. */
2046 md_convert_frag (headers
, seg
, fragP
)
2047 #ifdef BFD_ASSEMBLER
2050 object_headers
*headers
;
2057 switch (fragP
->fr_subtype
)
2059 case C (COND_JUMP
, COND8
):
2060 case C (COND_JUMP_DELAY
, COND8
):
2061 subseg_change (seg
, 0);
2062 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
, fragP
->fr_offset
,
2063 1, BFD_RELOC_SH_PCDISP8BY2
);
2068 case C (UNCOND_JUMP
, UNCOND12
):
2069 subseg_change (seg
, 0);
2070 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
, fragP
->fr_offset
,
2071 1, BFD_RELOC_SH_PCDISP12BY2
);
2076 case C (UNCOND_JUMP
, UNCOND32
):
2077 case C (UNCOND_JUMP
, UNDEF_WORD_DISP
):
2078 if (fragP
->fr_symbol
== NULL
)
2079 as_bad (_("at 0x%lx, displacement overflows 12-bit field"),
2080 (unsigned long) fragP
->fr_address
);
2081 else if (S_IS_DEFINED (fragP
->fr_symbol
))
2082 as_bad (_("at 0x%lx, displacement to defined symbol %s overflows 12-bit field"),
2083 (unsigned long) fragP
->fr_address
,
2084 S_GET_NAME (fragP
->fr_symbol
));
2086 as_bad (_("at 0x%lx, displacement to undefined symbol %s overflows 12-bit field"),
2087 (unsigned long) fragP
->fr_address
,
2088 S_GET_NAME (fragP
->fr_symbol
));
2090 #if 0 /* This code works, but generates poor code and the compiler
2091 should never produce a sequence that requires it to be used. */
2093 /* A jump wont fit in 12 bits, make code which looks like
2099 int t
= buffer
[0] & 0x10;
2101 buffer
[highbyte
] = 0xa0; /* branch over move and disp */
2102 buffer
[lowbyte
] = 3;
2103 buffer
[highbyte
+2] = 0xd0 | JREG
; /* Build mov insn */
2104 buffer
[lowbyte
+2] = 0x00;
2106 buffer
[highbyte
+4] = 0; /* space for 32 bit jump disp */
2107 buffer
[lowbyte
+4] = 0;
2108 buffer
[highbyte
+6] = 0;
2109 buffer
[lowbyte
+6] = 0;
2111 buffer
[highbyte
+8] = 0x40 | JREG
; /* Build jmp @JREG */
2112 buffer
[lowbyte
+8] = t
? 0xb : 0x2b;
2114 buffer
[highbyte
+10] = 0x20; /* build nop */
2115 buffer
[lowbyte
+10] = 0x0b;
2117 /* Make reloc for the long disp */
2125 fragP
->fr_fix
+= UNCOND32_LENGTH
;
2132 case C (COND_JUMP
, COND12
):
2133 case C (COND_JUMP_DELAY
, COND12
):
2134 /* A bcond won't fit, so turn it into a b!cond; bra disp; nop */
2135 /* I found that a relax failure for gcc.c-torture/execute/930628-1.c
2136 was due to gas incorrectly relaxing an out-of-range conditional
2137 branch with delay slot. It turned:
2138 bf.s L6 (slot mov.l r12,@(44,r0))
2141 2c: 8f 01 a0 8b bf.s 32 <_main+32> (slot bra L6)
2143 32: 10 cb mov.l r12,@(44,r0)
2144 Therefore, branches with delay slots have to be handled
2145 differently from ones without delay slots. */
2147 unsigned char *buffer
=
2148 (unsigned char *) (fragP
->fr_fix
+ fragP
->fr_literal
);
2149 int highbyte
= target_big_endian
? 0 : 1;
2150 int lowbyte
= target_big_endian
? 1 : 0;
2151 int delay
= fragP
->fr_subtype
== C (COND_JUMP_DELAY
, COND12
);
2153 /* Toggle the true/false bit of the bcond. */
2154 buffer
[highbyte
] ^= 0x2;
2156 /* If this is a dalayed branch, we may not put the the bra in the
2157 slot. So we change it to a non-delayed branch, like that:
2158 b! cond slot_label; bra disp; slot_label: slot_insn
2159 ??? We should try if swapping the conditional branch and
2160 its delay-slot insn already makes the branch reach. */
2162 /* Build a relocation to six / four bytes farther on. */
2163 subseg_change (seg
, 0);
2164 fix_new (fragP
, fragP
->fr_fix
, 2,
2165 #ifdef BFD_ASSEMBLER
2166 section_symbol (seg
),
2168 seg_info (seg
)->dot
,
2170 fragP
->fr_address
+ fragP
->fr_fix
+ (delay
? 4 : 6),
2171 1, BFD_RELOC_SH_PCDISP8BY2
);
2173 /* Set up a jump instruction. */
2174 buffer
[highbyte
+ 2] = 0xa0;
2175 buffer
[lowbyte
+ 2] = 0;
2176 fix_new (fragP
, fragP
->fr_fix
+ 2, 2, fragP
->fr_symbol
,
2177 fragP
->fr_offset
, 1, BFD_RELOC_SH_PCDISP12BY2
);
2181 buffer
[highbyte
] &= ~0x4; /* Removes delay slot from branch. */
2186 /* Fill in a NOP instruction. */
2187 buffer
[highbyte
+ 4] = 0x0;
2188 buffer
[lowbyte
+ 4] = 0x9;
2197 case C (COND_JUMP
, COND32
):
2198 case C (COND_JUMP_DELAY
, COND32
):
2199 case C (COND_JUMP
, UNDEF_WORD_DISP
):
2200 case C (COND_JUMP_DELAY
, UNDEF_WORD_DISP
):
2201 if (fragP
->fr_symbol
== NULL
)
2202 as_bad (_("at 0x%lx, displacement overflows 8-bit field"),
2203 (unsigned long) fragP
->fr_address
);
2204 else if (S_IS_DEFINED (fragP
->fr_symbol
))
2205 as_bad (_("at 0x%lx, displacement to defined symbol %s overflows 8-bit field "),
2206 (unsigned long) fragP
->fr_address
,
2207 S_GET_NAME (fragP
->fr_symbol
));
2209 as_bad (_("at 0x%lx, displacement to undefined symbol %s overflows 8-bit field "),
2210 (unsigned long) fragP
->fr_address
,
2211 S_GET_NAME (fragP
->fr_symbol
));
2213 #if 0 /* This code works, but generates poor code, and the compiler
2214 should never produce a sequence that requires it to be used. */
2216 /* A bcond won't fit and it won't go into a 12 bit
2217 displacement either, the code sequence looks like:
2226 buffer
[0] ^= 0x2; /* Toggle T/F bit */
2228 buffer
[1] = 5; /* branch over mov, jump, nop and ptr */
2229 buffer
[2] = 0xd0 | JREG
; /* Build mov insn */
2231 buffer
[4] = 0x40 | JREG
; /* Build jmp @JREG */
2233 buffer
[6] = 0x20; /* build nop */
2235 buffer
[8] = 0; /* space for 32 bit jump disp */
2241 /* Make reloc for the long disp */
2249 fragP
->fr_fix
+= COND32_LENGTH
;
2260 if (donerelax
&& !sh_relax
)
2261 as_warn_where (fragP
->fr_file
, fragP
->fr_line
,
2262 _("overflow in branch to %s; converted into longer instruction sequence"),
2263 (fragP
->fr_symbol
!= NULL
2264 ? S_GET_NAME (fragP
->fr_symbol
)
2269 DEFUN (md_section_align
, (seg
, size
),
2273 #ifdef BFD_ASSEMBLER
2276 #else /* ! OBJ_ELF */
2277 return ((size
+ (1 << bfd_get_section_alignment (stdoutput
, seg
)) - 1)
2278 & (-1 << bfd_get_section_alignment (stdoutput
, seg
)));
2279 #endif /* ! OBJ_ELF */
2280 #else /* ! BFD_ASSEMBLER */
2281 return ((size
+ (1 << section_alignment
[(int) seg
]) - 1)
2282 & (-1 << section_alignment
[(int) seg
]));
2283 #endif /* ! BFD_ASSEMBLER */
2286 /* This static variable is set by s_uacons to tell sh_cons_align that
2287 the expession does not need to be aligned. */
2289 static int sh_no_align_cons
= 0;
2291 /* This handles the unaligned space allocation pseudo-ops, such as
2292 .uaword. .uaword is just like .word, but the value does not need
2299 /* Tell sh_cons_align not to align this value. */
2300 sh_no_align_cons
= 1;
2304 /* If a .word, et. al., pseud-op is seen, warn if the value is not
2305 aligned correctly. Note that this can cause warnings to be issued
2306 when assembling initialized structured which were declared with the
2307 packed attribute. FIXME: Perhaps we should require an option to
2308 enable this warning? */
2311 sh_cons_align (nbytes
)
2317 if (sh_no_align_cons
)
2319 /* This is an unaligned pseudo-op. */
2320 sh_no_align_cons
= 0;
2325 while ((nbytes
& 1) == 0)
2334 if (now_seg
== absolute_section
)
2336 if ((abs_section_offset
& ((1 << nalign
) - 1)) != 0)
2337 as_warn (_("misaligned data"));
2341 p
= frag_var (rs_align_code
, 1, 1, (relax_substateT
) 0,
2342 (symbolS
*) NULL
, (offsetT
) nalign
, (char *) NULL
);
2344 record_alignment (now_seg
, nalign
);
2347 /* When relaxing, we need to output a reloc for any .align directive
2348 that requests alignment to a four byte boundary or larger. This is
2349 also where we check for misaligned data. */
2352 sh_handle_align (frag
)
2356 && frag
->fr_type
== rs_align
2357 && frag
->fr_address
+ frag
->fr_fix
> 0
2358 && frag
->fr_offset
> 1
2359 && now_seg
!= bss_section
)
2360 fix_new (frag
, frag
->fr_fix
, 2, &abs_symbol
, frag
->fr_offset
, 0,
2361 BFD_RELOC_SH_ALIGN
);
2363 if (frag
->fr_type
== rs_align_code
2364 && frag
->fr_next
->fr_address
- frag
->fr_address
- frag
->fr_fix
!= 0)
2365 as_warn_where (frag
->fr_file
, frag
->fr_line
, _("misaligned data"));
2368 /* This macro decides whether a particular reloc is an entry in a
2369 switch table. It is used when relaxing, because the linker needs
2370 to know about all such entries so that it can adjust them if
2373 #ifdef BFD_ASSEMBLER
2374 #define SWITCH_TABLE_CONS(fix) (0)
2376 #define SWITCH_TABLE_CONS(fix) \
2377 ((fix)->fx_r_type == 0 \
2378 && ((fix)->fx_size == 2 \
2379 || (fix)->fx_size == 1 \
2380 || (fix)->fx_size == 4))
2383 #define SWITCH_TABLE(fix) \
2384 ((fix)->fx_addsy != NULL \
2385 && (fix)->fx_subsy != NULL \
2386 && S_GET_SEGMENT ((fix)->fx_addsy) == text_section \
2387 && S_GET_SEGMENT ((fix)->fx_subsy) == text_section \
2388 && ((fix)->fx_r_type == BFD_RELOC_32 \
2389 || (fix)->fx_r_type == BFD_RELOC_16 \
2390 || (fix)->fx_r_type == BFD_RELOC_8 \
2391 || SWITCH_TABLE_CONS (fix)))
2393 /* See whether we need to force a relocation into the output file.
2394 This is used to force out switch and PC relative relocations when
2398 sh_force_relocation (fix
)
2402 if (fix
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
2403 || fix
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
2409 return (fix
->fx_pcrel
2410 || SWITCH_TABLE (fix
)
2411 || fix
->fx_r_type
== BFD_RELOC_SH_COUNT
2412 || fix
->fx_r_type
== BFD_RELOC_SH_ALIGN
2413 || fix
->fx_r_type
== BFD_RELOC_SH_CODE
2414 || fix
->fx_r_type
== BFD_RELOC_SH_DATA
2415 || fix
->fx_r_type
== BFD_RELOC_SH_LABEL
);
2420 sh_fix_adjustable (fixP
)
2424 if (fixP
->fx_addsy
== NULL
)
2427 /* We need the symbol name for the VTABLE entries */
2428 if (fixP
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
2429 || fixP
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
2435 void sh_elf_final_processing()
2439 /* Set file-specific flags to indicate if this code needs
2440 a processor with the sh-dsp / sh3e ISA to execute. */
2441 if (valid_arch
& arch_sh1
)
2443 else if (valid_arch
& arch_sh2
)
2445 else if (valid_arch
& arch_sh_dsp
)
2447 else if (valid_arch
& arch_sh3
)
2449 else if (valid_arch
& arch_sh3_dsp
)
2451 else if (valid_arch
& arch_sh3e
)
2453 else if (valid_arch
& arch_sh4
)
2458 elf_elfheader (stdoutput
)->e_flags
&= ~EF_SH_MACH_MASK
;
2459 elf_elfheader (stdoutput
)->e_flags
|= val
;
2463 /* Apply a fixup to the object file. */
2465 #ifdef BFD_ASSEMBLER
2467 md_apply_fix (fixP
, valp
)
2472 md_apply_fix (fixP
, val
)
2477 char *buf
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
2478 int lowbyte
= target_big_endian
? 1 : 0;
2479 int highbyte
= target_big_endian
? 0 : 1;
2480 #ifdef BFD_ASSEMBLER
2486 #ifdef BFD_ASSEMBLER
2487 /* adjust_reloc_syms won't convert a reloc against a weak symbol
2488 into a reloc against a section, but bfd_install_relocation will
2489 screw up if the symbol is defined, so we have to adjust val here
2490 to avoid the screw up later. */
2491 if (fixP
->fx_addsy
!= NULL
2492 && S_IS_WEAK (fixP
->fx_addsy
))
2493 val
-= S_GET_VALUE (fixP
->fx_addsy
);
2496 #ifndef BFD_ASSEMBLER
2497 if (fixP
->fx_r_type
== 0)
2499 if (fixP
->fx_size
== 2)
2500 fixP
->fx_r_type
= BFD_RELOC_16
;
2501 else if (fixP
->fx_size
== 4)
2502 fixP
->fx_r_type
= BFD_RELOC_32
;
2503 else if (fixP
->fx_size
== 1)
2504 fixP
->fx_r_type
= BFD_RELOC_8
;
2512 switch (fixP
->fx_r_type
)
2514 case BFD_RELOC_SH_IMM4
:
2516 *buf
= (*buf
& 0xf0) | (val
& 0xf);
2519 case BFD_RELOC_SH_IMM4BY2
:
2522 *buf
= (*buf
& 0xf0) | ((val
>> 1) & 0xf);
2525 case BFD_RELOC_SH_IMM4BY4
:
2528 *buf
= (*buf
& 0xf0) | ((val
>> 2) & 0xf);
2531 case BFD_RELOC_SH_IMM8BY2
:
2537 case BFD_RELOC_SH_IMM8BY4
:
2544 case BFD_RELOC_SH_IMM8
:
2545 /* Sometimes the 8 bit value is sign extended (e.g., add) and
2546 sometimes it is not (e.g., and). We permit any 8 bit value.
2547 Note that adding further restrictions may invalidate
2548 reasonable looking assembly code, such as ``and -0x1,r0''. */
2554 case BFD_RELOC_SH_PCRELIMM8BY4
:
2555 /* The lower two bits of the PC are cleared before the
2556 displacement is added in. We can assume that the destination
2557 is on a 4 byte bounday. If this instruction is also on a 4
2558 byte boundary, then we want
2560 and target - here is a multiple of 4.
2561 Otherwise, we are on a 2 byte boundary, and we want
2562 (target - (here - 2)) / 4
2563 and target - here is not a multiple of 4. Computing
2564 (target - (here - 2)) / 4 == (target - here + 2) / 4
2565 works for both cases, since in the first case the addition of
2566 2 will be removed by the division. target - here is in the
2568 val
= (val
+ 2) / 4;
2570 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
2574 case BFD_RELOC_SH_PCRELIMM8BY2
:
2577 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
2581 case BFD_RELOC_SH_PCDISP8BY2
:
2583 if (val
< -0x80 || val
> 0x7f)
2584 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
2588 case BFD_RELOC_SH_PCDISP12BY2
:
2590 if (val
< -0x800 || val
>= 0x7ff)
2591 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
2592 buf
[lowbyte
] = val
& 0xff;
2593 buf
[highbyte
] |= (val
>> 8) & 0xf;
2597 if (! target_big_endian
)
2614 if (! target_big_endian
)
2626 case BFD_RELOC_SH_USES
:
2627 /* Pass the value into sh_coff_reloc_mangle. */
2628 fixP
->fx_addnumber
= val
;
2631 case BFD_RELOC_SH_COUNT
:
2632 case BFD_RELOC_SH_ALIGN
:
2633 case BFD_RELOC_SH_CODE
:
2634 case BFD_RELOC_SH_DATA
:
2635 case BFD_RELOC_SH_LABEL
:
2636 /* Nothing to do here. */
2639 case BFD_RELOC_VTABLE_INHERIT
:
2640 case BFD_RELOC_VTABLE_ENTRY
:
2642 #ifdef BFD_ASSEMBLER
2654 if ((val
& ((1 << shift
) - 1)) != 0)
2655 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("misaligned offset"));
2659 val
= ((val
>> shift
)
2660 | ((long) -1 & ~ ((long) -1 >> shift
)));
2662 if (max
!= 0 && (val
< min
|| val
> max
))
2663 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("offset out of range"));
2665 #ifdef BFD_ASSEMBLER
2670 /* Called just before address relaxation. Return the length
2671 by which a fragment must grow to reach it's destination. */
2674 md_estimate_size_before_relax (fragP
, segment_type
)
2675 register fragS
*fragP
;
2676 register segT segment_type
;
2678 switch (fragP
->fr_subtype
)
2680 case C (UNCOND_JUMP
, UNDEF_DISP
):
2681 /* used to be a branch to somewhere which was unknown */
2682 if (!fragP
->fr_symbol
)
2684 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNCOND12
);
2685 fragP
->fr_var
= md_relax_table
[C (UNCOND_JUMP
, UNCOND12
)].rlx_length
;
2687 else if (S_GET_SEGMENT (fragP
->fr_symbol
) == segment_type
)
2689 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNCOND12
);
2690 fragP
->fr_var
= md_relax_table
[C (UNCOND_JUMP
, UNCOND12
)].rlx_length
;
2694 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNDEF_WORD_DISP
);
2695 fragP
->fr_var
= md_relax_table
[C (UNCOND_JUMP
, UNCOND32
)].rlx_length
;
2696 return md_relax_table
[C (UNCOND_JUMP
, UNCOND32
)].rlx_length
;
2702 case C (COND_JUMP
, UNDEF_DISP
):
2703 case C (COND_JUMP_DELAY
, UNDEF_DISP
):
2704 /* used to be a branch to somewhere which was unknown */
2705 if (fragP
->fr_symbol
2706 && S_GET_SEGMENT (fragP
->fr_symbol
) == segment_type
)
2708 int what
= GET_WHAT (fragP
->fr_subtype
);
2709 /* Got a symbol and it's defined in this segment, become byte
2710 sized - maybe it will fix up */
2711 fragP
->fr_subtype
= C (what
, COND8
);
2712 fragP
->fr_var
= md_relax_table
[C (what
, COND8
)].rlx_length
;
2714 else if (fragP
->fr_symbol
)
2716 int what
= GET_WHAT (fragP
->fr_subtype
);
2717 /* Its got a segment, but its not ours, so it will always be long */
2718 fragP
->fr_subtype
= C (what
, UNDEF_WORD_DISP
);
2719 fragP
->fr_var
= md_relax_table
[C (what
, COND32
)].rlx_length
;
2720 return md_relax_table
[C (what
, COND32
)].rlx_length
;
2724 int what
= GET_WHAT (fragP
->fr_subtype
);
2725 /* We know the abs value */
2726 fragP
->fr_subtype
= C (what
, COND8
);
2727 fragP
->fr_var
= md_relax_table
[C (what
, COND8
)].rlx_length
;
2732 return fragP
->fr_var
;
2735 /* Put number into target byte order */
2738 md_number_to_chars (ptr
, use
, nbytes
)
2743 if (! target_big_endian
)
2744 number_to_chars_littleendian (ptr
, use
, nbytes
);
2746 number_to_chars_bigendian (ptr
, use
, nbytes
);
2750 md_pcrel_from (fixP
)
2753 return fixP
->fx_size
+ fixP
->fx_where
+ fixP
->fx_frag
->fr_address
+ 2;
2759 tc_coff_sizemachdep (frag
)
2762 return md_relax_table
[frag
->fr_subtype
].rlx_length
;
2765 #endif /* OBJ_COFF */
2767 /* When we align the .text section, insert the correct NOP pattern. */
2770 sh_do_align (n
, fill
, len
, max
)
2777 && subseg_text_p (now_seg
)
2780 static const unsigned char big_nop_pattern
[] = { 0x00, 0x09 };
2781 static const unsigned char little_nop_pattern
[] = { 0x09, 0x00 };
2783 /* First align to a 2 byte boundary, in case there is an odd
2785 frag_align (1, 0, 0);
2786 if (target_big_endian
)
2787 frag_align_pattern (n
, big_nop_pattern
, sizeof big_nop_pattern
, max
);
2789 frag_align_pattern (n
, little_nop_pattern
, sizeof little_nop_pattern
,
2797 #ifndef BFD_ASSEMBLER
2800 /* Map BFD relocs to SH COFF relocs. */
2804 bfd_reloc_code_real_type bfd_reloc
;
2808 static const struct reloc_map coff_reloc_map
[] =
2810 { BFD_RELOC_32
, R_SH_IMM32
},
2811 { BFD_RELOC_16
, R_SH_IMM16
},
2812 { BFD_RELOC_8
, R_SH_IMM8
},
2813 { BFD_RELOC_SH_PCDISP8BY2
, R_SH_PCDISP8BY2
},
2814 { BFD_RELOC_SH_PCDISP12BY2
, R_SH_PCDISP
},
2815 { BFD_RELOC_SH_IMM4
, R_SH_IMM4
},
2816 { BFD_RELOC_SH_IMM4BY2
, R_SH_IMM4BY2
},
2817 { BFD_RELOC_SH_IMM4BY4
, R_SH_IMM4BY4
},
2818 { BFD_RELOC_SH_IMM8
, R_SH_IMM8
},
2819 { BFD_RELOC_SH_IMM8BY2
, R_SH_IMM8BY2
},
2820 { BFD_RELOC_SH_IMM8BY4
, R_SH_IMM8BY4
},
2821 { BFD_RELOC_SH_PCRELIMM8BY2
, R_SH_PCRELIMM8BY2
},
2822 { BFD_RELOC_SH_PCRELIMM8BY4
, R_SH_PCRELIMM8BY4
},
2823 { BFD_RELOC_8_PCREL
, R_SH_SWITCH8
},
2824 { BFD_RELOC_SH_SWITCH16
, R_SH_SWITCH16
},
2825 { BFD_RELOC_SH_SWITCH32
, R_SH_SWITCH32
},
2826 { BFD_RELOC_SH_USES
, R_SH_USES
},
2827 { BFD_RELOC_SH_COUNT
, R_SH_COUNT
},
2828 { BFD_RELOC_SH_ALIGN
, R_SH_ALIGN
},
2829 { BFD_RELOC_SH_CODE
, R_SH_CODE
},
2830 { BFD_RELOC_SH_DATA
, R_SH_DATA
},
2831 { BFD_RELOC_SH_LABEL
, R_SH_LABEL
},
2832 { BFD_RELOC_UNUSED
, 0 }
2835 /* Adjust a reloc for the SH. This is similar to the generic code,
2836 but does some minor tweaking. */
2839 sh_coff_reloc_mangle (seg
, fix
, intr
, paddr
)
2840 segment_info_type
*seg
;
2842 struct internal_reloc
*intr
;
2845 symbolS
*symbol_ptr
= fix
->fx_addsy
;
2848 intr
->r_vaddr
= paddr
+ fix
->fx_frag
->fr_address
+ fix
->fx_where
;
2850 if (! SWITCH_TABLE (fix
))
2852 const struct reloc_map
*rm
;
2854 for (rm
= coff_reloc_map
; rm
->bfd_reloc
!= BFD_RELOC_UNUSED
; rm
++)
2855 if (rm
->bfd_reloc
== (bfd_reloc_code_real_type
) fix
->fx_r_type
)
2857 if (rm
->bfd_reloc
== BFD_RELOC_UNUSED
)
2858 as_bad_where (fix
->fx_file
, fix
->fx_line
,
2859 _("Can not represent %s relocation in this object file format"),
2860 bfd_get_reloc_code_name (fix
->fx_r_type
));
2861 intr
->r_type
= rm
->sh_reloc
;
2868 if (fix
->fx_r_type
== BFD_RELOC_16
)
2869 intr
->r_type
= R_SH_SWITCH16
;
2870 else if (fix
->fx_r_type
== BFD_RELOC_8
)
2871 intr
->r_type
= R_SH_SWITCH8
;
2872 else if (fix
->fx_r_type
== BFD_RELOC_32
)
2873 intr
->r_type
= R_SH_SWITCH32
;
2877 /* For a switch reloc, we set r_offset to the difference between
2878 the reloc address and the subtrahend. When the linker is
2879 doing relaxing, it can use the determine the starting and
2880 ending points of the switch difference expression. */
2881 intr
->r_offset
= intr
->r_vaddr
- S_GET_VALUE (fix
->fx_subsy
);
2884 /* PC relative relocs are always against the current section. */
2885 if (symbol_ptr
== NULL
)
2887 switch (fix
->fx_r_type
)
2889 case BFD_RELOC_SH_PCRELIMM8BY2
:
2890 case BFD_RELOC_SH_PCRELIMM8BY4
:
2891 case BFD_RELOC_SH_PCDISP8BY2
:
2892 case BFD_RELOC_SH_PCDISP12BY2
:
2893 case BFD_RELOC_SH_USES
:
2894 symbol_ptr
= seg
->dot
;
2901 if (fix
->fx_r_type
== BFD_RELOC_SH_USES
)
2903 /* We can't store the offset in the object file, since this
2904 reloc does not take up any space, so we store it in r_offset.
2905 The fx_addnumber field was set in md_apply_fix. */
2906 intr
->r_offset
= fix
->fx_addnumber
;
2908 else if (fix
->fx_r_type
== BFD_RELOC_SH_COUNT
)
2910 /* We can't store the count in the object file, since this reloc
2911 does not take up any space, so we store it in r_offset. The
2912 fx_offset field was set when the fixup was created in
2913 sh_coff_frob_file. */
2914 intr
->r_offset
= fix
->fx_offset
;
2915 /* This reloc is always absolute. */
2918 else if (fix
->fx_r_type
== BFD_RELOC_SH_ALIGN
)
2920 /* Store the alignment in the r_offset field. */
2921 intr
->r_offset
= fix
->fx_offset
;
2922 /* This reloc is always absolute. */
2925 else if (fix
->fx_r_type
== BFD_RELOC_SH_CODE
2926 || fix
->fx_r_type
== BFD_RELOC_SH_DATA
2927 || fix
->fx_r_type
== BFD_RELOC_SH_LABEL
)
2929 /* These relocs are always absolute. */
2933 /* Turn the segment of the symbol into an offset. */
2934 if (symbol_ptr
!= NULL
)
2936 dot
= segment_info
[S_GET_SEGMENT (symbol_ptr
)].dot
;
2938 intr
->r_symndx
= dot
->sy_number
;
2940 intr
->r_symndx
= symbol_ptr
->sy_number
;
2943 intr
->r_symndx
= -1;
2946 #endif /* OBJ_COFF */
2947 #endif /* ! BFD_ASSEMBLER */
2949 #ifdef BFD_ASSEMBLER
2951 /* Create a reloc. */
2954 tc_gen_reloc (section
, fixp
)
2959 bfd_reloc_code_real_type r_type
;
2961 rel
= (arelent
*) xmalloc (sizeof (arelent
));
2962 rel
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
2963 *rel
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
2964 rel
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
2966 r_type
= fixp
->fx_r_type
;
2968 if (SWITCH_TABLE (fixp
))
2970 rel
->addend
= rel
->address
- S_GET_VALUE (fixp
->fx_subsy
);
2971 if (r_type
== BFD_RELOC_16
)
2972 r_type
= BFD_RELOC_SH_SWITCH16
;
2973 else if (r_type
== BFD_RELOC_8
)
2974 r_type
= BFD_RELOC_8_PCREL
;
2975 else if (r_type
== BFD_RELOC_32
)
2976 r_type
= BFD_RELOC_SH_SWITCH32
;
2980 else if (r_type
== BFD_RELOC_SH_USES
)
2981 rel
->addend
= fixp
->fx_addnumber
;
2982 else if (r_type
== BFD_RELOC_SH_COUNT
)
2983 rel
->addend
= fixp
->fx_offset
;
2984 else if (r_type
== BFD_RELOC_SH_ALIGN
)
2985 rel
->addend
= fixp
->fx_offset
;
2986 else if (r_type
== BFD_RELOC_VTABLE_INHERIT
2987 || r_type
== BFD_RELOC_VTABLE_ENTRY
)
2988 rel
->addend
= fixp
->fx_offset
;
2989 else if (fixp
->fx_pcrel
)
2990 rel
->addend
= fixp
->fx_addnumber
;
2994 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, r_type
);
2995 if (rel
->howto
== NULL
)
2997 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
2998 _("Cannot represent relocation type %s"),
2999 bfd_get_reloc_code_name (r_type
));
3000 /* Set howto to a garbage value so that we can keep going. */
3001 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, BFD_RELOC_32
);
3002 assert (rel
->howto
!= NULL
);
3008 #endif /* BFD_ASSEMBLER */