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[deliverable/binutils-gdb.git] / gas / config / tc-sparc.c
1 /* tc-sparc.c -- Assemble for the SPARC
2 Copyright (C) 1989, 90-95, 1996 Free Software Foundation, Inc.
3
4 This file is part of GAS, the GNU Assembler.
5
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
9 any later version.
10
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
19
20 #include <stdio.h>
21 #include <ctype.h>
22
23 #include "as.h"
24 #include "subsegs.h"
25
26 /* careful, this file includes data *declarations* */
27 #include "opcode/sparc.h"
28
29 static void sparc_ip PARAMS ((char *, const struct sparc_opcode **));
30
31 /* Current architecture. We don't bump up unless necessary. */
32 static enum sparc_opcode_arch_val current_architecture = SPARC_OPCODE_ARCH_V6;
33
34 /* The maximum architecture level we can bump up to.
35 In a 32 bit environment, don't allow bumping up to v9 by default.
36 The native assembler works this way. The user is required to pass
37 an explicit argument before we'll create v9 object files. However, if
38 we don't see any v9 insns, a v9 object file is not created. */
39 #ifdef SPARC_ARCH64
40 static enum sparc_opcode_arch_val max_architecture = SPARC_OPCODE_ARCH_V9;
41 #else
42 /* ??? This should be V8, but sparclite support was added by making it the
43 default. GCC now passes -Asparclite, so maybe sometime in the future
44 we can set this to V8. */
45 static enum sparc_opcode_arch_val max_architecture = SPARC_OPCODE_ARCH_SPARCLITE;
46 #endif
47
48 static int architecture_requested;
49 static int warn_on_bump;
50
51 /* If warn_on_bump and the needed architecture is higher than this
52 architecture, issue a warning. */
53 static enum sparc_opcode_arch_val warn_after_architecture;
54
55 /* Non-zero if we are generating PIC code. */
56 int sparc_pic_code;
57
58 extern int target_big_endian;
59
60 /* handle of the OPCODE hash table */
61 static struct hash_control *op_hash;
62
63 static void s_data1 PARAMS ((void));
64 static void s_seg PARAMS ((int));
65 static void s_proc PARAMS ((int));
66 static void s_reserve PARAMS ((int));
67 static void s_common PARAMS ((int));
68
69 const pseudo_typeS md_pseudo_table[] =
70 {
71 {"align", s_align_bytes, 0}, /* Defaulting is invalid (0) */
72 {"common", s_common, 0},
73 {"global", s_globl, 0},
74 {"half", cons, 2},
75 {"optim", s_ignore, 0},
76 {"proc", s_proc, 0},
77 {"reserve", s_reserve, 0},
78 {"seg", s_seg, 0},
79 {"skip", s_space, 0},
80 {"word", cons, 4},
81 {"xword", cons, 8},
82 #ifdef OBJ_ELF
83 {"uaxword", cons, 8},
84 #endif
85 #ifdef OBJ_ELF
86 /* these are specific to sparc/svr4 */
87 {"pushsection", obj_elf_section, 0},
88 {"popsection", obj_elf_previous, 0},
89 {"uaword", cons, 4},
90 {"uahalf", cons, 2},
91 #endif
92 {NULL, 0, 0},
93 };
94
95 const int md_reloc_size = 12; /* Size of relocation record */
96
97 /* This array holds the chars that always start a comment. If the
98 pre-processor is disabled, these aren't very useful */
99 const char comment_chars[] = "!"; /* JF removed '|' from comment_chars */
100
101 /* This array holds the chars that only start a comment at the beginning of
102 a line. If the line seems to have the form '# 123 filename'
103 .line and .file directives will appear in the pre-processed output */
104 /* Note that input_file.c hand checks for '#' at the beginning of the
105 first line of the input file. This is because the compiler outputs
106 #NO_APP at the beginning of its output. */
107 /* Also note that comments started like this one will always
108 work if '/' isn't otherwise defined. */
109 const char line_comment_chars[] = "#";
110
111 const char line_separator_chars[] = "";
112
113 /* Chars that can be used to separate mant from exp in floating point nums */
114 const char EXP_CHARS[] = "eE";
115
116 /* Chars that mean this number is a floating point constant */
117 /* As in 0f12.456 */
118 /* or 0d1.2345e12 */
119 const char FLT_CHARS[] = "rRsSfFdDxXpP";
120
121 /* Also be aware that MAXIMUM_NUMBER_OF_CHARS_FOR_FLOAT may have to be
122 changed in read.c. Ideally it shouldn't have to know about it at all,
123 but nothing is ideal around here. */
124
125 static unsigned char octal[256];
126 #define isoctal(c) octal[(unsigned char) (c)]
127 static unsigned char toHex[256];
128
129 struct sparc_it
130 {
131 char *error;
132 unsigned long opcode;
133 struct nlist *nlistp;
134 expressionS exp;
135 int pcrel;
136 bfd_reloc_code_real_type reloc;
137 };
138
139 struct sparc_it the_insn, set_insn;
140
141 static INLINE int
142 in_signed_range (val, max)
143 bfd_signed_vma val, max;
144 {
145 if (max <= 0)
146 abort ();
147 if (val > max)
148 return 0;
149 if (val < ~max)
150 return 0;
151 return 1;
152 }
153
154 static int
155 sparc_ffs (mask)
156 unsigned int mask;
157 {
158 int i;
159
160 if (mask == 0)
161 return -1;
162
163 for (i = 0; (mask & 1) == 0; ++i)
164 mask >>= 1;
165 return i;
166 }
167
168 #if 0
169 static void print_insn PARAMS ((struct sparc_it *insn));
170 #endif
171 static int getExpression PARAMS ((char *str));
172
173 static char *expr_end;
174 static int special_case;
175
176 /*
177 * Instructions that require wierd handling because they're longer than
178 * 4 bytes.
179 */
180 #define SPECIAL_CASE_SET 1
181 #define SPECIAL_CASE_FDIV 2
182
183 /* The last instruction to be assembled. */
184 static const struct sparc_opcode *last_insn;
185
186 /*
187 * sort of like s_lcomm
188 *
189 */
190 #ifndef OBJ_ELF
191 static int max_alignment = 15;
192 #endif
193
194 static void
195 s_reserve (ignore)
196 int ignore;
197 {
198 char *name;
199 char *p;
200 char c;
201 int align;
202 int size;
203 int temp;
204 symbolS *symbolP;
205
206 name = input_line_pointer;
207 c = get_symbol_end ();
208 p = input_line_pointer;
209 *p = c;
210 SKIP_WHITESPACE ();
211
212 if (*input_line_pointer != ',')
213 {
214 as_bad ("Expected comma after name");
215 ignore_rest_of_line ();
216 return;
217 }
218
219 ++input_line_pointer;
220
221 if ((size = get_absolute_expression ()) < 0)
222 {
223 as_bad ("BSS length (%d.) <0! Ignored.", size);
224 ignore_rest_of_line ();
225 return;
226 } /* bad length */
227
228 *p = 0;
229 symbolP = symbol_find_or_make (name);
230 *p = c;
231
232 if (strncmp (input_line_pointer, ",\"bss\"", 6) != 0
233 && strncmp (input_line_pointer, ",\".bss\"", 7) != 0)
234 {
235 as_bad ("bad .reserve segment -- expected BSS segment");
236 return;
237 }
238
239 if (input_line_pointer[2] == '.')
240 input_line_pointer += 7;
241 else
242 input_line_pointer += 6;
243 SKIP_WHITESPACE ();
244
245 if (*input_line_pointer == ',')
246 {
247 ++input_line_pointer;
248
249 SKIP_WHITESPACE ();
250 if (*input_line_pointer == '\n')
251 {
252 as_bad ("Missing alignment");
253 return;
254 }
255
256 align = get_absolute_expression ();
257 #ifndef OBJ_ELF
258 if (align > max_alignment)
259 {
260 align = max_alignment;
261 as_warn ("Alignment too large: %d. assumed.", align);
262 }
263 #endif
264 if (align < 0)
265 {
266 align = 0;
267 as_warn ("Alignment negative. 0 assumed.");
268 }
269
270 record_alignment (bss_section, align);
271
272 /* convert to a power of 2 alignment */
273 for (temp = 0; (align & 1) == 0; align >>= 1, ++temp);;
274
275 if (align != 1)
276 {
277 as_bad ("Alignment not a power of 2");
278 ignore_rest_of_line ();
279 return;
280 } /* not a power of two */
281
282 align = temp;
283 } /* if has optional alignment */
284 else
285 align = 0;
286
287 if (!S_IS_DEFINED (symbolP)
288 #ifdef OBJ_AOUT
289 && S_GET_OTHER (symbolP) == 0
290 && S_GET_DESC (symbolP) == 0
291 #endif
292 )
293 {
294 if (! need_pass_2)
295 {
296 char *pfrag;
297 segT current_seg = now_seg;
298 subsegT current_subseg = now_subseg;
299
300 subseg_set (bss_section, 1); /* switch to bss */
301
302 if (align)
303 frag_align (align, 0); /* do alignment */
304
305 /* detach from old frag */
306 if (S_GET_SEGMENT(symbolP) == bss_section)
307 symbolP->sy_frag->fr_symbol = NULL;
308
309 symbolP->sy_frag = frag_now;
310 pfrag = frag_var (rs_org, 1, 1, (relax_substateT)0, symbolP,
311 size, (char *)0);
312 *pfrag = 0;
313
314 S_SET_SEGMENT (symbolP, bss_section);
315
316 subseg_set (current_seg, current_subseg);
317 }
318 }
319 else
320 {
321 as_warn("Ignoring attempt to re-define symbol %s",
322 S_GET_NAME (symbolP));
323 } /* if not redefining */
324
325 demand_empty_rest_of_line ();
326 }
327
328 static void
329 s_common (ignore)
330 int ignore;
331 {
332 char *name;
333 char c;
334 char *p;
335 int temp, size;
336 symbolS *symbolP;
337
338 name = input_line_pointer;
339 c = get_symbol_end ();
340 /* just after name is now '\0' */
341 p = input_line_pointer;
342 *p = c;
343 SKIP_WHITESPACE ();
344 if (*input_line_pointer != ',')
345 {
346 as_bad ("Expected comma after symbol-name");
347 ignore_rest_of_line ();
348 return;
349 }
350 input_line_pointer++; /* skip ',' */
351 if ((temp = get_absolute_expression ()) < 0)
352 {
353 as_bad (".COMMon length (%d.) <0! Ignored.", temp);
354 ignore_rest_of_line ();
355 return;
356 }
357 size = temp;
358 *p = 0;
359 symbolP = symbol_find_or_make (name);
360 *p = c;
361 if (S_IS_DEFINED (symbolP))
362 {
363 as_bad ("Ignoring attempt to re-define symbol");
364 ignore_rest_of_line ();
365 return;
366 }
367 if (S_GET_VALUE (symbolP) != 0)
368 {
369 if (S_GET_VALUE (symbolP) != size)
370 {
371 as_warn ("Length of .comm \"%s\" is already %ld. Not changed to %d.",
372 S_GET_NAME (symbolP), (long) S_GET_VALUE (symbolP), size);
373 }
374 }
375 else
376 {
377 #ifndef OBJ_ELF
378 S_SET_VALUE (symbolP, (valueT) size);
379 S_SET_EXTERNAL (symbolP);
380 #endif
381 }
382 know (symbolP->sy_frag == &zero_address_frag);
383 if (*input_line_pointer != ',')
384 {
385 as_bad ("Expected comma after common length");
386 ignore_rest_of_line ();
387 return;
388 }
389 input_line_pointer++;
390 SKIP_WHITESPACE ();
391 if (*input_line_pointer != '"')
392 {
393 temp = get_absolute_expression ();
394 #ifndef OBJ_ELF
395 if (temp > max_alignment)
396 {
397 temp = max_alignment;
398 as_warn ("Common alignment too large: %d. assumed", temp);
399 }
400 #endif
401 if (temp < 0)
402 {
403 temp = 0;
404 as_warn ("Common alignment negative; 0 assumed");
405 }
406 #ifdef OBJ_ELF
407 if (symbolP->local)
408 {
409 segT old_sec;
410 int old_subsec;
411 char *p;
412 int align;
413
414 allocate_bss:
415 old_sec = now_seg;
416 old_subsec = now_subseg;
417 align = temp;
418 record_alignment (bss_section, align);
419 subseg_set (bss_section, 0);
420 if (align)
421 frag_align (align, 0);
422 if (S_GET_SEGMENT (symbolP) == bss_section)
423 symbolP->sy_frag->fr_symbol = 0;
424 symbolP->sy_frag = frag_now;
425 p = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
426 (char *) 0);
427 *p = 0;
428 S_SET_SEGMENT (symbolP, bss_section);
429 S_CLEAR_EXTERNAL (symbolP);
430 subseg_set (old_sec, old_subsec);
431 }
432 else
433 #endif
434 {
435 allocate_common:
436 S_SET_VALUE (symbolP, (valueT) size);
437 #ifdef OBJ_ELF
438 S_SET_ALIGN (symbolP, temp);
439 #endif
440 S_SET_EXTERNAL (symbolP);
441 /* should be common, but this is how gas does it for now */
442 S_SET_SEGMENT (symbolP, bfd_und_section_ptr);
443 }
444 }
445 else
446 {
447 input_line_pointer++;
448 /* @@ Some use the dot, some don't. Can we get some consistency?? */
449 if (*input_line_pointer == '.')
450 input_line_pointer++;
451 /* @@ Some say data, some say bss. */
452 if (strncmp (input_line_pointer, "bss\"", 4)
453 && strncmp (input_line_pointer, "data\"", 5))
454 {
455 while (*--input_line_pointer != '"')
456 ;
457 input_line_pointer--;
458 goto bad_common_segment;
459 }
460 while (*input_line_pointer++ != '"')
461 ;
462 goto allocate_common;
463 }
464 demand_empty_rest_of_line ();
465 return;
466
467 {
468 bad_common_segment:
469 p = input_line_pointer;
470 while (*p && *p != '\n')
471 p++;
472 c = *p;
473 *p = '\0';
474 as_bad ("bad .common segment %s", input_line_pointer + 1);
475 *p = c;
476 input_line_pointer = p;
477 ignore_rest_of_line ();
478 return;
479 }
480 }
481
482 static void
483 s_seg (ignore)
484 int ignore;
485 {
486
487 if (strncmp (input_line_pointer, "\"text\"", 6) == 0)
488 {
489 input_line_pointer += 6;
490 s_text (0);
491 return;
492 }
493 if (strncmp (input_line_pointer, "\"data\"", 6) == 0)
494 {
495 input_line_pointer += 6;
496 s_data (0);
497 return;
498 }
499 if (strncmp (input_line_pointer, "\"data1\"", 7) == 0)
500 {
501 input_line_pointer += 7;
502 s_data1 ();
503 return;
504 }
505 if (strncmp (input_line_pointer, "\"bss\"", 5) == 0)
506 {
507 input_line_pointer += 5;
508 /* We only support 2 segments -- text and data -- for now, so
509 things in the "bss segment" will have to go into data for now.
510 You can still allocate SEG_BSS stuff with .lcomm or .reserve. */
511 subseg_set (data_section, 255); /* FIXME-SOMEDAY */
512 return;
513 }
514 as_bad ("Unknown segment type");
515 demand_empty_rest_of_line ();
516 }
517
518 static void
519 s_data1 ()
520 {
521 subseg_set (data_section, 1);
522 demand_empty_rest_of_line ();
523 }
524
525 static void
526 s_proc (ignore)
527 int ignore;
528 {
529 while (!is_end_of_line[(unsigned char) *input_line_pointer])
530 {
531 ++input_line_pointer;
532 }
533 ++input_line_pointer;
534 }
535
536 /* sparc64 priviledged registers */
537
538 struct priv_reg_entry
539 {
540 char *name;
541 int regnum;
542 };
543
544 struct priv_reg_entry priv_reg_table[] =
545 {
546 {"tpc", 0},
547 {"tnpc", 1},
548 {"tstate", 2},
549 {"tt", 3},
550 {"tick", 4},
551 {"tba", 5},
552 {"pstate", 6},
553 {"tl", 7},
554 {"pil", 8},
555 {"cwp", 9},
556 {"cansave", 10},
557 {"canrestore", 11},
558 {"cleanwin", 12},
559 {"otherwin", 13},
560 {"wstate", 14},
561 {"fq", 15},
562 {"ver", 31},
563 {"", -1}, /* end marker */
564 };
565
566 static int
567 cmp_reg_entry (p, q)
568 struct priv_reg_entry *p, *q;
569 {
570 return strcmp (q->name, p->name);
571 }
572
573 /* This function is called once, at assembler startup time. It should
574 set up all the tables, etc. that the MD part of the assembler will need. */
575
576 void
577 md_begin ()
578 {
579 register const char *retval = NULL;
580 int lose = 0;
581 register unsigned int i = 0;
582
583 op_hash = hash_new ();
584
585 while (i < sparc_num_opcodes)
586 {
587 const char *name = sparc_opcodes[i].name;
588 retval = hash_insert (op_hash, name, &sparc_opcodes[i]);
589 if (retval != NULL)
590 {
591 fprintf (stderr, "internal error: can't hash `%s': %s\n",
592 sparc_opcodes[i].name, retval);
593 lose = 1;
594 }
595 do
596 {
597 if (sparc_opcodes[i].match & sparc_opcodes[i].lose)
598 {
599 fprintf (stderr, "internal error: losing opcode: `%s' \"%s\"\n",
600 sparc_opcodes[i].name, sparc_opcodes[i].args);
601 lose = 1;
602 }
603 ++i;
604 }
605 while (i < sparc_num_opcodes
606 && !strcmp (sparc_opcodes[i].name, name));
607 }
608
609 if (lose)
610 as_fatal ("Broken assembler. No assembly attempted.");
611
612 for (i = '0'; i < '8'; ++i)
613 octal[i] = 1;
614 for (i = '0'; i <= '9'; ++i)
615 toHex[i] = i - '0';
616 for (i = 'a'; i <= 'f'; ++i)
617 toHex[i] = i + 10 - 'a';
618 for (i = 'A'; i <= 'F'; ++i)
619 toHex[i] = i + 10 - 'A';
620
621 qsort (priv_reg_table, sizeof (priv_reg_table) / sizeof (priv_reg_table[0]),
622 sizeof (priv_reg_table[0]), cmp_reg_entry);
623
624 target_big_endian = 1;
625
626 /* If -bump, record the architecture level at which we start issuing
627 warnings. The behaviour is different depending upon whether an
628 architecture was explicitly specified. If it wasn't, we issue warnings
629 for all upwards bumps. If it was, we don't start issuing warnings until
630 we need to bump beyond the requested architecture or when we bump between
631 conflicting architectures. */
632
633 if (warn_on_bump
634 && architecture_requested)
635 {
636 /* `max_architecture' records the requested architecture.
637 Issue warnings if we go above it. */
638 warn_after_architecture = max_architecture;
639
640 /* Find the highest architecture level that doesn't conflict with
641 the requested one. */
642 for (max_architecture = SPARC_OPCODE_ARCH_MAX;
643 max_architecture > warn_after_architecture;
644 --max_architecture)
645 if (! SPARC_OPCODE_CONFLICT_P (max_architecture,
646 warn_after_architecture))
647 break;
648 }
649 }
650
651 /* Called after all assembly has been done. */
652
653 void
654 sparc_md_end ()
655 {
656 #ifdef SPARC_ARCH64
657 if (current_architecture == SPARC_OPCODE_ARCH_V9A)
658 bfd_set_arch_mach (stdoutput, bfd_arch_sparc, bfd_mach_sparc_v9a);
659 else
660 bfd_set_arch_mach (stdoutput, bfd_arch_sparc, bfd_mach_sparc_v9);
661 #else
662 if (current_architecture == SPARC_OPCODE_ARCH_V9)
663 bfd_set_arch_mach (stdoutput, bfd_arch_sparc, bfd_mach_sparc_v8plus);
664 else if (current_architecture == SPARC_OPCODE_ARCH_V9A)
665 bfd_set_arch_mach (stdoutput, bfd_arch_sparc, bfd_mach_sparc_v8plusa);
666 else if (current_architecture == SPARC_OPCODE_ARCH_SPARCLET)
667 bfd_set_arch_mach (stdoutput, bfd_arch_sparc, bfd_mach_sparc_sparclet);
668 else
669 {
670 /* The sparclite is treated like a normal sparc. Perhaps it shouldn't
671 be but for now it is (since that's the way it's always been
672 treated). */
673 bfd_set_arch_mach (stdoutput, bfd_arch_sparc, bfd_mach_sparc);
674 }
675 #endif
676 }
677
678 void
679 md_assemble (str)
680 char *str;
681 {
682 const struct sparc_opcode *insn;
683 char *toP;
684 int rsd;
685
686 know (str);
687 sparc_ip (str, &insn);
688
689 /* We warn about attempts to put a floating point branch in a delay
690 slot. */
691 if (insn != NULL
692 && last_insn != NULL
693 && (insn->flags & F_FBR) != 0
694 && (last_insn->flags & F_DELAYED) != 0)
695 as_warn ("FP branch in delay slot");
696
697 /* SPARC before v9 requires a nop instruction between a floating
698 point instruction and a floating point branch. We insert one
699 automatically, with a warning. */
700 if (max_architecture < SPARC_OPCODE_ARCH_V9
701 && insn != NULL
702 && last_insn != NULL
703 && (insn->flags & F_FBR) != 0
704 && (last_insn->flags & F_FLOAT) != 0)
705 {
706 as_warn ("FP branch preceded by FP instruction; NOP inserted");
707 toP = frag_more (4);
708 md_number_to_chars (toP, (valueT) 0x01000000, 4);
709 }
710
711 /* See if "set" operand is absolute and small; skip sethi if so. */
712 if (special_case == SPECIAL_CASE_SET
713 && the_insn.exp.X_op == O_constant)
714 {
715 if (the_insn.exp.X_add_number >= -(1 << 12)
716 && the_insn.exp.X_add_number < (1 << 12))
717 {
718 the_insn.opcode = 0x80102000 /* or %g0,imm,... */
719 | (the_insn.opcode & 0x3E000000) /* dest reg */
720 | (the_insn.exp.X_add_number & 0x1FFF); /* imm */
721 special_case = 0; /* No longer special */
722 the_insn.reloc = BFD_RELOC_NONE; /* No longer relocated */
723 }
724 }
725
726 toP = frag_more (4);
727 /* put out the opcode */
728 md_number_to_chars (toP, (valueT) the_insn.opcode, 4);
729
730 /* put out the symbol-dependent stuff */
731 if (the_insn.reloc != BFD_RELOC_NONE)
732 {
733 fix_new_exp (frag_now, /* which frag */
734 (toP - frag_now->fr_literal), /* where */
735 4, /* size */
736 &the_insn.exp,
737 the_insn.pcrel,
738 the_insn.reloc);
739 }
740
741 last_insn = insn;
742
743 switch (special_case)
744 {
745 case SPECIAL_CASE_SET:
746 special_case = 0;
747 assert (the_insn.reloc == BFD_RELOC_HI22);
748 /* See if "set" operand has no low-order bits; skip OR if so. */
749 if (the_insn.exp.X_op == O_constant
750 && ((the_insn.exp.X_add_number & 0x3FF) == 0))
751 return;
752 toP = frag_more (4);
753 rsd = (the_insn.opcode >> 25) & 0x1f;
754 the_insn.opcode = 0x80102000 | (rsd << 25) | (rsd << 14);
755 md_number_to_chars (toP, (valueT) the_insn.opcode, 4);
756 fix_new_exp (frag_now, /* which frag */
757 (toP - frag_now->fr_literal), /* where */
758 4, /* size */
759 &the_insn.exp,
760 the_insn.pcrel,
761 BFD_RELOC_LO10);
762 return;
763
764 case SPECIAL_CASE_FDIV:
765 /* According to information leaked from Sun, the "fdiv" instructions
766 on early SPARC machines would produce incorrect results sometimes.
767 The workaround is to add an fmovs of the destination register to
768 itself just after the instruction. This was true on machines
769 with Weitek 1165 float chips, such as the Sun-4/260 and /280. */
770 special_case = 0;
771 assert (the_insn.reloc == BFD_RELOC_NONE);
772 toP = frag_more (4);
773 rsd = (the_insn.opcode >> 25) & 0x1f;
774 the_insn.opcode = 0x81A00020 | (rsd << 25) | rsd; /* fmovs dest,dest */
775 md_number_to_chars (toP, (valueT) the_insn.opcode, 4);
776 return;
777
778 case 0:
779 return;
780
781 default:
782 as_fatal ("failed sanity check.");
783 }
784 }
785
786 /* Implement big shift right. */
787 static bfd_vma
788 BSR (val, amount)
789 bfd_vma val;
790 int amount;
791 {
792 if (sizeof (bfd_vma) <= 4 && amount >= 32)
793 as_fatal ("Support for 64-bit arithmetic not compiled in.");
794 return val >> amount;
795 }
796
797 /* Parse an argument that can be expressed as a keyword.
798 (eg: #StoreStore or %ccfr).
799 The result is a boolean indicating success.
800 If successful, INPUT_POINTER is updated. */
801
802 static int
803 parse_keyword_arg (lookup_fn, input_pointerP, valueP)
804 int (*lookup_fn) ();
805 char **input_pointerP;
806 int *valueP;
807 {
808 int value;
809 char c, *p, *q;
810
811 p = *input_pointerP;
812 for (q = p + (*p == '#' || *p == '%'); isalpha (*q) || *q == '_'; ++q)
813 continue;
814 c = *q;
815 *q = 0;
816 value = (*lookup_fn) (p);
817 *q = c;
818 if (value == -1)
819 return 0;
820 *valueP = value;
821 *input_pointerP = q;
822 return 1;
823 }
824
825 /* Parse an argument that is a constant expression.
826 The result is a boolean indicating success. */
827
828 static int
829 parse_const_expr_arg (input_pointerP, valueP)
830 char **input_pointerP;
831 int *valueP;
832 {
833 char *save = input_line_pointer;
834 expressionS exp;
835
836 input_line_pointer = *input_pointerP;
837 /* The next expression may be something other than a constant
838 (say if we're not processing the right variant of the insn).
839 Don't call expression unless we're sure it will succeed as it will
840 signal an error (which we want to defer until later). */
841 /* FIXME: It might be better to define md_operand and have it recognize
842 things like %asi, etc. but continuing that route through to the end
843 is a lot of work. */
844 if (*input_line_pointer == '%')
845 {
846 input_line_pointer = save;
847 return 0;
848 }
849 expression (&exp);
850 *input_pointerP = input_line_pointer;
851 input_line_pointer = save;
852 if (exp.X_op != O_constant)
853 return 0;
854 *valueP = exp.X_add_number;
855 return 1;
856 }
857
858 static void
859 sparc_ip (str, pinsn)
860 char *str;
861 const struct sparc_opcode **pinsn;
862 {
863 char *error_message = "";
864 char *s;
865 const char *args;
866 char c;
867 const struct sparc_opcode *insn;
868 char *argsStart;
869 unsigned long opcode;
870 unsigned int mask = 0;
871 int match = 0;
872 int comma = 0;
873 long immediate_max = 0;
874 int v9_arg_p;
875
876 for (s = str; islower (*s) || (*s >= '0' && *s <= '3'); ++s)
877 ;
878
879 switch (*s)
880 {
881 case '\0':
882 break;
883
884 case ',':
885 comma = 1;
886
887 /*FALLTHROUGH */
888
889 case ' ':
890 *s++ = '\0';
891 break;
892
893 default:
894 as_fatal ("Unknown opcode: `%s'", str);
895 }
896 insn = (struct sparc_opcode *) hash_find (op_hash, str);
897 *pinsn = insn;
898 if (insn == NULL)
899 {
900 as_bad ("Unknown opcode: `%s'", str);
901 return;
902 }
903 if (comma)
904 {
905 *--s = ',';
906 }
907
908 argsStart = s;
909 for (;;)
910 {
911 opcode = insn->match;
912 memset (&the_insn, '\0', sizeof (the_insn));
913 the_insn.reloc = BFD_RELOC_NONE;
914 v9_arg_p = 0;
915
916 /*
917 * Build the opcode, checking as we go to make
918 * sure that the operands match
919 */
920 for (args = insn->args;; ++args)
921 {
922 switch (*args)
923 {
924 case 'K':
925 {
926 int kmask = 0;
927
928 /* Parse a series of masks. */
929 if (*s == '#')
930 {
931 while (*s == '#')
932 {
933 int mask;
934
935 if (! parse_keyword_arg (sparc_encode_membar, &s,
936 &mask))
937 {
938 error_message = ": invalid membar mask name";
939 goto error;
940 }
941 kmask |= mask;
942 while (*s == ' ') { ++s; continue; }
943 if (*s == '|' || *s == '+')
944 ++s;
945 while (*s == ' ') { ++s; continue; }
946 }
947 }
948 else
949 {
950 if (! parse_const_expr_arg (&s, &kmask))
951 {
952 error_message = ": invalid membar mask expression";
953 goto error;
954 }
955 if (kmask < 0 || kmask > 127)
956 {
957 error_message = ": invalid membar mask number";
958 goto error;
959 }
960 }
961
962 opcode |= MEMBAR (kmask);
963 continue;
964 }
965
966 case '*':
967 {
968 int fcn = 0;
969
970 /* Parse a prefetch function. */
971 if (*s == '#')
972 {
973 if (! parse_keyword_arg (sparc_encode_prefetch, &s, &fcn))
974 {
975 error_message = ": invalid prefetch function name";
976 goto error;
977 }
978 }
979 else
980 {
981 if (! parse_const_expr_arg (&s, &fcn))
982 {
983 error_message = ": invalid prefetch function expression";
984 goto error;
985 }
986 if (fcn < 0 || fcn > 31)
987 {
988 error_message = ": invalid prefetch function number";
989 goto error;
990 }
991 }
992 opcode |= RD (fcn);
993 continue;
994 }
995
996 case '!':
997 case '?':
998 /* Parse a sparc64 privileged register. */
999 if (*s == '%')
1000 {
1001 struct priv_reg_entry *p = priv_reg_table;
1002 unsigned int len = 9999999; /* init to make gcc happy */
1003
1004 s += 1;
1005 while (p->name[0] > s[0])
1006 p++;
1007 while (p->name[0] == s[0])
1008 {
1009 len = strlen (p->name);
1010 if (strncmp (p->name, s, len) == 0)
1011 break;
1012 p++;
1013 }
1014 if (p->name[0] != s[0])
1015 {
1016 error_message = ": unrecognizable privileged register";
1017 goto error;
1018 }
1019 if (*args == '?')
1020 opcode |= (p->regnum << 14);
1021 else
1022 opcode |= (p->regnum << 25);
1023 s += len;
1024 continue;
1025 }
1026 else
1027 {
1028 error_message = ": unrecognizable privileged register";
1029 goto error;
1030 }
1031
1032 case 'M':
1033 case 'm':
1034 if (strncmp (s, "%asr", 4) == 0)
1035 {
1036 s += 4;
1037
1038 if (isdigit (*s))
1039 {
1040 long num = 0;
1041
1042 while (isdigit (*s))
1043 {
1044 num = num * 10 + *s - '0';
1045 ++s;
1046 }
1047
1048 if (current_architecture >= SPARC_OPCODE_ARCH_V9)
1049 {
1050 if (num < 16 || 31 < num)
1051 {
1052 error_message = ": asr number must be between 16 and 31";
1053 goto error;
1054 }
1055 }
1056 else
1057 {
1058 if (num < 0 || 31 < num)
1059 {
1060 error_message = ": asr number must be between 0 and 31";
1061 goto error;
1062 }
1063 }
1064
1065 opcode |= (*args == 'M' ? RS1 (num) : RD (num));
1066 continue;
1067 }
1068 else
1069 {
1070 error_message = ": expecting %asrN";
1071 goto error;
1072 }
1073 } /* if %asr */
1074 break;
1075
1076 case 'I':
1077 the_insn.reloc = BFD_RELOC_SPARC_11;
1078 immediate_max = 0x03FF;
1079 goto immediate;
1080
1081 case 'j':
1082 the_insn.reloc = BFD_RELOC_SPARC_10;
1083 immediate_max = 0x01FF;
1084 goto immediate;
1085
1086 case 'k':
1087 the_insn.reloc = /* RELOC_WDISP2_14 */ BFD_RELOC_SPARC_WDISP16;
1088 the_insn.pcrel = 1;
1089 goto immediate;
1090
1091 case 'G':
1092 the_insn.reloc = BFD_RELOC_SPARC_WDISP19;
1093 the_insn.pcrel = 1;
1094 goto immediate;
1095
1096 case 'N':
1097 if (*s == 'p' && s[1] == 'n')
1098 {
1099 s += 2;
1100 continue;
1101 }
1102 break;
1103
1104 case 'T':
1105 if (*s == 'p' && s[1] == 't')
1106 {
1107 s += 2;
1108 continue;
1109 }
1110 break;
1111
1112 case 'z':
1113 if (*s == ' ')
1114 {
1115 ++s;
1116 }
1117 if (strncmp (s, "%icc", 4) == 0)
1118 {
1119 s += 4;
1120 continue;
1121 }
1122 break;
1123
1124 case 'Z':
1125 if (*s == ' ')
1126 {
1127 ++s;
1128 }
1129 if (strncmp (s, "%xcc", 4) == 0)
1130 {
1131 s += 4;
1132 continue;
1133 }
1134 break;
1135
1136 case '6':
1137 if (*s == ' ')
1138 {
1139 ++s;
1140 }
1141 if (strncmp (s, "%fcc0", 5) == 0)
1142 {
1143 s += 5;
1144 continue;
1145 }
1146 break;
1147
1148 case '7':
1149 if (*s == ' ')
1150 {
1151 ++s;
1152 }
1153 if (strncmp (s, "%fcc1", 5) == 0)
1154 {
1155 s += 5;
1156 continue;
1157 }
1158 break;
1159
1160 case '8':
1161 if (*s == ' ')
1162 {
1163 ++s;
1164 }
1165 if (strncmp (s, "%fcc2", 5) == 0)
1166 {
1167 s += 5;
1168 continue;
1169 }
1170 break;
1171
1172 case '9':
1173 if (*s == ' ')
1174 {
1175 ++s;
1176 }
1177 if (strncmp (s, "%fcc3", 5) == 0)
1178 {
1179 s += 5;
1180 continue;
1181 }
1182 break;
1183
1184 case 'P':
1185 if (strncmp (s, "%pc", 3) == 0)
1186 {
1187 s += 3;
1188 continue;
1189 }
1190 break;
1191
1192 case 'W':
1193 if (strncmp (s, "%tick", 5) == 0)
1194 {
1195 s += 5;
1196 continue;
1197 }
1198 break;
1199
1200 case '\0': /* end of args */
1201 if (*s == '\0')
1202 {
1203 match = 1;
1204 }
1205 break;
1206
1207 case '+':
1208 if (*s == '+')
1209 {
1210 ++s;
1211 continue;
1212 }
1213 if (*s == '-')
1214 {
1215 continue;
1216 }
1217 break;
1218
1219 case '[': /* these must match exactly */
1220 case ']':
1221 case ',':
1222 case ' ':
1223 if (*s++ == *args)
1224 continue;
1225 break;
1226
1227 case '#': /* must be at least one digit */
1228 if (isdigit (*s++))
1229 {
1230 while (isdigit (*s))
1231 {
1232 ++s;
1233 }
1234 continue;
1235 }
1236 break;
1237
1238 case 'C': /* coprocessor state register */
1239 if (strncmp (s, "%csr", 4) == 0)
1240 {
1241 s += 4;
1242 continue;
1243 }
1244 break;
1245
1246 case 'b': /* next operand is a coprocessor register */
1247 case 'c':
1248 case 'D':
1249 if (*s++ == '%' && *s++ == 'c' && isdigit (*s))
1250 {
1251 mask = *s++;
1252 if (isdigit (*s))
1253 {
1254 mask = 10 * (mask - '0') + (*s++ - '0');
1255 if (mask >= 32)
1256 {
1257 break;
1258 }
1259 }
1260 else
1261 {
1262 mask -= '0';
1263 }
1264 switch (*args)
1265 {
1266
1267 case 'b':
1268 opcode |= mask << 14;
1269 continue;
1270
1271 case 'c':
1272 opcode |= mask;
1273 continue;
1274
1275 case 'D':
1276 opcode |= mask << 25;
1277 continue;
1278 }
1279 }
1280 break;
1281
1282 case 'r': /* next operand must be a register */
1283 case 'O':
1284 case '1':
1285 case '2':
1286 case 'd':
1287 if (*s++ == '%')
1288 {
1289 switch (c = *s++)
1290 {
1291
1292 case 'f': /* frame pointer */
1293 if (*s++ == 'p')
1294 {
1295 mask = 0x1e;
1296 break;
1297 }
1298 goto error;
1299
1300 case 'g': /* global register */
1301 if (isoctal (c = *s++))
1302 {
1303 mask = c - '0';
1304 break;
1305 }
1306 goto error;
1307
1308 case 'i': /* in register */
1309 if (isoctal (c = *s++))
1310 {
1311 mask = c - '0' + 24;
1312 break;
1313 }
1314 goto error;
1315
1316 case 'l': /* local register */
1317 if (isoctal (c = *s++))
1318 {
1319 mask = (c - '0' + 16);
1320 break;
1321 }
1322 goto error;
1323
1324 case 'o': /* out register */
1325 if (isoctal (c = *s++))
1326 {
1327 mask = (c - '0' + 8);
1328 break;
1329 }
1330 goto error;
1331
1332 case 's': /* stack pointer */
1333 if (*s++ == 'p')
1334 {
1335 mask = 0xe;
1336 break;
1337 }
1338 goto error;
1339
1340 case 'r': /* any register */
1341 if (!isdigit (c = *s++))
1342 {
1343 goto error;
1344 }
1345 /* FALLTHROUGH */
1346 case '0':
1347 case '1':
1348 case '2':
1349 case '3':
1350 case '4':
1351 case '5':
1352 case '6':
1353 case '7':
1354 case '8':
1355 case '9':
1356 if (isdigit (*s))
1357 {
1358 if ((c = 10 * (c - '0') + (*s++ - '0')) >= 32)
1359 {
1360 goto error;
1361 }
1362 }
1363 else
1364 {
1365 c -= '0';
1366 }
1367 mask = c;
1368 break;
1369
1370 default:
1371 goto error;
1372 }
1373
1374 /* Got the register, now figure out where
1375 it goes in the opcode. */
1376 switch (*args)
1377 {
1378 case '1':
1379 opcode |= mask << 14;
1380 continue;
1381
1382 case '2':
1383 opcode |= mask;
1384 continue;
1385
1386 case 'd':
1387 opcode |= mask << 25;
1388 continue;
1389
1390 case 'r':
1391 opcode |= (mask << 25) | (mask << 14);
1392 continue;
1393
1394 case 'O':
1395 opcode |= (mask << 25) | (mask << 0);
1396 continue;
1397 }
1398 }
1399 break;
1400
1401 case 'e': /* next operand is a floating point register */
1402 case 'v':
1403 case 'V':
1404
1405 case 'f':
1406 case 'B':
1407 case 'R':
1408
1409 case 'g':
1410 case 'H':
1411 case 'J':
1412 {
1413 char format;
1414
1415 if (*s++ == '%'
1416 && ((format = *s) == 'f')
1417 && isdigit (*++s))
1418 {
1419 for (mask = 0; isdigit (*s); ++s)
1420 {
1421 mask = 10 * mask + (*s - '0');
1422 } /* read the number */
1423
1424 if ((*args == 'v'
1425 || *args == 'B'
1426 || *args == 'H')
1427 && (mask & 1))
1428 {
1429 break;
1430 } /* register must be even numbered */
1431
1432 if ((*args == 'V'
1433 || *args == 'R'
1434 || *args == 'J')
1435 && (mask & 3))
1436 {
1437 break;
1438 } /* register must be multiple of 4 */
1439
1440 if (mask >= 64)
1441 {
1442 if (max_architecture >= SPARC_OPCODE_ARCH_V9)
1443 error_message = ": There are only 64 f registers; [0-63]";
1444 else
1445 error_message = ": There are only 32 f registers; [0-31]";
1446 goto error;
1447 } /* on error */
1448 else if (mask >= 32)
1449 {
1450 if (max_architecture >= SPARC_OPCODE_ARCH_V9)
1451 {
1452 v9_arg_p = 1;
1453 mask -= 31; /* wrap high bit */
1454 }
1455 else
1456 {
1457 error_message = ": There are only 32 f registers; [0-31]";
1458 goto error;
1459 }
1460 }
1461 }
1462 else
1463 {
1464 break;
1465 } /* if not an 'f' register. */
1466
1467 switch (*args)
1468 {
1469 case 'v':
1470 case 'V':
1471 case 'e':
1472 opcode |= RS1 (mask);
1473 continue;
1474
1475
1476 case 'f':
1477 case 'B':
1478 case 'R':
1479 opcode |= RS2 (mask);
1480 continue;
1481
1482 case 'g':
1483 case 'H':
1484 case 'J':
1485 opcode |= RD (mask);
1486 continue;
1487 } /* pack it in. */
1488
1489 know (0);
1490 break;
1491 } /* float arg */
1492
1493 case 'F':
1494 if (strncmp (s, "%fsr", 4) == 0)
1495 {
1496 s += 4;
1497 continue;
1498 }
1499 break;
1500
1501 case 'h': /* high 22 bits */
1502 the_insn.reloc = BFD_RELOC_HI22;
1503 goto immediate;
1504
1505 case 'l': /* 22 bit PC relative immediate */
1506 the_insn.reloc = BFD_RELOC_SPARC_WDISP22;
1507 the_insn.pcrel = 1;
1508 goto immediate;
1509
1510 case 'L': /* 30 bit immediate */
1511 the_insn.reloc = BFD_RELOC_32_PCREL_S2;
1512 the_insn.pcrel = 1;
1513 goto immediate;
1514
1515 case 'n': /* 22 bit immediate */
1516 the_insn.reloc = BFD_RELOC_SPARC22;
1517 goto immediate;
1518
1519 case 'i': /* 13 bit immediate */
1520 the_insn.reloc = BFD_RELOC_SPARC13;
1521 immediate_max = 0x0FFF;
1522
1523 /*FALLTHROUGH */
1524
1525 immediate:
1526 if (*s == ' ')
1527 s++;
1528 if (*s == '%')
1529 {
1530 if ((c = s[1]) == 'h' && s[2] == 'i')
1531 {
1532 the_insn.reloc = BFD_RELOC_HI22;
1533 s += 3;
1534 }
1535 else if (c == 'l' && s[2] == 'o')
1536 {
1537 the_insn.reloc = BFD_RELOC_LO10;
1538 s += 3;
1539 }
1540 else if (c == 'u'
1541 && s[2] == 'h'
1542 && s[3] == 'i')
1543 {
1544 the_insn.reloc = BFD_RELOC_SPARC_HH22;
1545 s += 4;
1546 v9_arg_p = 1;
1547 }
1548 else if (c == 'u'
1549 && s[2] == 'l'
1550 && s[3] == 'o')
1551 {
1552 the_insn.reloc = BFD_RELOC_SPARC_HM10;
1553 s += 4;
1554 v9_arg_p = 1;
1555 }
1556 else
1557 break;
1558 }
1559 /* Note that if the getExpression() fails, we will still
1560 have created U entries in the symbol table for the
1561 'symbols' in the input string. Try not to create U
1562 symbols for registers, etc. */
1563 {
1564 /* This stuff checks to see if the expression ends in
1565 +%reg. If it does, it removes the register from
1566 the expression, and re-sets 's' to point to the
1567 right place. */
1568
1569 char *s1;
1570
1571 for (s1 = s; *s1 && *s1 != ',' && *s1 != ']'; s1++);;
1572
1573 if (s1 != s && isdigit (s1[-1]))
1574 {
1575 if (s1[-2] == '%' && s1[-3] == '+')
1576 {
1577 s1 -= 3;
1578 *s1 = '\0';
1579 (void) getExpression (s);
1580 *s1 = '+';
1581 s = s1;
1582 continue;
1583 }
1584 else if (strchr ("goli0123456789", s1[-2]) && s1[-3] == '%' && s1[-4] == '+')
1585 {
1586 s1 -= 4;
1587 *s1 = '\0';
1588 (void) getExpression (s);
1589 *s1 = '+';
1590 s = s1;
1591 continue;
1592 }
1593 }
1594 }
1595 (void) getExpression (s);
1596 s = expr_end;
1597
1598 if (the_insn.exp.X_op == O_constant
1599 && the_insn.exp.X_add_symbol == 0
1600 && the_insn.exp.X_op_symbol == 0)
1601 {
1602 /* Handle %uhi/%ulo by moving the upper word to the lower
1603 one and pretending it's %hi/%lo. We also need to watch
1604 for %hi/%lo: the top word needs to be zeroed otherwise
1605 fixup_segment will complain the value is too big. */
1606 switch (the_insn.reloc)
1607 {
1608 case BFD_RELOC_SPARC_HH22:
1609 the_insn.reloc = BFD_RELOC_HI22;
1610 the_insn.exp.X_add_number = BSR (the_insn.exp.X_add_number, 32);
1611 break;
1612 case BFD_RELOC_SPARC_HM10:
1613 the_insn.reloc = BFD_RELOC_LO10;
1614 the_insn.exp.X_add_number = BSR (the_insn.exp.X_add_number, 32);
1615 break;
1616 case BFD_RELOC_HI22:
1617 case BFD_RELOC_LO10:
1618 the_insn.exp.X_add_number &= 0xffffffff;
1619 break;
1620 default:
1621 break;
1622 }
1623
1624 /* For pc-relative call instructions, we reject
1625 constants to get better code. */
1626 if (the_insn.pcrel
1627 && the_insn.reloc == BFD_RELOC_32_PCREL_S2
1628 && in_signed_range (the_insn.exp.X_add_number, 0x3fff)
1629 )
1630 {
1631 error_message = ": PC-relative operand can't be a constant";
1632 goto error;
1633 }
1634 /* Check for invalid constant values. Don't warn if
1635 constant was inside %hi or %lo, since these
1636 truncate the constant to fit. */
1637 if (immediate_max != 0
1638 && the_insn.reloc != BFD_RELOC_LO10
1639 && the_insn.reloc != BFD_RELOC_HI22
1640 && !in_signed_range (the_insn.exp.X_add_number,
1641 immediate_max)
1642 )
1643 {
1644 if (the_insn.pcrel)
1645 /* Who knows? After relocation, we may be within
1646 range. Let the linker figure it out. */
1647 {
1648 the_insn.exp.X_op = O_symbol;
1649 the_insn.exp.X_add_symbol = section_symbol (absolute_section);
1650 }
1651 else
1652 /* Immediate value is non-pcrel, and out of
1653 range. */
1654 as_bad ("constant value %ld out of range (%ld .. %ld)",
1655 the_insn.exp.X_add_number,
1656 ~immediate_max, immediate_max);
1657 }
1658 }
1659
1660 /* Reset to prevent extraneous range check. */
1661 immediate_max = 0;
1662
1663 continue;
1664
1665 case 'a':
1666 if (*s++ == 'a')
1667 {
1668 opcode |= ANNUL;
1669 continue;
1670 }
1671 break;
1672
1673 case 'A':
1674 {
1675 int asi = 0;
1676
1677 /* Parse an asi. */
1678 if (*s == '#')
1679 {
1680 if (! parse_keyword_arg (sparc_encode_asi, &s, &asi))
1681 {
1682 error_message = ": invalid ASI name";
1683 goto error;
1684 }
1685 }
1686 else
1687 {
1688 if (! parse_const_expr_arg (&s, &asi))
1689 {
1690 error_message = ": invalid ASI expression";
1691 goto error;
1692 }
1693 if (asi < 0 || asi > 255)
1694 {
1695 error_message = ": invalid ASI number";
1696 goto error;
1697 }
1698 }
1699 opcode |= ASI (asi);
1700 continue;
1701 } /* alternate space */
1702
1703 case 'p':
1704 if (strncmp (s, "%psr", 4) == 0)
1705 {
1706 s += 4;
1707 continue;
1708 }
1709 break;
1710
1711 case 'q': /* floating point queue */
1712 if (strncmp (s, "%fq", 3) == 0)
1713 {
1714 s += 3;
1715 continue;
1716 }
1717 break;
1718
1719 case 'Q': /* coprocessor queue */
1720 if (strncmp (s, "%cq", 3) == 0)
1721 {
1722 s += 3;
1723 continue;
1724 }
1725 break;
1726
1727 case 'S':
1728 if (strcmp (str, "set") == 0)
1729 {
1730 special_case = SPECIAL_CASE_SET;
1731 continue;
1732 }
1733 else if (strncmp (str, "fdiv", 4) == 0)
1734 {
1735 special_case = SPECIAL_CASE_FDIV;
1736 continue;
1737 }
1738 break;
1739
1740 case 'o':
1741 if (strncmp (s, "%asi", 4) != 0)
1742 break;
1743 s += 4;
1744 continue;
1745
1746 case 's':
1747 if (strncmp (s, "%fprs", 5) != 0)
1748 break;
1749 s += 5;
1750 continue;
1751
1752 case 'E':
1753 if (strncmp (s, "%ccr", 4) != 0)
1754 break;
1755 s += 4;
1756 continue;
1757
1758 case 't':
1759 if (strncmp (s, "%tbr", 4) != 0)
1760 break;
1761 s += 4;
1762 continue;
1763
1764 case 'w':
1765 if (strncmp (s, "%wim", 4) != 0)
1766 break;
1767 s += 4;
1768 continue;
1769
1770 case 'x':
1771 {
1772 char *push = input_line_pointer;
1773 expressionS e;
1774
1775 input_line_pointer = s;
1776 expression (&e);
1777 if (e.X_op == O_constant)
1778 {
1779 int n = e.X_add_number;
1780 if (n != e.X_add_number || (n & ~0x1ff) != 0)
1781 as_bad ("OPF immediate operand out of range (0-0x1ff)");
1782 else
1783 opcode |= e.X_add_number << 5;
1784 }
1785 else
1786 as_bad ("non-immediate OPF operand, ignored");
1787 s = input_line_pointer;
1788 input_line_pointer = push;
1789 continue;
1790 }
1791
1792 case 'y':
1793 if (strncmp (s, "%y", 2) != 0)
1794 break;
1795 s += 2;
1796 continue;
1797
1798 case 'u':
1799 case 'U':
1800 {
1801 /* Parse a sparclet cpreg. */
1802 int cpreg;
1803 if (! parse_keyword_arg (sparc_encode_sparclet_cpreg, &s, &cpreg))
1804 {
1805 error_message = ": invalid cpreg name";
1806 goto error;
1807 }
1808 opcode |= (*args == 'U' ? RS1 (cpreg) : RD (cpreg));
1809 continue;
1810 }
1811
1812 default:
1813 as_fatal ("failed sanity check.");
1814 } /* switch on arg code */
1815
1816 /* Break out of for() loop. */
1817 break;
1818 } /* for each arg that we expect */
1819
1820 error:
1821 if (match == 0)
1822 {
1823 /* Args don't match. */
1824 if (((unsigned) (&insn[1] - sparc_opcodes)) < sparc_num_opcodes
1825 && (insn->name == insn[1].name
1826 || !strcmp (insn->name, insn[1].name)))
1827 {
1828 ++insn;
1829 s = argsStart;
1830 continue;
1831 }
1832 else
1833 {
1834 as_bad ("Illegal operands%s", error_message);
1835 return;
1836 }
1837 }
1838 else
1839 {
1840 /* We have a match. Now see if the architecture is ok. */
1841 int needed_arch_mask = insn->architecture;
1842
1843 if (v9_arg_p)
1844 {
1845 needed_arch_mask &= ~ ((1 << SPARC_OPCODE_ARCH_V9)
1846 | (1 << SPARC_OPCODE_ARCH_V9A));
1847 needed_arch_mask |= (1 << SPARC_OPCODE_ARCH_V9);
1848 }
1849
1850 if (needed_arch_mask & SPARC_OPCODE_SUPPORTED (current_architecture))
1851 ; /* ok */
1852 /* Can we bump up the architecture? */
1853 else if (needed_arch_mask & SPARC_OPCODE_SUPPORTED (max_architecture))
1854 {
1855 enum sparc_opcode_arch_val needed_architecture =
1856 sparc_ffs (SPARC_OPCODE_SUPPORTED (max_architecture)
1857 & needed_arch_mask);
1858
1859 assert (needed_architecture <= SPARC_OPCODE_ARCH_MAX);
1860 if (warn_on_bump
1861 && needed_architecture > warn_after_architecture)
1862 {
1863 as_warn ("architecture bumped from \"%s\" to \"%s\" on \"%s\"",
1864 sparc_opcode_archs[current_architecture].name,
1865 sparc_opcode_archs[needed_architecture].name,
1866 str);
1867 warn_after_architecture = needed_architecture;
1868 }
1869 current_architecture = needed_architecture;
1870 }
1871 /* Conflict. */
1872 /* ??? This seems to be a bit fragile. What if the next entry in
1873 the opcode table is the one we want and it is supported?
1874 It is possible to arrange the table today so that this can't
1875 happen but what about tomorrow? */
1876 else
1877 {
1878 int arch,printed_one_p = 0;
1879 char *p;
1880 char required_archs[SPARC_OPCODE_ARCH_MAX * 16];
1881
1882 /* Create a list of the architectures that support the insn. */
1883 needed_arch_mask &= ~ SPARC_OPCODE_SUPPORTED (max_architecture);
1884 p = required_archs;
1885 arch = sparc_ffs (needed_arch_mask);
1886 while ((1 << arch) <= needed_arch_mask)
1887 {
1888 if ((1 << arch) & needed_arch_mask)
1889 {
1890 if (printed_one_p)
1891 *p++ = '|';
1892 strcpy (p, sparc_opcode_archs[arch].name);
1893 p += strlen (p);
1894 printed_one_p = 1;
1895 }
1896 ++arch;
1897 }
1898
1899 as_bad ("Architecture mismatch on \"%s\".", str);
1900 as_tsktsk (" (Requires %s; requested architecture is %s.)",
1901 required_archs,
1902 sparc_opcode_archs[max_architecture].name);
1903 return;
1904 }
1905 } /* if no match */
1906
1907 break;
1908 } /* forever looking for a match */
1909
1910 the_insn.opcode = opcode;
1911 }
1912
1913 static int
1914 getExpression (str)
1915 char *str;
1916 {
1917 char *save_in;
1918 segT seg;
1919
1920 save_in = input_line_pointer;
1921 input_line_pointer = str;
1922 seg = expression (&the_insn.exp);
1923 if (seg != absolute_section
1924 && seg != text_section
1925 && seg != data_section
1926 && seg != bss_section
1927 && seg != undefined_section)
1928 {
1929 the_insn.error = "bad segment";
1930 expr_end = input_line_pointer;
1931 input_line_pointer = save_in;
1932 return 1;
1933 }
1934 expr_end = input_line_pointer;
1935 input_line_pointer = save_in;
1936 return 0;
1937 } /* getExpression() */
1938
1939
1940 /*
1941 This is identical to the md_atof in m68k.c. I think this is right,
1942 but I'm not sure.
1943
1944 Turn a string in input_line_pointer into a floating point constant of type
1945 type, and store the appropriate bytes in *litP. The number of LITTLENUMS
1946 emitted is stored in *sizeP . An error message is returned, or NULL on OK.
1947 */
1948
1949 /* Equal to MAX_PRECISION in atof-ieee.c */
1950 #define MAX_LITTLENUMS 6
1951
1952 char *
1953 md_atof (type, litP, sizeP)
1954 char type;
1955 char *litP;
1956 int *sizeP;
1957 {
1958 int prec;
1959 LITTLENUM_TYPE words[MAX_LITTLENUMS];
1960 LITTLENUM_TYPE *wordP;
1961 char *t;
1962 char *atof_ieee ();
1963
1964 switch (type)
1965 {
1966
1967 case 'f':
1968 case 'F':
1969 case 's':
1970 case 'S':
1971 prec = 2;
1972 break;
1973
1974 case 'd':
1975 case 'D':
1976 case 'r':
1977 case 'R':
1978 prec = 4;
1979 break;
1980
1981 case 'x':
1982 case 'X':
1983 prec = 6;
1984 break;
1985
1986 case 'p':
1987 case 'P':
1988 prec = 6;
1989 break;
1990
1991 default:
1992 *sizeP = 0;
1993 return "Bad call to MD_ATOF()";
1994 }
1995 t = atof_ieee (input_line_pointer, type, words);
1996 if (t)
1997 input_line_pointer = t;
1998 *sizeP = prec * sizeof (LITTLENUM_TYPE);
1999 for (wordP = words; prec--;)
2000 {
2001 md_number_to_chars (litP, (valueT) (*wordP++), sizeof (LITTLENUM_TYPE));
2002 litP += sizeof (LITTLENUM_TYPE);
2003 }
2004 return 0;
2005 }
2006
2007 /*
2008 * Write out big-endian.
2009 */
2010 void
2011 md_number_to_chars (buf, val, n)
2012 char *buf;
2013 valueT val;
2014 int n;
2015 {
2016 number_to_chars_bigendian (buf, val, n);
2017 }
2018
2019 /* Apply a fixS to the frags, now that we know the value it ought to
2020 hold. */
2021
2022 int
2023 md_apply_fix (fixP, value)
2024 fixS *fixP;
2025 valueT *value;
2026 {
2027 char *buf = fixP->fx_where + fixP->fx_frag->fr_literal;
2028 offsetT val;
2029
2030 val = *value;
2031
2032 assert (fixP->fx_r_type < BFD_RELOC_UNUSED);
2033
2034 fixP->fx_addnumber = val; /* Remember value for emit_reloc */
2035
2036 #ifdef OBJ_ELF
2037 /* FIXME: SPARC ELF relocations don't use an addend in the data
2038 field itself. This whole approach should be somehow combined
2039 with the calls to bfd_perform_relocation. Also, the value passed
2040 in by fixup_segment includes the value of a defined symbol. We
2041 don't want to include the value of an externally visible symbol. */
2042 if (fixP->fx_addsy != NULL)
2043 {
2044 if ((S_IS_EXTERNAL (fixP->fx_addsy)
2045 || S_IS_WEAK (fixP->fx_addsy)
2046 || (sparc_pic_code && ! fixP->fx_pcrel))
2047 && S_GET_SEGMENT (fixP->fx_addsy) != absolute_section
2048 && S_GET_SEGMENT (fixP->fx_addsy) != undefined_section
2049 && ! bfd_is_com_section (S_GET_SEGMENT (fixP->fx_addsy)))
2050 fixP->fx_addnumber -= S_GET_VALUE (fixP->fx_addsy);
2051 return 1;
2052 }
2053 #endif
2054
2055 /* This is a hack. There should be a better way to
2056 handle this. Probably in terms of howto fields, once
2057 we can look at these fixups in terms of howtos. */
2058 if (fixP->fx_r_type == BFD_RELOC_32_PCREL_S2 && fixP->fx_addsy)
2059 val += fixP->fx_where + fixP->fx_frag->fr_address;
2060
2061 #ifdef OBJ_AOUT
2062 /* FIXME: More ridiculous gas reloc hacking. If we are going to
2063 generate a reloc, then we just want to let the reloc addend set
2064 the value. We do not want to also stuff the addend into the
2065 object file. Including the addend in the object file works when
2066 doing a static link, because the linker will ignore the object
2067 file contents. However, the dynamic linker does not ignore the
2068 object file contents. */
2069 if (fixP->fx_addsy != NULL
2070 && fixP->fx_r_type != BFD_RELOC_32_PCREL_S2)
2071 val = 0;
2072
2073 /* When generating PIC code, we do not want an addend for a reloc
2074 against a local symbol. We adjust fx_addnumber to cancel out the
2075 value already included in val, and to also cancel out the
2076 adjustment which bfd_install_relocation will create. */
2077 if (sparc_pic_code
2078 && fixP->fx_r_type != BFD_RELOC_32_PCREL_S2
2079 && fixP->fx_addsy != NULL
2080 && ! S_IS_COMMON (fixP->fx_addsy)
2081 && (fixP->fx_addsy->bsym->flags & BSF_SECTION_SYM) == 0)
2082 fixP->fx_addnumber -= 2 * S_GET_VALUE (fixP->fx_addsy);
2083 #endif
2084
2085 switch (fixP->fx_r_type)
2086 {
2087 case BFD_RELOC_16:
2088 buf[0] = val >> 8;
2089 buf[1] = val;
2090 break;
2091
2092 case BFD_RELOC_32:
2093 buf[0] = val >> 24;
2094 buf[1] = val >> 16;
2095 buf[2] = val >> 8;
2096 buf[3] = val;
2097 break;
2098
2099 case BFD_RELOC_32_PCREL_S2:
2100 val = (val >>= 2);
2101 if (! sparc_pic_code
2102 || fixP->fx_addsy == NULL
2103 || (fixP->fx_addsy->bsym->flags & BSF_SECTION_SYM) != 0)
2104 ++val;
2105 buf[0] |= (val >> 24) & 0x3f;
2106 buf[1] = (val >> 16);
2107 buf[2] = val >> 8;
2108 buf[3] = val;
2109 break;
2110
2111 case BFD_RELOC_64:
2112 {
2113 bfd_vma valh = BSR (val, 32);
2114 buf[0] = valh >> 24;
2115 buf[1] = valh >> 16;
2116 buf[2] = valh >> 8;
2117 buf[3] = valh;
2118 buf[4] = val >> 24;
2119 buf[5] = val >> 16;
2120 buf[6] = val >> 8;
2121 buf[7] = val;
2122 }
2123 break;
2124
2125 case BFD_RELOC_SPARC_11:
2126 if (((val > 0) && (val & ~0x7ff))
2127 || ((val < 0) && (~(val - 1) & ~0x7ff)))
2128 {
2129 as_bad ("relocation overflow.");
2130 } /* on overflow */
2131
2132 buf[2] |= (val >> 8) & 0x7;
2133 buf[3] = val & 0xff;
2134 break;
2135
2136 case BFD_RELOC_SPARC_10:
2137 if (((val > 0) && (val & ~0x3ff))
2138 || ((val < 0) && (~(val - 1) & ~0x3ff)))
2139 {
2140 as_bad ("relocation overflow.");
2141 } /* on overflow */
2142
2143 buf[2] |= (val >> 8) & 0x3;
2144 buf[3] = val & 0xff;
2145 break;
2146
2147 case BFD_RELOC_SPARC_WDISP16:
2148 if (((val > 0) && (val & ~0x3fffc))
2149 || ((val < 0) && (~(val - 1) & ~0x3fffc)))
2150 {
2151 as_bad ("relocation overflow.");
2152 } /* on overflow */
2153
2154 val = (val >>= 2) + 1;
2155 buf[1] |= ((val >> 14) & 0x3) << 4;
2156 buf[2] |= (val >> 8) & 0x3f;
2157 buf[3] = val & 0xff;
2158 break;
2159
2160 case BFD_RELOC_SPARC_WDISP19:
2161 if (((val > 0) && (val & ~0x1ffffc))
2162 || ((val < 0) && (~(val - 1) & ~0x1ffffc)))
2163 {
2164 as_bad ("relocation overflow.");
2165 } /* on overflow */
2166
2167 val = (val >>= 2) + 1;
2168 buf[1] |= (val >> 16) & 0x7;
2169 buf[2] = (val >> 8) & 0xff;
2170 buf[3] = val & 0xff;
2171 break;
2172
2173 case BFD_RELOC_SPARC_HH22:
2174 val = BSR (val, 32);
2175 /* intentional fallthrough */
2176
2177 case BFD_RELOC_SPARC_LM22:
2178 case BFD_RELOC_HI22:
2179 if (!fixP->fx_addsy)
2180 {
2181 buf[1] |= (val >> 26) & 0x3f;
2182 buf[2] = val >> 18;
2183 buf[3] = val >> 10;
2184 }
2185 else
2186 {
2187 buf[2] = 0;
2188 buf[3] = 0;
2189 }
2190 break;
2191
2192 case BFD_RELOC_SPARC22:
2193 if (val & ~0x003fffff)
2194 {
2195 as_bad ("relocation overflow");
2196 } /* on overflow */
2197 buf[1] |= (val >> 16) & 0x3f;
2198 buf[2] = val >> 8;
2199 buf[3] = val & 0xff;
2200 break;
2201
2202 case BFD_RELOC_SPARC_HM10:
2203 val = BSR (val, 32);
2204 /* intentional fallthrough */
2205
2206 case BFD_RELOC_LO10:
2207 if (!fixP->fx_addsy)
2208 {
2209 buf[2] |= (val >> 8) & 0x03;
2210 buf[3] = val;
2211 }
2212 else
2213 buf[3] = 0;
2214 break;
2215
2216 case BFD_RELOC_SPARC13:
2217 if (! in_signed_range (val, 0x1fff))
2218 as_bad ("relocation overflow");
2219
2220 buf[2] |= (val >> 8) & 0x1f;
2221 buf[3] = val;
2222 break;
2223
2224 case BFD_RELOC_SPARC_WDISP22:
2225 val = (val >> 2) + 1;
2226 /* FALLTHROUGH */
2227 case BFD_RELOC_SPARC_BASE22:
2228 buf[1] |= (val >> 16) & 0x3f;
2229 buf[2] = val >> 8;
2230 buf[3] = val;
2231 break;
2232
2233 case BFD_RELOC_NONE:
2234 default:
2235 as_bad ("bad or unhandled relocation type: 0x%02x", fixP->fx_r_type);
2236 break;
2237 }
2238
2239 /* Are we finished with this relocation now? */
2240 if (fixP->fx_addsy == 0 && !fixP->fx_pcrel)
2241 fixP->fx_done = 1;
2242
2243 return 1;
2244 }
2245
2246 /* Translate internal representation of relocation info to BFD target
2247 format. */
2248 arelent *
2249 tc_gen_reloc (section, fixp)
2250 asection *section;
2251 fixS *fixp;
2252 {
2253 arelent *reloc;
2254 bfd_reloc_code_real_type code;
2255
2256 reloc = (arelent *) bfd_alloc_by_size_t (stdoutput, sizeof (arelent));
2257 assert (reloc != 0);
2258
2259 reloc->sym_ptr_ptr = &fixp->fx_addsy->bsym;
2260 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
2261
2262 switch (fixp->fx_r_type)
2263 {
2264 case BFD_RELOC_16:
2265 case BFD_RELOC_32:
2266 case BFD_RELOC_HI22:
2267 case BFD_RELOC_LO10:
2268 case BFD_RELOC_32_PCREL_S2:
2269 case BFD_RELOC_SPARC13:
2270 case BFD_RELOC_SPARC_BASE13:
2271 case BFD_RELOC_SPARC_WDISP16:
2272 case BFD_RELOC_SPARC_WDISP19:
2273 case BFD_RELOC_SPARC_WDISP22:
2274 case BFD_RELOC_64:
2275 case BFD_RELOC_SPARC_10:
2276 case BFD_RELOC_SPARC_11:
2277 case BFD_RELOC_SPARC_HH22:
2278 case BFD_RELOC_SPARC_HM10:
2279 case BFD_RELOC_SPARC_LM22:
2280 case BFD_RELOC_SPARC_PC_HH22:
2281 case BFD_RELOC_SPARC_PC_HM10:
2282 case BFD_RELOC_SPARC_PC_LM22:
2283 code = fixp->fx_r_type;
2284 break;
2285 default:
2286 abort ();
2287 }
2288
2289 #if defined (OBJ_ELF) || defined (OBJ_AOUT)
2290 /* If we are generating PIC code, we need to generate a different
2291 set of relocs. */
2292
2293 #ifdef OBJ_ELF
2294 #define GOT_NAME "_GLOBAL_OFFSET_TABLE_"
2295 #else
2296 #define GOT_NAME "__GLOBAL_OFFSET_TABLE_"
2297 #endif
2298
2299 if (sparc_pic_code)
2300 {
2301 switch (code)
2302 {
2303 case BFD_RELOC_32_PCREL_S2:
2304 if (! S_IS_DEFINED (fixp->fx_addsy)
2305 || S_IS_EXTERNAL (fixp->fx_addsy)
2306 || S_IS_WEAK (fixp->fx_addsy))
2307 code = BFD_RELOC_SPARC_WPLT30;
2308 break;
2309 case BFD_RELOC_HI22:
2310 if (fixp->fx_addsy != NULL
2311 && strcmp (S_GET_NAME (fixp->fx_addsy), GOT_NAME) == 0)
2312 code = BFD_RELOC_SPARC_PC22;
2313 else
2314 code = BFD_RELOC_SPARC_GOT22;
2315 break;
2316 case BFD_RELOC_LO10:
2317 if (fixp->fx_addsy != NULL
2318 && strcmp (S_GET_NAME (fixp->fx_addsy), GOT_NAME) == 0)
2319 code = BFD_RELOC_SPARC_PC10;
2320 else
2321 code = BFD_RELOC_SPARC_GOT10;
2322 break;
2323 case BFD_RELOC_SPARC13:
2324 code = BFD_RELOC_SPARC_GOT13;
2325 break;
2326 default:
2327 break;
2328 }
2329 }
2330 #endif /* defined (OBJ_ELF) || defined (OBJ_AOUT) */
2331
2332 reloc->howto = bfd_reloc_type_lookup (stdoutput, code);
2333 if (reloc->howto == 0)
2334 {
2335 as_bad_where (fixp->fx_file, fixp->fx_line,
2336 "internal error: can't export reloc type %d (`%s')",
2337 fixp->fx_r_type, bfd_get_reloc_code_name (code));
2338 return 0;
2339 }
2340
2341 /* @@ Why fx_addnumber sometimes and fx_offset other times? */
2342 #ifdef OBJ_AOUT
2343
2344 if (reloc->howto->pc_relative == 0
2345 || code == BFD_RELOC_SPARC_PC10
2346 || code == BFD_RELOC_SPARC_PC22)
2347 reloc->addend = fixp->fx_addnumber;
2348 else
2349 reloc->addend = fixp->fx_offset - reloc->address;
2350
2351 #else /* elf or coff */
2352
2353 if (reloc->howto->pc_relative == 0
2354 || code == BFD_RELOC_SPARC_PC10
2355 || code == BFD_RELOC_SPARC_PC22)
2356 reloc->addend = fixp->fx_addnumber;
2357 else if ((fixp->fx_addsy->bsym->flags & BSF_SECTION_SYM) != 0)
2358 reloc->addend = (section->vma
2359 + fixp->fx_addnumber
2360 + md_pcrel_from (fixp));
2361 else
2362 reloc->addend = fixp->fx_offset;
2363 #endif
2364
2365 return reloc;
2366 }
2367
2368
2369 #if 0
2370 /* for debugging only */
2371 static void
2372 print_insn (insn)
2373 struct sparc_it *insn;
2374 {
2375 const char *const Reloc[] = {
2376 "RELOC_8",
2377 "RELOC_16",
2378 "RELOC_32",
2379 "RELOC_DISP8",
2380 "RELOC_DISP16",
2381 "RELOC_DISP32",
2382 "RELOC_WDISP30",
2383 "RELOC_WDISP22",
2384 "RELOC_HI22",
2385 "RELOC_22",
2386 "RELOC_13",
2387 "RELOC_LO10",
2388 "RELOC_SFA_BASE",
2389 "RELOC_SFA_OFF13",
2390 "RELOC_BASE10",
2391 "RELOC_BASE13",
2392 "RELOC_BASE22",
2393 "RELOC_PC10",
2394 "RELOC_PC22",
2395 "RELOC_JMP_TBL",
2396 "RELOC_SEGOFF16",
2397 "RELOC_GLOB_DAT",
2398 "RELOC_JMP_SLOT",
2399 "RELOC_RELATIVE",
2400 "NO_RELOC"
2401 };
2402
2403 if (insn->error)
2404 fprintf (stderr, "ERROR: %s\n");
2405 fprintf (stderr, "opcode=0x%08x\n", insn->opcode);
2406 fprintf (stderr, "reloc = %s\n", Reloc[insn->reloc]);
2407 fprintf (stderr, "exp = {\n");
2408 fprintf (stderr, "\t\tX_add_symbol = %s\n",
2409 ((insn->exp.X_add_symbol != NULL)
2410 ? ((S_GET_NAME (insn->exp.X_add_symbol) != NULL)
2411 ? S_GET_NAME (insn->exp.X_add_symbol)
2412 : "???")
2413 : "0"));
2414 fprintf (stderr, "\t\tX_sub_symbol = %s\n",
2415 ((insn->exp.X_op_symbol != NULL)
2416 ? (S_GET_NAME (insn->exp.X_op_symbol)
2417 ? S_GET_NAME (insn->exp.X_op_symbol)
2418 : "???")
2419 : "0"));
2420 fprintf (stderr, "\t\tX_add_number = %d\n",
2421 insn->exp.X_add_number);
2422 fprintf (stderr, "}\n");
2423 }
2424 #endif
2425 \f
2426 /*
2427 * md_parse_option
2428 * Invocation line includes a switch not recognized by the base assembler.
2429 * See if it's a processor-specific option. These are:
2430 *
2431 * -bump
2432 * Warn on architecture bumps. See also -A.
2433 *
2434 * -Av6, -Av7, -Av8, -Av9, -Av9a, -Asparclite
2435 * -xarch=v8plus, -xarch=v8plusa
2436 * Select the architecture. Instructions or features not
2437 * supported by the selected architecture cause fatal errors.
2438 *
2439 * The default is to start at v6, and bump the architecture up
2440 * whenever an instruction is seen at a higher level. If 32 bit
2441 * environments, v9 is not bumped up to, the user must pass -Av9.
2442 *
2443 * -xarch=v8plus{,a} is for compatibility with the Sun assembler.
2444 *
2445 * If -bump is specified, a warning is printing when bumping to
2446 * higher levels.
2447 *
2448 * If an architecture is specified, all instructions must match
2449 * that architecture. Any higher level instructions are flagged
2450 * as errors. Note that in the 32 bit environment specifying
2451 * -Av9 does not automatically create a v9 object file, a v9
2452 * insn must be seen.
2453 *
2454 * If both an architecture and -bump are specified, the
2455 * architecture starts at the specified level, but bumps are
2456 * warnings. Note that we can't set `current_architecture' to
2457 * the requested level in this case: in the 32 bit environment,
2458 * we still must avoid creating v9 object files unless v9 insns
2459 * are seen.
2460 *
2461 * Note:
2462 * Bumping between incompatible architectures is always an
2463 * error. For example, from sparclite to v9.
2464 */
2465
2466 #ifdef OBJ_ELF
2467 CONST char *md_shortopts = "A:K:VQ:sq";
2468 #else
2469 #ifdef OBJ_AOUT
2470 CONST char *md_shortopts = "A:k";
2471 #else
2472 CONST char *md_shortopts = "A:";
2473 #endif
2474 #endif
2475 struct option md_longopts[] = {
2476 #define OPTION_BUMP (OPTION_MD_BASE)
2477 {"bump", no_argument, NULL, OPTION_BUMP},
2478 #define OPTION_SPARC (OPTION_MD_BASE + 1)
2479 {"sparc", no_argument, NULL, OPTION_SPARC},
2480 #define OPTION_XARCH (OPTION_MD_BASE + 2)
2481 {"xarch", required_argument, NULL, OPTION_XARCH},
2482 {NULL, no_argument, NULL, 0}
2483 };
2484 size_t md_longopts_size = sizeof(md_longopts);
2485
2486 int
2487 md_parse_option (c, arg)
2488 int c;
2489 char *arg;
2490 {
2491 switch (c)
2492 {
2493 case OPTION_BUMP:
2494 warn_on_bump = 1;
2495 warn_after_architecture = SPARC_OPCODE_ARCH_V6;
2496 break;
2497
2498 case OPTION_XARCH:
2499 /* ??? We could add v8plus and v8plusa to sparc_opcode_archs.
2500 But we might want v8plus to mean something different than v9
2501 someday, and we'd recognize more -xarch options than Sun's
2502 assembler does (which may lead to a conflict someday). */
2503 if (strcmp (arg, "v8plus") == 0)
2504 arg = "v9";
2505 else if (strcmp (arg, "v8plusa") == 0)
2506 arg = "v9a";
2507 else
2508 {
2509 as_bad ("invalid architecture -xarch=%s", arg);
2510 return 0;
2511 }
2512
2513 /* fall through */
2514
2515 case 'A':
2516 {
2517 enum sparc_opcode_arch_val new_arch = sparc_opcode_lookup_arch (arg);
2518
2519 if (new_arch == SPARC_OPCODE_ARCH_BAD)
2520 {
2521 as_bad ("invalid architecture -A%s", arg);
2522 return 0;
2523 }
2524 else
2525 {
2526 max_architecture = new_arch;
2527 architecture_requested = 1;
2528 }
2529 }
2530 break;
2531
2532 case OPTION_SPARC:
2533 /* Ignore -sparc, used by SunOS make default .s.o rule. */
2534 break;
2535
2536 #ifdef OBJ_AOUT
2537 case 'k':
2538 sparc_pic_code = 1;
2539 break;
2540 #endif
2541
2542 #ifdef OBJ_ELF
2543 case 'V':
2544 print_version_id ();
2545 break;
2546
2547 case 'Q':
2548 /* Qy - do emit .comment
2549 Qn - do not emit .comment */
2550 break;
2551
2552 case 's':
2553 /* use .stab instead of .stab.excl */
2554 break;
2555
2556 case 'q':
2557 /* quick -- native assembler does fewer checks */
2558 break;
2559
2560 case 'K':
2561 if (strcmp (arg, "PIC") != 0)
2562 as_warn ("Unrecognized option following -K");
2563 else
2564 sparc_pic_code = 1;
2565 break;
2566 #endif
2567
2568 default:
2569 return 0;
2570 }
2571
2572 return 1;
2573 }
2574
2575 void
2576 md_show_usage (stream)
2577 FILE *stream;
2578 {
2579 const struct sparc_opcode_arch *arch;
2580
2581 fprintf(stream, "SPARC options:\n");
2582 for (arch = &sparc_opcode_archs[0]; arch->name; arch++)
2583 {
2584 if (arch != &sparc_opcode_archs[0])
2585 fprintf (stream, " | ");
2586 fprintf (stream, "-A%s", arch->name);
2587 }
2588 fprintf (stream, "\n-xarch=v8plus | -xarch=v8plusa\n");
2589 fprintf (stream, "\
2590 specify variant of SPARC architecture\n\
2591 -bump warn when assembler switches architectures\n\
2592 -sparc ignored\n");
2593 #ifdef OBJ_AOUT
2594 fprintf (stream, "\
2595 -k generate PIC\n");
2596 #endif
2597 #ifdef OBJ_ELF
2598 fprintf (stream, "\
2599 -KPIC generate PIC\n\
2600 -V print assembler version number\n\
2601 -q ignored\n\
2602 -Qy, -Qn ignored\n\
2603 -s ignored\n");
2604 #endif
2605 }
2606 \f
2607 /* We have no need to default values of symbols. */
2608
2609 /* ARGSUSED */
2610 symbolS *
2611 md_undefined_symbol (name)
2612 char *name;
2613 {
2614 return 0;
2615 } /* md_undefined_symbol() */
2616
2617 /* Round up a section size to the appropriate boundary. */
2618 valueT
2619 md_section_align (segment, size)
2620 segT segment;
2621 valueT size;
2622 {
2623 #ifndef OBJ_ELF
2624 /* This is not right for ELF; a.out wants it, and COFF will force
2625 the alignment anyways. */
2626 valueT align = ((valueT) 1
2627 << (valueT) bfd_get_section_alignment (stdoutput, segment));
2628 valueT newsize;
2629 /* turn alignment value into a mask */
2630 align--;
2631 newsize = (size + align) & ~align;
2632 return newsize;
2633 #else
2634 return size;
2635 #endif
2636 }
2637
2638 /* Exactly what point is a PC-relative offset relative TO?
2639 On the sparc, they're relative to the address of the offset, plus
2640 its size. This gets us to the following instruction.
2641 (??? Is this right? FIXME-SOON) */
2642 long
2643 md_pcrel_from (fixP)
2644 fixS *fixP;
2645 {
2646 long ret;
2647
2648 ret = fixP->fx_where + fixP->fx_frag->fr_address;
2649 if (! sparc_pic_code
2650 || fixP->fx_addsy == NULL
2651 || (fixP->fx_addsy->bsym->flags & BSF_SECTION_SYM) != 0)
2652 ret += fixP->fx_size;
2653 return ret;
2654 }
2655
2656 /* end of tc-sparc.c */
GDB Binutils - Deliverables
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