1 /* tc-tic4x.c -- Assemble for the Texas Instruments TMS320C[34]x.
2 Copyright (C) 1997-2020 Free Software Foundation, Inc.
4 Contributed by Michael P. Hayes (m.hayes@elec.canterbury.ac.nz)
6 This file is part of GAS, the GNU Assembler.
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3, or (at your option)
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to
20 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
21 Boston, MA 02110-1301, USA. */
26 o .align cannot handle fill-data-width larger than 0xFF/8-bits. It
27 should be possible to define a 32-bits pattern.
29 o .align: Implement a 'bu' insn if the number of nop's exceeds 4
30 within the align frag. if(fragsize>4words) insert bu fragend+1
33 o .usect if has symbol on previous line not implemented
35 o .sym, .eos, .stag, .etag, .member not implemented
37 o Evaluation of constant floating point expressions (expr.c needs
40 o Support 'abc' constants (that is 0x616263). */
43 #include "safe-ctype.h"
44 #include "opcode/tic4x.h"
47 /* OK, we accept a syntax similar to the other well known C30
48 assembly tools. With TIC4X_ALT_SYNTAX defined we are more
49 flexible, allowing a more Unix-like syntax: `%' in front of
50 register names, `#' in front of immediate constants, and
51 not requiring `@' in front of direct addresses. */
53 #define TIC4X_ALT_SYNTAX
55 /* Handle of the inst mnemonic hash table. */
56 static htab_t tic4x_op_hash
= NULL
;
58 /* Handle asg pseudo. */
59 static htab_t tic4x_asg_hash
= NULL
;
61 static unsigned int tic4x_cpu
= 0; /* Default to TMS320C40. */
62 static unsigned int tic4x_revision
= 0; /* CPU revision */
63 static unsigned int tic4x_idle2
= 0; /* Idle2 support */
64 static unsigned int tic4x_lowpower
= 0; /* Lowpower support */
65 static unsigned int tic4x_enhanced
= 0; /* Enhanced opcode support */
66 static unsigned int tic4x_big_model
= 0; /* Default to small memory model. */
67 static unsigned int tic4x_reg_args
= 0; /* Default to args passed on stack. */
68 static unsigned long tic4x_oplevel
= 0; /* Opcode level */
70 #define OPTION_CPU 'm'
71 #define OPTION_BIG (OPTION_MD_BASE + 1)
72 #define OPTION_SMALL (OPTION_MD_BASE + 2)
73 #define OPTION_MEMPARM (OPTION_MD_BASE + 3)
74 #define OPTION_REGPARM (OPTION_MD_BASE + 4)
75 #define OPTION_IDLE2 (OPTION_MD_BASE + 5)
76 #define OPTION_LOWPOWER (OPTION_MD_BASE + 6)
77 #define OPTION_ENHANCED (OPTION_MD_BASE + 7)
78 #define OPTION_REV (OPTION_MD_BASE + 8)
80 const char *md_shortopts
= "bm:prs";
81 struct option md_longopts
[] =
83 { "mcpu", required_argument
, NULL
, OPTION_CPU
},
84 { "mdsp", required_argument
, NULL
, OPTION_CPU
},
85 { "mbig", no_argument
, NULL
, OPTION_BIG
},
86 { "msmall", no_argument
, NULL
, OPTION_SMALL
},
87 { "mmemparm", no_argument
, NULL
, OPTION_MEMPARM
},
88 { "mregparm", no_argument
, NULL
, OPTION_REGPARM
},
89 { "midle2", no_argument
, NULL
, OPTION_IDLE2
},
90 { "mlowpower", no_argument
, NULL
, OPTION_LOWPOWER
},
91 { "menhanced", no_argument
, NULL
, OPTION_ENHANCED
},
92 { "mrev", required_argument
, NULL
, OPTION_REV
},
93 { NULL
, no_argument
, NULL
, 0 }
96 size_t md_longopts_size
= sizeof (md_longopts
);
101 M_UNKNOWN
, M_IMMED
, M_DIRECT
, M_REGISTER
, M_INDIRECT
,
102 M_IMMED_F
, M_PARALLEL
, M_HI
106 typedef struct tic4x_operand
108 tic4x_addr_mode_t mode
; /* Addressing mode. */
109 expressionS expr
; /* Expression. */
110 int disp
; /* Displacement for indirect addressing. */
111 int aregno
; /* Aux. register number. */
112 LITTLENUM_TYPE fwords
[MAX_LITTLENUMS
]; /* Float immed. number. */
116 typedef struct tic4x_insn
118 char name
[TIC4X_NAME_MAX
]; /* Mnemonic of instruction. */
119 unsigned int in_use
; /* True if in_use. */
120 unsigned int parallel
; /* True if parallel instruction. */
121 unsigned int nchars
; /* This is always 4 for the C30. */
122 unsigned long opcode
; /* Opcode number. */
123 expressionS exp
; /* Expression required for relocation. */
124 /* Relocation type required. */
125 bfd_reloc_code_real_type reloc
;
126 int pcrel
; /* True if relocation PC relative. */
127 char *pname
; /* Name of instruction in parallel. */
128 unsigned int num_operands
; /* Number of operands in total. */
129 tic4x_inst_t
*inst
; /* Pointer to first template. */
130 tic4x_operand_t operands
[TIC4X_OPERANDS_MAX
];
134 static tic4x_insn_t the_insn
; /* Info about our instruction. */
135 static tic4x_insn_t
*insn
= &the_insn
;
137 static void tic4x_asg (int);
138 static void tic4x_bss (int);
139 static void tic4x_globl (int);
140 static void tic4x_cons (int);
141 static void tic4x_stringer (int);
142 static void tic4x_eval (int);
143 static void tic4x_newblock (int);
144 static void tic4x_sect (int);
145 static void tic4x_set (int);
146 static void tic4x_usect (int);
147 static void tic4x_version (int);
153 {"align", s_align_bytes
, 32},
154 {"ascii", tic4x_stringer
, 1},
155 {"asciz", tic4x_stringer
, 0},
156 {"asg", tic4x_asg
, 0},
157 {"block", s_space
, 4},
158 {"byte", tic4x_cons
, 1},
159 {"bss", tic4x_bss
, 0},
160 {"copy", s_include
, 0},
161 {"def", tic4x_globl
, 0},
162 {"equ", tic4x_set
, 0},
163 {"eval", tic4x_eval
, 0},
164 {"global", tic4x_globl
, 0},
165 {"globl", tic4x_globl
, 0},
166 {"hword", tic4x_cons
, 2},
167 {"ieee", float_cons
, 'i'},
168 {"int", tic4x_cons
, 4}, /* .int allocates 4 bytes. */
169 {"ldouble", float_cons
, 'e'},
170 {"newblock", tic4x_newblock
, 0},
171 {"ref", s_ignore
, 0}, /* All undefined treated as external. */
172 {"set", tic4x_set
, 0},
173 {"sect", tic4x_sect
, 1}, /* Define named section. */
174 {"space", s_space
, 4},
175 {"string", tic4x_stringer
, 0},
176 {"usect", tic4x_usect
, 0}, /* Reserve space in uninit. named sect. */
177 {"version", tic4x_version
, 0},
178 {"word", tic4x_cons
, 4}, /* .word allocates 4 bytes. */
179 {"xdef", tic4x_globl
, 0},
183 int md_short_jump_size
= 4;
184 int md_long_jump_size
= 4;
186 /* This array holds the chars that always start a comment. If the
187 pre-processor is disabled, these aren't very useful. */
188 #ifdef TIC4X_ALT_SYNTAX
189 const char comment_chars
[] = ";!";
191 const char comment_chars
[] = ";";
194 /* This array holds the chars that only start a comment at the beginning of
195 a line. If the line seems to have the form '# 123 filename'
196 .line and .file directives will appear in the pre-processed output.
197 Note that input_file.c hand checks for '#' at the beginning of the
198 first line of the input file. This is because the compiler outputs
199 #NO_APP at the beginning of its output.
200 Also note that comments like this one will always work. */
201 const char line_comment_chars
[] = "#*";
203 /* We needed an unused char for line separation to work around the
204 lack of macros, using sed and such. */
205 const char line_separator_chars
[] = "&";
207 /* Chars that can be used to separate mant from exp in floating point nums. */
208 const char EXP_CHARS
[] = "eE";
210 /* Chars that mean this number is a floating point constant. */
213 const char FLT_CHARS
[] = "fFilsS";
215 /* Also be aware that MAXIMUM_NUMBER_OF_CHARS_FOR_FLOAT may have to be
216 changed in read.c. Ideally it shouldn't have to know about it at
217 all, but nothing is ideal around here. */
219 /* Flonums returned here. */
220 extern FLONUM_TYPE generic_floating_point_number
;
222 /* Precision in LittleNums. */
223 #define MAX_PRECISION (4) /* It's a bit overkill for us, but the code
225 #define S_PRECISION (1) /* Short float constants 16-bit. */
226 #define F_PRECISION (2) /* Float and double types 32-bit. */
227 #define E_PRECISION (4) /* Extended precision, 64-bit (real 40-bit). */
230 /* Turn generic_floating_point_number into a real short/float/double. */
232 tic4x_gen_to_words (FLONUM_TYPE flonum
, LITTLENUM_TYPE
*words
, int precision
)
234 int return_value
= 0;
235 LITTLENUM_TYPE
*p
; /* Littlenum pointer. */
236 int mantissa_bits
; /* Bits in mantissa field. */
237 int exponent_bits
; /* Bits in exponent field. */
239 unsigned int sone
; /* Scaled one. */
240 unsigned int sfract
; /* Scaled fraction. */
241 unsigned int smant
; /* Scaled mantissa. */
243 unsigned int mover
; /* Mantissa overflow bits */
244 unsigned int rbit
; /* Round bit. */
245 int shift
; /* Shift count. */
247 /* NOTE: Svein Seldal <Svein@dev.seldal.com>
248 The code in this function is altered slightly to support floats
249 with 31-bits mantissas, thus the documentation below may be a
250 little bit inaccurate.
252 By Michael P. Hayes <m.hayes@elec.canterbury.ac.nz>
253 Here is how a generic floating point number is stored using
254 flonums (an extension of bignums) where p is a pointer to an
257 For example 2e-3 is stored with exp = -4 and
264 with low = &bits[2], high = &bits[5], and leader = &bits[5].
266 This number can be written as
267 0x0083126e978d4fde.00000000 * 65536**-4 or
268 0x0.0083126e978d4fde * 65536**0 or
269 0x0.83126e978d4fde * 2**-8 = 2e-3
271 Note that low points to the 65536**0 littlenum (bits[2]) and
272 leader points to the most significant non-zero littlenum
275 TMS320C3X floating point numbers are a bit of a strange beast.
276 The 32-bit flavour has the 8 MSBs representing the exponent in
277 twos complement format (-128 to +127). There is then a sign bit
278 followed by 23 bits of mantissa. The mantissa is expressed in
279 twos complement format with the binary point after the most
280 significant non sign bit. The bit after the binary point is
281 suppressed since it is the complement of the sign bit. The
282 effective mantissa is thus 24 bits. Zero is represented by an
285 The 16-bit flavour has the 4 MSBs representing the exponent in
286 twos complement format (-8 to +7). There is then a sign bit
287 followed by 11 bits of mantissa. The mantissa is expressed in
288 twos complement format with the binary point after the most
289 significant non sign bit. The bit after the binary point is
290 suppressed since it is the complement of the sign bit. The
291 effective mantissa is thus 12 bits. Zero is represented by an
292 exponent of -8. For example,
294 number norm mant m x e s i fraction f
295 +0.500 => 1.00000000000 -1 -1 0 1 .00000000000 (1 + 0) * 2^(-1)
296 +0.999 => 1.11111111111 -1 -1 0 1 .11111111111 (1 + 0.99) * 2^(-1)
297 +1.000 => 1.00000000000 0 0 0 1 .00000000000 (1 + 0) * 2^(0)
298 +1.500 => 1.10000000000 0 0 0 1 .10000000000 (1 + 0.5) * 2^(0)
299 +1.999 => 1.11111111111 0 0 0 1 .11111111111 (1 + 0.9) * 2^(0)
300 +2.000 => 1.00000000000 1 1 0 1 .00000000000 (1 + 0) * 2^(1)
301 +4.000 => 1.00000000000 2 2 0 1 .00000000000 (1 + 0) * 2^(2)
302 -0.500 => 1.00000000000 -1 -1 1 0 .10000000000 (-2 + 0) * 2^(-2)
303 -1.000 => 1.00000000000 0 -1 1 0 .00000000000 (-2 + 0) * 2^(-1)
304 -1.500 => 1.10000000000 0 0 1 0 .10000000000 (-2 + 0.5) * 2^(0)
305 -1.999 => 1.11111111111 0 0 1 0 .00000000001 (-2 + 0.11) * 2^(0)
306 -2.000 => 1.00000000000 1 1 1 0 .00000000000 (-2 + 0) * 2^(0)
307 -4.000 => 1.00000000000 2 1 1 0 .00000000000 (-2 + 0) * 2^(1)
309 where e is the exponent, s is the sign bit, i is the implied bit,
310 and f is the fraction stored in the mantissa field.
312 num = (1 + f) * 2^x = m * 2^e if s = 0
313 num = (-2 + f) * 2^x = -m * 2^e if s = 1
314 where 0 <= f < 1.0 and 1.0 <= m < 2.0
316 The fraction (f) and exponent (e) fields for the TMS320C3X format
317 can be derived from the normalised mantissa (m) and exponent (x) using:
319 f = m - 1, e = x if s = 0
320 f = 2 - m, e = x if s = 1 and m != 1.0
321 f = 0, e = x - 1 if s = 1 and m = 1.0
322 f = 0, e = -8 if m = 0
325 OK, the other issue we have to consider is rounding since the
326 mantissa has a much higher potential precision than what we can
327 represent. To do this we add half the smallest storable fraction.
328 We then have to renormalise the number to allow for overflow.
330 To convert a generic flonum into a TMS320C3X floating point
331 number, here's what we try to do....
333 The first thing is to generate a normalised mantissa (m) where
334 1.0 <= m < 2 and to convert the exponent from base 16 to base 2.
335 We desire the binary point to be placed after the most significant
336 non zero bit. This process is done in two steps: firstly, the
337 littlenum with the most significant non zero bit is located (this
338 is done for us since leader points to this littlenum) and the
339 binary point (which is currently after the LSB of the littlenum
340 pointed to by low) is moved to before the MSB of the littlenum
341 pointed to by leader. This requires the exponent to be adjusted
342 by leader - low + 1. In the earlier example, the new exponent is
343 thus -4 + (5 - 2 + 1) = 0 (base 65536). We now need to convert
344 the exponent to base 2 by multiplying the exponent by 16 (log2
345 65536). The exponent base 2 is thus also zero.
347 The second step is to hunt for the most significant non zero bit
348 in the leader littlenum. We do this by left shifting a copy of
349 the leader littlenum until bit 16 is set (0x10000) and counting
350 the number of shifts, S, required. The number of shifts then has to
351 be added to correct the exponent (base 2). For our example, this
352 will require 9 shifts and thus our normalised exponent (base 2) is
353 0 + 9 = 9. Note that the worst case scenario is when the leader
354 littlenum is 1, thus requiring 16 shifts.
356 We now have to left shift the other littlenums by the same amount,
357 propagating the shifted bits into the more significant littlenums.
358 To save a lot of unnecessary shifting we only have to consider
359 two or three littlenums, since the greatest number of mantissa
360 bits required is 24 + 1 rounding bit. While two littlenums
361 provide 32 bits of precision, the most significant littlenum
362 may only contain a single significant bit and thus an extra
363 littlenum is required.
365 Denoting the number of bits in the fraction field as F, we require
366 G = F + 2 bits (one extra bit is for rounding, the other gets
367 suppressed). Say we required S shifts to find the most
368 significant bit in the leader littlenum, the number of left shifts
369 required to move this bit into bit position G - 1 is L = G + S - 17.
370 Note that this shift count may be negative for the short floating
371 point flavour (where F = 11 and thus G = 13 and potentially S < 3).
372 If L > 0 we have to shunt the next littlenum into position. Bit
373 15 (the MSB) of the next littlenum needs to get moved into position
374 L - 1 (If L > 15 we need all the bits of this littlenum and
375 some more from the next one.). We subtract 16 from L and use this
376 as the left shift count; the resultant value we or with the
377 previous result. If L > 0, we repeat this operation. */
379 if (precision
!= S_PRECISION
)
381 if (precision
== E_PRECISION
)
382 words
[2] = words
[3] = 0x0000;
384 /* 0.0e0 or NaN seen. */
385 if (flonum
.low
> flonum
.leader
/* = 0.0e0 */
386 || flonum
.sign
== 0) /* = NaN */
389 as_bad (_("Nan, using zero."));
394 if (flonum
.sign
== 'P')
396 /* +INF: Replace with maximum float. */
397 if (precision
== S_PRECISION
)
404 if (precision
== E_PRECISION
)
411 else if (flonum
.sign
== 'N')
413 /* -INF: Replace with maximum float. */
414 if (precision
== S_PRECISION
)
418 if (precision
== E_PRECISION
)
423 exponent
= (flonum
.exponent
+ flonum
.leader
- flonum
.low
+ 1) * 16;
425 if (!(tmp
= *flonum
.leader
))
426 abort (); /* Hmmm. */
427 shift
= 0; /* Find position of first sig. bit. */
430 exponent
-= (16 - shift
); /* Adjust exponent. */
432 if (precision
== S_PRECISION
) /* Allow 1 rounding bit. */
437 else if(precision
== F_PRECISION
)
442 else /* E_PRECISION */
448 shift
= mantissa_bits
- shift
;
453 /* Store the mantissa data into smant and the roundbit into rbit */
454 for (p
= flonum
.leader
; p
>= flonum
.low
&& shift
> -16; p
--)
456 tmp
= shift
>= 0 ? *p
<< shift
: *p
>> -shift
;
457 rbit
= shift
< 0 ? ((*p
>> (-shift
-1)) & 0x1) : 0;
462 /* OK, we've got our scaled mantissa so let's round it up */
465 /* If the mantissa is going to overflow when added, lets store
466 the extra bit in mover. -- A special case exists when
467 mantissa_bits is 31 (E_PRECISION). Then the first test cannot
468 be trusted, as result is host-dependent, thus the second
470 if( smant
== ((unsigned)(1<<(mantissa_bits
+1))-1)
471 || smant
== (unsigned)-1 ) /* This is to catch E_PRECISION cases */
476 /* Get the scaled one value */
477 sone
= (1 << (mantissa_bits
));
479 /* The number may be unnormalised so renormalise it... */
483 smant
|= sone
; /* Insert the bit from mover into smant */
487 /* The binary point is now between bit positions 11 and 10 or 23 and 22,
488 i.e., between mantissa_bits - 1 and mantissa_bits - 2 and the
489 bit at mantissa_bits - 1 should be set. */
491 abort (); /* Ooops. */
493 if (flonum
.sign
== '+')
494 sfract
= smant
- sone
; /* smant - 1.0. */
497 /* This seems to work. */
505 sfract
= -smant
& (sone
-1); /* 2.0 - smant. */
507 sfract
|= sone
; /* Insert sign bit. */
510 if (abs (exponent
) >= (1 << (exponent_bits
- 1)))
511 as_bad (_("Cannot represent exponent in %d bits"), exponent_bits
);
513 /* Force exponent to fit in desired field width. */
514 exponent
&= (1 << (exponent_bits
)) - 1;
516 if (precision
== E_PRECISION
)
518 /* Map the float part first (100% equal format as F_PRECISION) */
519 words
[0] = exponent
<< (mantissa_bits
+1-24);
520 words
[0] |= sfract
>> 24;
521 words
[1] = sfract
>> 8;
523 /* Map the mantissa in the next */
524 words
[2] = sfract
>> 16;
525 words
[3] = sfract
& 0xffff;
529 /* Insert the exponent data into the word */
530 sfract
|= exponent
<< (mantissa_bits
+1);
532 if (precision
== S_PRECISION
)
536 words
[0] = sfract
>> 16;
537 words
[1] = sfract
& 0xffff;
544 /* Returns pointer past text consumed. */
546 tic4x_atof (char *str
, char what_kind
, LITTLENUM_TYPE
*words
)
548 /* Extra bits for zeroed low-order bits. The 1st MAX_PRECISION are
549 zeroed, the last contain flonum bits. */
550 static LITTLENUM_TYPE bits
[MAX_PRECISION
+ MAX_PRECISION
+ GUARD
];
552 /* Number of 16-bit words in the format. */
554 FLONUM_TYPE save_gen_flonum
;
556 /* We have to save the generic_floating_point_number because it
557 contains storage allocation about the array of LITTLENUMs where
558 the value is actually stored. We will allocate our own array of
559 littlenums below, but have to restore the global one on exit. */
560 save_gen_flonum
= generic_floating_point_number
;
563 generic_floating_point_number
.low
= bits
+ MAX_PRECISION
;
564 generic_floating_point_number
.high
= NULL
;
565 generic_floating_point_number
.leader
= NULL
;
566 generic_floating_point_number
.exponent
= 0;
567 generic_floating_point_number
.sign
= '\0';
569 /* Use more LittleNums than seems necessary: the highest flonum may
570 have 15 leading 0 bits, so could be useless. */
572 memset (bits
, '\0', sizeof (LITTLENUM_TYPE
) * MAX_PRECISION
);
578 precision
= S_PRECISION
;
585 precision
= F_PRECISION
;
590 precision
= E_PRECISION
;
594 as_bad (_("Invalid floating point number"));
598 generic_floating_point_number
.high
599 = generic_floating_point_number
.low
+ precision
- 1 + GUARD
;
601 if (atof_generic (&return_value
, ".", EXP_CHARS
,
602 &generic_floating_point_number
))
604 as_bad (_("Invalid floating point number"));
608 tic4x_gen_to_words (generic_floating_point_number
,
611 /* Restore the generic_floating_point_number's storage alloc (and
613 generic_floating_point_number
= save_gen_flonum
;
619 tic4x_insert_reg (const char *regname
, int regnum
)
624 symbol_table_insert (symbol_new (regname
, reg_section
,
625 &zero_address_frag
, regnum
));
626 for (i
= 0; regname
[i
]; i
++)
627 buf
[i
] = ISLOWER (regname
[i
]) ? TOUPPER (regname
[i
]) : regname
[i
];
630 symbol_table_insert (symbol_new (buf
, reg_section
,
631 &zero_address_frag
, regnum
));
635 tic4x_insert_sym (const char *symname
, int value
)
639 symbolP
= symbol_new (symname
, absolute_section
,
640 &zero_address_frag
, value
);
641 SF_SET_LOCAL (symbolP
);
642 symbol_table_insert (symbolP
);
646 tic4x_expression (char *str
, expressionS
*exp
)
651 t
= input_line_pointer
; /* Save line pointer. */
652 input_line_pointer
= str
;
654 s
= input_line_pointer
;
655 input_line_pointer
= t
; /* Restore line pointer. */
656 return s
; /* Return pointer to where parsing stopped. */
660 tic4x_expression_abs (char *str
, offsetT
*value
)
665 t
= input_line_pointer
; /* Save line pointer. */
666 input_line_pointer
= str
;
667 *value
= get_absolute_expression ();
668 s
= input_line_pointer
;
669 input_line_pointer
= t
; /* Restore line pointer. */
674 tic4x_emit_char (char c
, int b
)
678 exp
.X_op
= O_constant
;
679 exp
.X_add_number
= c
;
684 tic4x_seg_alloc (char *name ATTRIBUTE_UNUSED
,
685 segT seg ATTRIBUTE_UNUSED
,
689 /* Note that the size is in words
690 so we multiply it by 4 to get the number of bytes to allocate. */
692 /* If we have symbol: .usect ".fred", size etc.,
693 the symbol needs to point to the first location reserved
700 p
= frag_var (rs_fill
, 1, 1, (relax_substateT
) 0,
702 size
* OCTETS_PER_BYTE
, (char *) 0);
707 /* .asg ["]character-string["], symbol */
709 tic4x_asg (int x ATTRIBUTE_UNUSED
)
716 str
= input_line_pointer
;
718 /* Skip string expression. */
719 while (*input_line_pointer
!= ',' && *input_line_pointer
)
720 input_line_pointer
++;
721 if (*input_line_pointer
!= ',')
723 as_bad (_("Comma expected\n"));
726 *input_line_pointer
++ = '\0';
727 c
= get_symbol_name (&name
); /* Get terminator. */
729 name
= xstrdup (name
);
730 str_hash_insert (tic4x_asg_hash
, name
, str
, 1);
731 (void) restore_line_pointer (c
);
732 demand_empty_rest_of_line ();
735 /* .bss symbol, size */
737 tic4x_bss (int x ATTRIBUTE_UNUSED
)
744 subsegT current_subseg
;
747 current_seg
= now_seg
; /* Save current seg. */
748 current_subseg
= now_subseg
; /* Save current subseg. */
751 c
= get_symbol_name (&name
); /* Get terminator. */
753 c
= * ++ input_line_pointer
;
756 as_bad (_(".bss size argument missing\n"));
761 tic4x_expression_abs (++input_line_pointer
, &size
);
764 as_bad (_(".bss size %ld < 0!"), (long) size
);
767 subseg_set (bss_section
, 0);
768 symbolP
= symbol_find_or_make (name
);
770 if (S_GET_SEGMENT (symbolP
) == bss_section
)
771 symbol_get_frag (symbolP
)->fr_symbol
= 0;
773 symbol_set_frag (symbolP
, frag_now
);
775 p
= frag_var (rs_org
, 1, 1, (relax_substateT
) 0, symbolP
,
776 size
* OCTETS_PER_BYTE
, (char *) 0);
777 *p
= 0; /* Fill char. */
779 S_SET_SEGMENT (symbolP
, bss_section
);
781 /* The symbol may already have been created with a preceding
782 ".globl" directive -- be careful not to step on storage class
783 in that case. Otherwise, set it to static. */
784 if (S_GET_STORAGE_CLASS (symbolP
) != C_EXT
)
785 S_SET_STORAGE_CLASS (symbolP
, C_STAT
);
787 subseg_set (current_seg
, current_subseg
); /* Restore current seg. */
788 demand_empty_rest_of_line ();
792 tic4x_globl (int ignore ATTRIBUTE_UNUSED
)
800 c
= get_symbol_name (&name
);
801 symbolP
= symbol_find_or_make (name
);
802 *input_line_pointer
= c
;
803 SKIP_WHITESPACE_AFTER_NAME ();
804 S_SET_STORAGE_CLASS (symbolP
, C_EXT
);
805 S_SET_EXTERNAL (symbolP
);
808 input_line_pointer
++;
810 if (*input_line_pointer
== '\n')
816 demand_empty_rest_of_line ();
819 /* Handle .byte, .word. .int, .long */
821 tic4x_cons (int bytes
)
827 if (*input_line_pointer
== '"')
829 input_line_pointer
++;
830 while (is_a_char (c
= next_char_of_string ()))
831 tic4x_emit_char (c
, 4);
832 know (input_line_pointer
[-1] == '\"');
838 input_line_pointer
= tic4x_expression (input_line_pointer
, &exp
);
839 if (exp
.X_op
== O_constant
)
844 exp
.X_add_number
&= 255;
847 exp
.X_add_number
&= 65535;
851 /* Perhaps we should disallow .byte and .hword with
852 a non constant expression that will require relocation. */
856 while (*input_line_pointer
++ == ',');
858 input_line_pointer
--; /* Put terminator back into stream. */
859 demand_empty_rest_of_line ();
862 /* Handle .ascii, .asciz, .string */
864 tic4x_stringer (int append_zero
)
873 if (*input_line_pointer
== '"')
875 input_line_pointer
++;
876 while (is_a_char (c
= next_char_of_string ()))
878 tic4x_emit_char (c
, 1);
884 tic4x_emit_char (c
, 1);
888 know (input_line_pointer
[-1] == '\"');
894 input_line_pointer
= tic4x_expression (input_line_pointer
, &exp
);
895 if (exp
.X_op
!= O_constant
)
897 as_bad (_("Non-constant symbols not allowed\n"));
900 exp
.X_add_number
&= 255; /* Limit number to 8-bit */
905 while (*input_line_pointer
++ == ',');
907 /* Fill out the rest of the expression with 0's to fill up a full word */
909 tic4x_emit_char (0, 4-(bytes
&0x3));
911 input_line_pointer
--; /* Put terminator back into stream. */
912 demand_empty_rest_of_line ();
915 /* .eval expression, symbol */
917 tic4x_eval (int x ATTRIBUTE_UNUSED
)
925 tic4x_expression_abs (input_line_pointer
, &value
);
926 if (*input_line_pointer
++ != ',')
928 as_bad (_("Symbol missing\n"));
931 c
= get_symbol_name (&name
); /* Get terminator. */
932 tic4x_insert_sym (name
, value
);
933 (void) restore_line_pointer (c
);
934 demand_empty_rest_of_line ();
937 /* Reset local labels. */
939 tic4x_newblock (int x ATTRIBUTE_UNUSED
)
941 dollar_label_clear ();
944 /* .sect "section-name" [, value] */
945 /* .sect ["]section-name[:subsection-name]["] [, value] */
947 tic4x_sect (int x ATTRIBUTE_UNUSED
)
956 if (*input_line_pointer
== '"')
957 input_line_pointer
++;
958 c
= get_symbol_name (§ion_name
); /* Get terminator. */
960 c
= * ++ input_line_pointer
;
961 input_line_pointer
++; /* Skip null symbol terminator. */
962 name
= xstrdup (section_name
);
964 /* TI C from version 5.0 allows a section name to contain a
965 subsection name as well. The subsection name is separated by a
966 ':' from the section name. Currently we scan the subsection
968 Volker Kuhlmann <v.kuhlmann@elec.canterbury.ac.nz>. */
972 c
= get_symbol_name (&subname
); /* Get terminator. */
974 c
= * ++ input_line_pointer
;
975 input_line_pointer
++; /* Skip null symbol terminator. */
976 as_warn (_(".sect: subsection name ignored"));
979 /* We might still have a '"' to discard, but the character after a
980 symbol name will be overwritten with a \0 by get_symbol_name()
985 tic4x_expression_abs (input_line_pointer
, &num
);
986 else if (*input_line_pointer
== ',')
989 tic4x_expression_abs (++input_line_pointer
, &num
);
994 seg
= subseg_new (name
, num
);
995 if (line_label
!= NULL
)
997 S_SET_SEGMENT (line_label
, seg
);
998 symbol_set_frag (line_label
, frag_now
);
1001 if (bfd_section_flags (seg
) == SEC_NO_FLAGS
)
1003 if (!bfd_set_section_flags (seg
, SEC_DATA
))
1004 as_warn (_("Error setting flags for \"%s\": %s"), name
,
1005 bfd_errmsg (bfd_get_error ()));
1008 /* If the last character overwritten by get_symbol_name() was an
1009 end-of-line, we must restore it or the end of the line will not be
1010 recognised and scanning extends into the next line, stopping with
1011 an error (blame Volker Kuhlmann <v.kuhlmann@elec.canterbury.ac.nz>
1012 if this is not true). */
1013 if (is_end_of_line
[(unsigned char) c
])
1014 *(--input_line_pointer
) = c
;
1016 demand_empty_rest_of_line ();
1019 /* symbol[:] .set value or .set symbol, value */
1021 tic4x_set (int x ATTRIBUTE_UNUSED
)
1026 if ((symbolP
= line_label
) == NULL
)
1031 c
= get_symbol_name (&name
); /* Get terminator. */
1033 c
= * ++ input_line_pointer
;
1036 as_bad (_(".set syntax invalid\n"));
1037 ignore_rest_of_line ();
1040 ++input_line_pointer
;
1041 symbolP
= symbol_find_or_make (name
);
1044 symbol_table_insert (symbolP
);
1046 pseudo_set (symbolP
);
1047 demand_empty_rest_of_line ();
1050 /* [symbol] .usect ["]section-name["], size-in-words [, alignment-flag] */
1052 tic4x_usect (int x ATTRIBUTE_UNUSED
)
1058 offsetT size
, alignment_flag
;
1060 subsegT current_subseg
;
1062 current_seg
= now_seg
; /* save current seg. */
1063 current_subseg
= now_subseg
; /* save current subseg. */
1066 if (*input_line_pointer
== '"')
1067 input_line_pointer
++;
1068 c
= get_symbol_name (§ion_name
); /* Get terminator. */
1070 c
= * ++ input_line_pointer
;
1071 input_line_pointer
++; /* Skip null symbol terminator. */
1072 name
= xstrdup (section_name
);
1075 input_line_pointer
=
1076 tic4x_expression_abs (input_line_pointer
, &size
);
1077 else if (*input_line_pointer
== ',')
1079 input_line_pointer
=
1080 tic4x_expression_abs (++input_line_pointer
, &size
);
1085 /* Read a possibly present third argument (alignment flag) [VK]. */
1086 if (*input_line_pointer
== ',')
1088 input_line_pointer
=
1089 tic4x_expression_abs (++input_line_pointer
, &alignment_flag
);
1094 as_warn (_(".usect: non-zero alignment flag ignored"));
1096 seg
= subseg_new (name
, 0);
1097 if (line_label
!= NULL
)
1099 S_SET_SEGMENT (line_label
, seg
);
1100 symbol_set_frag (line_label
, frag_now
);
1101 S_SET_VALUE (line_label
, frag_now_fix ());
1103 seg_info (seg
)->bss
= 1; /* Uninitialised data. */
1104 if (!bfd_set_section_flags (seg
, SEC_ALLOC
))
1105 as_warn (_("Error setting flags for \"%s\": %s"), name
,
1106 bfd_errmsg (bfd_get_error ()));
1107 tic4x_seg_alloc (name
, seg
, size
, line_label
);
1109 if (S_GET_STORAGE_CLASS (line_label
) != C_EXT
)
1110 S_SET_STORAGE_CLASS (line_label
, C_STAT
);
1112 subseg_set (current_seg
, current_subseg
); /* Restore current seg. */
1113 demand_empty_rest_of_line ();
1116 /* .version cpu-version. */
1118 tic4x_version (int x ATTRIBUTE_UNUSED
)
1122 input_line_pointer
=
1123 tic4x_expression_abs (input_line_pointer
, &temp
);
1124 if (!IS_CPU_TIC3X (temp
) && !IS_CPU_TIC4X (temp
))
1125 as_bad (_("This assembler does not support processor generation %ld"),
1128 if (tic4x_cpu
&& temp
!= (offsetT
) tic4x_cpu
)
1129 as_warn (_("Changing processor generation on fly not supported..."));
1131 demand_empty_rest_of_line ();
1135 tic4x_init_regtable (void)
1139 for (i
= 0; i
< tic3x_num_registers
; i
++)
1140 tic4x_insert_reg (tic3x_registers
[i
].name
,
1141 tic3x_registers
[i
].regno
);
1143 if (IS_CPU_TIC4X (tic4x_cpu
))
1145 /* Add additional Tic4x registers, overriding some C3x ones. */
1146 for (i
= 0; i
< tic4x_num_registers
; i
++)
1147 tic4x_insert_reg (tic4x_registers
[i
].name
,
1148 tic4x_registers
[i
].regno
);
1153 tic4x_init_symbols (void)
1155 /* The TI tools accept case insensitive versions of these symbols,
1160 .TMS320xx 30,31,32,40,or 44 set according to -v flag
1161 .C3X or .C3x 1 or 0 1 if -v30,-v31,or -v32
1162 .C30 1 or 0 1 if -v30
1163 .C31 1 or 0 1 if -v31
1164 .C32 1 or 0 1 if -v32
1165 .C4X or .C4x 1 or 0 1 if -v40, or -v44
1166 .C40 1 or 0 1 if -v40
1167 .C44 1 or 0 1 if -v44
1169 .REGPARM 1 or 0 1 if -mr option used
1170 .BIGMODEL 1 or 0 1 if -mb option used
1172 These symbols are currently supported but will be removed in a
1174 .TMS320C30 1 or 0 1 if -v30,-v31,or -v32
1175 .TMS320C31 1 or 0 1 if -v31
1176 .TMS320C32 1 or 0 1 if -v32
1177 .TMS320C40 1 or 0 1 if -v40, or -v44
1178 .TMS320C44 1 or 0 1 if -v44
1180 Source: TI: TMS320C3x/C4x Assembly Language Tools User's Guide,
1181 1997, SPRU035C, p. 3-17/3-18. */
1182 tic4x_insert_sym (".REGPARM", tic4x_reg_args
);
1183 tic4x_insert_sym (".MEMPARM", !tic4x_reg_args
);
1184 tic4x_insert_sym (".BIGMODEL", tic4x_big_model
);
1185 tic4x_insert_sym (".C30INTERRUPT", 0);
1186 tic4x_insert_sym (".TMS320xx", tic4x_cpu
== 0 ? 40 : tic4x_cpu
);
1187 tic4x_insert_sym (".C3X", tic4x_cpu
== 30 || tic4x_cpu
== 31 || tic4x_cpu
== 32 || tic4x_cpu
== 33);
1188 tic4x_insert_sym (".C3x", tic4x_cpu
== 30 || tic4x_cpu
== 31 || tic4x_cpu
== 32 || tic4x_cpu
== 33);
1189 tic4x_insert_sym (".C4X", tic4x_cpu
== 0 || tic4x_cpu
== 40 || tic4x_cpu
== 44);
1190 tic4x_insert_sym (".C4x", tic4x_cpu
== 0 || tic4x_cpu
== 40 || tic4x_cpu
== 44);
1191 /* Do we need to have the following symbols also in lower case? */
1192 tic4x_insert_sym (".TMS320C30", tic4x_cpu
== 30 || tic4x_cpu
== 31 || tic4x_cpu
== 32 || tic4x_cpu
== 33);
1193 tic4x_insert_sym (".tms320C30", tic4x_cpu
== 30 || tic4x_cpu
== 31 || tic4x_cpu
== 32 || tic4x_cpu
== 33);
1194 tic4x_insert_sym (".TMS320C31", tic4x_cpu
== 31);
1195 tic4x_insert_sym (".tms320C31", tic4x_cpu
== 31);
1196 tic4x_insert_sym (".TMS320C32", tic4x_cpu
== 32);
1197 tic4x_insert_sym (".tms320C32", tic4x_cpu
== 32);
1198 tic4x_insert_sym (".TMS320C33", tic4x_cpu
== 33);
1199 tic4x_insert_sym (".tms320C33", tic4x_cpu
== 33);
1200 tic4x_insert_sym (".TMS320C40", tic4x_cpu
== 40 || tic4x_cpu
== 44 || tic4x_cpu
== 0);
1201 tic4x_insert_sym (".tms320C40", tic4x_cpu
== 40 || tic4x_cpu
== 44 || tic4x_cpu
== 0);
1202 tic4x_insert_sym (".TMS320C44", tic4x_cpu
== 44);
1203 tic4x_insert_sym (".tms320C44", tic4x_cpu
== 44);
1204 tic4x_insert_sym (".TMX320C40", 0); /* C40 first pass silicon ? */
1205 tic4x_insert_sym (".tmx320C40", 0);
1208 /* Insert a new instruction template into hash table. */
1210 tic4x_inst_insert (const tic4x_inst_t
*inst
)
1212 static char prev_name
[16];
1214 /* Only insert the first name if have several similar entries. */
1215 if (!strcmp (inst
->name
, prev_name
) || inst
->name
[0] == '\0')
1218 if (str_hash_insert (tic4x_op_hash
, inst
->name
, inst
, 0) != NULL
)
1219 as_fatal (_("duplicate %s"), inst
->name
);
1221 strcpy (prev_name
, inst
->name
);
1224 /* Make a new instruction template. */
1225 static tic4x_inst_t
*
1226 tic4x_inst_make (const char *name
, unsigned long opcode
, const char *args
)
1228 static tic4x_inst_t
*insts
= NULL
;
1229 static char *names
= NULL
;
1230 static int iindex
= 0;
1234 /* Allocate memory to store name strings. */
1235 names
= XNEWVEC (char, 8192);
1236 /* Allocate memory for additional insts. */
1237 insts
= XNEWVEC (tic4x_inst_t
, 1024);
1239 insts
[iindex
].name
= names
;
1240 insts
[iindex
].opcode
= opcode
;
1241 insts
[iindex
].opmask
= 0xffffffff;
1242 insts
[iindex
].args
= args
;
1249 return &insts
[iindex
- 1];
1252 /* Add instruction template, creating dynamic templates as required. */
1254 tic4x_inst_add (const tic4x_inst_t
*insts
)
1256 const char *s
= insts
->name
;
1263 /* We do not care about INSNs that is not a part of our
1265 if ((insts
->oplevel
& tic4x_oplevel
) == 0)
1274 /* Dynamically create all the conditional insts. */
1275 for (i
= 0; i
< tic4x_num_conds
; i
++)
1279 const char *c
= tic4x_conds
[i
].name
;
1289 /* If instruction found then have already processed it. */
1290 if (str_hash_find (tic4x_op_hash
, name
))
1295 inst
= tic4x_inst_make (name
, insts
[k
].opcode
+
1296 (tic4x_conds
[i
].cond
<<
1297 (*s
== 'B' ? 16 : 23)),
1299 if (k
== 0) /* Save strcmp() with following func. */
1300 tic4x_inst_insert (inst
);
1303 while (!strcmp (insts
->name
,
1309 tic4x_inst_insert (insts
);
1319 /* This function is called once, at assembler startup time. It should
1320 set up all the tables, etc., that the MD part of the assembler will
1327 /* Setup the proper opcode level according to the
1328 commandline parameters */
1329 tic4x_oplevel
= OP_C3X
;
1331 if ( IS_CPU_TIC4X(tic4x_cpu
) )
1332 tic4x_oplevel
|= OP_C4X
;
1334 if ( ( tic4x_cpu
== 31 && tic4x_revision
>= 6)
1335 || (tic4x_cpu
== 32 && tic4x_revision
>= 2)
1336 || (tic4x_cpu
== 33)
1338 tic4x_oplevel
|= OP_ENH
;
1340 if ( ( tic4x_cpu
== 30 && tic4x_revision
>= 7)
1341 || (tic4x_cpu
== 31 && tic4x_revision
>= 5)
1342 || (tic4x_cpu
== 32)
1344 tic4x_oplevel
|= OP_LPWR
;
1346 if ( ( tic4x_cpu
== 30 && tic4x_revision
>= 7)
1347 || (tic4x_cpu
== 31 && tic4x_revision
>= 5)
1348 || (tic4x_cpu
== 32)
1349 || (tic4x_cpu
== 33)
1350 || (tic4x_cpu
== 40 && tic4x_revision
>= 5)
1351 || (tic4x_cpu
== 44)
1353 tic4x_oplevel
|= OP_IDLE2
;
1355 /* Create hash table for mnemonics. */
1356 tic4x_op_hash
= str_htab_create ();
1358 /* Create hash table for asg pseudo. */
1359 tic4x_asg_hash
= str_htab_create ();
1361 /* Add mnemonics to hash table, expanding conditional mnemonics on fly. */
1362 for (i
= 0; i
< tic4x_num_insts
; i
++)
1363 tic4x_inst_add (tic4x_insts
+ i
);
1365 /* Create dummy inst to avoid errors accessing end of table. */
1366 tic4x_inst_make ("", 0, "");
1368 /* Add registers to symbol table. */
1369 tic4x_init_regtable ();
1371 /* Add predefined symbols to symbol table. */
1372 tic4x_init_symbols ();
1378 bfd_set_arch_mach (stdoutput
, bfd_arch_tic4x
,
1379 IS_CPU_TIC4X (tic4x_cpu
) ? bfd_mach_tic4x
: bfd_mach_tic3x
);
1383 tic4x_indirect_parse (tic4x_operand_t
*operand
,
1384 const tic4x_indirect_t
*indirect
)
1386 const char *n
= indirect
->name
;
1387 char *s
= input_line_pointer
;
1397 case 'a': /* Need to match aux register. */
1399 #ifdef TIC4X_ALT_SYNTAX
1403 while (ISALNUM (*s
))
1406 if (!(symbolP
= symbol_find (name
)))
1409 if (S_GET_SEGMENT (symbolP
) != reg_section
)
1412 operand
->aregno
= S_GET_VALUE (symbolP
);
1413 if (operand
->aregno
>= REG_AR0
&& operand
->aregno
<= REG_AR7
)
1416 as_bad (_("Auxiliary register AR0--AR7 required for indirect"));
1419 case 'd': /* Need to match constant for disp. */
1420 #ifdef TIC4X_ALT_SYNTAX
1421 if (*s
== '%') /* expr() will die if we don't skip this. */
1424 s
= tic4x_expression (s
, &operand
->expr
);
1425 if (operand
->expr
.X_op
!= O_constant
)
1427 operand
->disp
= operand
->expr
.X_add_number
;
1428 if (operand
->disp
< 0 || operand
->disp
> 255)
1430 as_bad (_("Bad displacement %d (require 0--255)\n"),
1436 case 'y': /* Need to match IR0. */
1437 case 'z': /* Need to match IR1. */
1438 #ifdef TIC4X_ALT_SYNTAX
1442 s
= tic4x_expression (s
, &operand
->expr
);
1443 if (operand
->expr
.X_op
!= O_register
)
1445 if (operand
->expr
.X_add_number
!= REG_IR0
1446 && operand
->expr
.X_add_number
!= REG_IR1
)
1448 as_bad (_("Index register IR0,IR1 required for displacement"));
1452 if (*n
== 'y' && operand
->expr
.X_add_number
== REG_IR0
)
1454 if (*n
== 'z' && operand
->expr
.X_add_number
== REG_IR1
)
1459 if (*s
!= '(') /* No displacement, assume to be 1. */
1470 if (TOLOWER (*s
) != *n
)
1475 if (*s
!= ' ' && *s
!= ',' && *s
!= '\0')
1477 input_line_pointer
= s
;
1482 tic4x_operand_parse (char *s
, tic4x_operand_t
*operand
)
1487 expressionS
*exp
= &operand
->expr
;
1488 char *save
= input_line_pointer
;
1491 struct hash_entry
*entry
= NULL
;
1493 input_line_pointer
= s
;
1496 c
= get_symbol_name (&str
); /* Get terminator. */
1497 new_pointer
= input_line_pointer
;
1498 if (strlen (str
) && (entry
= str_hash_find (tic4x_asg_hash
, str
)) != NULL
)
1500 (void) restore_line_pointer (c
);
1501 input_line_pointer
= (char *) entry
;
1505 (void) restore_line_pointer (c
);
1506 input_line_pointer
= str
;
1509 operand
->mode
= M_UNKNOWN
;
1510 switch (*input_line_pointer
)
1512 #ifdef TIC4X_ALT_SYNTAX
1514 input_line_pointer
= tic4x_expression (++input_line_pointer
, exp
);
1515 if (exp
->X_op
!= O_register
)
1516 as_bad (_("Expecting a register name"));
1517 operand
->mode
= M_REGISTER
;
1521 /* Denotes high 16 bits. */
1522 input_line_pointer
= tic4x_expression (++input_line_pointer
, exp
);
1523 if (exp
->X_op
== O_constant
)
1524 operand
->mode
= M_IMMED
;
1525 else if (exp
->X_op
== O_big
)
1527 if (exp
->X_add_number
)
1528 as_bad (_("Number too large")); /* bignum required */
1531 tic4x_gen_to_words (generic_floating_point_number
,
1532 operand
->fwords
, S_PRECISION
);
1533 operand
->mode
= M_IMMED_F
;
1536 /* Allow ori ^foo, ar0 to be equivalent to ldi .hi.foo, ar0 */
1537 /* WARNING : The TI C40 assembler cannot do this. */
1538 else if (exp
->X_op
== O_symbol
)
1539 operand
->mode
= M_HI
;
1541 as_bad (_("Expecting a constant value"));
1545 input_line_pointer
= tic4x_expression (++input_line_pointer
, exp
);
1546 if (exp
->X_op
== O_constant
)
1547 operand
->mode
= M_IMMED
;
1548 else if (exp
->X_op
== O_big
)
1550 if (exp
->X_add_number
> 0)
1551 as_bad (_("Number too large")); /* bignum required. */
1554 tic4x_gen_to_words (generic_floating_point_number
,
1555 operand
->fwords
, S_PRECISION
);
1556 operand
->mode
= M_IMMED_F
;
1559 /* Allow ori foo, ar0 to be equivalent to ldi .lo.foo, ar0 */
1560 /* WARNING : The TI C40 assembler cannot do this. */
1561 else if (exp
->X_op
== O_symbol
)
1562 operand
->mode
= M_IMMED
;
1564 as_bad (_("Expecting a constant value"));
1570 input_line_pointer
= tic4x_expression (++input_line_pointer
, exp
);
1571 if (exp
->X_op
!= O_constant
&& exp
->X_op
!= O_symbol
)
1572 as_bad (_("Bad direct addressing construct %s"), s
);
1573 if (exp
->X_op
== O_constant
)
1575 if (exp
->X_add_number
< 0)
1576 as_bad (_("Direct value of %ld is not suitable"),
1577 (long) exp
->X_add_number
);
1579 operand
->mode
= M_DIRECT
;
1584 for (i
= 0; i
< tic4x_num_indirects
; i
++)
1585 if ((ret
= tic4x_indirect_parse (operand
, &tic4x_indirects
[i
])))
1589 if (i
< tic4x_num_indirects
)
1591 operand
->mode
= M_INDIRECT
;
1592 /* Indirect addressing mode number. */
1593 operand
->expr
.X_add_number
= tic4x_indirects
[i
].modn
;
1594 /* Convert *+ARn(0) to *ARn etc. Maybe we should
1595 squeal about silly ones? */
1596 if (operand
->expr
.X_add_number
< 0x08 && !operand
->disp
)
1597 operand
->expr
.X_add_number
= 0x18;
1600 as_bad (_("Unknown indirect addressing mode"));
1604 operand
->mode
= M_IMMED
; /* Assume immediate. */
1605 str
= input_line_pointer
;
1606 input_line_pointer
= tic4x_expression (input_line_pointer
, exp
);
1607 if (exp
->X_op
== O_register
)
1609 know (exp
->X_add_symbol
== 0);
1610 know (exp
->X_op_symbol
== 0);
1611 operand
->mode
= M_REGISTER
;
1614 else if (exp
->X_op
== O_big
)
1616 if (exp
->X_add_number
> 0)
1617 as_bad (_("Number too large")); /* bignum required. */
1620 tic4x_gen_to_words (generic_floating_point_number
,
1621 operand
->fwords
, S_PRECISION
);
1622 operand
->mode
= M_IMMED_F
;
1626 #ifdef TIC4X_ALT_SYNTAX
1627 /* Allow ldi foo, ar0 to be equivalent to ldi @foo, ar0. */
1628 else if (exp
->X_op
== O_symbol
)
1630 operand
->mode
= M_DIRECT
;
1636 new_pointer
= input_line_pointer
;
1637 input_line_pointer
= save
;
1642 tic4x_operands_match (tic4x_inst_t
*inst
, tic4x_insn_t
*tinsn
, int check
)
1644 const char *args
= inst
->args
;
1645 unsigned long opcode
= inst
->opcode
;
1646 int num_operands
= tinsn
->num_operands
;
1647 tic4x_operand_t
*operand
= tinsn
->operands
;
1648 expressionS
*exp
= &operand
->expr
;
1652 /* Build the opcode, checking as we go to make sure that the
1655 If an operand matches, we modify insn or opcode appropriately,
1656 and do a "continue". If an operand fails to match, we "break". */
1658 tinsn
->nchars
= 4; /* Instructions always 4 bytes. */
1659 tinsn
->reloc
= NO_RELOC
;
1664 tinsn
->opcode
= opcode
;
1665 return num_operands
== 0;
1673 case '\0': /* End of args. */
1674 if (num_operands
== 1)
1676 tinsn
->opcode
= opcode
;
1679 break; /* Too many operands. */
1681 case '#': /* This is only used for ldp. */
1682 if (operand
->mode
!= M_DIRECT
&& operand
->mode
!= M_IMMED
)
1684 /* While this looks like a direct addressing mode, we actually
1685 use an immediate mode form of ldiu or ldpk instruction. */
1686 if (exp
->X_op
== O_constant
)
1688 if( ( IS_CPU_TIC4X (tic4x_cpu
) && exp
->X_add_number
<= 65535 )
1689 || ( IS_CPU_TIC3X (tic4x_cpu
) && exp
->X_add_number
<= 255 ) )
1691 INSERTS (opcode
, exp
->X_add_number
, 15, 0);
1697 as_bad (_("Immediate value of %ld is too large for ldf"),
1698 (long) exp
->X_add_number
);
1703 else if (exp
->X_op
== O_symbol
)
1705 tinsn
->reloc
= BFD_RELOC_HI16
;
1709 break; /* Not direct (dp) addressing. */
1711 case '@': /* direct. */
1712 if (operand
->mode
!= M_DIRECT
)
1714 if (exp
->X_op
== O_constant
)
1716 /* Store only the 16 LSBs of the number. */
1717 INSERTS (opcode
, exp
->X_add_number
, 15, 0);
1720 else if (exp
->X_op
== O_symbol
)
1722 tinsn
->reloc
= BFD_RELOC_LO16
;
1726 break; /* Not direct addressing. */
1729 if (operand
->mode
!= M_REGISTER
)
1731 reg
= exp
->X_add_number
;
1732 if (reg
>= REG_AR0
&& reg
<= REG_AR7
)
1733 INSERTU (opcode
, reg
- REG_AR0
, 24, 22);
1737 as_bad (_("Destination register must be ARn"));
1742 case 'B': /* Unsigned integer immediate. */
1743 /* Allow br label or br @label. */
1744 if (operand
->mode
!= M_IMMED
&& operand
->mode
!= M_DIRECT
)
1746 if (exp
->X_op
== O_constant
)
1748 if (exp
->X_add_number
< (1 << 24))
1750 INSERTU (opcode
, exp
->X_add_number
, 23, 0);
1756 as_bad (_("Immediate value of %ld is too large"),
1757 (long) exp
->X_add_number
);
1762 if (IS_CPU_TIC4X (tic4x_cpu
))
1764 tinsn
->reloc
= BFD_RELOC_24_PCREL
;
1769 tinsn
->reloc
= BFD_RELOC_24
;
1776 if (!IS_CPU_TIC4X (tic4x_cpu
))
1778 if (operand
->mode
!= M_INDIRECT
)
1780 /* Require either *+ARn(disp) or *ARn. */
1781 if (operand
->expr
.X_add_number
!= 0
1782 && operand
->expr
.X_add_number
!= 0x18)
1785 as_bad (_("Invalid indirect addressing mode"));
1789 INSERTU (opcode
, operand
->aregno
- REG_AR0
, 2, 0);
1790 INSERTU (opcode
, operand
->disp
, 7, 3);
1794 if (!(operand
->mode
== M_REGISTER
))
1796 INSERTU (opcode
, exp
->X_add_number
, 7, 0);
1800 if (!(operand
->mode
== M_REGISTER
))
1802 reg
= exp
->X_add_number
;
1803 if ( (reg
>= REG_R0
&& reg
<= REG_R7
)
1804 || (IS_CPU_TIC4X (tic4x_cpu
) && reg
>= REG_R8
&& reg
<= REG_R11
) )
1805 INSERTU (opcode
, reg
, 7, 0);
1809 as_bad (_("Register must be Rn"));
1815 if (operand
->mode
!= M_IMMED_F
1816 && !(operand
->mode
== M_IMMED
&& exp
->X_op
== O_constant
))
1819 if (operand
->mode
!= M_IMMED_F
)
1821 /* OK, we 've got something like cmpf 0, r0
1822 Why can't they stick in a bloody decimal point ?! */
1825 /* Create floating point number string. */
1826 sprintf (string
, "%d.0", (int) exp
->X_add_number
);
1827 tic4x_atof (string
, 's', operand
->fwords
);
1830 INSERTU (opcode
, operand
->fwords
[0], 15, 0);
1834 if (operand
->mode
!= M_REGISTER
)
1836 INSERTU (opcode
, exp
->X_add_number
, 15, 8);
1840 if (operand
->mode
!= M_REGISTER
)
1842 reg
= exp
->X_add_number
;
1843 if ( (reg
>= REG_R0
&& reg
<= REG_R7
)
1844 || (IS_CPU_TIC4X (tic4x_cpu
) && reg
>= REG_R8
&& reg
<= REG_R11
) )
1845 INSERTU (opcode
, reg
, 15, 8);
1849 as_bad (_("Register must be Rn"));
1855 if (operand
->mode
!= M_REGISTER
)
1857 reg
= exp
->X_add_number
;
1858 if (reg
>= REG_R0
&& reg
<= REG_R7
)
1859 INSERTU (opcode
, reg
- REG_R0
, 18, 16);
1863 as_bad (_("Register must be R0--R7"));
1869 if ( operand
->mode
== M_REGISTER
1870 && tic4x_oplevel
& OP_ENH
)
1872 reg
= exp
->X_add_number
;
1873 INSERTU (opcode
, reg
, 4, 0);
1874 INSERTU (opcode
, 7, 7, 5);
1880 if (operand
->mode
!= M_INDIRECT
)
1882 if (operand
->disp
!= 0 && operand
->disp
!= 1)
1884 if (IS_CPU_TIC4X (tic4x_cpu
))
1887 as_bad (_("Invalid indirect addressing mode displacement %d"),
1892 INSERTU (opcode
, operand
->aregno
- REG_AR0
, 2, 0);
1893 INSERTU (opcode
, operand
->expr
.X_add_number
, 7, 3);
1897 if ( operand
->mode
== M_REGISTER
1898 && tic4x_oplevel
& OP_ENH
)
1900 reg
= exp
->X_add_number
;
1901 INSERTU (opcode
, reg
, 12, 8);
1902 INSERTU (opcode
, 7, 15, 13);
1908 if (operand
->mode
!= M_INDIRECT
)
1910 if (operand
->disp
!= 0 && operand
->disp
!= 1)
1912 if (IS_CPU_TIC4X (tic4x_cpu
))
1915 as_bad (_("Invalid indirect addressing mode displacement %d"),
1920 INSERTU (opcode
, operand
->aregno
- REG_AR0
, 10, 8);
1921 INSERTU (opcode
, operand
->expr
.X_add_number
, 15, 11);
1925 if (operand
->mode
!= M_REGISTER
)
1927 reg
= exp
->X_add_number
;
1928 if (reg
>= REG_R0
&& reg
<= REG_R7
)
1929 INSERTU (opcode
, reg
- REG_R0
, 21, 19);
1933 as_bad (_("Register must be R0--R7"));
1939 if (operand
->mode
!= M_REGISTER
)
1941 reg
= exp
->X_add_number
;
1942 if (reg
>= REG_R0
&& reg
<= REG_R7
)
1943 INSERTU (opcode
, reg
- REG_R0
, 24, 22);
1947 as_bad (_("Register must be R0--R7"));
1953 if (operand
->mode
!= M_REGISTER
)
1955 reg
= exp
->X_add_number
;
1956 if (reg
== REG_R2
|| reg
== REG_R3
)
1957 INSERTU (opcode
, reg
- REG_R2
, 22, 22);
1961 as_bad (_("Destination register must be R2 or R3"));
1967 if (operand
->mode
!= M_REGISTER
)
1969 reg
= exp
->X_add_number
;
1970 if (reg
== REG_R0
|| reg
== REG_R1
)
1971 INSERTU (opcode
, reg
- REG_R0
, 23, 23);
1975 as_bad (_("Destination register must be R0 or R1"));
1981 if (!IS_CPU_TIC4X (tic4x_cpu
))
1983 if (operand
->mode
!= M_INDIRECT
)
1985 /* Require either *+ARn(disp) or *ARn. */
1986 if (operand
->expr
.X_add_number
!= 0
1987 && operand
->expr
.X_add_number
!= 0x18)
1990 as_bad (_("Invalid indirect addressing mode"));
1994 INSERTU (opcode
, operand
->aregno
- REG_AR0
, 10, 8);
1995 INSERTU (opcode
, operand
->disp
, 15, 11);
1998 case 'P': /* PC relative displacement. */
1999 /* Allow br label or br @label. */
2000 if (operand
->mode
!= M_IMMED
&& operand
->mode
!= M_DIRECT
)
2002 if (exp
->X_op
== O_constant
)
2004 if (exp
->X_add_number
>= -32768 && exp
->X_add_number
<= 32767)
2006 INSERTS (opcode
, exp
->X_add_number
, 15, 0);
2012 as_bad (_("Displacement value of %ld is too large"),
2013 (long) exp
->X_add_number
);
2018 tinsn
->reloc
= BFD_RELOC_16_PCREL
;
2024 if (operand
->mode
!= M_REGISTER
)
2026 reg
= exp
->X_add_number
;
2027 INSERTU (opcode
, reg
, 15, 0);
2031 if (operand
->mode
!= M_REGISTER
)
2033 reg
= exp
->X_add_number
;
2034 if ( (reg
>= REG_R0
&& reg
<= REG_R7
)
2035 || (IS_CPU_TIC4X (tic4x_cpu
) && reg
>= REG_R8
&& reg
<= REG_R11
) )
2036 INSERTU (opcode
, reg
, 15, 0);
2040 as_bad (_("Register must be Rn"));
2046 if (operand
->mode
!= M_REGISTER
)
2048 reg
= exp
->X_add_number
;
2049 INSERTU (opcode
, reg
, 20, 16);
2053 if (operand
->mode
!= M_REGISTER
)
2055 reg
= exp
->X_add_number
;
2056 if ( (reg
>= REG_R0
&& reg
<= REG_R7
)
2057 || (IS_CPU_TIC4X (tic4x_cpu
) && reg
>= REG_R8
&& reg
<= REG_R11
) )
2058 INSERTU (opcode
, reg
, 20, 16);
2062 as_bad (_("Register must be Rn"));
2067 case 'S': /* Short immediate int. */
2068 if (operand
->mode
!= M_IMMED
&& operand
->mode
!= M_HI
)
2070 if (exp
->X_op
== O_big
)
2073 as_bad (_("Floating point number not valid in expression"));
2077 if (exp
->X_op
== O_constant
)
2079 if (exp
->X_add_number
>= -32768 && exp
->X_add_number
<= 65535)
2081 INSERTS (opcode
, exp
->X_add_number
, 15, 0);
2087 as_bad (_("Signed immediate value %ld too large"),
2088 (long) exp
->X_add_number
);
2093 else if (exp
->X_op
== O_symbol
)
2095 if (operand
->mode
== M_HI
)
2097 tinsn
->reloc
= BFD_RELOC_HI16
;
2101 tinsn
->reloc
= BFD_RELOC_LO16
;
2106 /* Handle cases like ldi foo - $, ar0 where foo
2107 is a forward reference. Perhaps we should check
2108 for X_op == O_symbol and disallow things like
2110 tinsn
->reloc
= BFD_RELOC_16
;
2114 case 'T': /* 5-bit immediate value for tic4x stik. */
2115 if (!IS_CPU_TIC4X (tic4x_cpu
))
2117 if (operand
->mode
!= M_IMMED
)
2119 if (exp
->X_op
== O_constant
)
2121 if (exp
->X_add_number
< 16 && exp
->X_add_number
>= -16)
2123 INSERTS (opcode
, exp
->X_add_number
, 20, 16);
2129 as_bad (_("Immediate value of %ld is too large"),
2130 (long) exp
->X_add_number
);
2135 break; /* No relocations allowed. */
2137 case 'U': /* Unsigned integer immediate. */
2138 if (operand
->mode
!= M_IMMED
&& operand
->mode
!= M_HI
)
2140 if (exp
->X_op
== O_constant
)
2142 if (exp
->X_add_number
< (1 << 16) && exp
->X_add_number
>= 0)
2144 INSERTU (opcode
, exp
->X_add_number
, 15, 0);
2150 as_bad (_("Unsigned immediate value %ld too large"),
2151 (long) exp
->X_add_number
);
2156 else if (exp
->X_op
== O_symbol
)
2158 if (operand
->mode
== M_HI
)
2159 tinsn
->reloc
= BFD_RELOC_HI16
;
2161 tinsn
->reloc
= BFD_RELOC_LO16
;
2166 tinsn
->reloc
= BFD_RELOC_16
;
2170 case 'V': /* Trap numbers (immediate field). */
2171 if (operand
->mode
!= M_IMMED
)
2173 if (exp
->X_op
== O_constant
)
2175 if (exp
->X_add_number
< 512 && IS_CPU_TIC4X (tic4x_cpu
))
2177 INSERTU (opcode
, exp
->X_add_number
, 8, 0);
2180 else if (exp
->X_add_number
< 32 && IS_CPU_TIC3X (tic4x_cpu
))
2182 INSERTU (opcode
, exp
->X_add_number
| 0x20, 5, 0);
2188 as_bad (_("Immediate value of %ld is too large"),
2189 (long) exp
->X_add_number
);
2194 break; /* No relocations allowed. */
2196 case 'W': /* Short immediate int (0--7). */
2197 if (!IS_CPU_TIC4X (tic4x_cpu
))
2199 if (operand
->mode
!= M_IMMED
)
2201 if (exp
->X_op
== O_big
)
2204 as_bad (_("Floating point number not valid in expression"));
2208 if (exp
->X_op
== O_constant
)
2210 if (exp
->X_add_number
>= -256 && exp
->X_add_number
<= 127)
2212 INSERTS (opcode
, exp
->X_add_number
, 7, 0);
2218 as_bad (_("Immediate value %ld too large"),
2219 (long) exp
->X_add_number
);
2224 tinsn
->reloc
= BFD_RELOC_16
;
2228 case 'X': /* Expansion register for tic4x. */
2229 if (operand
->mode
!= M_REGISTER
)
2231 reg
= exp
->X_add_number
;
2232 if (reg
>= REG_IVTP
&& reg
<= REG_TVTP
)
2233 INSERTU (opcode
, reg
- REG_IVTP
, 4, 0);
2237 as_bad (_("Register must be ivtp or tvtp"));
2242 case 'Y': /* Address register for tic4x lda. */
2243 if (operand
->mode
!= M_REGISTER
)
2245 reg
= exp
->X_add_number
;
2246 if (reg
>= REG_AR0
&& reg
<= REG_SP
)
2247 INSERTU (opcode
, reg
, 20, 16);
2251 as_bad (_("Register must be address register"));
2256 case 'Z': /* Expansion register for tic4x. */
2257 if (operand
->mode
!= M_REGISTER
)
2259 reg
= exp
->X_add_number
;
2260 if (reg
>= REG_IVTP
&& reg
<= REG_TVTP
)
2261 INSERTU (opcode
, reg
- REG_IVTP
, 20, 16);
2265 as_bad (_("Register must be ivtp or tvtp"));
2271 if (operand
->mode
!= M_INDIRECT
)
2273 INSERTS (opcode
, operand
->disp
, 7, 0);
2274 INSERTU (opcode
, operand
->aregno
- REG_AR0
, 10, 8);
2275 INSERTU (opcode
, operand
->expr
.X_add_number
, 15, 11);
2278 case '|': /* treat as `,' if have ldi_ldi form. */
2279 if (tinsn
->parallel
)
2281 if (--num_operands
< 0)
2282 break; /* Too few operands. */
2284 if (operand
->mode
!= M_PARALLEL
)
2289 case ',': /* Another operand. */
2290 if (--num_operands
< 0)
2291 break; /* Too few operands. */
2293 exp
= &operand
->expr
;
2296 case ';': /* Another optional operand. */
2297 if (num_operands
== 1 || operand
[1].mode
== M_PARALLEL
)
2299 if (--num_operands
< 0)
2300 break; /* Too few operands. */
2302 exp
= &operand
->expr
;
2313 tic4x_insn_check (tic4x_insn_t
*tinsn
)
2316 if (!strcmp (tinsn
->name
, "lda"))
2318 if (tinsn
->num_operands
< 2 || tinsn
->num_operands
> 2)
2319 as_fatal ("Illegal internal LDA insn definition");
2321 if (tinsn
->operands
[0].mode
== M_REGISTER
2322 && tinsn
->operands
[1].mode
== M_REGISTER
2323 && tinsn
->operands
[0].expr
.X_add_number
== tinsn
->operands
[1].expr
.X_add_number
)
2324 as_bad (_("Source and destination register should not be equal"));
2326 else if (!strcmp (tinsn
->name
, "ldi_ldi")
2327 || !strcmp (tinsn
->name
, "ldi1_ldi2")
2328 || !strcmp (tinsn
->name
, "ldi2_ldi1")
2329 || !strcmp (tinsn
->name
, "ldf_ldf")
2330 || !strcmp (tinsn
->name
, "ldf1_ldf2")
2331 || !strcmp (tinsn
->name
, "ldf2_ldf1") )
2333 if (tinsn
->num_operands
< 4 || tinsn
->num_operands
> 5)
2334 as_fatal ("Illegal internal %s insn definition", tinsn
->name
);
2336 if (tinsn
->operands
[1].mode
== M_REGISTER
2337 && tinsn
->operands
[tinsn
->num_operands
-1].mode
== M_REGISTER
2338 && tinsn
->operands
[1].expr
.X_add_number
== tinsn
->operands
[tinsn
->num_operands
-1].expr
.X_add_number
)
2339 as_warn (_("Equal parallel destination registers, one result will be discarded"));
2344 tic4x_insn_output (tic4x_insn_t
*tinsn
)
2348 /* Grab another fragment for opcode. */
2349 dst
= frag_more (tinsn
->nchars
);
2351 /* Put out opcode word as a series of bytes in little endian order. */
2352 md_number_to_chars (dst
, tinsn
->opcode
, tinsn
->nchars
);
2354 /* Put out the symbol-dependent stuff. */
2355 if (tinsn
->reloc
!= NO_RELOC
)
2357 /* Where is the offset into the fragment for this instruction. */
2358 fix_new_exp (frag_now
,
2359 dst
- frag_now
->fr_literal
, /* where */
2360 tinsn
->nchars
, /* size */
2367 /* Parse the operands. */
2369 tic4x_operands_parse (char *s
, tic4x_operand_t
*operands
, int num_operands
)
2372 return num_operands
;
2375 s
= tic4x_operand_parse (s
, &operands
[num_operands
++]);
2376 while (num_operands
< TIC4X_OPERANDS_MAX
&& *s
++ == ',');
2378 if (num_operands
> TIC4X_OPERANDS_MAX
)
2380 as_bad (_("Too many operands scanned"));
2383 return num_operands
;
2386 /* Assemble a single instruction. Its label has already been handled
2387 by the generic front end. We just parse mnemonic and operands, and
2388 produce the bytes of data and relocation. */
2390 md_assemble (char *str
)
2397 tic4x_inst_t
*inst
; /* Instruction template. */
2398 tic4x_inst_t
*first_inst
;
2400 /* Scan for parallel operators */
2404 while (*s
&& *s
!= '|')
2407 if (*s
&& s
[1]=='|')
2411 as_bad (_("Parallel opcode cannot contain more than two instructions"));
2417 /* Lets take care of the first part of the parallel insn */
2422 /* .. and let the second run though here */
2426 if (str
&& insn
->parallel
)
2428 /* Find mnemonic (second part of parallel instruction). */
2430 /* Skip past instruction mnemonic. */
2431 while (*s
&& *s
!= ' ')
2433 if (*s
) /* Null terminate for str_hash_find. */
2434 *s
++ = '\0'; /* and skip past null. */
2435 len
= strlen (insn
->name
);
2436 snprintf (insn
->name
+ len
, TIC4X_NAME_MAX
- len
, "_%s", str
);
2438 insn
->operands
[insn
->num_operands
++].mode
= M_PARALLEL
;
2440 if ((i
= tic4x_operands_parse
2441 (s
, insn
->operands
, insn
->num_operands
)) < 0)
2447 insn
->num_operands
= i
;
2453 if ((insn
->inst
= (struct tic4x_inst
*)
2454 str_hash_find (tic4x_op_hash
, insn
->name
)) == NULL
)
2456 as_bad (_("Unknown opcode `%s'."), insn
->name
);
2466 ok
= tic4x_operands_match (inst
, insn
, 1);
2474 while (!ok
&& !strcmp (inst
->name
, inst
[1].name
) && inst
++);
2478 tic4x_insn_check (insn
);
2479 tic4x_insn_output (insn
);
2484 tic4x_operands_match (first_inst
, insn
, 0);
2485 as_bad (_("Invalid operands for %s"), insn
->name
);
2488 as_bad (_("Invalid instruction %s"), insn
->name
);
2493 /* Find mnemonic. */
2495 while (*s
&& *s
!= ' ') /* Skip past instruction mnemonic. */
2497 if (*s
) /* Null terminate for str_hash_find. */
2498 *s
++ = '\0'; /* and skip past null. */
2499 strncpy (insn
->name
, str
, TIC4X_NAME_MAX
- 1);
2500 insn
->name
[TIC4X_NAME_MAX
- 1] = '\0';
2502 if ((i
= tic4x_operands_parse (s
, insn
->operands
, 0)) < 0)
2504 insn
->inst
= NULL
; /* Flag that error occurred. */
2509 insn
->num_operands
= i
;
2518 tic4x_cleanup (void)
2524 /* Turn a string in input_line_pointer into a floating point constant
2525 of type type, and store the appropriate bytes in *litP. The number
2526 of chars emitted is stored in *sizeP. An error message is
2527 returned, or NULL on OK. */
2530 md_atof (int type
, char *litP
, int *sizeP
)
2534 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
2535 LITTLENUM_TYPE
*wordP
;
2540 case 's': /* .single */
2546 case 'd': /* .double */
2548 case 'f': /* .float */
2551 prec
= 2; /* 1 32-bit word */
2554 case 'i': /* .ieee */
2558 type
= 'f'; /* Rewrite type to be usable by atof_ieee(). */
2561 case 'e': /* .ldouble */
2563 prec
= 4; /* 2 32-bit words */
2569 return _("Unrecognized or unsupported floating point constant");
2573 t
= atof_ieee (input_line_pointer
, type
, words
);
2575 t
= tic4x_atof (input_line_pointer
, type
, words
);
2577 input_line_pointer
= t
;
2578 *sizeP
= prec
* sizeof (LITTLENUM_TYPE
);
2580 /* This loops outputs the LITTLENUMs in REVERSE order; in accord with
2581 little endian byte order. */
2582 /* SES: However it is required to put the words (32-bits) out in the
2583 correct order, hence we write 2 and 2 littlenums in little endian
2584 order, while we keep the original order on successive words. */
2585 for (wordP
= words
; wordP
<(words
+prec
) ; wordP
+=2)
2587 if (wordP
< (words
+ prec
- 1)) /* Dump wordP[1] (if we have one). */
2589 md_number_to_chars (litP
, (valueT
) (wordP
[1]),
2590 sizeof (LITTLENUM_TYPE
));
2591 litP
+= sizeof (LITTLENUM_TYPE
);
2595 md_number_to_chars (litP
, (valueT
) (wordP
[0]),
2596 sizeof (LITTLENUM_TYPE
));
2597 litP
+= sizeof (LITTLENUM_TYPE
);
2603 md_apply_fix (fixS
*fixP
, valueT
*value
, segT seg ATTRIBUTE_UNUSED
)
2605 char *buf
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
2606 valueT val
= *value
;
2608 switch (fixP
->fx_r_type
)
2610 case BFD_RELOC_HI16
:
2614 case BFD_RELOC_LO16
:
2621 switch (fixP
->fx_r_type
)
2627 case BFD_RELOC_24_PCREL
:
2631 case BFD_RELOC_16_PCREL
:
2632 case BFD_RELOC_LO16
:
2633 case BFD_RELOC_HI16
:
2640 as_bad (_("Bad relocation type: 0x%02x"), fixP
->fx_r_type
);
2644 if (fixP
->fx_addsy
== NULL
&& fixP
->fx_pcrel
== 0) fixP
->fx_done
= 1;
2647 /* Should never be called for tic4x. */
2649 md_convert_frag (bfd
*headers ATTRIBUTE_UNUSED
,
2650 segT sec ATTRIBUTE_UNUSED
,
2651 fragS
*fragP ATTRIBUTE_UNUSED
)
2653 as_fatal ("md_convert_frag");
2656 /* Should never be called for tic4x. */
2658 md_create_short_jump (char *ptr ATTRIBUTE_UNUSED
,
2659 addressT from_addr ATTRIBUTE_UNUSED
,
2660 addressT to_addr ATTRIBUTE_UNUSED
,
2661 fragS
*frag ATTRIBUTE_UNUSED
,
2662 symbolS
*to_symbol ATTRIBUTE_UNUSED
)
2664 as_fatal ("md_create_short_jmp\n");
2667 /* Should never be called for tic4x. */
2669 md_create_long_jump (char *ptr ATTRIBUTE_UNUSED
,
2670 addressT from_addr ATTRIBUTE_UNUSED
,
2671 addressT to_addr ATTRIBUTE_UNUSED
,
2672 fragS
*frag ATTRIBUTE_UNUSED
,
2673 symbolS
*to_symbol ATTRIBUTE_UNUSED
)
2675 as_fatal ("md_create_long_jump\n");
2678 /* Should never be called for tic4x. */
2680 md_estimate_size_before_relax (fragS
*fragP ATTRIBUTE_UNUSED
,
2681 segT segtype ATTRIBUTE_UNUSED
)
2683 as_fatal ("md_estimate_size_before_relax\n");
2689 md_parse_option (int c
, const char *arg
)
2693 case OPTION_CPU
: /* cpu brand */
2694 if (TOLOWER (*arg
) == 'c')
2696 tic4x_cpu
= atoi (arg
);
2697 if (!IS_CPU_TIC3X (tic4x_cpu
) && !IS_CPU_TIC4X (tic4x_cpu
))
2698 as_warn (_("Unsupported processor generation %d"), tic4x_cpu
);
2701 case OPTION_REV
: /* cpu revision */
2702 tic4x_revision
= atoi (arg
);
2706 as_warn (_("Option -b is depreciated, please use -mbig"));
2708 case OPTION_BIG
: /* big model */
2709 tic4x_big_model
= 1;
2713 as_warn (_("Option -p is depreciated, please use -mmemparm"));
2715 case OPTION_MEMPARM
: /* push args */
2720 as_warn (_("Option -r is depreciated, please use -mregparm"));
2722 case OPTION_REGPARM
: /* register args */
2727 as_warn (_("Option -s is depreciated, please use -msmall"));
2729 case OPTION_SMALL
: /* small model */
2730 tic4x_big_model
= 0;
2737 case OPTION_LOWPOWER
:
2741 case OPTION_ENHANCED
:
2753 md_show_usage (FILE *stream
)
2756 _("\nTIC4X options:\n"
2757 " -mcpu=CPU -mCPU select architecture variant. CPU can be:\n"
2759 " 31 - TMS320C31, TMS320LC31\n"
2761 " 33 - TMS320VC33\n"
2764 " -mrev=REV set cpu hardware revision (integer numbers).\n"
2765 " Combinations of -mcpu and -mrev will enable/disable\n"
2766 " the appropriate options (-midle2, -mlowpower and\n"
2767 " -menhanced) according to the selected type\n"
2768 " -mbig select big memory model\n"
2769 " -msmall select small memory model (default)\n"
2770 " -mregparm select register parameters (default)\n"
2771 " -mmemparm select memory parameters\n"
2772 " -midle2 enable IDLE2 support\n"
2773 " -mlowpower enable LOPOWER and MAXSPEED support\n"
2774 " -menhanced enable enhanced opcode support\n"));
2777 /* This is called when a line is unrecognized. This is used to handle
2778 definitions of TI C3x tools style local labels $n where n is a single
2781 tic4x_unrecognized_line (int c
)
2786 if (c
!= '$' || ! ISDIGIT (input_line_pointer
[0]))
2789 s
= input_line_pointer
;
2791 /* Let's allow multiple digit local labels. */
2793 while (ISDIGIT (*s
))
2795 lab
= lab
* 10 + *s
- '0';
2799 if (dollar_label_defined (lab
))
2801 as_bad (_("Label \"$%d\" redefined"), lab
);
2805 define_dollar_label (lab
);
2806 colon (dollar_label_name (lab
, 0));
2807 input_line_pointer
= s
+ 1;
2812 /* Handle local labels peculiar to us referred to in an expression. */
2814 md_undefined_symbol (char *name
)
2816 /* Look for local labels of the form $n. */
2817 if (name
[0] == '$' && ISDIGIT (name
[1]))
2823 while (ISDIGIT ((unsigned char) *s
))
2825 lab
= lab
* 10 + *s
- '0';
2828 if (dollar_label_defined (lab
))
2830 name
= dollar_label_name (lab
, 0);
2831 symbolP
= symbol_find (name
);
2835 name
= dollar_label_name (lab
, 1);
2836 symbolP
= symbol_find_or_make (name
);
2844 /* Parse an operand that is machine-specific. */
2846 md_operand (expressionS
*expressionP ATTRIBUTE_UNUSED
)
2850 /* Round up a section size to the appropriate boundary---do we need this? */
2852 md_section_align (segT segment ATTRIBUTE_UNUSED
, valueT size
)
2854 return size
; /* Byte (i.e., 32-bit) alignment is fine? */
2858 tic4x_pc_offset (unsigned int op
)
2860 /* Determine the PC offset for a C[34]x instruction.
2861 This could be simplified using some boolean algebra
2862 but at the expense of readability. */
2866 case 0x62: /* call (C4x) */
2867 case 0x64: /* rptb (C4x) */
2869 case 0x61: /* brd */
2870 case 0x63: /* laj */
2871 case 0x65: /* rptbd (C4x) */
2873 case 0x66: /* swi */
2880 switch ((op
& 0xffe00000) >> 20)
2882 case 0x6a0: /* bB */
2883 case 0x720: /* callB */
2884 case 0x740: /* trapB */
2887 case 0x6a2: /* bBd */
2888 case 0x6a6: /* bBat */
2889 case 0x6aa: /* bBaf */
2890 case 0x722: /* lajB */
2891 case 0x748: /* latB */
2892 case 0x798: /* rptbd */
2899 switch ((op
& 0xfe200000) >> 20)
2901 case 0x6e0: /* dbB */
2904 case 0x6e2: /* dbBd */
2914 /* Exactly what point is a PC-relative offset relative TO?
2915 With the C3x we have the following:
2916 DBcond, Bcond disp + PC + 1 => PC
2917 DBcondD, BcondD disp + PC + 3 => PC
2920 md_pcrel_from (fixS
*fixP
)
2925 buf
= (unsigned char *) fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
;
2926 op
= ((unsigned) buf
[3] << 24) | (buf
[2] << 16) | (buf
[1] << 8) | buf
[0];
2928 return ((fixP
->fx_where
+ fixP
->fx_frag
->fr_address
) >> 2) +
2929 tic4x_pc_offset (op
);
2932 /* Fill the alignment area with NOP's on .text, unless fill-data
2935 tic4x_do_align (int alignment
,
2940 /* Because we are talking lwords, not bytes, adjust alignment to do words */
2943 if (alignment
!= 0 && !need_pass_2
)
2947 if (subseg_text_p (now_seg
))
2951 md_number_to_chars (nop
, TIC_NOP_OPCODE
, 4);
2952 frag_align_pattern (alignment
, nop
, sizeof (nop
), max
);
2955 frag_align (alignment
, 0, max
);
2958 frag_align (alignment
, *fill
, max
);
2960 frag_align_pattern (alignment
, fill
, len
, max
);
2963 /* Return 1 to skip the default alignment function */
2967 /* Look for and remove parallel instruction operator ||. */
2969 tic4x_start_line (void)
2971 char *s
= input_line_pointer
;
2975 /* If parallel instruction prefix found at start of line, skip it. */
2976 if (*input_line_pointer
== '|' && input_line_pointer
[1] == '|')
2981 input_line_pointer
++;
2982 *input_line_pointer
= ' ';
2983 /* So line counters get bumped. */
2984 input_line_pointer
[-1] = '\n';
2989 /* Write out the previous insn here */
2992 input_line_pointer
= s
;
2997 tc_gen_reloc (asection
*seg ATTRIBUTE_UNUSED
, fixS
*fixP
)
3001 reloc
= XNEW (arelent
);
3003 reloc
->sym_ptr_ptr
= XNEW (asymbol
*);
3004 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixP
->fx_addsy
);
3005 reloc
->address
= fixP
->fx_frag
->fr_address
+ fixP
->fx_where
;
3006 reloc
->address
/= OCTETS_PER_BYTE
;
3007 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixP
->fx_r_type
);
3008 if (reloc
->howto
== (reloc_howto_type
*) NULL
)
3010 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3011 _("Reloc %d not supported by object file format"),
3012 (int) fixP
->fx_r_type
);
3016 if (fixP
->fx_r_type
== BFD_RELOC_HI16
)
3017 reloc
->addend
= fixP
->fx_offset
;
3019 reloc
->addend
= fixP
->fx_addnumber
;