1 /* tc-tic4x.c -- Assemble for the Texas Instruments TMS320C[34]x.
2 Copyright (C) 1997-2016 Free Software Foundation, Inc.
4 Contributed by Michael P. Hayes (m.hayes@elec.canterbury.ac.nz)
6 This file is part of GAS, the GNU Assembler.
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3, or (at your option)
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to
20 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
21 Boston, MA 02110-1301, USA. */
26 o .align cannot handle fill-data-width larger than 0xFF/8-bits. It
27 should be possible to define a 32-bits pattern.
29 o .align: Implement a 'bu' insn if the number of nop's exceeds 4
30 within the align frag. if(fragsize>4words) insert bu fragend+1
33 o .usect if has symbol on previous line not implemented
35 o .sym, .eos, .stag, .etag, .member not implemented
37 o Evaluation of constant floating point expressions (expr.c needs
40 o Support 'abc' constants (that is 0x616263). */
43 #include "safe-ctype.h"
44 #include "opcode/tic4x.h"
47 /* OK, we accept a syntax similar to the other well known C30
48 assembly tools. With TIC4X_ALT_SYNTAX defined we are more
49 flexible, allowing a more Unix-like syntax: `%' in front of
50 register names, `#' in front of immediate constants, and
51 not requiring `@' in front of direct addresses. */
53 #define TIC4X_ALT_SYNTAX
55 /* Equal to MAX_PRECISION in atof-ieee.c. */
56 #define MAX_LITTLENUMS 6 /* (12 bytes) */
58 /* Handle of the inst mnemonic hash table. */
59 static struct hash_control
*tic4x_op_hash
= NULL
;
61 /* Handle asg pseudo. */
62 static struct hash_control
*tic4x_asg_hash
= NULL
;
64 static unsigned int tic4x_cpu
= 0; /* Default to TMS320C40. */
65 static unsigned int tic4x_revision
= 0; /* CPU revision */
66 static unsigned int tic4x_idle2
= 0; /* Idle2 support */
67 static unsigned int tic4x_lowpower
= 0; /* Lowpower support */
68 static unsigned int tic4x_enhanced
= 0; /* Enhanced opcode support */
69 static unsigned int tic4x_big_model
= 0; /* Default to small memory model. */
70 static unsigned int tic4x_reg_args
= 0; /* Default to args passed on stack. */
71 static unsigned long tic4x_oplevel
= 0; /* Opcode level */
73 #define OPTION_CPU 'm'
74 #define OPTION_BIG (OPTION_MD_BASE + 1)
75 #define OPTION_SMALL (OPTION_MD_BASE + 2)
76 #define OPTION_MEMPARM (OPTION_MD_BASE + 3)
77 #define OPTION_REGPARM (OPTION_MD_BASE + 4)
78 #define OPTION_IDLE2 (OPTION_MD_BASE + 5)
79 #define OPTION_LOWPOWER (OPTION_MD_BASE + 6)
80 #define OPTION_ENHANCED (OPTION_MD_BASE + 7)
81 #define OPTION_REV (OPTION_MD_BASE + 8)
83 const char *md_shortopts
= "bm:prs";
84 struct option md_longopts
[] =
86 { "mcpu", required_argument
, NULL
, OPTION_CPU
},
87 { "mdsp", required_argument
, NULL
, OPTION_CPU
},
88 { "mbig", no_argument
, NULL
, OPTION_BIG
},
89 { "msmall", no_argument
, NULL
, OPTION_SMALL
},
90 { "mmemparm", no_argument
, NULL
, OPTION_MEMPARM
},
91 { "mregparm", no_argument
, NULL
, OPTION_REGPARM
},
92 { "midle2", no_argument
, NULL
, OPTION_IDLE2
},
93 { "mlowpower", no_argument
, NULL
, OPTION_LOWPOWER
},
94 { "menhanced", no_argument
, NULL
, OPTION_ENHANCED
},
95 { "mrev", required_argument
, NULL
, OPTION_REV
},
96 { NULL
, no_argument
, NULL
, 0 }
99 size_t md_longopts_size
= sizeof (md_longopts
);
104 M_UNKNOWN
, M_IMMED
, M_DIRECT
, M_REGISTER
, M_INDIRECT
,
105 M_IMMED_F
, M_PARALLEL
, M_HI
109 typedef struct tic4x_operand
111 tic4x_addr_mode_t mode
; /* Addressing mode. */
112 expressionS expr
; /* Expression. */
113 int disp
; /* Displacement for indirect addressing. */
114 int aregno
; /* Aux. register number. */
115 LITTLENUM_TYPE fwords
[MAX_LITTLENUMS
]; /* Float immed. number. */
119 typedef struct tic4x_insn
121 char name
[TIC4X_NAME_MAX
]; /* Mnemonic of instruction. */
122 unsigned int in_use
; /* True if in_use. */
123 unsigned int parallel
; /* True if parallel instruction. */
124 unsigned int nchars
; /* This is always 4 for the C30. */
125 unsigned long opcode
; /* Opcode number. */
126 expressionS exp
; /* Expression required for relocation. */
127 int reloc
; /* Relocation type required. */
128 int pcrel
; /* True if relocation PC relative. */
129 char *pname
; /* Name of instruction in parallel. */
130 unsigned int num_operands
; /* Number of operands in total. */
131 tic4x_inst_t
*inst
; /* Pointer to first template. */
132 tic4x_operand_t operands
[TIC4X_OPERANDS_MAX
];
136 static tic4x_insn_t the_insn
; /* Info about our instruction. */
137 static tic4x_insn_t
*insn
= &the_insn
;
139 static void tic4x_asg (int);
140 static void tic4x_bss (int);
141 static void tic4x_globl (int);
142 static void tic4x_cons (int);
143 static void tic4x_stringer (int);
144 static void tic4x_eval (int);
145 static void tic4x_newblock (int);
146 static void tic4x_sect (int);
147 static void tic4x_set (int);
148 static void tic4x_usect (int);
149 static void tic4x_version (int);
155 {"align", s_align_bytes
, 32},
156 {"ascii", tic4x_stringer
, 1},
157 {"asciz", tic4x_stringer
, 0},
158 {"asg", tic4x_asg
, 0},
159 {"block", s_space
, 4},
160 {"byte", tic4x_cons
, 1},
161 {"bss", tic4x_bss
, 0},
162 {"copy", s_include
, 0},
163 {"def", tic4x_globl
, 0},
164 {"equ", tic4x_set
, 0},
165 {"eval", tic4x_eval
, 0},
166 {"global", tic4x_globl
, 0},
167 {"globl", tic4x_globl
, 0},
168 {"hword", tic4x_cons
, 2},
169 {"ieee", float_cons
, 'i'},
170 {"int", tic4x_cons
, 4}, /* .int allocates 4 bytes. */
171 {"ldouble", float_cons
, 'e'},
172 {"newblock", tic4x_newblock
, 0},
173 {"ref", s_ignore
, 0}, /* All undefined treated as external. */
174 {"set", tic4x_set
, 0},
175 {"sect", tic4x_sect
, 1}, /* Define named section. */
176 {"space", s_space
, 4},
177 {"string", tic4x_stringer
, 0},
178 {"usect", tic4x_usect
, 0}, /* Reserve space in uninit. named sect. */
179 {"version", tic4x_version
, 0},
180 {"word", tic4x_cons
, 4}, /* .word allocates 4 bytes. */
181 {"xdef", tic4x_globl
, 0},
185 int md_short_jump_size
= 4;
186 int md_long_jump_size
= 4;
188 /* This array holds the chars that always start a comment. If the
189 pre-processor is disabled, these aren't very useful. */
190 #ifdef TIC4X_ALT_SYNTAX
191 const char comment_chars
[] = ";!";
193 const char comment_chars
[] = ";";
196 /* This array holds the chars that only start a comment at the beginning of
197 a line. If the line seems to have the form '# 123 filename'
198 .line and .file directives will appear in the pre-processed output.
199 Note that input_file.c hand checks for '#' at the beginning of the
200 first line of the input file. This is because the compiler outputs
201 #NO_APP at the beginning of its output.
202 Also note that comments like this one will always work. */
203 const char line_comment_chars
[] = "#*";
205 /* We needed an unused char for line separation to work around the
206 lack of macros, using sed and such. */
207 const char line_separator_chars
[] = "&";
209 /* Chars that can be used to separate mant from exp in floating point nums. */
210 const char EXP_CHARS
[] = "eE";
212 /* Chars that mean this number is a floating point constant. */
215 const char FLT_CHARS
[] = "fFilsS";
217 /* Also be aware that MAXIMUM_NUMBER_OF_CHARS_FOR_FLOAT may have to be
218 changed in read.c. Ideally it shouldn't have to know about it at
219 all, but nothing is ideal around here. */
221 /* Flonums returned here. */
222 extern FLONUM_TYPE generic_floating_point_number
;
224 /* Precision in LittleNums. */
225 #define MAX_PRECISION (4) /* Its a bit overkill for us, but the code
227 #define S_PRECISION (1) /* Short float constants 16-bit. */
228 #define F_PRECISION (2) /* Float and double types 32-bit. */
229 #define E_PRECISION (4) /* Extended precision, 64-bit (real 40-bit). */
232 /* Turn generic_floating_point_number into a real short/float/double. */
234 tic4x_gen_to_words (FLONUM_TYPE flonum
, LITTLENUM_TYPE
*words
, int precision
)
236 int return_value
= 0;
237 LITTLENUM_TYPE
*p
; /* Littlenum pointer. */
238 int mantissa_bits
; /* Bits in mantissa field. */
239 int exponent_bits
; /* Bits in exponent field. */
241 unsigned int sone
; /* Scaled one. */
242 unsigned int sfract
; /* Scaled fraction. */
243 unsigned int smant
; /* Scaled mantissa. */
245 unsigned int mover
; /* Mantissa overflow bits */
246 unsigned int rbit
; /* Round bit. */
247 int shift
; /* Shift count. */
249 /* NOTE: Svein Seldal <Svein@dev.seldal.com>
250 The code in this function is altered slightly to support floats
251 with 31-bits mantissas, thus the documentation below may be a
252 little bit inaccurate.
254 By Michael P. Hayes <m.hayes@elec.canterbury.ac.nz>
255 Here is how a generic floating point number is stored using
256 flonums (an extension of bignums) where p is a pointer to an
259 For example 2e-3 is stored with exp = -4 and
266 with low = &bits[2], high = &bits[5], and leader = &bits[5].
268 This number can be written as
269 0x0083126e978d4fde.00000000 * 65536**-4 or
270 0x0.0083126e978d4fde * 65536**0 or
271 0x0.83126e978d4fde * 2**-8 = 2e-3
273 Note that low points to the 65536**0 littlenum (bits[2]) and
274 leader points to the most significant non-zero littlenum
277 TMS320C3X floating point numbers are a bit of a strange beast.
278 The 32-bit flavour has the 8 MSBs representing the exponent in
279 twos complement format (-128 to +127). There is then a sign bit
280 followed by 23 bits of mantissa. The mantissa is expressed in
281 twos complement format with the binary point after the most
282 significant non sign bit. The bit after the binary point is
283 suppressed since it is the complement of the sign bit. The
284 effective mantissa is thus 24 bits. Zero is represented by an
287 The 16-bit flavour has the 4 MSBs representing the exponent in
288 twos complement format (-8 to +7). There is then a sign bit
289 followed by 11 bits of mantissa. The mantissa is expressed in
290 twos complement format with the binary point after the most
291 significant non sign bit. The bit after the binary point is
292 suppressed since it is the complement of the sign bit. The
293 effective mantissa is thus 12 bits. Zero is represented by an
294 exponent of -8. For example,
296 number norm mant m x e s i fraction f
297 +0.500 => 1.00000000000 -1 -1 0 1 .00000000000 (1 + 0) * 2^(-1)
298 +0.999 => 1.11111111111 -1 -1 0 1 .11111111111 (1 + 0.99) * 2^(-1)
299 +1.000 => 1.00000000000 0 0 0 1 .00000000000 (1 + 0) * 2^(0)
300 +1.500 => 1.10000000000 0 0 0 1 .10000000000 (1 + 0.5) * 2^(0)
301 +1.999 => 1.11111111111 0 0 0 1 .11111111111 (1 + 0.9) * 2^(0)
302 +2.000 => 1.00000000000 1 1 0 1 .00000000000 (1 + 0) * 2^(1)
303 +4.000 => 1.00000000000 2 2 0 1 .00000000000 (1 + 0) * 2^(2)
304 -0.500 => 1.00000000000 -1 -1 1 0 .10000000000 (-2 + 0) * 2^(-2)
305 -1.000 => 1.00000000000 0 -1 1 0 .00000000000 (-2 + 0) * 2^(-1)
306 -1.500 => 1.10000000000 0 0 1 0 .10000000000 (-2 + 0.5) * 2^(0)
307 -1.999 => 1.11111111111 0 0 1 0 .00000000001 (-2 + 0.11) * 2^(0)
308 -2.000 => 1.00000000000 1 1 1 0 .00000000000 (-2 + 0) * 2^(0)
309 -4.000 => 1.00000000000 2 1 1 0 .00000000000 (-2 + 0) * 2^(1)
311 where e is the exponent, s is the sign bit, i is the implied bit,
312 and f is the fraction stored in the mantissa field.
314 num = (1 + f) * 2^x = m * 2^e if s = 0
315 num = (-2 + f) * 2^x = -m * 2^e if s = 1
316 where 0 <= f < 1.0 and 1.0 <= m < 2.0
318 The fraction (f) and exponent (e) fields for the TMS320C3X format
319 can be derived from the normalised mantissa (m) and exponent (x) using:
321 f = m - 1, e = x if s = 0
322 f = 2 - m, e = x if s = 1 and m != 1.0
323 f = 0, e = x - 1 if s = 1 and m = 1.0
324 f = 0, e = -8 if m = 0
327 OK, the other issue we have to consider is rounding since the
328 mantissa has a much higher potential precision than what we can
329 represent. To do this we add half the smallest storable fraction.
330 We then have to renormalise the number to allow for overflow.
332 To convert a generic flonum into a TMS320C3X floating point
333 number, here's what we try to do....
335 The first thing is to generate a normalised mantissa (m) where
336 1.0 <= m < 2 and to convert the exponent from base 16 to base 2.
337 We desire the binary point to be placed after the most significant
338 non zero bit. This process is done in two steps: firstly, the
339 littlenum with the most significant non zero bit is located (this
340 is done for us since leader points to this littlenum) and the
341 binary point (which is currently after the LSB of the littlenum
342 pointed to by low) is moved to before the MSB of the littlenum
343 pointed to by leader. This requires the exponent to be adjusted
344 by leader - low + 1. In the earlier example, the new exponent is
345 thus -4 + (5 - 2 + 1) = 0 (base 65536). We now need to convert
346 the exponent to base 2 by multiplying the exponent by 16 (log2
347 65536). The exponent base 2 is thus also zero.
349 The second step is to hunt for the most significant non zero bit
350 in the leader littlenum. We do this by left shifting a copy of
351 the leader littlenum until bit 16 is set (0x10000) and counting
352 the number of shifts, S, required. The number of shifts then has to
353 be added to correct the exponent (base 2). For our example, this
354 will require 9 shifts and thus our normalised exponent (base 2) is
355 0 + 9 = 9. Note that the worst case scenario is when the leader
356 littlenum is 1, thus requiring 16 shifts.
358 We now have to left shift the other littlenums by the same amount,
359 propagating the shifted bits into the more significant littlenums.
360 To save a lot of unnecessary shifting we only have to consider
361 two or three littlenums, since the greatest number of mantissa
362 bits required is 24 + 1 rounding bit. While two littlenums
363 provide 32 bits of precision, the most significant littlenum
364 may only contain a single significant bit and thus an extra
365 littlenum is required.
367 Denoting the number of bits in the fraction field as F, we require
368 G = F + 2 bits (one extra bit is for rounding, the other gets
369 suppressed). Say we required S shifts to find the most
370 significant bit in the leader littlenum, the number of left shifts
371 required to move this bit into bit position G - 1 is L = G + S - 17.
372 Note that this shift count may be negative for the short floating
373 point flavour (where F = 11 and thus G = 13 and potentially S < 3).
374 If L > 0 we have to shunt the next littlenum into position. Bit
375 15 (the MSB) of the next littlenum needs to get moved into position
376 L - 1 (If L > 15 we need all the bits of this littlenum and
377 some more from the next one.). We subtract 16 from L and use this
378 as the left shift count; the resultant value we or with the
379 previous result. If L > 0, we repeat this operation. */
381 if (precision
!= S_PRECISION
)
383 if (precision
== E_PRECISION
)
384 words
[2] = words
[3] = 0x0000;
386 /* 0.0e0 or NaN seen. */
387 if (flonum
.low
> flonum
.leader
/* = 0.0e0 */
388 || flonum
.sign
== 0) /* = NaN */
391 as_bad (_("Nan, using zero."));
396 if (flonum
.sign
== 'P')
398 /* +INF: Replace with maximum float. */
399 if (precision
== S_PRECISION
)
406 if (precision
== E_PRECISION
)
413 else if (flonum
.sign
== 'N')
415 /* -INF: Replace with maximum float. */
416 if (precision
== S_PRECISION
)
420 if (precision
== E_PRECISION
)
425 exponent
= (flonum
.exponent
+ flonum
.leader
- flonum
.low
+ 1) * 16;
427 if (!(tmp
= *flonum
.leader
))
428 abort (); /* Hmmm. */
429 shift
= 0; /* Find position of first sig. bit. */
432 exponent
-= (16 - shift
); /* Adjust exponent. */
434 if (precision
== S_PRECISION
) /* Allow 1 rounding bit. */
439 else if(precision
== F_PRECISION
)
444 else /* E_PRECISION */
450 shift
= mantissa_bits
- shift
;
455 /* Store the mantissa data into smant and the roundbit into rbit */
456 for (p
= flonum
.leader
; p
>= flonum
.low
&& shift
> -16; p
--)
458 tmp
= shift
>= 0 ? *p
<< shift
: *p
>> -shift
;
459 rbit
= shift
< 0 ? ((*p
>> (-shift
-1)) & 0x1) : 0;
464 /* OK, we've got our scaled mantissa so let's round it up */
467 /* If the mantissa is going to overflow when added, lets store
468 the extra bit in mover. -- A special case exists when
469 mantissa_bits is 31 (E_PRECISION). Then the first test cannot
470 be trusted, as result is host-dependent, thus the second
472 if( smant
== ((unsigned)(1<<(mantissa_bits
+1))-1)
473 || smant
== (unsigned)-1 ) /* This is to catch E_PRECISION cases */
478 /* Get the scaled one value */
479 sone
= (1 << (mantissa_bits
));
481 /* The number may be unnormalised so renormalise it... */
485 smant
|= sone
; /* Insert the bit from mover into smant */
489 /* The binary point is now between bit positions 11 and 10 or 23 and 22,
490 i.e., between mantissa_bits - 1 and mantissa_bits - 2 and the
491 bit at mantissa_bits - 1 should be set. */
493 abort (); /* Ooops. */
495 if (flonum
.sign
== '+')
496 sfract
= smant
- sone
; /* smant - 1.0. */
499 /* This seems to work. */
507 sfract
= -smant
& (sone
-1); /* 2.0 - smant. */
509 sfract
|= sone
; /* Insert sign bit. */
512 if (abs (exponent
) >= (1 << (exponent_bits
- 1)))
513 as_bad (_("Cannot represent exponent in %d bits"), exponent_bits
);
515 /* Force exponent to fit in desired field width. */
516 exponent
&= (1 << (exponent_bits
)) - 1;
518 if (precision
== E_PRECISION
)
520 /* Map the float part first (100% equal format as F_PRECISION) */
521 words
[0] = exponent
<< (mantissa_bits
+1-24);
522 words
[0] |= sfract
>> 24;
523 words
[1] = sfract
>> 8;
525 /* Map the mantissa in the next */
526 words
[2] = sfract
>> 16;
527 words
[3] = sfract
& 0xffff;
531 /* Insert the exponent data into the word */
532 sfract
|= exponent
<< (mantissa_bits
+1);
534 if (precision
== S_PRECISION
)
538 words
[0] = sfract
>> 16;
539 words
[1] = sfract
& 0xffff;
546 /* Returns pointer past text consumed. */
548 tic4x_atof (char *str
, char what_kind
, LITTLENUM_TYPE
*words
)
550 /* Extra bits for zeroed low-order bits. The 1st MAX_PRECISION are
551 zeroed, the last contain flonum bits. */
552 static LITTLENUM_TYPE bits
[MAX_PRECISION
+ MAX_PRECISION
+ GUARD
];
554 /* Number of 16-bit words in the format. */
556 FLONUM_TYPE save_gen_flonum
;
558 /* We have to save the generic_floating_point_number because it
559 contains storage allocation about the array of LITTLENUMs where
560 the value is actually stored. We will allocate our own array of
561 littlenums below, but have to restore the global one on exit. */
562 save_gen_flonum
= generic_floating_point_number
;
565 generic_floating_point_number
.low
= bits
+ MAX_PRECISION
;
566 generic_floating_point_number
.high
= NULL
;
567 generic_floating_point_number
.leader
= NULL
;
568 generic_floating_point_number
.exponent
= 0;
569 generic_floating_point_number
.sign
= '\0';
571 /* Use more LittleNums than seems necessary: the highest flonum may
572 have 15 leading 0 bits, so could be useless. */
574 memset (bits
, '\0', sizeof (LITTLENUM_TYPE
) * MAX_PRECISION
);
580 precision
= S_PRECISION
;
587 precision
= F_PRECISION
;
592 precision
= E_PRECISION
;
596 as_bad (_("Invalid floating point number"));
600 generic_floating_point_number
.high
601 = generic_floating_point_number
.low
+ precision
- 1 + GUARD
;
603 if (atof_generic (&return_value
, ".", EXP_CHARS
,
604 &generic_floating_point_number
))
606 as_bad (_("Invalid floating point number"));
610 tic4x_gen_to_words (generic_floating_point_number
,
613 /* Restore the generic_floating_point_number's storage alloc (and
615 generic_floating_point_number
= save_gen_flonum
;
621 tic4x_insert_reg (const char *regname
, int regnum
)
626 symbol_table_insert (symbol_new (regname
, reg_section
, (valueT
) regnum
,
627 &zero_address_frag
));
628 for (i
= 0; regname
[i
]; i
++)
629 buf
[i
] = ISLOWER (regname
[i
]) ? TOUPPER (regname
[i
]) : regname
[i
];
632 symbol_table_insert (symbol_new (buf
, reg_section
, (valueT
) regnum
,
633 &zero_address_frag
));
637 tic4x_insert_sym (const char *symname
, int value
)
641 symbolP
= symbol_new (symname
, absolute_section
,
642 (valueT
) value
, &zero_address_frag
);
643 SF_SET_LOCAL (symbolP
);
644 symbol_table_insert (symbolP
);
648 tic4x_expression (char *str
, expressionS
*exp
)
653 t
= input_line_pointer
; /* Save line pointer. */
654 input_line_pointer
= str
;
656 s
= input_line_pointer
;
657 input_line_pointer
= t
; /* Restore line pointer. */
658 return s
; /* Return pointer to where parsing stopped. */
662 tic4x_expression_abs (char *str
, offsetT
*value
)
667 t
= input_line_pointer
; /* Save line pointer. */
668 input_line_pointer
= str
;
669 *value
= get_absolute_expression ();
670 s
= input_line_pointer
;
671 input_line_pointer
= t
; /* Restore line pointer. */
676 tic4x_emit_char (char c
, int b
)
680 exp
.X_op
= O_constant
;
681 exp
.X_add_number
= c
;
686 tic4x_seg_alloc (char *name ATTRIBUTE_UNUSED
,
687 segT seg ATTRIBUTE_UNUSED
,
691 /* Note that the size is in words
692 so we multiply it by 4 to get the number of bytes to allocate. */
694 /* If we have symbol: .usect ".fred", size etc.,
695 the symbol needs to point to the first location reserved
702 p
= frag_var (rs_fill
, 1, 1, (relax_substateT
) 0,
704 size
* OCTETS_PER_BYTE
, (char *) 0);
709 /* .asg ["]character-string["], symbol */
711 tic4x_asg (int x ATTRIBUTE_UNUSED
)
718 str
= input_line_pointer
;
720 /* Skip string expression. */
721 while (*input_line_pointer
!= ',' && *input_line_pointer
)
722 input_line_pointer
++;
723 if (*input_line_pointer
!= ',')
725 as_bad (_("Comma expected\n"));
728 *input_line_pointer
++ = '\0';
729 c
= get_symbol_name (&name
); /* Get terminator. */
731 name
= xstrdup (name
);
732 if (hash_find (tic4x_asg_hash
, name
))
733 hash_replace (tic4x_asg_hash
, name
, (void *) str
);
735 hash_insert (tic4x_asg_hash
, name
, (void *) str
);
736 (void) restore_line_pointer (c
);
737 demand_empty_rest_of_line ();
740 /* .bss symbol, size */
742 tic4x_bss (int x ATTRIBUTE_UNUSED
)
749 subsegT current_subseg
;
752 current_seg
= now_seg
; /* Save current seg. */
753 current_subseg
= now_subseg
; /* Save current subseg. */
756 c
= get_symbol_name (&name
); /* Get terminator. */
758 c
= * ++ input_line_pointer
;
761 as_bad (_(".bss size argument missing\n"));
766 tic4x_expression_abs (++input_line_pointer
, &size
);
769 as_bad (_(".bss size %ld < 0!"), (long) size
);
772 subseg_set (bss_section
, 0);
773 symbolP
= symbol_find_or_make (name
);
775 if (S_GET_SEGMENT (symbolP
) == bss_section
)
776 symbol_get_frag (symbolP
)->fr_symbol
= 0;
778 symbol_set_frag (symbolP
, frag_now
);
780 p
= frag_var (rs_org
, 1, 1, (relax_substateT
) 0, symbolP
,
781 size
* OCTETS_PER_BYTE
, (char *) 0);
782 *p
= 0; /* Fill char. */
784 S_SET_SEGMENT (symbolP
, bss_section
);
786 /* The symbol may already have been created with a preceding
787 ".globl" directive -- be careful not to step on storage class
788 in that case. Otherwise, set it to static. */
789 if (S_GET_STORAGE_CLASS (symbolP
) != C_EXT
)
790 S_SET_STORAGE_CLASS (symbolP
, C_STAT
);
792 subseg_set (current_seg
, current_subseg
); /* Restore current seg. */
793 demand_empty_rest_of_line ();
797 tic4x_globl (int ignore ATTRIBUTE_UNUSED
)
805 c
= get_symbol_name (&name
);
806 symbolP
= symbol_find_or_make (name
);
807 *input_line_pointer
= c
;
808 SKIP_WHITESPACE_AFTER_NAME ();
809 S_SET_STORAGE_CLASS (symbolP
, C_EXT
);
810 S_SET_EXTERNAL (symbolP
);
813 input_line_pointer
++;
815 if (*input_line_pointer
== '\n')
821 demand_empty_rest_of_line ();
824 /* Handle .byte, .word. .int, .long */
826 tic4x_cons (int bytes
)
832 if (*input_line_pointer
== '"')
834 input_line_pointer
++;
835 while (is_a_char (c
= next_char_of_string ()))
836 tic4x_emit_char (c
, 4);
837 know (input_line_pointer
[-1] == '\"');
843 input_line_pointer
= tic4x_expression (input_line_pointer
, &exp
);
844 if (exp
.X_op
== O_constant
)
849 exp
.X_add_number
&= 255;
852 exp
.X_add_number
&= 65535;
856 /* Perhaps we should disallow .byte and .hword with
857 a non constant expression that will require relocation. */
861 while (*input_line_pointer
++ == ',');
863 input_line_pointer
--; /* Put terminator back into stream. */
864 demand_empty_rest_of_line ();
867 /* Handle .ascii, .asciz, .string */
869 tic4x_stringer (int append_zero
)
878 if (*input_line_pointer
== '"')
880 input_line_pointer
++;
881 while (is_a_char (c
= next_char_of_string ()))
883 tic4x_emit_char (c
, 1);
889 tic4x_emit_char (c
, 1);
893 know (input_line_pointer
[-1] == '\"');
899 input_line_pointer
= tic4x_expression (input_line_pointer
, &exp
);
900 if (exp
.X_op
!= O_constant
)
902 as_bad (_("Non-constant symbols not allowed\n"));
905 exp
.X_add_number
&= 255; /* Limit numeber to 8-bit */
910 while (*input_line_pointer
++ == ',');
912 /* Fill out the rest of the expression with 0's to fill up a full word */
914 tic4x_emit_char (0, 4-(bytes
&0x3));
916 input_line_pointer
--; /* Put terminator back into stream. */
917 demand_empty_rest_of_line ();
920 /* .eval expression, symbol */
922 tic4x_eval (int x ATTRIBUTE_UNUSED
)
930 tic4x_expression_abs (input_line_pointer
, &value
);
931 if (*input_line_pointer
++ != ',')
933 as_bad (_("Symbol missing\n"));
936 c
= get_symbol_name (&name
); /* Get terminator. */
937 tic4x_insert_sym (name
, value
);
938 (void) restore_line_pointer (c
);
939 demand_empty_rest_of_line ();
942 /* Reset local labels. */
944 tic4x_newblock (int x ATTRIBUTE_UNUSED
)
946 dollar_label_clear ();
949 /* .sect "section-name" [, value] */
950 /* .sect ["]section-name[:subsection-name]["] [, value] */
952 tic4x_sect (int x ATTRIBUTE_UNUSED
)
961 if (*input_line_pointer
== '"')
962 input_line_pointer
++;
963 c
= get_symbol_name (§ion_name
); /* Get terminator. */
965 c
= * ++ input_line_pointer
;
966 input_line_pointer
++; /* Skip null symbol terminator. */
967 name
= xstrdup (section_name
);
969 /* TI C from version 5.0 allows a section name to contain a
970 subsection name as well. The subsection name is separated by a
971 ':' from the section name. Currently we scan the subsection
973 Volker Kuhlmann <v.kuhlmann@elec.canterbury.ac.nz>. */
977 c
= get_symbol_name (&subname
); /* Get terminator. */
979 c
= * ++ input_line_pointer
;
980 input_line_pointer
++; /* Skip null symbol terminator. */
981 as_warn (_(".sect: subsection name ignored"));
984 /* We might still have a '"' to discard, but the character after a
985 symbol name will be overwritten with a \0 by get_symbol_name()
990 tic4x_expression_abs (input_line_pointer
, &num
);
991 else if (*input_line_pointer
== ',')
994 tic4x_expression_abs (++input_line_pointer
, &num
);
999 seg
= subseg_new (name
, num
);
1000 if (line_label
!= NULL
)
1002 S_SET_SEGMENT (line_label
, seg
);
1003 symbol_set_frag (line_label
, frag_now
);
1006 if (bfd_get_section_flags (stdoutput
, seg
) == SEC_NO_FLAGS
)
1008 if (!bfd_set_section_flags (stdoutput
, seg
, SEC_DATA
))
1009 as_warn (_("Error setting flags for \"%s\": %s"), name
,
1010 bfd_errmsg (bfd_get_error ()));
1013 /* If the last character overwritten by get_symbol_name() was an
1014 end-of-line, we must restore it or the end of the line will not be
1015 recognised and scanning extends into the next line, stopping with
1016 an error (blame Volker Kuhlmann <v.kuhlmann@elec.canterbury.ac.nz>
1017 if this is not true). */
1018 if (is_end_of_line
[(unsigned char) c
])
1019 *(--input_line_pointer
) = c
;
1021 demand_empty_rest_of_line ();
1024 /* symbol[:] .set value or .set symbol, value */
1026 tic4x_set (int x ATTRIBUTE_UNUSED
)
1031 if ((symbolP
= line_label
) == NULL
)
1036 c
= get_symbol_name (&name
); /* Get terminator. */
1038 c
= * ++ input_line_pointer
;
1041 as_bad (_(".set syntax invalid\n"));
1042 ignore_rest_of_line ();
1045 ++input_line_pointer
;
1046 symbolP
= symbol_find_or_make (name
);
1049 symbol_table_insert (symbolP
);
1051 pseudo_set (symbolP
);
1052 demand_empty_rest_of_line ();
1055 /* [symbol] .usect ["]section-name["], size-in-words [, alignment-flag] */
1057 tic4x_usect (int x ATTRIBUTE_UNUSED
)
1063 offsetT size
, alignment_flag
;
1065 subsegT current_subseg
;
1067 current_seg
= now_seg
; /* save current seg. */
1068 current_subseg
= now_subseg
; /* save current subseg. */
1071 if (*input_line_pointer
== '"')
1072 input_line_pointer
++;
1073 c
= get_symbol_name (§ion_name
); /* Get terminator. */
1075 c
= * ++ input_line_pointer
;
1076 input_line_pointer
++; /* Skip null symbol terminator. */
1077 name
= xstrdup (section_name
);
1080 input_line_pointer
=
1081 tic4x_expression_abs (input_line_pointer
, &size
);
1082 else if (*input_line_pointer
== ',')
1084 input_line_pointer
=
1085 tic4x_expression_abs (++input_line_pointer
, &size
);
1090 /* Read a possibly present third argument (alignment flag) [VK]. */
1091 if (*input_line_pointer
== ',')
1093 input_line_pointer
=
1094 tic4x_expression_abs (++input_line_pointer
, &alignment_flag
);
1099 as_warn (_(".usect: non-zero alignment flag ignored"));
1101 seg
= subseg_new (name
, 0);
1102 if (line_label
!= NULL
)
1104 S_SET_SEGMENT (line_label
, seg
);
1105 symbol_set_frag (line_label
, frag_now
);
1106 S_SET_VALUE (line_label
, frag_now_fix ());
1108 seg_info (seg
)->bss
= 1; /* Uninitialised data. */
1109 if (!bfd_set_section_flags (stdoutput
, seg
, SEC_ALLOC
))
1110 as_warn (_("Error setting flags for \"%s\": %s"), name
,
1111 bfd_errmsg (bfd_get_error ()));
1112 tic4x_seg_alloc (name
, seg
, size
, line_label
);
1114 if (S_GET_STORAGE_CLASS (line_label
) != C_EXT
)
1115 S_SET_STORAGE_CLASS (line_label
, C_STAT
);
1117 subseg_set (current_seg
, current_subseg
); /* Restore current seg. */
1118 demand_empty_rest_of_line ();
1121 /* .version cpu-version. */
1123 tic4x_version (int x ATTRIBUTE_UNUSED
)
1127 input_line_pointer
=
1128 tic4x_expression_abs (input_line_pointer
, &temp
);
1129 if (!IS_CPU_TIC3X (temp
) && !IS_CPU_TIC4X (temp
))
1130 as_bad (_("This assembler does not support processor generation %ld"),
1133 if (tic4x_cpu
&& temp
!= (offsetT
) tic4x_cpu
)
1134 as_warn (_("Changing processor generation on fly not supported..."));
1136 demand_empty_rest_of_line ();
1140 tic4x_init_regtable (void)
1144 for (i
= 0; i
< tic3x_num_registers
; i
++)
1145 tic4x_insert_reg (tic3x_registers
[i
].name
,
1146 tic3x_registers
[i
].regno
);
1148 if (IS_CPU_TIC4X (tic4x_cpu
))
1150 /* Add additional Tic4x registers, overriding some C3x ones. */
1151 for (i
= 0; i
< tic4x_num_registers
; i
++)
1152 tic4x_insert_reg (tic4x_registers
[i
].name
,
1153 tic4x_registers
[i
].regno
);
1158 tic4x_init_symbols (void)
1160 /* The TI tools accept case insensitive versions of these symbols,
1165 .TMS320xx 30,31,32,40,or 44 set according to -v flag
1166 .C3X or .C3x 1 or 0 1 if -v30,-v31,or -v32
1167 .C30 1 or 0 1 if -v30
1168 .C31 1 or 0 1 if -v31
1169 .C32 1 or 0 1 if -v32
1170 .C4X or .C4x 1 or 0 1 if -v40, or -v44
1171 .C40 1 or 0 1 if -v40
1172 .C44 1 or 0 1 if -v44
1174 .REGPARM 1 or 0 1 if -mr option used
1175 .BIGMODEL 1 or 0 1 if -mb option used
1177 These symbols are currently supported but will be removed in a
1179 .TMS320C30 1 or 0 1 if -v30,-v31,or -v32
1180 .TMS320C31 1 or 0 1 if -v31
1181 .TMS320C32 1 or 0 1 if -v32
1182 .TMS320C40 1 or 0 1 if -v40, or -v44
1183 .TMS320C44 1 or 0 1 if -v44
1185 Source: TI: TMS320C3x/C4x Assembly Language Tools User's Guide,
1186 1997, SPRU035C, p. 3-17/3-18. */
1187 tic4x_insert_sym (".REGPARM", tic4x_reg_args
);
1188 tic4x_insert_sym (".MEMPARM", !tic4x_reg_args
);
1189 tic4x_insert_sym (".BIGMODEL", tic4x_big_model
);
1190 tic4x_insert_sym (".C30INTERRUPT", 0);
1191 tic4x_insert_sym (".TMS320xx", tic4x_cpu
== 0 ? 40 : tic4x_cpu
);
1192 tic4x_insert_sym (".C3X", tic4x_cpu
== 30 || tic4x_cpu
== 31 || tic4x_cpu
== 32 || tic4x_cpu
== 33);
1193 tic4x_insert_sym (".C3x", tic4x_cpu
== 30 || tic4x_cpu
== 31 || tic4x_cpu
== 32 || tic4x_cpu
== 33);
1194 tic4x_insert_sym (".C4X", tic4x_cpu
== 0 || tic4x_cpu
== 40 || tic4x_cpu
== 44);
1195 tic4x_insert_sym (".C4x", tic4x_cpu
== 0 || tic4x_cpu
== 40 || tic4x_cpu
== 44);
1196 /* Do we need to have the following symbols also in lower case? */
1197 tic4x_insert_sym (".TMS320C30", tic4x_cpu
== 30 || tic4x_cpu
== 31 || tic4x_cpu
== 32 || tic4x_cpu
== 33);
1198 tic4x_insert_sym (".tms320C30", tic4x_cpu
== 30 || tic4x_cpu
== 31 || tic4x_cpu
== 32 || tic4x_cpu
== 33);
1199 tic4x_insert_sym (".TMS320C31", tic4x_cpu
== 31);
1200 tic4x_insert_sym (".tms320C31", tic4x_cpu
== 31);
1201 tic4x_insert_sym (".TMS320C32", tic4x_cpu
== 32);
1202 tic4x_insert_sym (".tms320C32", tic4x_cpu
== 32);
1203 tic4x_insert_sym (".TMS320C33", tic4x_cpu
== 33);
1204 tic4x_insert_sym (".tms320C33", tic4x_cpu
== 33);
1205 tic4x_insert_sym (".TMS320C40", tic4x_cpu
== 40 || tic4x_cpu
== 44 || tic4x_cpu
== 0);
1206 tic4x_insert_sym (".tms320C40", tic4x_cpu
== 40 || tic4x_cpu
== 44 || tic4x_cpu
== 0);
1207 tic4x_insert_sym (".TMS320C44", tic4x_cpu
== 44);
1208 tic4x_insert_sym (".tms320C44", tic4x_cpu
== 44);
1209 tic4x_insert_sym (".TMX320C40", 0); /* C40 first pass silicon ? */
1210 tic4x_insert_sym (".tmx320C40", 0);
1213 /* Insert a new instruction template into hash table. */
1215 tic4x_inst_insert (const tic4x_inst_t
*inst
)
1217 static char prev_name
[16];
1218 const char *retval
= NULL
;
1220 /* Only insert the first name if have several similar entries. */
1221 if (!strcmp (inst
->name
, prev_name
) || inst
->name
[0] == '\0')
1224 retval
= hash_insert (tic4x_op_hash
, inst
->name
, (void *) inst
);
1226 fprintf (stderr
, "internal error: can't hash `%s': %s\n",
1227 inst
->name
, retval
);
1229 strcpy (prev_name
, inst
->name
);
1230 return retval
== NULL
;
1233 /* Make a new instruction template. */
1234 static tic4x_inst_t
*
1235 tic4x_inst_make (const char *name
, unsigned long opcode
, const char *args
)
1237 static tic4x_inst_t
*insts
= NULL
;
1238 static char *names
= NULL
;
1239 static int iindex
= 0;
1243 /* Allocate memory to store name strings. */
1244 names
= (char *) xmalloc (sizeof (char) * 8192);
1245 /* Allocate memory for additional insts. */
1246 insts
= (tic4x_inst_t
*)
1247 xmalloc (sizeof (tic4x_inst_t
) * 1024);
1249 insts
[iindex
].name
= names
;
1250 insts
[iindex
].opcode
= opcode
;
1251 insts
[iindex
].opmask
= 0xffffffff;
1252 insts
[iindex
].args
= args
;
1260 return &insts
[iindex
- 1];
1263 /* Add instruction template, creating dynamic templates as required. */
1265 tic4x_inst_add (const tic4x_inst_t
*insts
)
1267 const char *s
= insts
->name
;
1275 /* We do not care about INSNs that is not a part of our
1277 if ((insts
->oplevel
& tic4x_oplevel
) == 0)
1286 /* Dynamically create all the conditional insts. */
1287 for (i
= 0; i
< tic4x_num_conds
; i
++)
1291 const char *c
= tic4x_conds
[i
].name
;
1301 /* If instruction found then have already processed it. */
1302 if (hash_find (tic4x_op_hash
, name
))
1307 inst
= tic4x_inst_make (name
, insts
[k
].opcode
+
1308 (tic4x_conds
[i
].cond
<<
1309 (*s
== 'B' ? 16 : 23)),
1311 if (k
== 0) /* Save strcmp() with following func. */
1312 ok
&= tic4x_inst_insert (inst
);
1315 while (!strcmp (insts
->name
,
1322 return tic4x_inst_insert (insts
);
1332 /* This function is called once, at assembler startup time. It should
1333 set up all the tables, etc., that the MD part of the assembler will
1341 /* Setup the proper opcode level according to the
1342 commandline parameters */
1343 tic4x_oplevel
= OP_C3X
;
1345 if ( IS_CPU_TIC4X(tic4x_cpu
) )
1346 tic4x_oplevel
|= OP_C4X
;
1348 if ( ( tic4x_cpu
== 31 && tic4x_revision
>= 6)
1349 || (tic4x_cpu
== 32 && tic4x_revision
>= 2)
1350 || (tic4x_cpu
== 33)
1352 tic4x_oplevel
|= OP_ENH
;
1354 if ( ( tic4x_cpu
== 30 && tic4x_revision
>= 7)
1355 || (tic4x_cpu
== 31 && tic4x_revision
>= 5)
1356 || (tic4x_cpu
== 32)
1358 tic4x_oplevel
|= OP_LPWR
;
1360 if ( ( tic4x_cpu
== 30 && tic4x_revision
>= 7)
1361 || (tic4x_cpu
== 31 && tic4x_revision
>= 5)
1362 || (tic4x_cpu
== 32)
1363 || (tic4x_cpu
== 33)
1364 || (tic4x_cpu
== 40 && tic4x_revision
>= 5)
1365 || (tic4x_cpu
== 44)
1367 tic4x_oplevel
|= OP_IDLE2
;
1369 /* Create hash table for mnemonics. */
1370 tic4x_op_hash
= hash_new ();
1372 /* Create hash table for asg pseudo. */
1373 tic4x_asg_hash
= hash_new ();
1375 /* Add mnemonics to hash table, expanding conditional mnemonics on fly. */
1376 for (i
= 0; i
< tic4x_num_insts
; i
++)
1377 ok
&= tic4x_inst_add (tic4x_insts
+ i
);
1379 /* Create dummy inst to avoid errors accessing end of table. */
1380 tic4x_inst_make ("", 0, "");
1383 as_fatal ("Broken assembler. No assembly attempted.");
1385 /* Add registers to symbol table. */
1386 tic4x_init_regtable ();
1388 /* Add predefined symbols to symbol table. */
1389 tic4x_init_symbols ();
1395 bfd_set_arch_mach (stdoutput
, bfd_arch_tic4x
,
1396 IS_CPU_TIC4X (tic4x_cpu
) ? bfd_mach_tic4x
: bfd_mach_tic3x
);
1400 tic4x_indirect_parse (tic4x_operand_t
*operand
,
1401 const tic4x_indirect_t
*indirect
)
1403 const char *n
= indirect
->name
;
1404 char *s
= input_line_pointer
;
1414 case 'a': /* Need to match aux register. */
1416 #ifdef TIC4X_ALT_SYNTAX
1420 while (ISALNUM (*s
))
1423 if (!(symbolP
= symbol_find (name
)))
1426 if (S_GET_SEGMENT (symbolP
) != reg_section
)
1429 operand
->aregno
= S_GET_VALUE (symbolP
);
1430 if (operand
->aregno
>= REG_AR0
&& operand
->aregno
<= REG_AR7
)
1433 as_bad (_("Auxiliary register AR0--AR7 required for indirect"));
1436 case 'd': /* Need to match constant for disp. */
1437 #ifdef TIC4X_ALT_SYNTAX
1438 if (*s
== '%') /* expr() will die if we don't skip this. */
1441 s
= tic4x_expression (s
, &operand
->expr
);
1442 if (operand
->expr
.X_op
!= O_constant
)
1444 operand
->disp
= operand
->expr
.X_add_number
;
1445 if (operand
->disp
< 0 || operand
->disp
> 255)
1447 as_bad (_("Bad displacement %d (require 0--255)\n"),
1453 case 'y': /* Need to match IR0. */
1454 case 'z': /* Need to match IR1. */
1455 #ifdef TIC4X_ALT_SYNTAX
1459 s
= tic4x_expression (s
, &operand
->expr
);
1460 if (operand
->expr
.X_op
!= O_register
)
1462 if (operand
->expr
.X_add_number
!= REG_IR0
1463 && operand
->expr
.X_add_number
!= REG_IR1
)
1465 as_bad (_("Index register IR0,IR1 required for displacement"));
1469 if (*n
== 'y' && operand
->expr
.X_add_number
== REG_IR0
)
1471 if (*n
== 'z' && operand
->expr
.X_add_number
== REG_IR1
)
1476 if (*s
!= '(') /* No displacement, assume to be 1. */
1487 if (TOLOWER (*s
) != *n
)
1492 if (*s
!= ' ' && *s
!= ',' && *s
!= '\0')
1494 input_line_pointer
= s
;
1499 tic4x_operand_parse (char *s
, tic4x_operand_t
*operand
)
1504 expressionS
*exp
= &operand
->expr
;
1505 char *save
= input_line_pointer
;
1508 struct hash_entry
*entry
= NULL
;
1510 input_line_pointer
= s
;
1513 c
= get_symbol_name (&str
); /* Get terminator. */
1514 new_pointer
= input_line_pointer
;
1515 if (strlen (str
) && (entry
= hash_find (tic4x_asg_hash
, str
)) != NULL
)
1517 (void) restore_line_pointer (c
);
1518 input_line_pointer
= (char *) entry
;
1522 (void) restore_line_pointer (c
);
1523 input_line_pointer
= str
;
1526 operand
->mode
= M_UNKNOWN
;
1527 switch (*input_line_pointer
)
1529 #ifdef TIC4X_ALT_SYNTAX
1531 input_line_pointer
= tic4x_expression (++input_line_pointer
, exp
);
1532 if (exp
->X_op
!= O_register
)
1533 as_bad (_("Expecting a register name"));
1534 operand
->mode
= M_REGISTER
;
1538 /* Denotes high 16 bits. */
1539 input_line_pointer
= tic4x_expression (++input_line_pointer
, exp
);
1540 if (exp
->X_op
== O_constant
)
1541 operand
->mode
= M_IMMED
;
1542 else if (exp
->X_op
== O_big
)
1544 if (exp
->X_add_number
)
1545 as_bad (_("Number too large")); /* bignum required */
1548 tic4x_gen_to_words (generic_floating_point_number
,
1549 operand
->fwords
, S_PRECISION
);
1550 operand
->mode
= M_IMMED_F
;
1553 /* Allow ori ^foo, ar0 to be equivalent to ldi .hi.foo, ar0 */
1554 /* WARNING : The TI C40 assembler cannot do this. */
1555 else if (exp
->X_op
== O_symbol
)
1557 operand
->mode
= M_HI
;
1562 input_line_pointer
= tic4x_expression (++input_line_pointer
, exp
);
1563 if (exp
->X_op
== O_constant
)
1564 operand
->mode
= M_IMMED
;
1565 else if (exp
->X_op
== O_big
)
1567 if (exp
->X_add_number
> 0)
1568 as_bad (_("Number too large")); /* bignum required. */
1571 tic4x_gen_to_words (generic_floating_point_number
,
1572 operand
->fwords
, S_PRECISION
);
1573 operand
->mode
= M_IMMED_F
;
1576 /* Allow ori foo, ar0 to be equivalent to ldi .lo.foo, ar0 */
1577 /* WARNING : The TI C40 assembler cannot do this. */
1578 else if (exp
->X_op
== O_symbol
)
1580 operand
->mode
= M_IMMED
;
1585 as_bad (_("Expecting a constant value"));
1590 input_line_pointer
= tic4x_expression (++input_line_pointer
, exp
);
1591 if (exp
->X_op
!= O_constant
&& exp
->X_op
!= O_symbol
)
1592 as_bad (_("Bad direct addressing construct %s"), s
);
1593 if (exp
->X_op
== O_constant
)
1595 if (exp
->X_add_number
< 0)
1596 as_bad (_("Direct value of %ld is not suitable"),
1597 (long) exp
->X_add_number
);
1599 operand
->mode
= M_DIRECT
;
1604 for (i
= 0; i
< tic4x_num_indirects
; i
++)
1605 if ((ret
= tic4x_indirect_parse (operand
, &tic4x_indirects
[i
])))
1609 if (i
< tic4x_num_indirects
)
1611 operand
->mode
= M_INDIRECT
;
1612 /* Indirect addressing mode number. */
1613 operand
->expr
.X_add_number
= tic4x_indirects
[i
].modn
;
1614 /* Convert *+ARn(0) to *ARn etc. Maybe we should
1615 squeal about silly ones? */
1616 if (operand
->expr
.X_add_number
< 0x08 && !operand
->disp
)
1617 operand
->expr
.X_add_number
= 0x18;
1620 as_bad (_("Unknown indirect addressing mode"));
1624 operand
->mode
= M_IMMED
; /* Assume immediate. */
1625 str
= input_line_pointer
;
1626 input_line_pointer
= tic4x_expression (input_line_pointer
, exp
);
1627 if (exp
->X_op
== O_register
)
1629 know (exp
->X_add_symbol
== 0);
1630 know (exp
->X_op_symbol
== 0);
1631 operand
->mode
= M_REGISTER
;
1634 else if (exp
->X_op
== O_big
)
1636 if (exp
->X_add_number
> 0)
1637 as_bad (_("Number too large")); /* bignum required. */
1640 tic4x_gen_to_words (generic_floating_point_number
,
1641 operand
->fwords
, S_PRECISION
);
1642 operand
->mode
= M_IMMED_F
;
1646 #ifdef TIC4X_ALT_SYNTAX
1647 /* Allow ldi foo, ar0 to be equivalent to ldi @foo, ar0. */
1648 else if (exp
->X_op
== O_symbol
)
1650 operand
->mode
= M_DIRECT
;
1656 new_pointer
= input_line_pointer
;
1657 input_line_pointer
= save
;
1662 tic4x_operands_match (tic4x_inst_t
*inst
, tic4x_insn_t
*tinsn
, int check
)
1664 const char *args
= inst
->args
;
1665 unsigned long opcode
= inst
->opcode
;
1666 int num_operands
= tinsn
->num_operands
;
1667 tic4x_operand_t
*operand
= tinsn
->operands
;
1668 expressionS
*exp
= &operand
->expr
;
1672 /* Build the opcode, checking as we go to make sure that the
1675 If an operand matches, we modify insn or opcode appropriately,
1676 and do a "continue". If an operand fails to match, we "break". */
1678 tinsn
->nchars
= 4; /* Instructions always 4 bytes. */
1679 tinsn
->reloc
= NO_RELOC
;
1684 tinsn
->opcode
= opcode
;
1685 return num_operands
== 0;
1693 case '\0': /* End of args. */
1694 if (num_operands
== 1)
1696 tinsn
->opcode
= opcode
;
1699 break; /* Too many operands. */
1701 case '#': /* This is only used for ldp. */
1702 if (operand
->mode
!= M_DIRECT
&& operand
->mode
!= M_IMMED
)
1704 /* While this looks like a direct addressing mode, we actually
1705 use an immediate mode form of ldiu or ldpk instruction. */
1706 if (exp
->X_op
== O_constant
)
1708 if( ( IS_CPU_TIC4X (tic4x_cpu
) && exp
->X_add_number
<= 65535 )
1709 || ( IS_CPU_TIC3X (tic4x_cpu
) && exp
->X_add_number
<= 255 ) )
1711 INSERTS (opcode
, exp
->X_add_number
, 15, 0);
1717 as_bad (_("Immediate value of %ld is too large for ldf"),
1718 (long) exp
->X_add_number
);
1723 else if (exp
->X_op
== O_symbol
)
1725 tinsn
->reloc
= BFD_RELOC_HI16
;
1729 break; /* Not direct (dp) addressing. */
1731 case '@': /* direct. */
1732 if (operand
->mode
!= M_DIRECT
)
1734 if (exp
->X_op
== O_constant
)
1736 /* Store only the 16 LSBs of the number. */
1737 INSERTS (opcode
, exp
->X_add_number
, 15, 0);
1740 else if (exp
->X_op
== O_symbol
)
1742 tinsn
->reloc
= BFD_RELOC_LO16
;
1746 break; /* Not direct addressing. */
1749 if (operand
->mode
!= M_REGISTER
)
1751 reg
= exp
->X_add_number
;
1752 if (reg
>= REG_AR0
&& reg
<= REG_AR7
)
1753 INSERTU (opcode
, reg
- REG_AR0
, 24, 22);
1757 as_bad (_("Destination register must be ARn"));
1762 case 'B': /* Unsigned integer immediate. */
1763 /* Allow br label or br @label. */
1764 if (operand
->mode
!= M_IMMED
&& operand
->mode
!= M_DIRECT
)
1766 if (exp
->X_op
== O_constant
)
1768 if (exp
->X_add_number
< (1 << 24))
1770 INSERTU (opcode
, exp
->X_add_number
, 23, 0);
1776 as_bad (_("Immediate value of %ld is too large"),
1777 (long) exp
->X_add_number
);
1782 if (IS_CPU_TIC4X (tic4x_cpu
))
1784 tinsn
->reloc
= BFD_RELOC_24_PCREL
;
1789 tinsn
->reloc
= BFD_RELOC_24
;
1796 if (!IS_CPU_TIC4X (tic4x_cpu
))
1798 if (operand
->mode
!= M_INDIRECT
)
1800 /* Require either *+ARn(disp) or *ARn. */
1801 if (operand
->expr
.X_add_number
!= 0
1802 && operand
->expr
.X_add_number
!= 0x18)
1805 as_bad (_("Invalid indirect addressing mode"));
1809 INSERTU (opcode
, operand
->aregno
- REG_AR0
, 2, 0);
1810 INSERTU (opcode
, operand
->disp
, 7, 3);
1814 if (!(operand
->mode
== M_REGISTER
))
1816 INSERTU (opcode
, exp
->X_add_number
, 7, 0);
1820 if (!(operand
->mode
== M_REGISTER
))
1822 reg
= exp
->X_add_number
;
1823 if ( (reg
>= REG_R0
&& reg
<= REG_R7
)
1824 || (IS_CPU_TIC4X (tic4x_cpu
) && reg
>= REG_R8
&& reg
<= REG_R11
) )
1825 INSERTU (opcode
, reg
, 7, 0);
1829 as_bad (_("Register must be Rn"));
1835 if (operand
->mode
!= M_IMMED_F
1836 && !(operand
->mode
== M_IMMED
&& exp
->X_op
== O_constant
))
1839 if (operand
->mode
!= M_IMMED_F
)
1841 /* OK, we 've got something like cmpf 0, r0
1842 Why can't they stick in a bloody decimal point ?! */
1845 /* Create floating point number string. */
1846 sprintf (string
, "%d.0", (int) exp
->X_add_number
);
1847 tic4x_atof (string
, 's', operand
->fwords
);
1850 INSERTU (opcode
, operand
->fwords
[0], 15, 0);
1854 if (operand
->mode
!= M_REGISTER
)
1856 INSERTU (opcode
, exp
->X_add_number
, 15, 8);
1860 if (operand
->mode
!= M_REGISTER
)
1862 reg
= exp
->X_add_number
;
1863 if ( (reg
>= REG_R0
&& reg
<= REG_R7
)
1864 || (IS_CPU_TIC4X (tic4x_cpu
) && reg
>= REG_R8
&& reg
<= REG_R11
) )
1865 INSERTU (opcode
, reg
, 15, 8);
1869 as_bad (_("Register must be Rn"));
1875 if (operand
->mode
!= M_REGISTER
)
1877 reg
= exp
->X_add_number
;
1878 if (reg
>= REG_R0
&& reg
<= REG_R7
)
1879 INSERTU (opcode
, reg
- REG_R0
, 18, 16);
1883 as_bad (_("Register must be R0--R7"));
1889 if ( operand
->mode
== M_REGISTER
1890 && tic4x_oplevel
& OP_ENH
)
1892 reg
= exp
->X_add_number
;
1893 INSERTU (opcode
, reg
, 4, 0);
1894 INSERTU (opcode
, 7, 7, 5);
1900 if (operand
->mode
!= M_INDIRECT
)
1902 if (operand
->disp
!= 0 && operand
->disp
!= 1)
1904 if (IS_CPU_TIC4X (tic4x_cpu
))
1907 as_bad (_("Invalid indirect addressing mode displacement %d"),
1912 INSERTU (opcode
, operand
->aregno
- REG_AR0
, 2, 0);
1913 INSERTU (opcode
, operand
->expr
.X_add_number
, 7, 3);
1917 if ( operand
->mode
== M_REGISTER
1918 && tic4x_oplevel
& OP_ENH
)
1920 reg
= exp
->X_add_number
;
1921 INSERTU (opcode
, reg
, 12, 8);
1922 INSERTU (opcode
, 7, 15, 13);
1928 if (operand
->mode
!= M_INDIRECT
)
1930 if (operand
->disp
!= 0 && operand
->disp
!= 1)
1932 if (IS_CPU_TIC4X (tic4x_cpu
))
1935 as_bad (_("Invalid indirect addressing mode displacement %d"),
1940 INSERTU (opcode
, operand
->aregno
- REG_AR0
, 10, 8);
1941 INSERTU (opcode
, operand
->expr
.X_add_number
, 15, 11);
1945 if (operand
->mode
!= M_REGISTER
)
1947 reg
= exp
->X_add_number
;
1948 if (reg
>= REG_R0
&& reg
<= REG_R7
)
1949 INSERTU (opcode
, reg
- REG_R0
, 21, 19);
1953 as_bad (_("Register must be R0--R7"));
1959 if (operand
->mode
!= M_REGISTER
)
1961 reg
= exp
->X_add_number
;
1962 if (reg
>= REG_R0
&& reg
<= REG_R7
)
1963 INSERTU (opcode
, reg
- REG_R0
, 24, 22);
1967 as_bad (_("Register must be R0--R7"));
1973 if (operand
->mode
!= M_REGISTER
)
1975 reg
= exp
->X_add_number
;
1976 if (reg
== REG_R2
|| reg
== REG_R3
)
1977 INSERTU (opcode
, reg
- REG_R2
, 22, 22);
1981 as_bad (_("Destination register must be R2 or R3"));
1987 if (operand
->mode
!= M_REGISTER
)
1989 reg
= exp
->X_add_number
;
1990 if (reg
== REG_R0
|| reg
== REG_R1
)
1991 INSERTU (opcode
, reg
- REG_R0
, 23, 23);
1995 as_bad (_("Destination register must be R0 or R1"));
2001 if (!IS_CPU_TIC4X (tic4x_cpu
))
2003 if (operand
->mode
!= M_INDIRECT
)
2005 /* Require either *+ARn(disp) or *ARn. */
2006 if (operand
->expr
.X_add_number
!= 0
2007 && operand
->expr
.X_add_number
!= 0x18)
2010 as_bad (_("Invalid indirect addressing mode"));
2014 INSERTU (opcode
, operand
->aregno
- REG_AR0
, 10, 8);
2015 INSERTU (opcode
, operand
->disp
, 15, 11);
2018 case 'P': /* PC relative displacement. */
2019 /* Allow br label or br @label. */
2020 if (operand
->mode
!= M_IMMED
&& operand
->mode
!= M_DIRECT
)
2022 if (exp
->X_op
== O_constant
)
2024 if (exp
->X_add_number
>= -32768 && exp
->X_add_number
<= 32767)
2026 INSERTS (opcode
, exp
->X_add_number
, 15, 0);
2032 as_bad (_("Displacement value of %ld is too large"),
2033 (long) exp
->X_add_number
);
2038 tinsn
->reloc
= BFD_RELOC_16_PCREL
;
2044 if (operand
->mode
!= M_REGISTER
)
2046 reg
= exp
->X_add_number
;
2047 INSERTU (opcode
, reg
, 15, 0);
2051 if (operand
->mode
!= M_REGISTER
)
2053 reg
= exp
->X_add_number
;
2054 if ( (reg
>= REG_R0
&& reg
<= REG_R7
)
2055 || (IS_CPU_TIC4X (tic4x_cpu
) && reg
>= REG_R8
&& reg
<= REG_R11
) )
2056 INSERTU (opcode
, reg
, 15, 0);
2060 as_bad (_("Register must be Rn"));
2066 if (operand
->mode
!= M_REGISTER
)
2068 reg
= exp
->X_add_number
;
2069 INSERTU (opcode
, reg
, 20, 16);
2073 if (operand
->mode
!= M_REGISTER
)
2075 reg
= exp
->X_add_number
;
2076 if ( (reg
>= REG_R0
&& reg
<= REG_R7
)
2077 || (IS_CPU_TIC4X (tic4x_cpu
) && reg
>= REG_R8
&& reg
<= REG_R11
) )
2078 INSERTU (opcode
, reg
, 20, 16);
2082 as_bad (_("Register must be Rn"));
2087 case 'S': /* Short immediate int. */
2088 if (operand
->mode
!= M_IMMED
&& operand
->mode
!= M_HI
)
2090 if (exp
->X_op
== O_big
)
2093 as_bad (_("Floating point number not valid in expression"));
2097 if (exp
->X_op
== O_constant
)
2099 if (exp
->X_add_number
>= -32768 && exp
->X_add_number
<= 65535)
2101 INSERTS (opcode
, exp
->X_add_number
, 15, 0);
2107 as_bad (_("Signed immediate value %ld too large"),
2108 (long) exp
->X_add_number
);
2113 else if (exp
->X_op
== O_symbol
)
2115 if (operand
->mode
== M_HI
)
2117 tinsn
->reloc
= BFD_RELOC_HI16
;
2121 tinsn
->reloc
= BFD_RELOC_LO16
;
2126 /* Handle cases like ldi foo - $, ar0 where foo
2127 is a forward reference. Perhaps we should check
2128 for X_op == O_symbol and disallow things like
2130 tinsn
->reloc
= BFD_RELOC_16
;
2134 case 'T': /* 5-bit immediate value for tic4x stik. */
2135 if (!IS_CPU_TIC4X (tic4x_cpu
))
2137 if (operand
->mode
!= M_IMMED
)
2139 if (exp
->X_op
== O_constant
)
2141 if (exp
->X_add_number
< 16 && exp
->X_add_number
>= -16)
2143 INSERTS (opcode
, exp
->X_add_number
, 20, 16);
2149 as_bad (_("Immediate value of %ld is too large"),
2150 (long) exp
->X_add_number
);
2155 break; /* No relocations allowed. */
2157 case 'U': /* Unsigned integer immediate. */
2158 if (operand
->mode
!= M_IMMED
&& operand
->mode
!= M_HI
)
2160 if (exp
->X_op
== O_constant
)
2162 if (exp
->X_add_number
< (1 << 16) && exp
->X_add_number
>= 0)
2164 INSERTU (opcode
, exp
->X_add_number
, 15, 0);
2170 as_bad (_("Unsigned immediate value %ld too large"),
2171 (long) exp
->X_add_number
);
2176 else if (exp
->X_op
== O_symbol
)
2178 if (operand
->mode
== M_HI
)
2179 tinsn
->reloc
= BFD_RELOC_HI16
;
2181 tinsn
->reloc
= BFD_RELOC_LO16
;
2186 tinsn
->reloc
= BFD_RELOC_16
;
2190 case 'V': /* Trap numbers (immediate field). */
2191 if (operand
->mode
!= M_IMMED
)
2193 if (exp
->X_op
== O_constant
)
2195 if (exp
->X_add_number
< 512 && IS_CPU_TIC4X (tic4x_cpu
))
2197 INSERTU (opcode
, exp
->X_add_number
, 8, 0);
2200 else if (exp
->X_add_number
< 32 && IS_CPU_TIC3X (tic4x_cpu
))
2202 INSERTU (opcode
, exp
->X_add_number
| 0x20, 4, 0);
2208 as_bad (_("Immediate value of %ld is too large"),
2209 (long) exp
->X_add_number
);
2214 break; /* No relocations allowed. */
2216 case 'W': /* Short immediate int (0--7). */
2217 if (!IS_CPU_TIC4X (tic4x_cpu
))
2219 if (operand
->mode
!= M_IMMED
)
2221 if (exp
->X_op
== O_big
)
2224 as_bad (_("Floating point number not valid in expression"));
2228 if (exp
->X_op
== O_constant
)
2230 if (exp
->X_add_number
>= -256 && exp
->X_add_number
<= 127)
2232 INSERTS (opcode
, exp
->X_add_number
, 7, 0);
2238 as_bad (_("Immediate value %ld too large"),
2239 (long) exp
->X_add_number
);
2244 tinsn
->reloc
= BFD_RELOC_16
;
2248 case 'X': /* Expansion register for tic4x. */
2249 if (operand
->mode
!= M_REGISTER
)
2251 reg
= exp
->X_add_number
;
2252 if (reg
>= REG_IVTP
&& reg
<= REG_TVTP
)
2253 INSERTU (opcode
, reg
- REG_IVTP
, 4, 0);
2257 as_bad (_("Register must be ivtp or tvtp"));
2262 case 'Y': /* Address register for tic4x lda. */
2263 if (operand
->mode
!= M_REGISTER
)
2265 reg
= exp
->X_add_number
;
2266 if (reg
>= REG_AR0
&& reg
<= REG_SP
)
2267 INSERTU (opcode
, reg
, 20, 16);
2271 as_bad (_("Register must be address register"));
2276 case 'Z': /* Expansion register for tic4x. */
2277 if (operand
->mode
!= M_REGISTER
)
2279 reg
= exp
->X_add_number
;
2280 if (reg
>= REG_IVTP
&& reg
<= REG_TVTP
)
2281 INSERTU (opcode
, reg
- REG_IVTP
, 20, 16);
2285 as_bad (_("Register must be ivtp or tvtp"));
2291 if (operand
->mode
!= M_INDIRECT
)
2293 INSERTS (opcode
, operand
->disp
, 7, 0);
2294 INSERTU (opcode
, operand
->aregno
- REG_AR0
, 10, 8);
2295 INSERTU (opcode
, operand
->expr
.X_add_number
, 15, 11);
2298 case '|': /* treat as `,' if have ldi_ldi form. */
2299 if (tinsn
->parallel
)
2301 if (--num_operands
< 0)
2302 break; /* Too few operands. */
2304 if (operand
->mode
!= M_PARALLEL
)
2309 case ',': /* Another operand. */
2310 if (--num_operands
< 0)
2311 break; /* Too few operands. */
2313 exp
= &operand
->expr
;
2316 case ';': /* Another optional operand. */
2317 if (num_operands
== 1 || operand
[1].mode
== M_PARALLEL
)
2319 if (--num_operands
< 0)
2320 break; /* Too few operands. */
2322 exp
= &operand
->expr
;
2333 tic4x_insn_check (tic4x_insn_t
*tinsn
)
2336 if (!strcmp (tinsn
->name
, "lda"))
2338 if (tinsn
->num_operands
< 2 || tinsn
->num_operands
> 2)
2339 as_fatal ("Illegal internal LDA insn definition");
2341 if (tinsn
->operands
[0].mode
== M_REGISTER
2342 && tinsn
->operands
[1].mode
== M_REGISTER
2343 && tinsn
->operands
[0].expr
.X_add_number
== tinsn
->operands
[1].expr
.X_add_number
)
2344 as_bad (_("Source and destination register should not be equal"));
2346 else if (!strcmp (tinsn
->name
, "ldi_ldi")
2347 || !strcmp (tinsn
->name
, "ldi1_ldi2")
2348 || !strcmp (tinsn
->name
, "ldi2_ldi1")
2349 || !strcmp (tinsn
->name
, "ldf_ldf")
2350 || !strcmp (tinsn
->name
, "ldf1_ldf2")
2351 || !strcmp (tinsn
->name
, "ldf2_ldf1") )
2353 if (tinsn
->num_operands
< 4 || tinsn
->num_operands
> 5)
2354 as_fatal ("Illegal internal %s insn definition", tinsn
->name
);
2356 if (tinsn
->operands
[1].mode
== M_REGISTER
2357 && tinsn
->operands
[tinsn
->num_operands
-1].mode
== M_REGISTER
2358 && tinsn
->operands
[1].expr
.X_add_number
== tinsn
->operands
[tinsn
->num_operands
-1].expr
.X_add_number
)
2359 as_warn (_("Equal parallell destination registers, one result will be discarded"));
2364 tic4x_insn_output (tic4x_insn_t
*tinsn
)
2368 /* Grab another fragment for opcode. */
2369 dst
= frag_more (tinsn
->nchars
);
2371 /* Put out opcode word as a series of bytes in little endian order. */
2372 md_number_to_chars (dst
, tinsn
->opcode
, tinsn
->nchars
);
2374 /* Put out the symbol-dependent stuff. */
2375 if (tinsn
->reloc
!= NO_RELOC
)
2377 /* Where is the offset into the fragment for this instruction. */
2378 fix_new_exp (frag_now
,
2379 dst
- frag_now
->fr_literal
, /* where */
2380 tinsn
->nchars
, /* size */
2387 /* Parse the operands. */
2389 tic4x_operands_parse (char *s
, tic4x_operand_t
*operands
, int num_operands
)
2392 return num_operands
;
2395 s
= tic4x_operand_parse (s
, &operands
[num_operands
++]);
2396 while (num_operands
< TIC4X_OPERANDS_MAX
&& *s
++ == ',');
2398 if (num_operands
> TIC4X_OPERANDS_MAX
)
2400 as_bad (_("Too many operands scanned"));
2403 return num_operands
;
2406 /* Assemble a single instruction. Its label has already been handled
2407 by the generic front end. We just parse mnemonic and operands, and
2408 produce the bytes of data and relocation. */
2410 md_assemble (char *str
)
2417 tic4x_inst_t
*inst
; /* Instruction template. */
2418 tic4x_inst_t
*first_inst
;
2420 /* Scan for parallel operators */
2424 while (*s
&& *s
!= '|')
2427 if (*s
&& s
[1]=='|')
2431 as_bad (_("Parallel opcode cannot contain more than two instructions"));
2437 /* Lets take care of the first part of the parallel insn */
2442 /* .. and let the second run though here */
2446 if (str
&& insn
->parallel
)
2448 /* Find mnemonic (second part of parallel instruction). */
2450 /* Skip past instruction mnemonic. */
2451 while (*s
&& *s
!= ' ')
2453 if (*s
) /* Null terminate for hash_find. */
2454 *s
++ = '\0'; /* and skip past null. */
2455 len
= strlen (insn
->name
);
2456 snprintf (insn
->name
+ len
, TIC4X_NAME_MAX
- len
, "_%s", str
);
2458 insn
->operands
[insn
->num_operands
++].mode
= M_PARALLEL
;
2460 if ((i
= tic4x_operands_parse
2461 (s
, insn
->operands
, insn
->num_operands
)) < 0)
2467 insn
->num_operands
= i
;
2473 if ((insn
->inst
= (struct tic4x_inst
*)
2474 hash_find (tic4x_op_hash
, insn
->name
)) == NULL
)
2476 as_bad (_("Unknown opcode `%s'."), insn
->name
);
2486 ok
= tic4x_operands_match (inst
, insn
, 1);
2493 } while (!ok
&& !strcmp (inst
->name
, inst
[1].name
) && inst
++);
2497 tic4x_insn_check (insn
);
2498 tic4x_insn_output (insn
);
2503 tic4x_operands_match (first_inst
, insn
, 0);
2504 as_bad (_("Invalid operands for %s"), insn
->name
);
2507 as_bad (_("Invalid instruction %s"), insn
->name
);
2512 /* Find mnemonic. */
2514 while (*s
&& *s
!= ' ') /* Skip past instruction mnemonic. */
2516 if (*s
) /* Null terminate for hash_find. */
2517 *s
++ = '\0'; /* and skip past null. */
2518 strncpy (insn
->name
, str
, TIC4X_NAME_MAX
- 1);
2519 insn
->name
[TIC4X_NAME_MAX
- 1] = '\0';
2521 if ((i
= tic4x_operands_parse (s
, insn
->operands
, 0)) < 0)
2523 insn
->inst
= NULL
; /* Flag that error occurred. */
2528 insn
->num_operands
= i
;
2537 tic4x_cleanup (void)
2543 /* Turn a string in input_line_pointer into a floating point constant
2544 of type type, and store the appropriate bytes in *litP. The number
2545 of chars emitted is stored in *sizeP. An error message is
2546 returned, or NULL on OK. */
2549 md_atof (int type
, char *litP
, int *sizeP
)
2553 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
2554 LITTLENUM_TYPE
*wordP
;
2559 case 's': /* .single */
2565 case 'd': /* .double */
2567 case 'f': /* .float */
2570 prec
= 2; /* 1 32-bit word */
2573 case 'i': /* .ieee */
2577 type
= 'f'; /* Rewrite type to be usable by atof_ieee(). */
2580 case 'e': /* .ldouble */
2582 prec
= 4; /* 2 32-bit words */
2588 return _("Unrecognized or unsupported floating point constant");
2592 t
= atof_ieee (input_line_pointer
, type
, words
);
2594 t
= tic4x_atof (input_line_pointer
, type
, words
);
2596 input_line_pointer
= t
;
2597 *sizeP
= prec
* sizeof (LITTLENUM_TYPE
);
2599 /* This loops outputs the LITTLENUMs in REVERSE order; in accord with
2600 little endian byte order. */
2601 /* SES: However it is required to put the words (32-bits) out in the
2602 correct order, hence we write 2 and 2 littlenums in little endian
2603 order, while we keep the original order on successive words. */
2604 for (wordP
= words
; wordP
<(words
+prec
) ; wordP
+=2)
2606 if (wordP
< (words
+ prec
- 1)) /* Dump wordP[1] (if we have one). */
2608 md_number_to_chars (litP
, (valueT
) (wordP
[1]),
2609 sizeof (LITTLENUM_TYPE
));
2610 litP
+= sizeof (LITTLENUM_TYPE
);
2614 md_number_to_chars (litP
, (valueT
) (wordP
[0]),
2615 sizeof (LITTLENUM_TYPE
));
2616 litP
+= sizeof (LITTLENUM_TYPE
);
2622 md_apply_fix (fixS
*fixP
, valueT
*value
, segT seg ATTRIBUTE_UNUSED
)
2624 char *buf
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
2625 valueT val
= *value
;
2627 switch (fixP
->fx_r_type
)
2629 case BFD_RELOC_HI16
:
2633 case BFD_RELOC_LO16
:
2640 switch (fixP
->fx_r_type
)
2645 case BFD_RELOC_24_PCREL
:
2648 case BFD_RELOC_16_PCREL
:
2649 case BFD_RELOC_LO16
:
2650 case BFD_RELOC_HI16
:
2657 as_bad (_("Bad relocation type: 0x%02x"), fixP
->fx_r_type
);
2661 if (fixP
->fx_addsy
== NULL
&& fixP
->fx_pcrel
== 0) fixP
->fx_done
= 1;
2664 /* Should never be called for tic4x. */
2666 md_convert_frag (bfd
*headers ATTRIBUTE_UNUSED
,
2667 segT sec ATTRIBUTE_UNUSED
,
2668 fragS
*fragP ATTRIBUTE_UNUSED
)
2670 as_fatal ("md_convert_frag");
2673 /* Should never be called for tic4x. */
2675 md_create_short_jump (char *ptr ATTRIBUTE_UNUSED
,
2676 addressT from_addr ATTRIBUTE_UNUSED
,
2677 addressT to_addr ATTRIBUTE_UNUSED
,
2678 fragS
*frag ATTRIBUTE_UNUSED
,
2679 symbolS
*to_symbol ATTRIBUTE_UNUSED
)
2681 as_fatal ("md_create_short_jmp\n");
2684 /* Should never be called for tic4x. */
2686 md_create_long_jump (char *ptr ATTRIBUTE_UNUSED
,
2687 addressT from_addr ATTRIBUTE_UNUSED
,
2688 addressT to_addr ATTRIBUTE_UNUSED
,
2689 fragS
*frag ATTRIBUTE_UNUSED
,
2690 symbolS
*to_symbol ATTRIBUTE_UNUSED
)
2692 as_fatal ("md_create_long_jump\n");
2695 /* Should never be called for tic4x. */
2697 md_estimate_size_before_relax (fragS
*fragP ATTRIBUTE_UNUSED
,
2698 segT segtype ATTRIBUTE_UNUSED
)
2700 as_fatal ("md_estimate_size_before_relax\n");
2706 md_parse_option (int c
, const char *arg
)
2710 case OPTION_CPU
: /* cpu brand */
2711 if (TOLOWER (*arg
) == 'c')
2713 tic4x_cpu
= atoi (arg
);
2714 if (!IS_CPU_TIC3X (tic4x_cpu
) && !IS_CPU_TIC4X (tic4x_cpu
))
2715 as_warn (_("Unsupported processor generation %d"), tic4x_cpu
);
2718 case OPTION_REV
: /* cpu revision */
2719 tic4x_revision
= atoi (arg
);
2723 as_warn (_("Option -b is depreciated, please use -mbig"));
2724 case OPTION_BIG
: /* big model */
2725 tic4x_big_model
= 1;
2729 as_warn (_("Option -p is depreciated, please use -mmemparm"));
2730 case OPTION_MEMPARM
: /* push args */
2735 as_warn (_("Option -r is depreciated, please use -mregparm"));
2736 case OPTION_REGPARM
: /* register args */
2741 as_warn (_("Option -s is depreciated, please use -msmall"));
2742 case OPTION_SMALL
: /* small model */
2743 tic4x_big_model
= 0;
2750 case OPTION_LOWPOWER
:
2754 case OPTION_ENHANCED
:
2766 md_show_usage (FILE *stream
)
2769 _("\nTIC4X options:\n"
2770 " -mcpu=CPU -mCPU select architecture variant. CPU can be:\n"
2772 " 31 - TMS320C31, TMS320LC31\n"
2774 " 33 - TMS320VC33\n"
2777 " -mrev=REV set cpu hardware revision (integer numbers).\n"
2778 " Combinations of -mcpu and -mrev will enable/disable\n"
2779 " the appropriate options (-midle2, -mlowpower and\n"
2780 " -menhanced) according to the selected type\n"
2781 " -mbig select big memory model\n"
2782 " -msmall select small memory model (default)\n"
2783 " -mregparm select register parameters (default)\n"
2784 " -mmemparm select memory parameters\n"
2785 " -midle2 enable IDLE2 support\n"
2786 " -mlowpower enable LOPOWER and MAXSPEED support\n"
2787 " -menhanced enable enhanced opcode support\n"));
2790 /* This is called when a line is unrecognized. This is used to handle
2791 definitions of TI C3x tools style local labels $n where n is a single
2794 tic4x_unrecognized_line (int c
)
2799 if (c
!= '$' || ! ISDIGIT (input_line_pointer
[0]))
2802 s
= input_line_pointer
;
2804 /* Let's allow multiple digit local labels. */
2806 while (ISDIGIT (*s
))
2808 lab
= lab
* 10 + *s
- '0';
2812 if (dollar_label_defined (lab
))
2814 as_bad (_("Label \"$%d\" redefined"), lab
);
2818 define_dollar_label (lab
);
2819 colon (dollar_label_name (lab
, 0));
2820 input_line_pointer
= s
+ 1;
2825 /* Handle local labels peculiar to us referred to in an expression. */
2827 md_undefined_symbol (char *name
)
2829 /* Look for local labels of the form $n. */
2830 if (name
[0] == '$' && ISDIGIT (name
[1]))
2836 while (ISDIGIT ((unsigned char) *s
))
2838 lab
= lab
* 10 + *s
- '0';
2841 if (dollar_label_defined (lab
))
2843 name
= dollar_label_name (lab
, 0);
2844 symbolP
= symbol_find (name
);
2848 name
= dollar_label_name (lab
, 1);
2849 symbolP
= symbol_find_or_make (name
);
2857 /* Parse an operand that is machine-specific. */
2859 md_operand (expressionS
*expressionP ATTRIBUTE_UNUSED
)
2863 /* Round up a section size to the appropriate boundary---do we need this? */
2865 md_section_align (segT segment ATTRIBUTE_UNUSED
, valueT size
)
2867 return size
; /* Byte (i.e., 32-bit) alignment is fine? */
2871 tic4x_pc_offset (unsigned int op
)
2873 /* Determine the PC offset for a C[34]x instruction.
2874 This could be simplified using some boolean algebra
2875 but at the expense of readability. */
2879 case 0x62: /* call (C4x) */
2880 case 0x64: /* rptb (C4x) */
2882 case 0x61: /* brd */
2883 case 0x63: /* laj */
2884 case 0x65: /* rptbd (C4x) */
2886 case 0x66: /* swi */
2893 switch ((op
& 0xffe00000) >> 20)
2895 case 0x6a0: /* bB */
2896 case 0x720: /* callB */
2897 case 0x740: /* trapB */
2900 case 0x6a2: /* bBd */
2901 case 0x6a6: /* bBat */
2902 case 0x6aa: /* bBaf */
2903 case 0x722: /* lajB */
2904 case 0x748: /* latB */
2905 case 0x798: /* rptbd */
2912 switch ((op
& 0xfe200000) >> 20)
2914 case 0x6e0: /* dbB */
2917 case 0x6e2: /* dbBd */
2927 /* Exactly what point is a PC-relative offset relative TO?
2928 With the C3x we have the following:
2929 DBcond, Bcond disp + PC + 1 => PC
2930 DBcondD, BcondD disp + PC + 3 => PC
2933 md_pcrel_from (fixS
*fixP
)
2938 buf
= (unsigned char *) fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
;
2939 op
= (buf
[3] << 24) | (buf
[2] << 16) | (buf
[1] << 8) | buf
[0];
2941 return ((fixP
->fx_where
+ fixP
->fx_frag
->fr_address
) >> 2) +
2942 tic4x_pc_offset (op
);
2945 /* Fill the alignment area with NOP's on .text, unless fill-data
2948 tic4x_do_align (int alignment
,
2953 /* Because we are talking lwords, not bytes, adjust alignment to do words */
2956 if (alignment
!= 0 && !need_pass_2
)
2960 if (subseg_text_p (now_seg
))
2964 md_number_to_chars (nop
, TIC_NOP_OPCODE
, 4);
2965 frag_align_pattern (alignment
, nop
, sizeof (nop
), max
);
2968 frag_align (alignment
, 0, max
);
2971 frag_align (alignment
, *fill
, max
);
2973 frag_align_pattern (alignment
, fill
, len
, max
);
2976 /* Return 1 to skip the default alignment function */
2980 /* Look for and remove parallel instruction operator ||. */
2982 tic4x_start_line (void)
2984 char *s
= input_line_pointer
;
2988 /* If parallel instruction prefix found at start of line, skip it. */
2989 if (*input_line_pointer
== '|' && input_line_pointer
[1] == '|')
2994 input_line_pointer
++;
2995 *input_line_pointer
= ' ';
2996 /* So line counters get bumped. */
2997 input_line_pointer
[-1] = '\n';
3002 /* Write out the previous insn here */
3005 input_line_pointer
= s
;
3010 tc_gen_reloc (asection
*seg ATTRIBUTE_UNUSED
, fixS
*fixP
)
3014 reloc
= (arelent
*) xmalloc (sizeof (arelent
));
3016 reloc
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
3017 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixP
->fx_addsy
);
3018 reloc
->address
= fixP
->fx_frag
->fr_address
+ fixP
->fx_where
;
3019 reloc
->address
/= OCTETS_PER_BYTE
;
3020 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixP
->fx_r_type
);
3021 if (reloc
->howto
== (reloc_howto_type
*) NULL
)
3023 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3024 _("Reloc %d not supported by object file format"),
3025 (int) fixP
->fx_r_type
);
3029 if (fixP
->fx_r_type
== BFD_RELOC_HI16
)
3030 reloc
->addend
= fixP
->fx_offset
;
3032 reloc
->addend
= fixP
->fx_addnumber
;