bfd:
[deliverable/binutils-gdb.git] / gas / config / tc-tic6x.c
1 /* TI C6X assembler.
2 Copyright 2010
3 Free Software Foundation, Inc.
4
5 This file is part of GAS, the GNU Assembler.
6
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
10 any later version.
11
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
20 02110-1301, USA. */
21
22 #include "as.h"
23 #include "dwarf2dbg.h"
24 #include "safe-ctype.h"
25 #include "subsegs.h"
26 #include "opcode/tic6x.h"
27
28 /* Truncate and sign-extend at 32 bits, so that building on a 64-bit
29 host gives identical results to a 32-bit host. */
30 #define TRUNC(X) ((valueT) (X) & 0xffffffffU)
31 #define SEXT(X) ((TRUNC (X) ^ 0x80000000U) - 0x80000000U)
32
33 const char comment_chars[] = ";";
34 const char line_comment_chars[] = "#*;";
35 const char line_separator_chars[] = "@";
36
37 const char EXP_CHARS[] = "eE";
38 const char FLT_CHARS[] = "dDfF";
39
40 const char *md_shortopts = "";
41
42 enum
43 {
44 OPTION_MARCH = OPTION_MD_BASE,
45 OPTION_MATOMIC,
46 OPTION_MNO_ATOMIC,
47 OPTION_MBIG_ENDIAN,
48 OPTION_MLITTLE_ENDIAN
49 };
50
51 struct option md_longopts[] =
52 {
53 { "march", required_argument, NULL, OPTION_MARCH },
54 { "matomic", no_argument, NULL, OPTION_MATOMIC },
55 { "mno-atomic", no_argument, NULL, OPTION_MNO_ATOMIC },
56 { "mbig-endian", no_argument, NULL, OPTION_MBIG_ENDIAN },
57 { "mlittle-endian", no_argument, NULL, OPTION_MLITTLE_ENDIAN },
58 { NULL, no_argument, NULL, 0 }
59 };
60 size_t md_longopts_size = sizeof (md_longopts);
61
62 /* Whether to enable atomic instructions. 1 to enable them, 0 to
63 disable, -1 to default from architecture. */
64 static int tic6x_atomic = -1;
65
66 /* The instructions enabled based only on the selected architecture
67 (all instructions, if no architecture specified). Atomic
68 instructions may be enabled or disabled separately. */
69 static unsigned short tic6x_arch_enable = (TIC6X_INSN_C62X
70 | TIC6X_INSN_C64X
71 | TIC6X_INSN_C64XP
72 | TIC6X_INSN_C67X
73 | TIC6X_INSN_C67XP
74 | TIC6X_INSN_C674X
75 | TIC6X_INSN_ATOMIC);
76
77 /* The instructions enabled based on the current set of features
78 (architecture, as modified by other options). */
79 static unsigned short tic6x_features;
80
81 /* The number of registers in each register file supported by the
82 current architecture. */
83 static unsigned int tic6x_num_registers;
84
85 /* Whether predication on A0 is possible. */
86 static bfd_boolean tic6x_predicate_a0;
87
88 /* Whether execute packets can cross fetch packet boundaries. */
89 static bfd_boolean tic6x_can_cross_fp_boundary;
90
91 /* Whether there are constraints on simultaneous reads and writes of
92 40-bit data. */
93 static bfd_boolean tic6x_long_data_constraints;
94
95 /* Whether compact instructions are available. */
96 static bfd_boolean tic6x_compact_insns;
97
98 /* Table of supported architecture variants. */
99 typedef struct
100 {
101 const char *arch;
102 unsigned short features;
103 } tic6x_arch_table;
104 static const tic6x_arch_table tic6x_arches[] =
105 {
106 { "c62x", TIC6X_INSN_C62X },
107 { "c64x", TIC6X_INSN_C62X | TIC6X_INSN_C64X },
108 { "c64x+", TIC6X_INSN_C62X | TIC6X_INSN_C64X | TIC6X_INSN_C64XP },
109 { "c67x", TIC6X_INSN_C62X | TIC6X_INSN_C67X },
110 { "c67x+", TIC6X_INSN_C62X | TIC6X_INSN_C67X | TIC6X_INSN_C67XP },
111 { "c674x", (TIC6X_INSN_C62X
112 | TIC6X_INSN_C64X
113 | TIC6X_INSN_C64XP
114 | TIC6X_INSN_C67X
115 | TIC6X_INSN_C67XP
116 | TIC6X_INSN_C674X) }
117 };
118
119 /* Update the selected architecture based on ARCH, giving an error if
120 ARCH is an invalid value. Does not call tic6x_update_features; the
121 caller must do that if necessary. */
122
123 static void
124 tic6x_use_arch (const char *arch)
125 {
126 unsigned int i;
127
128 for (i = 0; i < ARRAY_SIZE (tic6x_arches); i++)
129 if (strcmp (arch, tic6x_arches[i].arch) == 0)
130 {
131 tic6x_arch_enable = tic6x_arches[i].features;
132 return;
133 }
134
135 as_bad (_("unknown architecture '%s'"), arch);
136 }
137
138 /* Parse a target-specific option. */
139
140 int
141 md_parse_option (int c, char *arg)
142 {
143 switch (c)
144 {
145 case OPTION_MARCH:
146 tic6x_use_arch (arg);
147 break;
148
149 case OPTION_MATOMIC:
150 tic6x_atomic = 1;
151 break;
152
153 case OPTION_MNO_ATOMIC:
154 tic6x_atomic = 0;
155 break;
156
157 case OPTION_MBIG_ENDIAN:
158 target_big_endian = 1;
159 break;
160
161 case OPTION_MLITTLE_ENDIAN:
162 target_big_endian = 0;
163 break;
164
165 default:
166 return 0;
167 }
168 return 1;
169 }
170
171 void
172 md_show_usage (FILE *stream ATTRIBUTE_UNUSED)
173 {
174 unsigned int i;
175
176 fputc ('\n', stream);
177 fprintf (stream, _("TMS320C6000 options:\n"));
178 fprintf (stream, _(" -march=ARCH enable instructions from architecture ARCH\n"));
179 fprintf (stream, _(" -matomic enable atomic operation instructions\n"));
180 fprintf (stream, _(" -mno-atomic disable atomic operation instructions\n"));
181 fprintf (stream, _(" -mbig-endian generate big-endian code\n"));
182 fprintf (stream, _(" -mlittle-endian generate little-endian code\n"));
183
184 fputc ('\n', stream);
185 fprintf (stream, _("Supported ARCH values are:"));
186 for (i = 0; i < ARRAY_SIZE (tic6x_arches); i++)
187 fprintf (stream, " %s", tic6x_arches[i].arch);
188 fputc ('\n', stream);
189 }
190
191 /* Update enabled features based on the current architecture and
192 related settings. */
193 static void
194 tic6x_update_features (void)
195 {
196 switch (tic6x_atomic)
197 {
198 case -1:
199 tic6x_features = tic6x_arch_enable;
200 break;
201
202 case 0:
203 tic6x_features = tic6x_arch_enable & ~TIC6X_INSN_ATOMIC;
204 break;
205
206 case 1:
207 tic6x_features = tic6x_arch_enable | TIC6X_INSN_ATOMIC;
208 break;
209
210 default:
211 abort ();
212 }
213
214 tic6x_num_registers
215 = (tic6x_arch_enable & (TIC6X_INSN_C64X | TIC6X_INSN_C67XP)) ? 32 : 16;
216
217 tic6x_predicate_a0 = (tic6x_arch_enable & TIC6X_INSN_C64X) ? TRUE : FALSE;
218
219 tic6x_can_cross_fp_boundary
220 = (tic6x_arch_enable
221 & (TIC6X_INSN_C64X | TIC6X_INSN_C67XP)) ? TRUE : FALSE;
222
223 tic6x_long_data_constraints
224 = (tic6x_arch_enable & TIC6X_INSN_C64X) ? FALSE : TRUE;
225
226 tic6x_compact_insns = (tic6x_arch_enable & TIC6X_INSN_C64XP) ? TRUE : FALSE;
227 }
228
229 /* Do configuration after all options have been parsed. */
230
231 void
232 tic6x_after_parse_args (void)
233 {
234 tic6x_update_features ();
235 }
236
237 /* Parse a .arch directive. */
238
239 static void
240 s_tic6x_arch (int ignored ATTRIBUTE_UNUSED)
241 {
242 char c;
243 char *arch;
244
245 arch = input_line_pointer;
246 while (*input_line_pointer && !ISSPACE (*input_line_pointer))
247 input_line_pointer++;
248 c = *input_line_pointer;
249 *input_line_pointer = 0;
250
251 tic6x_use_arch (arch);
252 tic6x_update_features ();
253 *input_line_pointer = c;
254 demand_empty_rest_of_line ();
255 }
256
257 /* Parse a .atomic directive. */
258
259 static void
260 s_tic6x_atomic (int ignored ATTRIBUTE_UNUSED)
261 {
262 tic6x_atomic = 1;
263 tic6x_update_features ();
264 demand_empty_rest_of_line ();
265 }
266
267 /* Parse a .noatomic directive. */
268
269 static void
270 s_tic6x_noatomic (int ignored ATTRIBUTE_UNUSED)
271 {
272 tic6x_atomic = 0;
273 tic6x_update_features ();
274 demand_empty_rest_of_line ();
275 }
276
277 /* Parse a .nocmp directive. */
278
279 static void
280 s_tic6x_nocmp (int ignored ATTRIBUTE_UNUSED)
281 {
282 seg_info (now_seg)->tc_segment_info_data.nocmp = TRUE;
283 demand_empty_rest_of_line ();
284 }
285
286 const pseudo_typeS md_pseudo_table[] =
287 {
288 { "arch", s_tic6x_arch, 0 },
289 { "atomic", s_tic6x_atomic, 0 },
290 { "noatomic", s_tic6x_noatomic, 0 },
291 { "nocmp", s_tic6x_nocmp, 0 },
292 { "word", cons, 4 },
293 { 0, 0, 0 }
294 };
295
296 /* Hash table of opcodes. For each opcode name, this stores a pointer
297 to a tic6x_opcode_list listing (in an arbitrary order) all opcode
298 table entries with that name. */
299 static struct hash_control *opcode_hash;
300
301 /* Initialize the assembler (called once at assembler startup). */
302
303 void
304 md_begin (void)
305 {
306 tic6x_opcode_id id;
307
308 bfd_set_arch_mach (stdoutput, TARGET_ARCH, 0);
309
310 /* Insert opcodes into the hash table. */
311 opcode_hash = hash_new ();
312 for (id = 0; id < tic6x_opcode_max; id++)
313 {
314 const char *errmsg;
315 tic6x_opcode_list *opc = xmalloc (sizeof (tic6x_opcode_list));
316
317 opc->id = id;
318 opc->next = hash_find (opcode_hash, tic6x_opcode_table[id].name);
319 if ((errmsg = hash_jam (opcode_hash, tic6x_opcode_table[id].name, opc))
320 != NULL)
321 as_fatal ("%s", _(errmsg));
322 }
323 }
324
325 /* Whether the current line being parsed had the "||" parallel bars. */
326 static bfd_boolean tic6x_line_parallel;
327
328 /* Whether the current line being parsed started "||^" to indicate an
329 SPMASKed parallel instruction. */
330 static bfd_boolean tic6x_line_spmask;
331
332 /* If the current line being parsed had an instruction predicate, the
333 creg value for that predicate (which must be nonzero); otherwise
334 0. */
335 static unsigned int tic6x_line_creg;
336
337 /* If the current line being parsed had an instruction predicate, the
338 z value for that predicate; otherwise 0. */
339 static unsigned int tic6x_line_z;
340
341 /* Return 1 (updating input_line_pointer as appropriate) if the line
342 starting with C (immediately before input_line_pointer) starts with
343 pre-opcode text appropriate for this target, 0 otherwise. */
344
345 int
346 tic6x_unrecognized_line (int c)
347 {
348 char *p, *endp;
349 unsigned int z;
350 bfd_boolean areg;
351 bfd_boolean bad_predicate;
352
353 switch (c)
354 {
355 case '|':
356 if (input_line_pointer[0] == '|')
357 {
358 if (input_line_pointer[1] == '^')
359 {
360 tic6x_line_spmask = TRUE;
361 input_line_pointer += 2;
362 }
363 else
364 input_line_pointer += 1;
365 if (tic6x_line_parallel)
366 as_bad (_("multiple '||' on same line"));
367 tic6x_line_parallel = TRUE;
368 if (tic6x_line_creg)
369 as_bad (_("'||' after predicate"));
370 return 1;
371 }
372 return 0;
373
374 case '[':
375 /* If it doesn't look like a predicate at all, just return 0.
376 If it looks like one but not a valid one, give a better
377 error. */
378 p = input_line_pointer;
379 while (*p != ']' && !is_end_of_line[(unsigned char) *p])
380 p++;
381 if (*p != ']')
382 return 0;
383 endp = p + 1;
384 p = input_line_pointer;
385 z = 0;
386 bad_predicate = FALSE;
387 if (*p == '!')
388 {
389 z = 1;
390 p++;
391 }
392 if (*p == 'A' || *p == 'a')
393 areg = TRUE;
394 else if (*p == 'B' || *p == 'b')
395 areg = FALSE;
396 else
397 {
398 areg = TRUE; /* Avoid uninitialized warning. */
399 bad_predicate = TRUE;
400 }
401 if (!bad_predicate)
402 {
403 p++;
404 if (*p != '0' && *p != '1' && *p != '2')
405 bad_predicate = TRUE;
406 else if (p[1] != ']')
407 bad_predicate = TRUE;
408 else
409 input_line_pointer = p + 2;
410 }
411
412 if (tic6x_line_creg)
413 as_bad (_("multiple predicates on same line"));
414
415 if (bad_predicate)
416 {
417 char ctmp = *endp;
418 *endp = 0;
419 as_bad (_("bad predicate '%s'"), input_line_pointer - 1);
420 *endp = ctmp;
421 input_line_pointer = endp;
422 return 1;
423 }
424
425 switch (*p)
426 {
427 case '0':
428 tic6x_line_creg = (areg ? 6 : 1);
429 if (areg && !tic6x_predicate_a0)
430 as_bad (_("predication on A0 not supported on this architecture"));
431 break;
432
433 case '1':
434 tic6x_line_creg = (areg ? 4 : 2);
435 break;
436
437 case '2':
438 tic6x_line_creg = (areg ? 5 : 3);
439 break;
440
441 default:
442 abort ();
443 }
444
445 tic6x_line_z = z;
446 return 1;
447
448 default:
449 return 0;
450 }
451 }
452
453 /* Do any target-specific handling of a label required. */
454
455 void
456 tic6x_frob_label (symbolS *sym ATTRIBUTE_UNUSED)
457 {
458 if (tic6x_line_parallel)
459 {
460 as_bad (_("label after '||'"));
461 tic6x_line_parallel = FALSE;
462 tic6x_line_spmask = FALSE;
463 }
464 if (tic6x_line_creg)
465 {
466 as_bad (_("label after predicate"));
467 tic6x_line_creg = 0;
468 tic6x_line_z = 0;
469 }
470
471 seg_info (now_seg)->tc_segment_info_data.seen_label = TRUE;
472
473 /* Defining tc_frob_label overrides the ELF definition of
474 obj_frob_label, so we need to apply its effects here. */
475 dwarf2_emit_label (sym);
476 }
477
478 /* At end-of-line, give errors for start-of-line decorations that
479 needed an instruction but were not followed by one. */
480
481 static void
482 tic6x_end_of_line (void)
483 {
484 if (tic6x_line_parallel)
485 {
486 as_bad (_("'||' not followed by instruction"));
487 tic6x_line_parallel = FALSE;
488 tic6x_line_spmask = FALSE;
489 }
490 if (tic6x_line_creg)
491 {
492 as_bad (_("predicate not followed by instruction"));
493 tic6x_line_creg = 0;
494 tic6x_line_z = 0;
495 }
496 }
497
498 /* Do any target-specific handling of the start of a logical line. */
499
500 void
501 tic6x_start_line_hook (void)
502 {
503 tic6x_end_of_line ();
504 }
505
506 /* Do target-specific handling immediately after all input files have
507 been read. */
508
509 void
510 tic6x_cleanup (void)
511 {
512 tic6x_end_of_line ();
513 }
514
515 /* Handle a data alignment of N bytes. */
516
517 void
518 tic6x_cons_align (int n ATTRIBUTE_UNUSED)
519 {
520 segment_info_type *seginfo = seg_info (now_seg);
521
522 /* Data means there is no current execute packet, and that any label
523 applies to that data rather than a subsequent instruction. */
524 seginfo->tc_segment_info_data.num_execute_packet_insns = 0;
525 seginfo->tc_segment_info_data.seen_label = FALSE;
526 seginfo->tc_segment_info_data.last_insn_lsb = NULL;
527 seginfo->tc_segment_info_data.spmask_addr = NULL;
528 }
529
530 /* Types of operand for parsing purposes. These are used as bit-masks
531 to tell tic6x_parse_operand what forms of operand are
532 permitted. */
533 #define TIC6X_OP_EXP 0x0001u
534 #define TIC6X_OP_REG 0x0002u
535 #define TIC6X_OP_REGPAIR 0x0004u
536 #define TIC6X_OP_IRP 0x0008u
537 #define TIC6X_OP_NRP 0x0010u
538 /* With TIC6X_OP_MEM_NOUNREG, the contents of a () offset are always
539 interpreted as an expression, which may be a symbol with the same
540 name as a register that ends up being implicitly DP-relative. With
541 TIC6X_OP_MEM_UNREG, the contents of a () offset are interpreted as
542 a register if they match one, and failing that as an expression,
543 which must be constant. */
544 #define TIC6X_OP_MEM_NOUNREG 0x0020u
545 #define TIC6X_OP_MEM_UNREG 0x0040u
546 #define TIC6X_OP_CTRL 0x0080u
547 #define TIC6X_OP_FUNC_UNIT 0x0100u
548
549 /* A register or register pair read by the assembler. */
550 typedef struct
551 {
552 /* The side the register is on (1 or 2). */
553 unsigned int side;
554 /* The register number (0 to 31). */
555 unsigned int num;
556 } tic6x_register;
557
558 /* Types of modification of a base address. */
559 typedef enum
560 {
561 tic6x_mem_mod_none,
562 tic6x_mem_mod_plus,
563 tic6x_mem_mod_minus,
564 tic6x_mem_mod_preinc,
565 tic6x_mem_mod_predec,
566 tic6x_mem_mod_postinc,
567 tic6x_mem_mod_postdec
568 } tic6x_mem_mod;
569
570 /* Scaled [] or unscaled () nature of an offset. */
571 typedef enum
572 {
573 tic6x_offset_none,
574 tic6x_offset_scaled,
575 tic6x_offset_unscaled
576 } tic6x_mem_scaling;
577
578 /* A memory operand read by the assembler. */
579 typedef struct
580 {
581 /* The base register. */
582 tic6x_register base_reg;
583 /* How the base register is modified. */
584 tic6x_mem_mod mod;
585 /* Whether there is an offset (required with plain "+" and "-"), and
586 whether it is scaled or unscaled if so. */
587 tic6x_mem_scaling scaled;
588 /* Whether the offset is a register (TRUE) or an expression
589 (FALSE). */
590 bfd_boolean offset_is_reg;
591 /* The offset. */
592 union
593 {
594 expressionS exp;
595 tic6x_register reg;
596 } offset;
597 } tic6x_mem_ref;
598
599 /* A functional unit in SPMASK operands read by the assembler. */
600 typedef struct
601 {
602 /* The basic unit. */
603 tic6x_func_unit_base base;
604 /* The side (1 or 2). */
605 unsigned int side;
606 } tic6x_func_unit_operand;
607
608 /* An operand read by the assembler. */
609 typedef struct
610 {
611 /* The syntactic form of the operand, as one of the bit-masks
612 above. */
613 unsigned int form;
614 /* The operand value. */
615 union
616 {
617 /* An expression: TIC6X_OP_EXP. */
618 expressionS exp;
619 /* A register: TIC6X_OP_REG, TIC6X_OP_REGPAIR. */
620 tic6x_register reg;
621 /* A memory reference: TIC6X_OP_MEM_NOUNREG,
622 TIC6X_OP_MEM_UNREG. */
623 tic6x_mem_ref mem;
624 /* A control register: TIC6X_OP_CTRL. */
625 tic6x_ctrl_id ctrl;
626 /* A functional unit: TIC6X_OP_FUNC_UNIT. */
627 tic6x_func_unit_operand func_unit;
628 } value;
629 } tic6x_operand;
630
631 #define skip_whitespace(str) do { if (*(str) == ' ') ++(str); } while (0)
632
633 /* Parse a register operand, or part of an operand, starting at *P.
634 If syntactically OK (including that the number is in the range 0 to
635 31, but not necessarily in range for this architecture), return
636 TRUE, putting the register side and number in *REG and update *P to
637 point immediately after the register number; otherwise return FALSE
638 without changing *P (but possibly changing *REG). Do not print any
639 diagnostics. */
640
641 static bfd_boolean
642 tic6x_parse_register (char **p, tic6x_register *reg)
643 {
644 char *r = *p;
645
646 switch (*r)
647 {
648 case 'a':
649 case 'A':
650 reg->side = 1;
651 break;
652
653 case 'b':
654 case 'B':
655 reg->side = 2;
656 break;
657
658 default:
659 return FALSE;
660 }
661 r++;
662
663 if (*r >= '0' && *r <= '9')
664 {
665 reg->num = *r - '0';
666 r++;
667 }
668 else
669 return FALSE;
670
671 if (reg->num > 0 && *r >= '0' && *r <= '9')
672 {
673 reg->num = reg->num * 10 + (*r - '0');
674 r++;
675 }
676
677 if (*r >= '0' && *r <= '9')
678 return FALSE;
679
680 if (reg->num >= 32)
681 return FALSE;
682 *p = r;
683 return TRUE;
684 }
685
686 /* Parse the initial two characters of a functional unit name starting
687 at *P. If OK, set *BASE and *SIDE and return TRUE; otherwise,
688 return FALSE. */
689
690 static bfd_boolean
691 tic6x_parse_func_unit_base (char *p, tic6x_func_unit_base *base,
692 unsigned int *side)
693 {
694 bfd_boolean good_func_unit = TRUE;
695 tic6x_func_unit_base maybe_base = tic6x_func_unit_nfu;
696 unsigned int maybe_side = 0;
697
698 switch (p[0])
699 {
700 case 'd':
701 case 'D':
702 maybe_base = tic6x_func_unit_d;
703 break;
704
705 case 'l':
706 case 'L':
707 maybe_base = tic6x_func_unit_l;
708 break;
709
710 case 'm':
711 case 'M':
712 maybe_base = tic6x_func_unit_m;
713 break;
714
715 case 's':
716 case 'S':
717 maybe_base = tic6x_func_unit_s;
718 break;
719
720 default:
721 good_func_unit = FALSE;
722 break;
723 }
724
725 if (good_func_unit)
726 switch (p[1])
727 {
728 case '1':
729 maybe_side = 1;
730 break;
731
732 case '2':
733 maybe_side = 2;
734 break;
735
736 default:
737 good_func_unit = FALSE;
738 break;
739 }
740
741 if (good_func_unit)
742 {
743 *base = maybe_base;
744 *side = maybe_side;
745 }
746
747 return good_func_unit;
748 }
749
750 /* Parse an operand starting at *P. If the operand parses OK, return
751 TRUE and store the value in *OP; otherwise return FALSE (possibly
752 changing *OP). In any case, update *P to point to the following
753 comma or end of line. The possible operand forms are given by
754 OP_FORMS. For diagnostics, this is operand OPNO of an opcode
755 starting at STR, length OPC_LEN. */
756
757 static bfd_boolean
758 tic6x_parse_operand (char **p, tic6x_operand *op, unsigned int op_forms,
759 char *str, int opc_len, unsigned int opno)
760 {
761 bfd_boolean operand_parsed = FALSE;
762 char *q = *p;
763
764 if ((op_forms & (TIC6X_OP_MEM_NOUNREG | TIC6X_OP_MEM_UNREG))
765 == (TIC6X_OP_MEM_NOUNREG | TIC6X_OP_MEM_UNREG))
766 abort ();
767
768 /* Check for functional unit names for SPMASK and SPMASKR. */
769 if (!operand_parsed && (op_forms & TIC6X_OP_FUNC_UNIT))
770 {
771 tic6x_func_unit_base base = tic6x_func_unit_nfu;
772 unsigned int side = 0;
773
774 if (tic6x_parse_func_unit_base (q, &base, &side))
775 {
776 char *rq = q + 2;
777
778 skip_whitespace (rq);
779 if (is_end_of_line[(unsigned char) *rq] || *rq == ',')
780 {
781 op->form = TIC6X_OP_FUNC_UNIT;
782 op->value.func_unit.base = base;
783 op->value.func_unit.side = side;
784 operand_parsed = TRUE;
785 q = rq;
786 }
787 }
788 }
789
790 /* Check for literal "irp". */
791 if (!operand_parsed && (op_forms & TIC6X_OP_IRP))
792 {
793 if ((q[0] == 'i' || q[0] == 'I')
794 && (q[1] == 'r' || q[1] == 'R')
795 && (q[2] == 'p' || q[2] == 'P'))
796 {
797 char *rq = q + 3;
798
799 skip_whitespace (rq);
800 if (is_end_of_line[(unsigned char) *rq] || *rq == ',')
801 {
802 op->form = TIC6X_OP_IRP;
803 operand_parsed = TRUE;
804 q = rq;
805 }
806 }
807 }
808
809 /* Check for literal "nrp". */
810 if (!operand_parsed && (op_forms & TIC6X_OP_NRP))
811 {
812 if ((q[0] == 'n' || q[0] == 'N')
813 && (q[1] == 'r' || q[1] == 'R')
814 && (q[2] == 'p' || q[2] == 'P'))
815 {
816 char *rq = q + 3;
817
818 skip_whitespace (rq);
819 if (is_end_of_line[(unsigned char) *rq] || *rq == ',')
820 {
821 op->form = TIC6X_OP_NRP;
822 operand_parsed = TRUE;
823 q = rq;
824 }
825 }
826 }
827
828 /* Check for control register names. */
829 if (!operand_parsed && (op_forms & TIC6X_OP_CTRL))
830 {
831 tic6x_ctrl_id crid;
832
833 for (crid = 0; crid < tic6x_ctrl_max; crid++)
834 {
835 size_t len = strlen (tic6x_ctrl_table[crid].name);
836
837 if (strncasecmp (tic6x_ctrl_table[crid].name, q, len) == 0)
838 {
839 char *rq = q + len;
840
841 skip_whitespace (rq);
842 if (is_end_of_line[(unsigned char) *rq] || *rq == ',')
843 {
844 op->form = TIC6X_OP_CTRL;
845 op->value.ctrl = crid;
846 operand_parsed = TRUE;
847 q = rq;
848 if (!(tic6x_ctrl_table[crid].isa_variants & tic6x_features))
849 as_bad (_("control register '%s' not supported "
850 "on this architecture"),
851 tic6x_ctrl_table[crid].name);
852 }
853 }
854 }
855 }
856
857 /* See if this looks like a memory reference. */
858 if (!operand_parsed
859 && (op_forms & (TIC6X_OP_MEM_NOUNREG | TIC6X_OP_MEM_UNREG)))
860 {
861 bfd_boolean mem_ok = TRUE;
862 char *mq = q;
863 tic6x_mem_mod mem_mod = tic6x_mem_mod_none;
864 tic6x_register base_reg;
865 bfd_boolean require_offset, permit_offset;
866 tic6x_mem_scaling scaled;
867 bfd_boolean offset_is_reg;
868 expressionS offset_exp;
869 tic6x_register offset_reg;
870
871 if (*mq == '*')
872 mq++;
873 else
874 mem_ok = FALSE;
875
876 if (mem_ok)
877 {
878 skip_whitespace (mq);
879 switch (*mq)
880 {
881 case '+':
882 if (mq[1] == '+')
883 {
884 mem_mod = tic6x_mem_mod_preinc;
885 mq += 2;
886 }
887 else
888 {
889 mem_mod = tic6x_mem_mod_plus;
890 mq++;
891 }
892 break;
893
894 case '-':
895 if (mq[1] == '-')
896 {
897 mem_mod = tic6x_mem_mod_predec;
898 mq += 2;
899 }
900 else
901 {
902 mem_mod = tic6x_mem_mod_minus;
903 mq++;
904 }
905 break;
906
907 default:
908 break;
909 }
910 }
911
912 if (mem_ok)
913 {
914 skip_whitespace (mq);
915 mem_ok = tic6x_parse_register (&mq, &base_reg);
916 }
917
918 if (mem_ok && mem_mod == tic6x_mem_mod_none)
919 {
920 skip_whitespace (mq);
921 if (mq[0] == '+' && mq[1] == '+')
922 {
923 mem_mod = tic6x_mem_mod_postinc;
924 mq += 2;
925 }
926 else if (mq[0] == '-' && mq[1] == '-')
927 {
928 mem_mod = tic6x_mem_mod_postdec;
929 mq += 2;
930 }
931 }
932
933 if (mem_mod == tic6x_mem_mod_none)
934 permit_offset = FALSE;
935 else
936 permit_offset = TRUE;
937 if (mem_mod == tic6x_mem_mod_plus || mem_mod == tic6x_mem_mod_minus)
938 require_offset = TRUE;
939 else
940 require_offset = FALSE;
941 scaled = tic6x_offset_none;
942 offset_is_reg = FALSE;
943
944 if (mem_ok && permit_offset)
945 {
946 char endc = 0;
947
948 skip_whitespace (mq);
949 switch (*mq)
950 {
951 case '[':
952 scaled = tic6x_offset_scaled;
953 mq++;
954 endc = ']';
955 break;
956
957 case '(':
958 scaled = tic6x_offset_unscaled;
959 mq++;
960 endc = ')';
961 break;
962
963 default:
964 break;
965 }
966 if (scaled != tic6x_offset_none)
967 {
968 skip_whitespace (mq);
969 if (scaled == tic6x_offset_scaled
970 || (op_forms & TIC6X_OP_MEM_UNREG))
971 {
972 bfd_boolean reg_ok;
973 char *rq = mq;
974
975 reg_ok = tic6x_parse_register (&rq, &offset_reg);
976 if (reg_ok)
977 {
978 skip_whitespace (rq);
979 if (*rq == endc)
980 {
981 mq = rq;
982 offset_is_reg = TRUE;
983 }
984 }
985 }
986 if (!offset_is_reg)
987 {
988 char *save_input_line_pointer;
989
990 save_input_line_pointer = input_line_pointer;
991 input_line_pointer = mq;
992 expression (&offset_exp);
993 mq = input_line_pointer;
994 input_line_pointer = save_input_line_pointer;
995 }
996 skip_whitespace (mq);
997 if (*mq == endc)
998 mq++;
999 else
1000 mem_ok = FALSE;
1001 }
1002 }
1003
1004 if (mem_ok && require_offset && scaled == tic6x_offset_none)
1005 mem_ok = FALSE;
1006
1007 if (mem_ok)
1008 {
1009 skip_whitespace (mq);
1010 if (!is_end_of_line[(unsigned char) *mq] && *mq != ',')
1011 mem_ok = FALSE;
1012 }
1013
1014 if (mem_ok)
1015 {
1016 op->form = op_forms & (TIC6X_OP_MEM_NOUNREG | TIC6X_OP_MEM_UNREG);
1017 op->value.mem.base_reg = base_reg;
1018 op->value.mem.mod = mem_mod;
1019 op->value.mem.scaled = scaled;
1020 op->value.mem.offset_is_reg = offset_is_reg;
1021 if (offset_is_reg)
1022 op->value.mem.offset.reg = offset_reg;
1023 else
1024 op->value.mem.offset.exp = offset_exp;
1025 operand_parsed = TRUE;
1026 q = mq;
1027 if (base_reg.num >= tic6x_num_registers)
1028 as_bad (_("register number %u not supported on this architecture"),
1029 base_reg.num);
1030 if (offset_is_reg && offset_reg.num >= tic6x_num_registers)
1031 as_bad (_("register number %u not supported on this architecture"),
1032 offset_reg.num);
1033 }
1034 }
1035
1036 /* See if this looks like a register or register pair. */
1037 if (!operand_parsed && (op_forms & (TIC6X_OP_REG | TIC6X_OP_REGPAIR)))
1038 {
1039 tic6x_register first_reg, second_reg;
1040 bfd_boolean reg_ok;
1041 char *rq = q;
1042
1043 reg_ok = tic6x_parse_register (&rq, &first_reg);
1044
1045 if (reg_ok)
1046 {
1047 if (*rq == ':' && (op_forms & TIC6X_OP_REGPAIR))
1048 {
1049 rq++;
1050 reg_ok = tic6x_parse_register (&rq, &second_reg);
1051 if (reg_ok)
1052 {
1053 skip_whitespace (rq);
1054 if (is_end_of_line[(unsigned char) *rq] || *rq == ',')
1055 {
1056 if ((second_reg.num & 1)
1057 || (first_reg.num != second_reg.num + 1)
1058 || (first_reg.side != second_reg.side))
1059 as_bad (_("register pair for operand %u of '%.*s'"
1060 " not a valid even/odd pair"), opno,
1061 opc_len, str);
1062 op->form = TIC6X_OP_REGPAIR;
1063 op->value.reg = second_reg;
1064 operand_parsed = TRUE;
1065 q = rq;
1066 }
1067 }
1068 }
1069 else if (op_forms & TIC6X_OP_REG)
1070 {
1071 skip_whitespace (rq);
1072 if (is_end_of_line[(unsigned char) *rq] || *rq == ',')
1073 {
1074 op->form = TIC6X_OP_REG;
1075 op->value.reg = first_reg;
1076 operand_parsed = TRUE;
1077 q = rq;
1078 }
1079 }
1080 }
1081 if (operand_parsed)
1082 {
1083 if (first_reg.num >= tic6x_num_registers)
1084 as_bad (_("register number %u not supported on this architecture"),
1085 first_reg.num);
1086 if (op->form == TIC6X_OP_REGPAIR
1087 && second_reg.num >= tic6x_num_registers)
1088 as_bad (_("register number %u not supported on this architecture"),
1089 second_reg.num);
1090 }
1091 }
1092
1093 /* Otherwise, parse it as an expression. */
1094 if (!operand_parsed && (op_forms & TIC6X_OP_EXP))
1095 {
1096 char *save_input_line_pointer;
1097
1098 save_input_line_pointer = input_line_pointer;
1099 input_line_pointer = q;
1100 op->form = TIC6X_OP_EXP;
1101 expression (&op->value.exp);
1102 q = input_line_pointer;
1103 input_line_pointer = save_input_line_pointer;
1104 operand_parsed = TRUE;
1105 }
1106
1107 if (operand_parsed)
1108 {
1109 /* Now the operand has been parsed, there must be nothing more
1110 before the comma or end of line. */
1111 skip_whitespace (q);
1112 if (!is_end_of_line[(unsigned char) *q] && *q != ',')
1113 {
1114 operand_parsed = FALSE;
1115 as_bad (_("junk after operand %u of '%.*s'"), opno,
1116 opc_len, str);
1117 while (!is_end_of_line[(unsigned char) *q] && *q != ',')
1118 q++;
1119 }
1120 }
1121 else
1122 {
1123 /* This could not be parsed as any acceptable form of
1124 operand. */
1125 switch (op_forms)
1126 {
1127 case TIC6X_OP_REG | TIC6X_OP_REGPAIR:
1128 as_bad (_("bad register or register pair for operand %u of '%.*s'"),
1129 opno, opc_len, str);
1130 break;
1131
1132 case TIC6X_OP_REG | TIC6X_OP_CTRL:
1133 case TIC6X_OP_REG:
1134 as_bad (_("bad register for operand %u of '%.*s'"),
1135 opno, opc_len, str);
1136 break;
1137
1138 case TIC6X_OP_REGPAIR:
1139 as_bad (_("bad register pair for operand %u of '%.*s'"),
1140 opno, opc_len, str);
1141 break;
1142
1143 case TIC6X_OP_FUNC_UNIT:
1144 as_bad (_("bad functional unit for operand %u of '%.*s'"),
1145 opno, opc_len, str);
1146 break;
1147
1148 default:
1149 as_bad (_("bad operand %u of '%.*s'"),
1150 opno, opc_len, str);
1151 break;
1152
1153 }
1154 while (!is_end_of_line[(unsigned char) *q] && *q != ',')
1155 q++;
1156 }
1157 *p = q;
1158 return operand_parsed;
1159 }
1160
1161 /* Table of assembler operators and associated O_* values. */
1162 typedef struct
1163 {
1164 const char *name;
1165 operatorT op;
1166 } tic6x_operator_table;
1167 static const tic6x_operator_table tic6x_operators[] = {
1168 #define O_dsbt_index O_md1
1169 { "dsbt_index", O_dsbt_index },
1170 #define O_got O_md2
1171 { "got", O_got },
1172 #define O_dpr_got O_md3
1173 { "dpr_got", O_dpr_got },
1174 #define O_dpr_byte O_md4
1175 { "dpr_byte", O_dpr_byte },
1176 #define O_dpr_hword O_md5
1177 { "dpr_hword", O_dpr_hword },
1178 #define O_dpr_word O_md6
1179 { "dpr_word", O_dpr_word },
1180 };
1181
1182 /* Parse a name in some machine-specific way. Used on C6X to handle
1183 assembler operators. */
1184
1185 int
1186 tic6x_parse_name (const char *name, expressionS *exprP,
1187 enum expr_mode mode ATTRIBUTE_UNUSED, char *nextchar)
1188 {
1189 char *p = input_line_pointer;
1190 char c, *name_start, *name_end;
1191 const char *inner_name;
1192 unsigned int i;
1193 operatorT op = O_illegal;
1194 symbolS *sym;
1195
1196 if (*name != '$')
1197 return 0;
1198
1199 for (i = 0; i < ARRAY_SIZE (tic6x_operators); i++)
1200 if (strcasecmp (name + 1, tic6x_operators[i].name) == 0)
1201 {
1202 op = tic6x_operators[i].op;
1203 break;
1204 }
1205
1206 if (op == O_illegal)
1207 return 0;
1208
1209 *input_line_pointer = *nextchar;
1210 skip_whitespace (p);
1211
1212 if (*p != '(')
1213 {
1214 *input_line_pointer = 0;
1215 return 0;
1216 }
1217 p++;
1218 skip_whitespace (p);
1219
1220 if (!is_name_beginner (*p))
1221 {
1222 *input_line_pointer = 0;
1223 return 0;
1224 }
1225
1226 name_start = p;
1227 p++;
1228 while (is_part_of_name (*p))
1229 p++;
1230 name_end = p;
1231 skip_whitespace (p);
1232
1233 if (*p != ')')
1234 {
1235 *input_line_pointer = 0;
1236 return 0;
1237 }
1238
1239 input_line_pointer = p + 1;
1240 *nextchar = *input_line_pointer;
1241 *input_line_pointer = 0;
1242
1243 c = *name_end;
1244 *name_end = 0;
1245 inner_name = name_start;
1246 if (op == O_dsbt_index && strcmp (inner_name, "__c6xabi_DSBT_BASE") != 0)
1247 {
1248 as_bad (_("$DSBT_INDEX must be used with __c6xabi_DSBT_BASE"));
1249 inner_name = "__c6xabi_DSBT_BASE";
1250 }
1251 sym = symbol_find_or_make (inner_name);
1252 *name_end = c;
1253
1254 exprP->X_op = op;
1255 exprP->X_add_symbol = sym;
1256 exprP->X_add_number = 0;
1257 exprP->X_op_symbol = NULL;
1258 exprP->X_md = 0;
1259
1260 return 1;
1261 }
1262
1263 /* Create a fixup for an expression. Same arguments as fix_new_exp,
1264 plus FIX_ADDA which is TRUE for ADDA instructions (to indicate that
1265 fixes resolving to constants should have those constants implicitly
1266 shifted) and FALSE otherwise, but look for C6X-specific expression
1267 types and adjust the relocations or give errors accordingly. */
1268
1269 static void
1270 tic6x_fix_new_exp (fragS *frag, int where, int size, expressionS *exp,
1271 int pcrel, bfd_reloc_code_real_type r_type,
1272 bfd_boolean fix_adda)
1273 {
1274 bfd_reloc_code_real_type new_reloc = BFD_RELOC_UNUSED;
1275 fixS *fix;
1276
1277 switch (exp->X_op)
1278 {
1279 case O_dsbt_index:
1280 switch (r_type)
1281 {
1282 case BFD_RELOC_C6000_SBR_U15_W:
1283 new_reloc = BFD_RELOC_C6000_DSBT_INDEX;
1284 break;
1285
1286 default:
1287 as_bad (_("$DSBT_INDEX not supported in this context"));
1288 return;
1289 }
1290 break;
1291
1292 case O_got:
1293 switch (r_type)
1294 {
1295 case BFD_RELOC_C6000_SBR_U15_W:
1296 new_reloc = BFD_RELOC_C6000_SBR_GOT_U15_W;
1297 break;
1298
1299 default:
1300 as_bad (_("$GOT not supported in this context"));
1301 return;
1302 }
1303 break;
1304
1305 case O_dpr_got:
1306 switch (r_type)
1307 {
1308 case BFD_RELOC_C6000_ABS_L16:
1309 new_reloc = BFD_RELOC_C6000_SBR_GOT_L16_W;
1310 break;
1311
1312 case BFD_RELOC_C6000_ABS_H16:
1313 new_reloc = BFD_RELOC_C6000_SBR_GOT_H16_W;
1314 break;
1315
1316 default:
1317 as_bad (_("$DPR_GOT not supported in this context"));
1318 return;
1319 }
1320 break;
1321
1322 case O_dpr_byte:
1323 switch (r_type)
1324 {
1325 case BFD_RELOC_C6000_ABS_S16:
1326 new_reloc = BFD_RELOC_C6000_SBR_S16;
1327 break;
1328
1329 case BFD_RELOC_C6000_ABS_L16:
1330 new_reloc = BFD_RELOC_C6000_SBR_L16_B;
1331 break;
1332
1333 case BFD_RELOC_C6000_ABS_H16:
1334 new_reloc = BFD_RELOC_C6000_SBR_H16_B;
1335 break;
1336
1337 default:
1338 as_bad (_("$DPR_BYTE not supported in this context"));
1339 return;
1340 }
1341 break;
1342
1343 case O_dpr_hword:
1344 switch (r_type)
1345 {
1346 case BFD_RELOC_C6000_ABS_L16:
1347 new_reloc = BFD_RELOC_C6000_SBR_L16_H;
1348 break;
1349
1350 case BFD_RELOC_C6000_ABS_H16:
1351 new_reloc = BFD_RELOC_C6000_SBR_H16_H;
1352 break;
1353
1354 default:
1355 as_bad (_("$DPR_HWORD not supported in this context"));
1356 return;
1357 }
1358 break;
1359
1360 case O_dpr_word:
1361 switch (r_type)
1362 {
1363 case BFD_RELOC_C6000_ABS_L16:
1364 new_reloc = BFD_RELOC_C6000_SBR_L16_W;
1365 break;
1366
1367 case BFD_RELOC_C6000_ABS_H16:
1368 new_reloc = BFD_RELOC_C6000_SBR_H16_W;
1369 break;
1370
1371 default:
1372 as_bad (_("$DPR_WORD not supported in this context"));
1373 return;
1374 }
1375 break;
1376
1377 case O_symbol:
1378 break;
1379
1380 default:
1381 if (pcrel)
1382 {
1383 as_bad (_("invalid PC-relative operand"));
1384 return;
1385 }
1386 break;
1387 }
1388
1389 if (new_reloc == BFD_RELOC_UNUSED)
1390 fix = fix_new_exp (frag, where, size, exp, pcrel, r_type);
1391 else
1392 fix = fix_new (frag, where, size, exp->X_add_symbol, exp->X_add_number,
1393 pcrel, new_reloc);
1394 fix->tc_fix_data.fix_adda = fix_adda;
1395 }
1396
1397 /* Generate a fix for a constant (.word etc.). Needed to ensure these
1398 go through the error checking in tic6x_fix_new_exp. */
1399
1400 void
1401 tic6x_cons_fix_new (fragS *frag, int where, int size, expressionS *exp)
1402 {
1403 bfd_reloc_code_real_type r_type;
1404
1405 switch (size)
1406 {
1407 case 1:
1408 r_type = BFD_RELOC_8;
1409 break;
1410
1411 case 2:
1412 r_type = BFD_RELOC_16;
1413 break;
1414
1415 case 4:
1416 r_type = BFD_RELOC_32;
1417 break;
1418
1419 default:
1420 as_bad (_("no %d-byte relocations available"), size);
1421 return;
1422 }
1423
1424 tic6x_fix_new_exp (frag, where, size, exp, 0, r_type, FALSE);
1425 }
1426
1427 /* Initialize target-specific fix data. */
1428
1429 void
1430 tic6x_init_fix_data (fixS *fixP)
1431 {
1432 fixP->tc_fix_data.fix_adda = FALSE;
1433 }
1434
1435 /* Given the fine-grained form of an operand, return the coarse
1436 (bit-mask) form. */
1437
1438 static unsigned int
1439 tic6x_coarse_operand_form (tic6x_operand_form form)
1440 {
1441 switch (form)
1442 {
1443 case tic6x_operand_asm_const:
1444 case tic6x_operand_link_const:
1445 return TIC6X_OP_EXP;
1446
1447 case tic6x_operand_reg:
1448 case tic6x_operand_xreg:
1449 case tic6x_operand_dreg:
1450 case tic6x_operand_areg:
1451 case tic6x_operand_retreg:
1452 return TIC6X_OP_REG;
1453
1454 case tic6x_operand_regpair:
1455 case tic6x_operand_xregpair:
1456 case tic6x_operand_dregpair:
1457 return TIC6X_OP_REGPAIR;
1458
1459 case tic6x_operand_irp:
1460 return TIC6X_OP_IRP;
1461
1462 case tic6x_operand_nrp:
1463 return TIC6X_OP_NRP;
1464
1465 case tic6x_operand_ctrl:
1466 return TIC6X_OP_CTRL;
1467
1468 case tic6x_operand_mem_short:
1469 case tic6x_operand_mem_long:
1470 case tic6x_operand_mem_deref:
1471 return TIC6X_OP_MEM_NOUNREG;
1472
1473 case tic6x_operand_mem_ndw:
1474 return TIC6X_OP_MEM_UNREG;
1475
1476 case tic6x_operand_func_unit:
1477 return TIC6X_OP_FUNC_UNIT;
1478
1479 default:
1480 abort ();
1481 }
1482 }
1483
1484 /* How an operand may match or not match a desired form. If different
1485 instruction alternatives fail in different ways, the first failure
1486 in this list determines the diagnostic. */
1487 typedef enum
1488 {
1489 /* Matches. */
1490 tic6x_match_matches,
1491 /* Bad coarse form. */
1492 tic6x_match_coarse,
1493 /* Not constant. */
1494 tic6x_match_non_const,
1495 /* Register on wrong side. */
1496 tic6x_match_wrong_side,
1497 /* Not a valid address register. */
1498 tic6x_match_bad_address,
1499 /* Not a valid return address register. */
1500 tic6x_match_bad_return,
1501 /* Control register not readable. */
1502 tic6x_match_ctrl_write_only,
1503 /* Control register not writable. */
1504 tic6x_match_ctrl_read_only,
1505 /* Not a valid memory reference for this instruction. */
1506 tic6x_match_bad_mem
1507 } tic6x_operand_match;
1508
1509 /* Return whether an operand matches the given fine-grained form and
1510 read/write usage, and, if it does not match, how it fails to match.
1511 The main functional unit side is SIDE; the cross-path side is CROSS
1512 (the same as SIDE if a cross path not used); the data side is
1513 DATA_SIDE. */
1514 static tic6x_operand_match
1515 tic6x_operand_matches_form (const tic6x_operand *op, tic6x_operand_form form,
1516 tic6x_rw rw, unsigned int side, unsigned int cross,
1517 unsigned int data_side)
1518 {
1519 unsigned int coarse = tic6x_coarse_operand_form (form);
1520
1521 if (coarse != op->form)
1522 return tic6x_match_coarse;
1523
1524 switch (form)
1525 {
1526 case tic6x_operand_asm_const:
1527 if (op->value.exp.X_op == O_constant)
1528 return tic6x_match_matches;
1529 else
1530 return tic6x_match_non_const;
1531
1532 case tic6x_operand_link_const:
1533 case tic6x_operand_irp:
1534 case tic6x_operand_nrp:
1535 case tic6x_operand_func_unit:
1536 /* All expressions are link-time constants, although there may
1537 not be relocations to express them in the output file. "irp"
1538 and "nrp" are unique operand values. All parsed functional
1539 unit names are valid. */
1540 return tic6x_match_matches;
1541
1542 case tic6x_operand_reg:
1543 case tic6x_operand_regpair:
1544 if (op->value.reg.side == side)
1545 return tic6x_match_matches;
1546 else
1547 return tic6x_match_wrong_side;
1548
1549 case tic6x_operand_xreg:
1550 case tic6x_operand_xregpair:
1551 if (op->value.reg.side == cross)
1552 return tic6x_match_matches;
1553 else
1554 return tic6x_match_wrong_side;
1555
1556 case tic6x_operand_dreg:
1557 case tic6x_operand_dregpair:
1558 if (op->value.reg.side == data_side)
1559 return tic6x_match_matches;
1560 else
1561 return tic6x_match_wrong_side;
1562
1563 case tic6x_operand_areg:
1564 if (op->value.reg.side != cross)
1565 return tic6x_match_wrong_side;
1566 else if (op->value.reg.side == 2
1567 && (op->value.reg.num == 14 || op->value.reg.num == 15))
1568 return tic6x_match_matches;
1569 else
1570 return tic6x_match_bad_address;
1571
1572 case tic6x_operand_retreg:
1573 if (op->value.reg.side != side)
1574 return tic6x_match_wrong_side;
1575 else if (op->value.reg.num != 3)
1576 return tic6x_match_bad_return;
1577 else
1578 return tic6x_match_matches;
1579
1580 case tic6x_operand_ctrl:
1581 switch (rw)
1582 {
1583 case tic6x_rw_read:
1584 if (tic6x_ctrl_table[op->value.ctrl].rw == tic6x_rw_read
1585 || tic6x_ctrl_table[op->value.ctrl].rw == tic6x_rw_read_write)
1586 return tic6x_match_matches;
1587 else
1588 return tic6x_match_ctrl_write_only;
1589
1590 case tic6x_rw_write:
1591 if (tic6x_ctrl_table[op->value.ctrl].rw == tic6x_rw_write
1592 || tic6x_ctrl_table[op->value.ctrl].rw == tic6x_rw_read_write)
1593 return tic6x_match_matches;
1594 else
1595 return tic6x_match_ctrl_read_only;
1596
1597 default:
1598 abort ();
1599 }
1600
1601 case tic6x_operand_mem_deref:
1602 if (op->value.mem.mod != tic6x_mem_mod_none)
1603 return tic6x_match_bad_mem;
1604 else if (op->value.mem.scaled != tic6x_offset_none)
1605 abort ();
1606 else if (op->value.mem.base_reg.side != side)
1607 return tic6x_match_bad_mem;
1608 else
1609 return tic6x_match_matches;
1610
1611 case tic6x_operand_mem_short:
1612 case tic6x_operand_mem_ndw:
1613 if (op->value.mem.base_reg.side != side)
1614 return tic6x_match_bad_mem;
1615 if (op->value.mem.mod == tic6x_mem_mod_none)
1616 {
1617 if (op->value.mem.scaled != tic6x_offset_none)
1618 abort ();
1619 return tic6x_match_matches;
1620 }
1621 if (op->value.mem.scaled == tic6x_offset_none)
1622 {
1623 if (op->value.mem.mod == tic6x_mem_mod_plus
1624 || op->value.mem.mod == tic6x_mem_mod_minus)
1625 abort ();
1626 return tic6x_match_matches;
1627 }
1628 if (op->value.mem.offset_is_reg)
1629 {
1630 if (op->value.mem.scaled == tic6x_offset_unscaled
1631 && form != tic6x_operand_mem_ndw)
1632 abort ();
1633 if (op->value.mem.offset.reg.side == side)
1634 return tic6x_match_matches;
1635 else
1636 return tic6x_match_bad_mem;
1637 }
1638 else
1639 {
1640 if (op->value.mem.offset.exp.X_op == O_constant)
1641 return tic6x_match_matches;
1642 else
1643 return tic6x_match_bad_mem;
1644 }
1645
1646 case tic6x_operand_mem_long:
1647 if (op->value.mem.base_reg.side == 2
1648 && (op->value.mem.base_reg.num == 14
1649 || op->value.mem.base_reg.num == 15))
1650 {
1651 switch (op->value.mem.mod)
1652 {
1653 case tic6x_mem_mod_none:
1654 if (op->value.mem.scaled != tic6x_offset_none)
1655 abort ();
1656 return tic6x_match_matches;
1657
1658 case tic6x_mem_mod_plus:
1659 if (op->value.mem.scaled == tic6x_offset_none)
1660 abort ();
1661 if (op->value.mem.offset_is_reg)
1662 return tic6x_match_bad_mem;
1663 else if (op->value.mem.scaled == tic6x_offset_scaled
1664 && op->value.mem.offset.exp.X_op != O_constant)
1665 return tic6x_match_bad_mem;
1666 else
1667 return tic6x_match_matches;
1668
1669 case tic6x_mem_mod_minus:
1670 case tic6x_mem_mod_preinc:
1671 case tic6x_mem_mod_predec:
1672 case tic6x_mem_mod_postinc:
1673 case tic6x_mem_mod_postdec:
1674 return tic6x_match_bad_mem;
1675
1676 default:
1677 abort ();
1678 }
1679
1680 }
1681 else
1682 return tic6x_match_bad_mem;
1683
1684 default:
1685 abort ();
1686 }
1687 }
1688
1689 /* Return the number of bits shift used with DP-relative coding method
1690 CODING. */
1691
1692 static unsigned int
1693 tic6x_dpr_shift (tic6x_coding_method coding)
1694 {
1695 switch (coding)
1696 {
1697 case tic6x_coding_ulcst_dpr_byte:
1698 return 0;
1699
1700 case tic6x_coding_ulcst_dpr_half:
1701 return 1;
1702
1703 case tic6x_coding_ulcst_dpr_word:
1704 return 2;
1705
1706 default:
1707 abort ();
1708 }
1709 }
1710
1711 /* Return the relocation used with DP-relative coding method
1712 CODING. */
1713
1714 static bfd_reloc_code_real_type
1715 tic6x_dpr_reloc (tic6x_coding_method coding)
1716 {
1717 switch (coding)
1718 {
1719 case tic6x_coding_ulcst_dpr_byte:
1720 return BFD_RELOC_C6000_SBR_U15_B;
1721
1722 case tic6x_coding_ulcst_dpr_half:
1723 return BFD_RELOC_C6000_SBR_U15_H;
1724
1725 case tic6x_coding_ulcst_dpr_word:
1726 return BFD_RELOC_C6000_SBR_U15_W;
1727
1728 default:
1729 abort ();
1730 }
1731 }
1732
1733 /* Given a memory reference *MEM_REF as originally parsed, fill in
1734 defaults for missing offsets. */
1735
1736 static void
1737 tic6x_default_mem_ref (tic6x_mem_ref *mem_ref)
1738 {
1739 switch (mem_ref->mod)
1740 {
1741 case tic6x_mem_mod_none:
1742 if (mem_ref->scaled != tic6x_offset_none)
1743 abort ();
1744 mem_ref->mod = tic6x_mem_mod_plus;
1745 mem_ref->scaled = tic6x_offset_unscaled;
1746 mem_ref->offset_is_reg = FALSE;
1747 memset (&mem_ref->offset.exp, 0, sizeof mem_ref->offset.exp);
1748 mem_ref->offset.exp.X_op = O_constant;
1749 mem_ref->offset.exp.X_add_number = 0;
1750 mem_ref->offset.exp.X_unsigned = 0;
1751 break;
1752
1753 case tic6x_mem_mod_plus:
1754 case tic6x_mem_mod_minus:
1755 if (mem_ref->scaled == tic6x_offset_none)
1756 abort ();
1757 break;
1758
1759 case tic6x_mem_mod_preinc:
1760 case tic6x_mem_mod_predec:
1761 case tic6x_mem_mod_postinc:
1762 case tic6x_mem_mod_postdec:
1763 if (mem_ref->scaled != tic6x_offset_none)
1764 break;
1765 mem_ref->scaled = tic6x_offset_scaled;
1766 mem_ref->offset_is_reg = FALSE;
1767 memset (&mem_ref->offset.exp, 0, sizeof mem_ref->offset.exp);
1768 mem_ref->offset.exp.X_op = O_constant;
1769 mem_ref->offset.exp.X_add_number = 1;
1770 mem_ref->offset.exp.X_unsigned = 0;
1771 break;
1772
1773 default:
1774 abort ();
1775 }
1776 }
1777
1778 /* Return the encoding in the 8-bit field of an SPMASK or SPMASKR
1779 instruction of the specified UNIT, side SIDE. */
1780
1781 static unsigned int
1782 tic6x_encode_spmask (tic6x_func_unit_base unit, unsigned int side)
1783 {
1784 switch (unit)
1785 {
1786 case tic6x_func_unit_l:
1787 return 1 << (side - 1);
1788
1789 case tic6x_func_unit_s:
1790 return 1 << (side + 1);
1791
1792 case tic6x_func_unit_d:
1793 return 1 << (side + 3);
1794
1795 case tic6x_func_unit_m:
1796 return 1 << (side + 5);
1797
1798 default:
1799 abort ();
1800 }
1801 }
1802
1803 /* Try to encode the instruction with opcode number ID and operands
1804 OPERANDS (number NUM_OPERANDS), creg value THIS_LINE_CREG and z
1805 value THIS_LINE_Z; FUNC_UNIT_SIDE, FUNC_UNIT_CROSS and
1806 FUNC_UNIT_DATA_SIDE describe the functional unit specification;
1807 SPLOOP_II is the ii value from the previous SPLOOP-family
1808 instruction, or 0 if not in such a loop; the only possible problems
1809 are operands being out of range (they already match the
1810 fine-grained form), and inappropriate predication. If this
1811 succeeds, return the encoding and set *OK to TRUE; otherwise return
1812 0 and set *OK to FALSE. If a fix is needed, set *FIX_NEEDED to
1813 true and fill in *FIX_EXP, *FIX_PCREL, *FX_R_TYPE and *FIX_ADDA.
1814 Print error messages for failure if PRINT_ERRORS is TRUE; the
1815 opcode starts at STR and has length OPC_LEN. */
1816
1817 static unsigned int
1818 tic6x_try_encode (tic6x_opcode_id id, tic6x_operand *operands,
1819 unsigned int num_operands, unsigned int this_line_creg,
1820 unsigned int this_line_z, unsigned int func_unit_side,
1821 unsigned int func_unit_cross,
1822 unsigned int func_unit_data_side, int sploop_ii,
1823 expressionS **fix_exp, int *fix_pcrel,
1824 bfd_reloc_code_real_type *fx_r_type, bfd_boolean *fix_adda,
1825 bfd_boolean *fix_needed, bfd_boolean *ok,
1826 bfd_boolean print_errors, char *str, int opc_len)
1827 {
1828 const tic6x_opcode *opct;
1829 const tic6x_insn_format *fmt;
1830 unsigned int opcode_value;
1831 unsigned int fld;
1832
1833 opct = &tic6x_opcode_table[id];
1834 fmt = &tic6x_insn_format_table[opct->format];
1835 opcode_value = fmt->cst_bits;
1836
1837 for (fld = 0; fld < opct->num_fixed_fields; fld++)
1838 {
1839 if (opct->fixed_fields[fld].min_val == opct->fixed_fields[fld].max_val)
1840 {
1841 const tic6x_insn_field *fldd;
1842 fldd = tic6x_field_from_fmt (fmt, opct->fixed_fields[fld].field_id);
1843 if (fldd == NULL)
1844 abort ();
1845 opcode_value |= opct->fixed_fields[fld].min_val << fldd->low_pos;
1846 }
1847 }
1848
1849 for (fld = 0; fld < opct->num_variable_fields; fld++)
1850 {
1851 const tic6x_insn_field *fldd;
1852 unsigned int value;
1853 unsigned int opno;
1854 unsigned int ffld;
1855 offsetT sign_value;
1856 unsigned int bits;
1857 unsigned int fcyc_bits;
1858 expressionS *expp;
1859 expressionS ucexp;
1860 tic6x_mem_ref mem;
1861
1862 fldd = tic6x_field_from_fmt (fmt, opct->variable_fields[fld].field_id);
1863 if (fldd == NULL)
1864 abort ();
1865 opno = opct->variable_fields[fld].operand_num;
1866 switch (opct->variable_fields[fld].coding_method)
1867 {
1868 case tic6x_coding_ucst:
1869 if (operands[opno].form != TIC6X_OP_EXP)
1870 abort ();
1871 if (operands[opno].value.exp.X_op != O_constant)
1872 abort ();
1873 ucexp = operands[opno].value.exp;
1874 unsigned_constant:
1875 if (ucexp.X_add_number < 0
1876 || ucexp.X_add_number >= (1 << fldd->width))
1877 {
1878 if (print_errors)
1879 as_bad (_("operand %u of '%.*s' out of range"), opno + 1,
1880 opc_len, str);
1881 *ok = FALSE;
1882 return 0;
1883 }
1884 value = ucexp.X_add_number;
1885 break;
1886
1887 case tic6x_coding_scst:
1888 if (operands[opno].form != TIC6X_OP_EXP)
1889 abort ();
1890 if (operands[opno].value.exp.X_op != O_constant)
1891 {
1892 value = 0;
1893 /* Opcode table should not permit non-constants without
1894 a known relocation for them. */
1895 if (fldd->low_pos != 7 || fldd->width != 16)
1896 abort ();
1897 *fix_needed = TRUE;
1898 *fix_exp = &operands[opno].value.exp;
1899 *fix_pcrel = 0;
1900 *fx_r_type = BFD_RELOC_C6000_ABS_S16;
1901 *fix_adda = FALSE;
1902 break;
1903 }
1904 sign_value = SEXT (operands[opno].value.exp.X_add_number);
1905 signed_constant:
1906 if (sign_value < -(1 << (fldd->width - 1))
1907 || (sign_value >= (1 << (fldd->width - 1))))
1908 {
1909 if (print_errors)
1910 as_bad (_("operand %u of '%.*s' out of range"), opno + 1,
1911 opc_len, str);
1912 *ok = FALSE;
1913 return 0;
1914 }
1915 value = sign_value + (1 << (fldd->width - 1));
1916 value ^= (1 << (fldd->width - 1));
1917 break;
1918
1919 case tic6x_coding_ucst_minus_one:
1920 if (operands[opno].form != TIC6X_OP_EXP)
1921 abort ();
1922 if (operands[opno].value.exp.X_op != O_constant)
1923 abort ();
1924 if (operands[opno].value.exp.X_add_number <= 0
1925 || operands[opno].value.exp.X_add_number > (1 << fldd->width))
1926 {
1927 if (print_errors)
1928 as_bad (_("operand %u of '%.*s' out of range"), opno + 1,
1929 opc_len, str);
1930 *ok = FALSE;
1931 return 0;
1932 }
1933 value = operands[opno].value.exp.X_add_number - 1;
1934 break;
1935
1936 case tic6x_coding_scst_negate:
1937 if (operands[opno].form != TIC6X_OP_EXP)
1938 abort ();
1939 if (operands[opno].value.exp.X_op != O_constant)
1940 abort ();
1941 sign_value = SEXT (-operands[opno].value.exp.X_add_number);
1942 goto signed_constant;
1943
1944 case tic6x_coding_ulcst_dpr_byte:
1945 case tic6x_coding_ulcst_dpr_half:
1946 case tic6x_coding_ulcst_dpr_word:
1947 bits = tic6x_dpr_shift (opct->variable_fields[fld].coding_method);
1948 switch (operands[opno].form)
1949 {
1950 case TIC6X_OP_EXP:
1951 if (operands[opno].value.exp.X_op == O_constant)
1952 {
1953 ucexp = operands[opno].value.exp;
1954 goto unsigned_constant;
1955 }
1956 expp = &operands[opno].value.exp;
1957 break;
1958
1959 case TIC6X_OP_MEM_NOUNREG:
1960 mem = operands[opno].value.mem;
1961 tic6x_default_mem_ref (&mem);
1962 if (mem.offset_is_reg)
1963 abort ();
1964 if (mem.offset.exp.X_op == O_constant)
1965 {
1966 ucexp = mem.offset.exp;
1967 if (mem.scaled == tic6x_offset_unscaled)
1968 {
1969 if (ucexp.X_add_number & ((1 << bits) - 1))
1970 {
1971 if (print_errors)
1972 as_bad (_("offset in operand %u of '%.*s' not "
1973 "divisible by %u"), opno + 1, opc_len,
1974 str, 1u << bits);
1975 *ok = FALSE;
1976 return 0;
1977 }
1978 ucexp.X_add_number >>= bits;
1979 }
1980 goto unsigned_constant;
1981 }
1982 if (mem.scaled != tic6x_offset_unscaled)
1983 abort ();
1984 if (operands[opno].value.mem.mod == tic6x_mem_mod_none
1985 || operands[opno].value.mem.scaled != tic6x_offset_unscaled
1986 || operands[opno].value.mem.offset_is_reg)
1987 abort ();
1988 expp = &operands[opno].value.mem.offset.exp;
1989 break;
1990
1991 default:
1992 abort ();
1993 }
1994 value = 0;
1995 /* Opcode table should not use this encoding without a known
1996 relocation. */
1997 if (fldd->low_pos != 8 || fldd->width != 15)
1998 abort ();
1999 /* We do not check for offset divisibility here; such a
2000 check is not needed at this point to encode the value,
2001 and if there is eventually a problem it will be detected
2002 either in md_apply_fix or at link time. */
2003 *fix_needed = TRUE;
2004 *fix_exp = expp;
2005 *fix_pcrel = 0;
2006 *fx_r_type
2007 = tic6x_dpr_reloc (opct->variable_fields[fld].coding_method);
2008 if (operands[opno].form == TIC6X_OP_EXP)
2009 *fix_adda = TRUE;
2010 else
2011 *fix_adda = FALSE;
2012 break;
2013
2014 case tic6x_coding_lcst_low16:
2015 if (operands[opno].form != TIC6X_OP_EXP)
2016 abort ();
2017 if (operands[opno].value.exp.X_op == O_constant)
2018 value = operands[opno].value.exp.X_add_number & 0xffff;
2019 else
2020 {
2021 value = 0;
2022 /* Opcode table should not use this encoding without a
2023 known relocation. */
2024 if (fldd->low_pos != 7 || fldd->width != 16)
2025 abort ();
2026 *fix_needed = TRUE;
2027 *fix_exp = &operands[opno].value.exp;
2028 *fix_pcrel = 0;
2029 *fx_r_type = BFD_RELOC_C6000_ABS_L16;
2030 *fix_adda = FALSE;
2031 }
2032 break;
2033
2034 case tic6x_coding_lcst_high16:
2035 if (operands[opno].form != TIC6X_OP_EXP)
2036 abort ();
2037 if (operands[opno].value.exp.X_op == O_constant)
2038 value = (operands[opno].value.exp.X_add_number >> 16) & 0xffff;
2039 else
2040 {
2041 value = 0;
2042 /* Opcode table should not use this encoding without a
2043 known relocation. */
2044 if (fldd->low_pos != 7 || fldd->width != 16)
2045 abort ();
2046 *fix_needed = TRUE;
2047 *fix_exp = &operands[opno].value.exp;
2048 *fix_pcrel = 0;
2049 *fx_r_type = BFD_RELOC_C6000_ABS_H16;
2050 *fix_adda = FALSE;
2051 }
2052 break;
2053
2054 case tic6x_coding_pcrel:
2055 case tic6x_coding_pcrel_half:
2056 if (operands[opno].form != TIC6X_OP_EXP)
2057 abort ();
2058 value = 0;
2059 *fix_needed = TRUE;
2060 *fix_exp = &operands[opno].value.exp;
2061 *fix_pcrel = 1;
2062 if (fldd->low_pos == 7 && fldd->width == 21)
2063 *fx_r_type = BFD_RELOC_C6000_PCR_S21;
2064 else if (fldd->low_pos == 16 && fldd->width == 12)
2065 *fx_r_type = BFD_RELOC_C6000_PCR_S12;
2066 else if (fldd->low_pos == 13 && fldd->width == 10)
2067 *fx_r_type = BFD_RELOC_C6000_PCR_S10;
2068 else if (fldd->low_pos == 16 && fldd->width == 7)
2069 *fx_r_type = BFD_RELOC_C6000_PCR_S7;
2070 else
2071 /* Opcode table should not use this encoding without a
2072 known relocation. */
2073 abort ();
2074 *fix_adda = FALSE;
2075 break;
2076
2077 case tic6x_coding_reg:
2078 switch (operands[opno].form)
2079 {
2080 case TIC6X_OP_REG:
2081 case TIC6X_OP_REGPAIR:
2082 value = operands[opno].value.reg.num;
2083 break;
2084
2085 case TIC6X_OP_MEM_NOUNREG:
2086 case TIC6X_OP_MEM_UNREG:
2087 value = operands[opno].value.mem.base_reg.num;
2088 break;
2089
2090 default:
2091 abort ();
2092 }
2093 break;
2094
2095 case tic6x_coding_areg:
2096 switch (operands[opno].form)
2097 {
2098 case TIC6X_OP_REG:
2099 value = (operands[opno].value.reg.num == 15 ? 1 : 0);
2100 break;
2101
2102 case TIC6X_OP_MEM_NOUNREG:
2103 value = (operands[opno].value.mem.base_reg.num == 15 ? 1 : 0);
2104 break;
2105
2106 default:
2107 abort ();
2108 }
2109 break;
2110
2111 case tic6x_coding_crlo:
2112 if (operands[opno].form != TIC6X_OP_CTRL)
2113 abort ();
2114 value = tic6x_ctrl_table[operands[opno].value.ctrl].crlo;
2115 break;
2116
2117 case tic6x_coding_crhi:
2118 if (operands[opno].form != TIC6X_OP_CTRL)
2119 abort ();
2120 value = 0;
2121 break;
2122
2123 case tic6x_coding_reg_shift:
2124 if (operands[opno].form != TIC6X_OP_REGPAIR)
2125 abort ();
2126 value = operands[opno].value.reg.num >> 1;
2127 break;
2128
2129 case tic6x_coding_mem_offset:
2130 if (operands[opno].form != TIC6X_OP_MEM_NOUNREG)
2131 abort ();
2132 mem = operands[opno].value.mem;
2133 tic6x_default_mem_ref (&mem);
2134 if (mem.offset_is_reg)
2135 {
2136 if (mem.scaled != tic6x_offset_scaled)
2137 abort ();
2138 value = mem.offset.reg.num;
2139 }
2140 else
2141 {
2142 int scale;
2143
2144 if (mem.offset.exp.X_op != O_constant)
2145 abort ();
2146 switch (mem.scaled)
2147 {
2148 case tic6x_offset_scaled:
2149 scale = 1;
2150 break;
2151
2152 case tic6x_offset_unscaled:
2153 scale = opct->operand_info[opno].size;
2154 if (scale != 1 && scale != 2 && scale != 4 && scale != 8)
2155 abort ();
2156 break;
2157
2158 default:
2159 abort ();
2160 }
2161 if (mem.offset.exp.X_add_number < 0
2162 || mem.offset.exp.X_add_number >= (1 << fldd->width) * scale)
2163 {
2164 if (print_errors)
2165 as_bad (_("offset in operand %u of '%.*s' out of range"),
2166 opno + 1, opc_len, str);
2167 *ok = FALSE;
2168 return 0;
2169 }
2170 if (mem.offset.exp.X_add_number % scale)
2171 {
2172 if (print_errors)
2173 as_bad (_("offset in operand %u of '%.*s' not "
2174 "divisible by %u"),
2175 opno + 1, opc_len, str, scale);
2176 *ok = FALSE;
2177 return 0;
2178 }
2179 value = mem.offset.exp.X_add_number / scale;
2180 }
2181 break;
2182
2183 case tic6x_coding_mem_offset_noscale:
2184 if (operands[opno].form != TIC6X_OP_MEM_UNREG)
2185 abort ();
2186 mem = operands[opno].value.mem;
2187 tic6x_default_mem_ref (&mem);
2188 if (mem.offset_is_reg)
2189 value = mem.offset.reg.num;
2190 else
2191 {
2192 if (mem.offset.exp.X_op != O_constant)
2193 abort ();
2194 if (mem.offset.exp.X_add_number < 0
2195 || mem.offset.exp.X_add_number >= (1 << fldd->width))
2196 {
2197 if (print_errors)
2198 as_bad (_("offset in operand %u of '%.*s' out of range"),
2199 opno + 1, opc_len, str);
2200 *ok = FALSE;
2201 return 0;
2202 }
2203 value = mem.offset.exp.X_add_number;
2204 }
2205 break;
2206
2207 case tic6x_coding_mem_mode:
2208 if (operands[opno].form != TIC6X_OP_MEM_NOUNREG
2209 && operands[opno].form != TIC6X_OP_MEM_UNREG)
2210 abort ();
2211 mem = operands[opno].value.mem;
2212 tic6x_default_mem_ref (&mem);
2213 switch (mem.mod)
2214 {
2215 case tic6x_mem_mod_plus:
2216 value = 1;
2217 break;
2218
2219 case tic6x_mem_mod_minus:
2220 value = 0;
2221 break;
2222
2223 case tic6x_mem_mod_preinc:
2224 value = 9;
2225 break;
2226
2227 case tic6x_mem_mod_predec:
2228 value = 8;
2229 break;
2230
2231 case tic6x_mem_mod_postinc:
2232 value = 11;
2233 break;
2234
2235 case tic6x_mem_mod_postdec:
2236 value = 10;
2237 break;
2238
2239 default:
2240 abort ();
2241 }
2242 value += (mem.offset_is_reg ? 4 : 0);
2243 break;
2244
2245 case tic6x_coding_scaled:
2246 if (operands[opno].form != TIC6X_OP_MEM_UNREG)
2247 abort ();
2248 mem = operands[opno].value.mem;
2249 tic6x_default_mem_ref (&mem);
2250 switch (mem.scaled)
2251 {
2252 case tic6x_offset_unscaled:
2253 value = 0;
2254 break;
2255
2256 case tic6x_offset_scaled:
2257 value = 1;
2258 break;
2259
2260 default:
2261 abort ();
2262 }
2263 break;
2264
2265 case tic6x_coding_spmask:
2266 /* The position of such a field is hardcoded in the handling
2267 of "||^". */
2268 if (fldd->low_pos != 18)
2269 abort ();
2270 value = 0;
2271 for (opno = 0; opno < num_operands; opno++)
2272 {
2273 unsigned int v;
2274
2275 v = tic6x_encode_spmask (operands[opno].value.func_unit.base,
2276 operands[opno].value.func_unit.side);
2277 if (value & v)
2278 {
2279 if (print_errors)
2280 as_bad (_("functional unit already masked for operand "
2281 "%u of '%.*s'"), opno + 1, opc_len, str);
2282 *ok = FALSE;
2283 return 0;
2284 }
2285 value |= v;
2286 }
2287 break;
2288
2289 case tic6x_coding_reg_unused:
2290 /* This is a placeholder; correct handling goes along with
2291 resource constraint checks. */
2292 value = 0;
2293 break;
2294
2295 case tic6x_coding_fstg:
2296 case tic6x_coding_fcyc:
2297 if (operands[opno].form != TIC6X_OP_EXP)
2298 abort ();
2299 if (operands[opno].value.exp.X_op != O_constant)
2300 abort ();
2301 if (!sploop_ii)
2302 {
2303 if (print_errors)
2304 as_bad (_("'%.*s' instruction not in a software "
2305 "pipelined loop"),
2306 opc_len, str);
2307 *ok = FALSE;
2308 return 0;
2309 }
2310
2311 if (sploop_ii <= 1)
2312 fcyc_bits = 0;
2313 else if (sploop_ii <= 2)
2314 fcyc_bits = 1;
2315 else if (sploop_ii <= 4)
2316 fcyc_bits = 2;
2317 else if (sploop_ii <= 8)
2318 fcyc_bits = 3;
2319 else if (sploop_ii <= 14)
2320 fcyc_bits = 4;
2321 else
2322 abort ();
2323 if (fcyc_bits > fldd->width)
2324 abort ();
2325
2326 if (opct->variable_fields[fld].coding_method == tic6x_coding_fstg)
2327 {
2328 if (operands[opno].value.exp.X_add_number < 0
2329 || (operands[opno].value.exp.X_add_number
2330 >= (1 << (fldd->width - fcyc_bits))))
2331 {
2332 if (print_errors)
2333 as_bad (_("operand %u of '%.*s' out of range"), opno + 1,
2334 opc_len, str);
2335 *ok = FALSE;
2336 return 0;
2337 }
2338 value = operands[opno].value.exp.X_add_number << fcyc_bits;
2339 }
2340 else
2341 {
2342 if (operands[opno].value.exp.X_add_number < 0
2343 || (operands[opno].value.exp.X_add_number >= sploop_ii))
2344 {
2345 if (print_errors)
2346 as_bad (_("operand %u of '%.*s' out of range"), opno + 1,
2347 opc_len, str);
2348 *ok = FALSE;
2349 return 0;
2350 }
2351 value = operands[opno].value.exp.X_add_number;
2352 }
2353 break;
2354
2355 case tic6x_coding_fu:
2356 value = func_unit_side == 2 ? 1 : 0;
2357 break;
2358
2359 case tic6x_coding_data_fu:
2360 value = func_unit_data_side == 2 ? 1 : 0;
2361 break;
2362
2363 case tic6x_coding_xpath:
2364 value = func_unit_cross;
2365 break;
2366
2367 default:
2368 abort ();
2369 }
2370
2371 for (ffld = 0; ffld < opct->num_fixed_fields; ffld++)
2372 if ((opct->fixed_fields[ffld].field_id
2373 == opct->variable_fields[fld].field_id)
2374 && (value < opct->fixed_fields[ffld].min_val
2375 || value > opct->fixed_fields[ffld].max_val))
2376 {
2377 if (print_errors)
2378 as_bad (_("operand %u of '%.*s' out of range"), opno + 1,
2379 opc_len, str);
2380 *ok = FALSE;
2381 return 0;
2382 }
2383
2384 opcode_value |= value << fldd->low_pos;
2385 }
2386
2387 if (this_line_creg)
2388 {
2389 const tic6x_insn_field *creg;
2390 const tic6x_insn_field *z;
2391
2392 creg = tic6x_field_from_fmt (fmt, tic6x_field_creg);
2393 if (creg == NULL)
2394 {
2395 if (print_errors)
2396 as_bad (_("instruction '%.*s' cannot be predicated"),
2397 opc_len, str);
2398 *ok = FALSE;
2399 return 0;
2400 }
2401 z = tic6x_field_from_fmt (fmt, tic6x_field_z);
2402 /* If there is a creg field, there must be a z field; otherwise
2403 there is an error in the format table. */
2404 if (z == NULL)
2405 abort ();
2406
2407 opcode_value |= this_line_creg << creg->low_pos;
2408 opcode_value |= this_line_z << z->low_pos;
2409 }
2410
2411 *ok = TRUE;
2412 return opcode_value;
2413 }
2414
2415 /* Convert the target integer stored in N bytes in BUF to a host
2416 integer, returning that value. */
2417
2418 static valueT
2419 md_chars_to_number (char *buf, int n)
2420 {
2421 valueT result = 0;
2422 unsigned char *p = (unsigned char *) buf;
2423
2424 if (target_big_endian)
2425 {
2426 while (n--)
2427 {
2428 result <<= 8;
2429 result |= (*p++ & 0xff);
2430 }
2431 }
2432 else
2433 {
2434 while (n--)
2435 {
2436 result <<= 8;
2437 result |= (p[n] & 0xff);
2438 }
2439 }
2440
2441 return result;
2442 }
2443
2444 /* Assemble the instruction starting at STR (an opcode, with the
2445 opcode name all-lowercase). */
2446
2447 void
2448 md_assemble (char *str)
2449 {
2450 char *p;
2451 int opc_len;
2452 bfd_boolean this_line_parallel;
2453 bfd_boolean this_line_spmask;
2454 unsigned int this_line_creg;
2455 unsigned int this_line_z;
2456 bfd_boolean this_insn_label;
2457 segment_info_type *seginfo;
2458 tic6x_opcode_list *opc_list, *opc;
2459 tic6x_func_unit_base func_unit_base = tic6x_func_unit_nfu;
2460 unsigned int func_unit_side = 0;
2461 unsigned int func_unit_cross = 0;
2462 unsigned int cross_side = 0;
2463 unsigned int func_unit_data_side = 0;
2464 unsigned int max_matching_opcodes, num_matching_opcodes;
2465 tic6x_opcode_id *opcm = NULL;
2466 unsigned int opc_rank[TIC6X_NUM_PREFER];
2467 const tic6x_opcode *opct = NULL;
2468 int min_rank, try_rank, max_rank;
2469 bfd_boolean num_operands_permitted[TIC6X_MAX_SOURCE_OPERANDS + 1]
2470 = { FALSE };
2471 unsigned int operand_forms[TIC6X_MAX_SOURCE_OPERANDS] = { 0 };
2472 tic6x_operand operands[TIC6X_MAX_SOURCE_OPERANDS];
2473 unsigned int max_num_operands;
2474 unsigned int num_operands_read;
2475 bfd_boolean ok_this_arch, ok_this_fu, ok_this_arch_fu;
2476 bfd_boolean bad_operands = FALSE;
2477 unsigned int opcode_value;
2478 bfd_boolean encoded_ok;
2479 bfd_boolean fix_needed = FALSE;
2480 expressionS *fix_exp = NULL;
2481 int fix_pcrel = 0;
2482 bfd_reloc_code_real_type fx_r_type = BFD_RELOC_UNUSED;
2483 bfd_boolean fix_adda = FALSE;
2484 char *output;
2485
2486 p = str;
2487 while (*p && !is_end_of_line[(unsigned char) *p] && *p != ' ')
2488 p++;
2489
2490 /* This function should only have been called when there is actually
2491 an instruction to assemble. */
2492 if (p == str)
2493 abort ();
2494
2495 /* Reset global settings for parallel bars and predicates now to
2496 avoid extra errors if there are problems with this opcode. */
2497 this_line_parallel = tic6x_line_parallel;
2498 this_line_spmask = tic6x_line_spmask;
2499 this_line_creg = tic6x_line_creg;
2500 this_line_z = tic6x_line_z;
2501 tic6x_line_parallel = FALSE;
2502 tic6x_line_spmask = FALSE;
2503 tic6x_line_creg = 0;
2504 tic6x_line_z = 0;
2505 seginfo = seg_info (now_seg);
2506 this_insn_label = seginfo->tc_segment_info_data.seen_label;
2507 seginfo->tc_segment_info_data.seen_label = FALSE;
2508
2509 opc_list = hash_find_n (opcode_hash, str, p - str);
2510 if (opc_list == NULL)
2511 {
2512 char c = *p;
2513 *p = 0;
2514 as_bad (_("unknown opcode '%s'"), str);
2515 *p = c;
2516 return;
2517 }
2518
2519 opc_len = p - str;
2520 skip_whitespace (p);
2521
2522 /* See if there is something that looks like a functional unit
2523 specifier. */
2524 if (*p == '.')
2525 {
2526 bfd_boolean good_func_unit;
2527 tic6x_func_unit_base maybe_base = tic6x_func_unit_nfu;
2528 unsigned int maybe_side = 0;
2529 unsigned int maybe_cross = 0;
2530 unsigned int maybe_data_side = 0;
2531
2532 good_func_unit = tic6x_parse_func_unit_base (p + 1, &maybe_base,
2533 &maybe_side);
2534
2535 if (good_func_unit)
2536 {
2537 if (p[3] == ' ' || is_end_of_line[(unsigned char) p[3]])
2538 p += 3;
2539 else if ((p[3] == 'x' || p[3] == 'X')
2540 && (p[4] == ' ' || is_end_of_line[(unsigned char) p[4]]))
2541 {
2542 maybe_cross = 1;
2543 p += 4;
2544 }
2545 else if (maybe_base == tic6x_func_unit_d
2546 && (p[3] == 't' || p[3] == 'T')
2547 && (p[4] == '1' || p[4] == '2')
2548 && (p[5] == ' ' || is_end_of_line[(unsigned char) p[5]]))
2549 {
2550 maybe_data_side = p[4] - '0';
2551 p += 5;
2552 }
2553 else
2554 good_func_unit = FALSE;
2555 }
2556
2557 if (good_func_unit)
2558 {
2559 func_unit_base = maybe_base;
2560 func_unit_side = maybe_side;
2561 func_unit_cross = maybe_cross;
2562 cross_side = (func_unit_cross ? 3 - func_unit_side : func_unit_side);
2563 func_unit_data_side = maybe_data_side;
2564 }
2565
2566 skip_whitespace (p);
2567 }
2568
2569 /* Determine which entries in the opcode table match, and the
2570 associated permitted forms of operands. */
2571 max_matching_opcodes = 0;
2572 for (opc = opc_list; opc; opc = opc->next)
2573 max_matching_opcodes++;
2574 num_matching_opcodes = 0;
2575 opcm = xmalloc (max_matching_opcodes * sizeof (*opcm));
2576 max_num_operands = 0;
2577 ok_this_arch = FALSE;
2578 ok_this_fu = FALSE;
2579 ok_this_arch_fu = FALSE;
2580 for (opc = opc_list; opc; opc = opc->next)
2581 {
2582 unsigned int num_operands;
2583 unsigned int i;
2584 bfd_boolean this_opc_arch_ok = TRUE;
2585 bfd_boolean this_opc_fu_ok = TRUE;
2586
2587 if (tic6x_insn_format_table[tic6x_opcode_table[opc->id].format].num_bits
2588 != 32)
2589 continue;
2590 if (!(tic6x_opcode_table[opc->id].isa_variants & tic6x_features))
2591 this_opc_arch_ok = FALSE;
2592 if (tic6x_opcode_table[opc->id].func_unit != func_unit_base)
2593 this_opc_fu_ok = FALSE;
2594 if (func_unit_side == 1
2595 && (tic6x_opcode_table[opc->id].flags & TIC6X_FLAG_SIDE_B_ONLY))
2596 this_opc_fu_ok = FALSE;
2597 if (func_unit_cross
2598 && (tic6x_opcode_table[opc->id].flags & TIC6X_FLAG_NO_CROSS))
2599 this_opc_fu_ok = FALSE;
2600 if (!func_unit_data_side
2601 && (tic6x_opcode_table[opc->id].flags
2602 & (TIC6X_FLAG_LOAD | TIC6X_FLAG_STORE)))
2603 this_opc_fu_ok = FALSE;
2604 if (func_unit_data_side
2605 && !(tic6x_opcode_table[opc->id].flags
2606 & (TIC6X_FLAG_LOAD | TIC6X_FLAG_STORE)))
2607 this_opc_fu_ok = FALSE;
2608 if (func_unit_data_side == 1
2609 && (tic6x_opcode_table[opc->id].flags & TIC6X_FLAG_SIDE_T2_ONLY))
2610 this_opc_fu_ok = FALSE;
2611 if (this_opc_arch_ok)
2612 ok_this_arch = TRUE;
2613 if (this_opc_fu_ok)
2614 ok_this_fu = TRUE;
2615 if (!this_opc_arch_ok || !this_opc_fu_ok)
2616 continue;
2617 ok_this_arch_fu = TRUE;
2618 opcm[num_matching_opcodes] = opc->id;
2619 num_matching_opcodes++;
2620 num_operands = tic6x_opcode_table[opc->id].num_operands;
2621
2622 if (tic6x_opcode_table[opc->id].flags & TIC6X_FLAG_SPMASK)
2623 {
2624 if (num_operands != 1
2625 || (tic6x_opcode_table[opc->id].operand_info[0].form
2626 != tic6x_operand_func_unit))
2627 abort ();
2628 num_operands = 8;
2629 for (i = 0; i < num_operands; i++)
2630 {
2631 operand_forms[i]
2632 |= tic6x_coarse_operand_form (tic6x_operand_func_unit);
2633 num_operands_permitted[i] = TRUE;
2634 }
2635 }
2636 else
2637 {
2638 for (i = 0; i < num_operands; i++)
2639 {
2640 tic6x_operand_form f
2641 = tic6x_opcode_table[opc->id].operand_info[i].form;
2642
2643 operand_forms[i] |= tic6x_coarse_operand_form (f);
2644 }
2645 }
2646 num_operands_permitted[num_operands] = TRUE;
2647 if (num_operands > max_num_operands)
2648 max_num_operands = num_operands;
2649 }
2650
2651 if (!ok_this_arch)
2652 {
2653 as_bad (_("'%.*s' instruction not supported on this architecture"),
2654 opc_len, str);
2655 free (opcm);
2656 return;
2657 }
2658
2659 if (!ok_this_fu)
2660 {
2661 as_bad (_("'%.*s' instruction not supported on this functional unit"),
2662 opc_len, str);
2663 free (opcm);
2664 return;
2665 }
2666
2667 if (!ok_this_arch_fu)
2668 {
2669 as_bad (_("'%.*s' instruction not supported on this functional unit"
2670 " for this architecture"),
2671 opc_len, str);
2672 free (opcm);
2673 return;
2674 }
2675
2676 /* If there were no instructions matching the above availability
2677 checks, we should now have given an error and returned. */
2678 if (num_matching_opcodes == 0)
2679 abort ();
2680
2681 num_operands_read = 0;
2682 while (TRUE)
2683 {
2684 skip_whitespace (p);
2685 if (is_end_of_line[(unsigned char) *p])
2686 {
2687 if (num_operands_read > 0)
2688 {
2689 as_bad (_("missing operand after comma"));
2690 bad_operands = TRUE;
2691 }
2692 break;
2693 }
2694
2695 if (max_num_operands == 0)
2696 {
2697 as_bad (_("too many operands to '%.*s'"), opc_len, str);
2698 bad_operands = TRUE;
2699 break;
2700 }
2701
2702 if (!tic6x_parse_operand (&p, &operands[num_operands_read],
2703 operand_forms[num_operands_read], str, opc_len,
2704 num_operands_read + 1))
2705 bad_operands = TRUE;
2706 num_operands_read++;
2707
2708 if (is_end_of_line[(unsigned char) *p])
2709 break;
2710 else if (*p == ',')
2711 {
2712 p++;
2713 if (num_operands_read == max_num_operands)
2714 {
2715 as_bad (_("too many operands to '%.*s'"), opc_len, str);
2716 bad_operands = TRUE;
2717 break;
2718 }
2719 continue;
2720 }
2721 else
2722 /* Operand parsing should consume whole operands. */
2723 abort ();
2724 }
2725
2726 if (!bad_operands && !num_operands_permitted[num_operands_read])
2727 {
2728 as_bad (_("bad number of operands to '%.*s'"), opc_len, str);
2729 bad_operands = TRUE;
2730 }
2731
2732 if (!bad_operands)
2733 {
2734 /* Each operand is of the right syntactic form for some opcode
2735 choice, and the number of operands is valid. Check that each
2736 operand is OK in detail for some opcode choice with the right
2737 number of operands. */
2738 unsigned int i;
2739
2740 for (i = 0; i < num_operands_read; i++)
2741 {
2742 bfd_boolean coarse_ok = FALSE;
2743 bfd_boolean fine_ok = FALSE;
2744 tic6x_operand_match fine_failure = tic6x_match_matches;
2745 unsigned int j;
2746
2747 for (j = 0; j < num_matching_opcodes; j++)
2748 {
2749 tic6x_operand_form f;
2750 tic6x_rw rw;
2751 unsigned int cf;
2752 tic6x_operand_match this_fine_failure;
2753
2754 if (tic6x_opcode_table[opcm[j]].flags & TIC6X_FLAG_SPMASK)
2755 {
2756 f = tic6x_operand_func_unit;
2757 rw = tic6x_rw_none;
2758 }
2759 else
2760 {
2761 if (tic6x_opcode_table[opcm[j]].num_operands
2762 != num_operands_read)
2763 continue;
2764
2765 f = tic6x_opcode_table[opcm[j]].operand_info[i].form;
2766 rw = tic6x_opcode_table[opcm[j]].operand_info[i].rw;
2767 }
2768 cf = tic6x_coarse_operand_form (f);
2769
2770 if (operands[i].form != cf)
2771 continue;
2772
2773 coarse_ok = TRUE;
2774 this_fine_failure
2775 = tic6x_operand_matches_form (&operands[i], f, rw,
2776 func_unit_side,
2777 cross_side,
2778 func_unit_data_side);
2779 if (this_fine_failure == tic6x_match_matches)
2780 {
2781 fine_ok = TRUE;
2782 break;
2783 }
2784 if (fine_failure == tic6x_match_matches
2785 || fine_failure > this_fine_failure)
2786 fine_failure = this_fine_failure;
2787 }
2788
2789 /* No instructions should have operand syntactic forms only
2790 acceptable with certain numbers of operands, so no
2791 diagnostic for this case. */
2792 if (!coarse_ok)
2793 abort ();
2794
2795 if (!fine_ok)
2796 {
2797 switch (fine_failure)
2798 {
2799 case tic6x_match_non_const:
2800 as_bad (_("operand %u of '%.*s' not constant"),
2801 i + 1, opc_len, str);
2802 break;
2803
2804 case tic6x_match_wrong_side:
2805 as_bad (_("operand %u of '%.*s' on wrong side"),
2806 i + 1, opc_len, str);
2807 break;
2808
2809 case tic6x_match_bad_return:
2810 as_bad (_("operand %u of '%.*s' not a valid return "
2811 "address register"),
2812 i + 1, opc_len, str);
2813 break;
2814
2815 case tic6x_match_ctrl_write_only:
2816 as_bad (_("operand %u of '%.*s' is write-only"),
2817 i + 1, opc_len, str);
2818 break;
2819
2820 case tic6x_match_ctrl_read_only:
2821 as_bad (_("operand %u of '%.*s' is read-only"),
2822 i + 1, opc_len, str);
2823 break;
2824
2825 case tic6x_match_bad_mem:
2826 as_bad (_("operand %u of '%.*s' not a valid memory "
2827 "reference"),
2828 i + 1, opc_len, str);
2829 break;
2830
2831 case tic6x_match_bad_address:
2832 as_bad (_("operand %u of '%.*s' not a valid base "
2833 "address register"),
2834 i + 1, opc_len, str);
2835 break;
2836
2837 default:
2838 abort ();
2839 }
2840 bad_operands = TRUE;
2841 break;
2842 }
2843 }
2844 }
2845
2846 if (!bad_operands)
2847 {
2848 /* Each operand is OK for some opcode choice, and the number of
2849 operands is valid. Check whether there is an opcode choice
2850 for which all operands are simultaneously valid. */
2851 unsigned int i;
2852 bfd_boolean found_match = FALSE;
2853
2854 for (i = 0; i < TIC6X_NUM_PREFER; i++)
2855 opc_rank[i] = (unsigned int) -1;
2856
2857 min_rank = TIC6X_NUM_PREFER - 1;
2858 max_rank = 0;
2859
2860 for (i = 0; i < num_matching_opcodes; i++)
2861 {
2862 unsigned int j;
2863 bfd_boolean this_matches = TRUE;
2864
2865 if (!(tic6x_opcode_table[opcm[i]].flags & TIC6X_FLAG_SPMASK)
2866 && tic6x_opcode_table[opcm[i]].num_operands != num_operands_read)
2867 continue;
2868
2869 for (j = 0; j < num_operands_read; j++)
2870 {
2871 tic6x_operand_form f;
2872 tic6x_rw rw;
2873
2874 if (tic6x_opcode_table[opcm[i]].flags & TIC6X_FLAG_SPMASK)
2875 {
2876 f = tic6x_operand_func_unit;
2877 rw = tic6x_rw_none;
2878 }
2879 else
2880 {
2881 f = tic6x_opcode_table[opcm[i]].operand_info[j].form;
2882 rw = tic6x_opcode_table[opcm[i]].operand_info[j].rw;
2883 }
2884 if (tic6x_operand_matches_form (&operands[j], f, rw,
2885 func_unit_side,
2886 cross_side,
2887 func_unit_data_side)
2888 != tic6x_match_matches)
2889 {
2890 this_matches = FALSE;
2891 break;
2892 }
2893 }
2894
2895 if (this_matches)
2896 {
2897 int rank = TIC6X_PREFER_VAL (tic6x_opcode_table[opcm[i]].flags);
2898
2899 if (rank < min_rank)
2900 min_rank = rank;
2901 if (rank > max_rank)
2902 max_rank = rank;
2903
2904 if (opc_rank[rank] == (unsigned int) -1)
2905 opc_rank[rank] = i;
2906 else
2907 /* The opcode table should provide a total ordering
2908 for all cases where multiple matches may get
2909 here. */
2910 abort ();
2911
2912 found_match = TRUE;
2913 }
2914 }
2915
2916 if (!found_match)
2917 {
2918 as_bad (_("bad operand combination for '%.*s'"), opc_len, str);
2919 bad_operands = TRUE;
2920 }
2921 }
2922
2923 if (bad_operands)
2924 {
2925 free (opcm);
2926 return;
2927 }
2928
2929 opcode_value = 0;
2930 encoded_ok = FALSE;
2931 for (try_rank = max_rank; try_rank >= min_rank; try_rank--)
2932 {
2933 fix_needed = FALSE;
2934
2935 if (opc_rank[try_rank] == (unsigned int) -1)
2936 continue;
2937
2938 opcode_value = tic6x_try_encode (opcm[opc_rank[try_rank]], operands,
2939 num_operands_read, this_line_creg,
2940 this_line_z, func_unit_side,
2941 func_unit_cross, func_unit_data_side,
2942 seginfo->tc_segment_info_data.sploop_ii,
2943 &fix_exp, &fix_pcrel, &fx_r_type,
2944 &fix_adda, &fix_needed, &encoded_ok,
2945 (try_rank == min_rank ? TRUE : FALSE),
2946 str, opc_len);
2947 if (encoded_ok)
2948 {
2949 opct = &tic6x_opcode_table[opcm[opc_rank[try_rank]]];
2950 break;
2951 }
2952 }
2953
2954 free (opcm);
2955
2956 if (!encoded_ok)
2957 return;
2958
2959 if (this_line_parallel)
2960 {
2961 if (seginfo->tc_segment_info_data.num_execute_packet_insns == 0)
2962 {
2963 as_bad (_("parallel instruction not following another instruction"));
2964 return;
2965 }
2966
2967 if (seginfo->tc_segment_info_data.num_execute_packet_insns >= 8)
2968 {
2969 as_bad (_("too many instructions in execute packet"));
2970 return;
2971 }
2972
2973 if (this_insn_label)
2974 as_bad (_("label not at start of execute packet"));
2975
2976 if (opct->flags & TIC6X_FLAG_FIRST)
2977 as_bad (_("'%.*s' instruction not at start of execute packet"),
2978 opc_len, str);
2979
2980 *seginfo->tc_segment_info_data.last_insn_lsb |= 0x1;
2981 }
2982 else
2983 {
2984 seginfo->tc_segment_info_data.num_execute_packet_insns = 0;
2985 seginfo->tc_segment_info_data.spmask_addr = NULL;
2986 }
2987
2988 if (opct->flags & TIC6X_FLAG_SPLOOP)
2989 {
2990 if (seginfo->tc_segment_info_data.sploop_ii)
2991 as_bad (_("nested software pipelined loop"));
2992 if (num_operands_read != 1
2993 || operands[0].form != TIC6X_OP_EXP
2994 || operands[0].value.exp.X_op != O_constant)
2995 abort ();
2996 seginfo->tc_segment_info_data.sploop_ii
2997 = operands[0].value.exp.X_add_number;
2998 }
2999 else if (opct->flags & TIC6X_FLAG_SPKERNEL)
3000 {
3001 if (!seginfo->tc_segment_info_data.sploop_ii)
3002 as_bad (_("'%.*s' instruction not in a software pipelined loop"),
3003 opc_len, str);
3004 seginfo->tc_segment_info_data.sploop_ii = 0;
3005 }
3006
3007 if (this_line_spmask)
3008 {
3009 if (seginfo->tc_segment_info_data.spmask_addr == NULL)
3010 as_bad (_("'||^' without previous SPMASK"));
3011 else if (func_unit_base == tic6x_func_unit_nfu)
3012 as_bad (_("cannot mask instruction using no functional unit"));
3013 else
3014 {
3015 unsigned int spmask_opcode;
3016 unsigned int mask_bit;
3017
3018 spmask_opcode
3019 = md_chars_to_number (seginfo->tc_segment_info_data.spmask_addr,
3020 4);
3021 mask_bit = tic6x_encode_spmask (func_unit_base, func_unit_side);
3022 mask_bit <<= 18;
3023 if (spmask_opcode & mask_bit)
3024 as_bad (_("functional unit already masked"));
3025 spmask_opcode |= mask_bit;
3026 md_number_to_chars (seginfo->tc_segment_info_data.spmask_addr,
3027 spmask_opcode, 4);
3028 }
3029 }
3030
3031 record_alignment (now_seg, 5);
3032 output = frag_more (4);
3033 md_number_to_chars (output, opcode_value, 4);
3034 if (fix_needed)
3035 tic6x_fix_new_exp (frag_now, output - frag_now->fr_literal, 4, fix_exp,
3036 fix_pcrel, fx_r_type, fix_adda);
3037 seginfo->tc_segment_info_data.num_execute_packet_insns++;
3038 seginfo->tc_segment_info_data.last_insn_lsb
3039 = (target_big_endian ? output + 3 : output);
3040 if (opct->flags & TIC6X_FLAG_SPMASK)
3041 seginfo->tc_segment_info_data.spmask_addr = output;
3042 dwarf2_emit_insn (4);
3043 }
3044
3045 /* Modify NEWVAL (32-bit) by inserting VALUE, shifted right by SHIFT
3046 and the least significant BITS bits taken, at position POS. */
3047 #define MODIFY_VALUE(NEWVAL, VALUE, SHIFT, POS, BITS) \
3048 do { \
3049 (NEWVAL) &= 0xffffffffU & ~(((1U << (BITS)) - 1) << (POS)); \
3050 (NEWVAL) |= (((VALUE) >> (SHIFT)) & ((1U << (BITS)) - 1)) << (POS); \
3051 } while (0)
3052
3053 /* Apply a fixup to the object file. */
3054
3055 void
3056 md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
3057 {
3058 offsetT value = *valP;
3059 char *buf = fixP->fx_where + fixP->fx_frag->fr_literal;
3060
3061 value = SEXT (value);
3062 *valP = value;
3063
3064 fixP->fx_offset = SEXT (fixP->fx_offset);
3065
3066 if (fixP->fx_addsy == NULL && fixP->fx_pcrel == 0)
3067 fixP->fx_done = 1;
3068
3069 /* We do our own overflow checks. */
3070 fixP->fx_no_overflow = 1;
3071
3072 switch (fixP->fx_r_type)
3073 {
3074 case BFD_RELOC_NONE:
3075 /* Force output to the object file. */
3076 fixP->fx_done = 0;
3077 break;
3078
3079 case BFD_RELOC_32:
3080 if (fixP->fx_done || !seg->use_rela_p)
3081 md_number_to_chars (buf, value, 4);
3082 break;
3083
3084 case BFD_RELOC_16:
3085 if (fixP->fx_done || !seg->use_rela_p)
3086 {
3087 if (value < -0x8000 || value > 0xffff)
3088 as_bad_where (fixP->fx_file, fixP->fx_line,
3089 _("value too large for 2-byte field"));
3090 md_number_to_chars (buf, value, 2);
3091 }
3092 break;
3093
3094 case BFD_RELOC_8:
3095 if (fixP->fx_done || !seg->use_rela_p)
3096 {
3097 if (value < -0x80 || value > 0xff)
3098 as_bad_where (fixP->fx_file, fixP->fx_line,
3099 _("value too large for 1-byte field"));
3100 md_number_to_chars (buf, value, 1);
3101 }
3102 break;
3103
3104 case BFD_RELOC_C6000_ABS_S16:
3105 case BFD_RELOC_C6000_ABS_L16:
3106 case BFD_RELOC_C6000_SBR_S16:
3107 case BFD_RELOC_C6000_SBR_L16_B:
3108 case BFD_RELOC_C6000_SBR_L16_H:
3109 case BFD_RELOC_C6000_SBR_L16_W:
3110 case BFD_RELOC_C6000_SBR_GOT_L16_W:
3111 if (fixP->fx_done || !seg->use_rela_p)
3112 {
3113 offsetT newval = md_chars_to_number (buf, 4);
3114
3115 MODIFY_VALUE (newval, value, 0, 7, 16);
3116 if ((value < -0x8000 || value > 0x7fff)
3117 && (fixP->fx_r_type == BFD_RELOC_C6000_ABS_S16
3118 || fixP->fx_r_type == BFD_RELOC_C6000_SBR_S16))
3119 as_bad_where (fixP->fx_file, fixP->fx_line,
3120 _("immediate offset out of range"));
3121
3122 md_number_to_chars (buf, newval, 4);
3123 }
3124 if (fixP->fx_done
3125 && fixP->fx_r_type != BFD_RELOC_C6000_ABS_S16
3126 && fixP->fx_r_type != BFD_RELOC_C6000_ABS_L16)
3127 abort ();
3128 break;
3129
3130 case BFD_RELOC_C6000_ABS_H16:
3131 case BFD_RELOC_C6000_SBR_H16_B:
3132 case BFD_RELOC_C6000_SBR_H16_H:
3133 case BFD_RELOC_C6000_SBR_H16_W:
3134 case BFD_RELOC_C6000_SBR_GOT_H16_W:
3135 if (fixP->fx_done || !seg->use_rela_p)
3136 {
3137 offsetT newval = md_chars_to_number (buf, 4);
3138
3139 MODIFY_VALUE (newval, value, 16, 7, 16);
3140
3141 md_number_to_chars (buf, newval, 4);
3142 }
3143 if (fixP->fx_done && fixP->fx_r_type != BFD_RELOC_C6000_ABS_H16)
3144 abort ();
3145 break;
3146
3147 case BFD_RELOC_C6000_SBR_U15_B:
3148 if (fixP->fx_done || !seg->use_rela_p)
3149 {
3150 offsetT newval = md_chars_to_number (buf, 4);
3151
3152 MODIFY_VALUE (newval, value, 0, 8, 15);
3153 if (value < 0 || value > 0x7fff)
3154 as_bad_where (fixP->fx_file, fixP->fx_line,
3155 _("immediate offset out of range"));
3156
3157 md_number_to_chars (buf, newval, 4);
3158 }
3159 break;
3160
3161 case BFD_RELOC_C6000_SBR_U15_H:
3162 if (fixP->fx_done || !seg->use_rela_p)
3163 {
3164 offsetT newval = md_chars_to_number (buf, 4);
3165
3166 /* Constant ADDA operands, processed as constant when the
3167 instruction is parsed, are encoded as-is rather than
3168 shifted. If the operand of an ADDA instruction is now
3169 constant (for example, the difference between two labels
3170 found after the instruction), ensure it is encoded the
3171 same way it would have been if the constant value had
3172 been known when the instruction was parsed. */
3173 if (fixP->tc_fix_data.fix_adda && fixP->fx_done)
3174 value <<= 1;
3175
3176 MODIFY_VALUE (newval, value, 1, 8, 15);
3177 if (value & 1)
3178 as_bad_where (fixP->fx_file, fixP->fx_line,
3179 _("immediate offset not 2-byte-aligned"));
3180 if (value < 0 || value > 0xfffe)
3181 as_bad_where (fixP->fx_file, fixP->fx_line,
3182 _("immediate offset out of range"));
3183
3184 md_number_to_chars (buf, newval, 4);
3185 }
3186 break;
3187
3188 case BFD_RELOC_C6000_SBR_U15_W:
3189 case BFD_RELOC_C6000_SBR_GOT_U15_W:
3190 if (fixP->fx_done || !seg->use_rela_p)
3191 {
3192 offsetT newval = md_chars_to_number (buf, 4);
3193
3194 /* Constant ADDA operands, processed as constant when the
3195 instruction is parsed, are encoded as-is rather than
3196 shifted. If the operand of an ADDA instruction is now
3197 constant (for example, the difference between two labels
3198 found after the instruction), ensure it is encoded the
3199 same way it would have been if the constant value had
3200 been known when the instruction was parsed. */
3201 if (fixP->tc_fix_data.fix_adda && fixP->fx_done)
3202 value <<= 2;
3203
3204 MODIFY_VALUE (newval, value, 2, 8, 15);
3205 if (value & 3)
3206 as_bad_where (fixP->fx_file, fixP->fx_line,
3207 _("immediate offset not 4-byte-aligned"));
3208 if (value < 0 || value > 0x1fffc)
3209 as_bad_where (fixP->fx_file, fixP->fx_line,
3210 _("immediate offset out of range"));
3211
3212 md_number_to_chars (buf, newval, 4);
3213 }
3214 if (fixP->fx_done && fixP->fx_r_type != BFD_RELOC_C6000_SBR_U15_W)
3215 abort ();
3216 break;
3217
3218 case BFD_RELOC_C6000_DSBT_INDEX:
3219 if (value != 0)
3220 as_bad_where (fixP->fx_file, fixP->fx_line,
3221 _("addend used with $DSBT_INDEX"));
3222 if (fixP->fx_done)
3223 abort ();
3224 break;
3225
3226 case BFD_RELOC_C6000_PCR_S21:
3227 if (fixP->fx_done || !seg->use_rela_p)
3228 {
3229 offsetT newval = md_chars_to_number (buf, 4);
3230
3231 MODIFY_VALUE (newval, value, 2, 7, 21);
3232
3233 if (value & 3)
3234 as_bad_where (fixP->fx_file, fixP->fx_line,
3235 _("PC-relative offset not 4-byte-aligned"));
3236 if (value < -0x400000 || value > 0x3ffffc)
3237 as_bad_where (fixP->fx_file, fixP->fx_line,
3238 _("PC-relative offset out of range"));
3239
3240 md_number_to_chars (buf, newval, 4);
3241 }
3242 break;
3243
3244 case BFD_RELOC_C6000_PCR_S12:
3245 if (fixP->fx_done || !seg->use_rela_p)
3246 {
3247 offsetT newval = md_chars_to_number (buf, 4);
3248
3249 MODIFY_VALUE (newval, value, 2, 16, 12);
3250
3251 if (value & 3)
3252 as_bad_where (fixP->fx_file, fixP->fx_line,
3253 _("PC-relative offset not 4-byte-aligned"));
3254 if (value < -0x2000 || value > 0x1ffc)
3255 as_bad_where (fixP->fx_file, fixP->fx_line,
3256 _("PC-relative offset out of range"));
3257
3258 md_number_to_chars (buf, newval, 4);
3259 }
3260 break;
3261
3262 case BFD_RELOC_C6000_PCR_S10:
3263 if (fixP->fx_done || !seg->use_rela_p)
3264 {
3265 offsetT newval = md_chars_to_number (buf, 4);
3266
3267 MODIFY_VALUE (newval, value, 2, 13, 10);
3268
3269 if (value & 3)
3270 as_bad_where (fixP->fx_file, fixP->fx_line,
3271 _("PC-relative offset not 4-byte-aligned"));
3272 if (value < -0x800 || value > 0x7fc)
3273 as_bad_where (fixP->fx_file, fixP->fx_line,
3274 _("PC-relative offset out of range"));
3275
3276 md_number_to_chars (buf, newval, 4);
3277 }
3278 break;
3279
3280 case BFD_RELOC_C6000_PCR_S7:
3281 if (fixP->fx_done || !seg->use_rela_p)
3282 {
3283 offsetT newval = md_chars_to_number (buf, 4);
3284
3285 MODIFY_VALUE (newval, value, 2, 16, 7);
3286
3287 if (value & 3)
3288 as_bad_where (fixP->fx_file, fixP->fx_line,
3289 _("PC-relative offset not 4-byte-aligned"));
3290 if (value < -0x100 || value > 0xfc)
3291 as_bad_where (fixP->fx_file, fixP->fx_line,
3292 _("PC-relative offset out of range"));
3293
3294 md_number_to_chars (buf, newval, 4);
3295 }
3296 break;
3297
3298 default:
3299 abort ();
3300 }
3301 }
3302
3303 /* Convert a floating-point number to target (IEEE) format. */
3304
3305 char *
3306 md_atof (int type, char *litP, int *sizeP)
3307 {
3308 return ieee_md_atof (type, litP, sizeP, target_big_endian);
3309 }
3310
3311 /* No machine-dependent frags yet. */
3312
3313 void
3314 md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, segT asec ATTRIBUTE_UNUSED,
3315 fragS *fragp ATTRIBUTE_UNUSED)
3316 {
3317 abort ();
3318 }
3319
3320 /* No machine-dependent frags yet. */
3321
3322 int
3323 md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
3324 segT seg ATTRIBUTE_UNUSED)
3325 {
3326 abort ();
3327 }
3328
3329 /* Put a number into target byte order. */
3330
3331 void
3332 md_number_to_chars (char *buf, valueT val, int n)
3333 {
3334 if (target_big_endian)
3335 number_to_chars_bigendian (buf, val, n);
3336 else
3337 number_to_chars_littleendian (buf, val, n);
3338 }
3339
3340 /* Machine-dependent operand parsing not currently needed. */
3341
3342 void
3343 md_operand (expressionS *op ATTRIBUTE_UNUSED)
3344 {
3345 }
3346
3347 /* PC-relative operands are relative to the start of the fetch
3348 packet. */
3349
3350 long
3351 md_pcrel_from (fixS *fixp)
3352 {
3353 return (fixp->fx_where + fixp->fx_frag->fr_address) & ~(long) 0x1f;
3354 }
3355
3356 /* Round up a section size to the appropriate boundary. */
3357
3358 valueT
3359 md_section_align (segT segment ATTRIBUTE_UNUSED,
3360 valueT size)
3361 {
3362 /* Round up section sizes to ensure that text sections consist of
3363 whole fetch packets. */
3364 int align = bfd_get_section_alignment (stdoutput, segment);
3365 return ((size + (1 << align) - 1) & ((valueT) -1 << align));
3366 }
3367
3368 /* No special undefined symbol handling needed for now. */
3369
3370 symbolS *
3371 md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
3372 {
3373 return NULL;
3374 }
3375
3376 /* Translate internal representation of relocation info to BFD target
3377 format. */
3378
3379 arelent *
3380 tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp)
3381 {
3382 arelent *reloc;
3383 bfd_reloc_code_real_type r_type;
3384
3385 reloc = xmalloc (sizeof (arelent));
3386 reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *));
3387 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
3388 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
3389 reloc->addend = fixp->fx_offset;
3390 r_type = fixp->fx_r_type;
3391 reloc->howto = bfd_reloc_type_lookup (stdoutput, r_type);
3392
3393 if (reloc->howto == NULL)
3394 {
3395 as_bad_where (fixp->fx_file, fixp->fx_line,
3396 _("Cannot represent relocation type %s"),
3397 bfd_get_reloc_code_name (r_type));
3398 return NULL;
3399 }
3400
3401 return reloc;
3402 }
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