1 /* tc-tic80.c -- Assemble for the TI TMS320C80 (MV)
2 Copyright 1996, 1997, 2000, 2001, 2002, 2005
3 Free Software Foundation, Inc.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 #include "safe-ctype.h"
24 #include "opcode/tic80.h"
26 #define internal_error(what) \
27 as_fatal (_("internal error:%s:%d: %s\n"), __FILE__, __LINE__, what)
29 #define internal_error_a(what,arg) \
30 as_fatal (_("internal error:%s:%d: %s %ld\n"), __FILE__, __LINE__, what, arg)
32 /* Generic assembler global variables which must be defined by all
35 /* Characters which always start a comment. */
36 const char comment_chars
[] = ";";
38 /* Characters which start a comment at the beginning of a line. */
39 const char line_comment_chars
[] = ";*#";
41 /* Characters which may be used to separate multiple commands on a single
42 line. The semicolon is such a character by default and should not be
44 const char line_separator_chars
[] = "";
46 /* Characters which are used to indicate an exponent in a floating
48 const char EXP_CHARS
[] = "eE";
50 /* Characters which mean that a number is a floating point constant,
52 const char FLT_CHARS
[] = "fF";
54 /* This table describes all the machine specific pseudo-ops the assembler
55 has to support. The fields are:
57 pseudo-op name without dot
58 function to call to execute this pseudo-op
59 integer arg to pass to the function */
61 const pseudo_typeS md_pseudo_table
[] = {
62 { "align", s_align_bytes
, 4 }, /* Do byte alignment, default is a 4 byte boundary */
63 { "word", cons
, 4 }, /* FIXME: Should this be machine independent? */
64 { "bss", s_lcomm_bytes
, 1 },
65 { "sect", obj_coff_section
, 0}, /* For compatibility with TI tools */
66 { "section", obj_coff_section
, 0}, /* Standard COFF .section pseudo-op */
70 /* Opcode hash table. */
71 static struct hash_control
*tic80_hash
;
73 static struct tic80_opcode
* find_opcode
PARAMS ((struct tic80_opcode
*, expressionS
[]));
74 static void build_insn
PARAMS ((struct tic80_opcode
*, expressionS
*));
75 static int get_operands
PARAMS ((expressionS exp
[]));
76 static int const_overflow
PARAMS ((unsigned long num
, int bits
, int flags
));
78 /* Replace short PC relative instructions with long form when
79 necessary. Currently this is off by default or when given the
80 -no-relax option. Turning it on by using the -relax option forces
81 all PC relative instructions to use the long form, which is why it
82 is currently not the default. */
83 static int tic80_relax
= 0;
86 md_estimate_size_before_relax (fragP
, segment_type
)
87 fragS
*fragP ATTRIBUTE_UNUSED
;
88 segT segment_type ATTRIBUTE_UNUSED
;
90 internal_error (_("Relaxation is a luxury we can't afford"));
94 /* We have no need to default values of symbols. */
97 md_undefined_symbol (name
)
98 char *name ATTRIBUTE_UNUSED
;
103 /* Turn a string in input_line_pointer into a floating point constant
104 of type TYPE, and store the appropriate bytes in *LITP. The number
105 of LITTLENUMS emitted is stored in *SIZEP. An error message is
106 returned, or NULL on OK. */
108 #define MAX_LITTLENUMS 4
111 md_atof (type
, litP
, sizeP
)
117 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
118 LITTLENUM_TYPE
*wordP
;
139 return _("bad call to md_atof ()");
142 t
= atof_ieee (input_line_pointer
, type
, words
);
145 input_line_pointer
= t
;
148 *sizeP
= prec
* sizeof (LITTLENUM_TYPE
);
150 for (wordP
= words
; prec
--;)
152 md_number_to_chars (litP
, (valueT
) (*wordP
++), sizeof (LITTLENUM_TYPE
));
153 litP
+= sizeof (LITTLENUM_TYPE
);
158 /* Check to see if the constant value in NUM will fit in a field of
159 width BITS if it has flags FLAGS. */
162 const_overflow (num
, bits
, flags
)
170 /* Only need to check fields less than 32 bits wide. */
174 if (flags
& TIC80_OPERAND_SIGNED
)
176 max
= (1 << (bits
- 1)) - 1;
177 min
= - (1 << (bits
- 1));
178 retval
= (long) num
> max
|| (long) num
< min
;
182 max
= (1 << bits
) - 1;
183 retval
= num
> (unsigned long) max
;
188 /* get_operands () parses a string of operands and fills in a passed
189 array of expressions in EXP.
191 Note that we use O_absent expressions to record additional information
192 about the previous non-O_absent expression, such as ":m" or ":s"
193 modifiers or register numbers enclosed in parens like "(r10)".
195 Returns the number of expressions that were placed in EXP. */
201 char *p
= input_line_pointer
;
207 /* Skip leading whitespace. */
208 while (*p
== ' ' || *p
== '\t' || *p
== ',')
211 /* Check to see if we have any operands left to parse. */
212 if (*p
== 0 || *p
== '\n' || *p
== '\r')
215 /* Notice scaling or direct memory operand modifiers and save them in
216 an O_absent expression after the expression that they modify. */
221 exp
[numexp
].X_op
= O_absent
;
225 /* This is a ":m" modifier. */
226 exp
[numexp
].X_add_number
= TIC80_OPERAND_M_SI
| TIC80_OPERAND_M_LI
;
231 /* This is a ":s" modifier. */
232 exp
[numexp
].X_add_number
= TIC80_OPERAND_SCALED
;
236 as_bad (_("':' not followed by 'm' or 's'"));
242 /* Handle leading '(' on operands that use them, by recording that we
243 have entered a paren nesting level and then continuing. We complain
244 about multiple nesting. */
249 as_bad (_("paren nesting"));
255 /* Handle trailing ')' on operands that use them, by reducing the
256 nesting level and then continuing. We complain if there were too
261 /* Record that we have left a paren group and continue. */
263 as_bad (_("mismatched parenthesis"));
269 /* Begin operand parsing at the current scan point. */
271 input_line_pointer
= p
;
272 expression (&exp
[numexp
]);
274 if (exp
[numexp
].X_op
== O_illegal
)
276 as_bad (_("illegal operand"));
278 else if (exp
[numexp
].X_op
== O_absent
)
280 as_bad (_("missing operand"));
284 p
= input_line_pointer
;
289 exp
[numexp
].X_op
= O_absent
;
290 exp
[numexp
++].X_add_number
= TIC80_OPERAND_PARENS
;
293 /* Mark the end of the valid operands with an illegal expression. */
294 exp
[numexp
].X_op
= O_illegal
;
299 /* find_opcode() gets a pointer to the entry in the opcode table that
300 matches the instruction being assembled, or returns NULL if no such match
303 First it parses all the operands and save them as expressions. Note that
304 we use O_absent expressions to record additional information about the
305 previous non-O_absent expression, such as ":m" or ":s" modifiers or
306 register numbers enclosed in parens like "(r10)".
308 It then looks at all opcodes with the same name and uses the operands to
309 choose the correct opcode. */
311 static struct tic80_opcode
*
312 find_opcode (opcode
, myops
)
313 struct tic80_opcode
*opcode
;
316 int numexp
; /* Number of expressions from parsing operands */
317 int expi
; /* Index of current expression to match */
318 int opi
; /* Index of current operand to match */
319 int match
= 0; /* Set to 1 when an operand match is found */
320 struct tic80_opcode
*opc
= opcode
; /* Pointer to current opcode table entry */
321 const struct tic80_opcode
*end
; /* Pointer to end of opcode table */
323 /* First parse all the operands so we only have to do it once. There may
324 be more expressions generated than there are operands. */
326 numexp
= get_operands (myops
);
328 /* For each opcode with the same name, try to match it against the parsed
331 end
= tic80_opcodes
+ tic80_num_opcodes
;
332 while (!match
&& (opc
< end
) && (strcmp (opc
->name
, opcode
->name
) == 0))
334 /* Start off assuming a match. If we find a mismatch, then this is
335 reset and the operand/expr matching loop terminates with match
336 equal to zero, which allows us to try the next opcode. */
340 /* For each expression, try to match it against the current operand
341 for the current opcode. Upon any mismatch, we abandon further
342 matching for the current opcode table entry. */
344 for (expi
= 0, opi
= -1; (expi
< numexp
) && match
; expi
++)
346 int bits
, flags
, X_op
, num
;
348 X_op
= myops
[expi
].X_op
;
349 num
= myops
[expi
].X_add_number
;
351 /* The O_absent expressions apply to the same operand as the most
352 recent non O_absent expression. So only increment the operand
353 index when the current expression is not one of these special
356 if (X_op
!= O_absent
)
361 flags
= tic80_operands
[opc
->operands
[opi
]].flags
;
362 bits
= tic80_operands
[opc
->operands
[opi
]].bits
;
367 /* Also check that registers that are supposed to be
368 even actually are even. */
369 if (((flags
& TIC80_OPERAND_GPR
) != (num
& TIC80_OPERAND_GPR
)) ||
370 ((flags
& TIC80_OPERAND_FPA
) != (num
& TIC80_OPERAND_FPA
)) ||
371 ((flags
& TIC80_OPERAND_CR
) != (num
& TIC80_OPERAND_CR
)) ||
372 ((flags
& TIC80_OPERAND_EVEN
) && (num
& 1)) ||
373 const_overflow (num
& ~TIC80_OPERAND_MASK
, bits
, flags
))
379 if ((flags
& TIC80_OPERAND_ENDMASK
) && (num
== 32))
381 /* Endmask values of 0 and 32 give identical
385 if ((flags
& (TIC80_OPERAND_FPA
| TIC80_OPERAND_GPR
)) ||
386 const_overflow (num
, bits
, flags
))
392 if ((bits
< 32) && (flags
& TIC80_OPERAND_PCREL
)
395 /* The default is to prefer the short form of PC
396 relative relocations. This is the only form that
397 the TI assembler supports. If the -relax option
398 is given, we never use the short forms.
399 FIXME: Should be able to choose "best-fit". */
401 else if ((bits
== 32))
403 /* The default is to prefer the long form of base
404 relative relocations. This is the only form that
405 the TI assembler supports. If the -no-relax
406 option is given, we always use the long form of
407 PC relative relocations.
408 FIXME: Should be able to choose "best-fit". */
412 /* Symbols that don't match one of the above cases are
413 rejected as an operand. */
418 /* If this is an O_absent expression, then it may be an
419 expression that supplies additional information about
420 the operand, such as ":m" or ":s" modifiers. Check to
421 see that the operand matches this requirement. */
422 if (!((num
& flags
& TIC80_OPERAND_M_SI
)
423 || (num
& flags
& TIC80_OPERAND_M_LI
)
424 || (num
& flags
& TIC80_OPERAND_SCALED
)))
430 if ((num
> 0) || !(flags
& TIC80_OPERAND_FLOAT
))
445 case O_bit_inclusive_or
:
447 case O_bit_exclusive_or
:
461 internal_error_a (_("unhandled expression type"), (long) X_op
);
468 return (match
? opc
: NULL
);
472 /* build_insn takes a pointer to the opcode entry in the opcode table
473 and the array of operand expressions and writes out the instruction.
475 Note that the opcode word and extended word may be written to different
476 frags, with the opcode at the end of one frag and the extension at the
477 beginning of the next. */
480 build_insn (opcode
, opers
)
481 struct tic80_opcode
*opcode
;
484 int expi
; /* Index of current expression to match */
485 int opi
; /* Index of current operand to match */
486 unsigned long insn
[2]; /* Instruction and long immediate (if any) */
487 char *f
; /* Pointer to frag location for insn[0] */
488 fragS
*ffrag
; /* Frag containing location f */
489 char *fx
= NULL
; /* Pointer to frag location for insn[1] */
490 fragS
*fxfrag
; /* Frag containing location fx */
492 /* Start with the raw opcode bits from the opcode table. */
493 insn
[0] = opcode
->opcode
;
496 /* We are going to insert at least one 32 bit opcode so get the
502 /* For each operand expression, insert the appropriate bits into the
504 for (expi
= 0, opi
= -1; opers
[expi
].X_op
!= O_illegal
; expi
++)
506 int bits
, shift
, flags
, X_op
, num
;
508 X_op
= opers
[expi
].X_op
;
509 num
= opers
[expi
].X_add_number
;
511 /* The O_absent expressions apply to the same operand as the most
512 recent non O_absent expression. So only increment the operand
513 index when the current expression is not one of these special
516 if (X_op
!= O_absent
)
521 flags
= tic80_operands
[opcode
->operands
[opi
]].flags
;
522 bits
= tic80_operands
[opcode
->operands
[opi
]].bits
;
523 shift
= tic80_operands
[opcode
->operands
[opi
]].shift
;
528 num
&= ~TIC80_OPERAND_MASK
;
529 insn
[0] = insn
[0] | (num
<< shift
);
532 if ((flags
& TIC80_OPERAND_ENDMASK
) && (num
== 32))
534 /* Endmask values of 0 and 32 give identical results. */
537 else if ((flags
& TIC80_OPERAND_BITNUM
))
539 /* BITNUM values are stored in one's complement form. */
542 /* Mask off upper bits, just it case it is signed and is
546 num
&= (1 << bits
) - 1;
547 insn
[0] = insn
[0] | (num
<< shift
);
562 if (flags
& TIC80_OPERAND_PCREL
)
565 fx
- (fxfrag
->fr_literal
),
574 fx
- (fxfrag
->fr_literal
),
581 else if (flags
& TIC80_OPERAND_PCREL
)
584 f
- (ffrag
->fr_literal
),
585 4, /* FIXME! how is this used? */
592 internal_error (_("symbol reloc that is not PC relative or 32 bits"));
596 /* Each O_absent expression can indicate exactly one
597 possible modifier. */
598 if ((num
& TIC80_OPERAND_M_SI
)
599 && (flags
& TIC80_OPERAND_M_SI
))
601 insn
[0] = insn
[0] | (1 << 17);
603 else if ((num
& TIC80_OPERAND_M_LI
)
604 && (flags
& TIC80_OPERAND_M_LI
))
606 insn
[0] = insn
[0] | (1 << 15);
608 else if ((num
& TIC80_OPERAND_SCALED
)
609 && (flags
& TIC80_OPERAND_SCALED
))
611 insn
[0] = insn
[0] | (1 << 11);
613 else if ((num
& TIC80_OPERAND_PARENS
)
614 && (flags
& TIC80_OPERAND_PARENS
))
616 /* No code to generate, just accept and discard this
621 internal_error_a (_("unhandled operand modifier"),
622 (long) opers
[expi
].X_add_number
);
630 long exponent_bits
= 8L;
631 LITTLENUM_TYPE words
[2];
632 /* Value is still in generic_floating_point_number. */
633 gen_to_words (words
, precision
, exponent_bits
);
634 insn
[1] = (words
[0] << 16) | words
[1];
647 case O_bit_inclusive_or
:
649 case O_bit_exclusive_or
:
663 internal_error_a (_("unhandled expression"), (long) X_op
);
668 /* Write out the instruction, either 4 or 8 bytes. */
670 md_number_to_chars (f
, insn
[0], 4);
673 md_number_to_chars (fx
, insn
[1], 4);
677 /* This is the main entry point for the machine-dependent assembler. Gas
678 calls this function for each input line which does not contain a
681 STR points to a NULL terminated machine dependent instruction. This
682 function is supposed to emit the frags/bytes it assembles to. */
689 char *input_line_save
;
690 struct tic80_opcode
*opcode
;
691 expressionS myops
[16];
693 /* Ensure there is something there to assemble. */
696 /* Drop any leading whitespace. */
697 while (ISSPACE (*str
))
700 /* Isolate the mnemonic from the rest of the string by finding the first
701 whitespace character and zapping it to a null byte. */
702 for (scan
= str
; *scan
!= '\000' && !ISSPACE (*scan
); scan
++)
708 /* Try to find this mnemonic in the hash table. */
709 if ((opcode
= (struct tic80_opcode
*) hash_find (tic80_hash
, str
)) == NULL
)
711 as_bad (_("Invalid mnemonic: '%s'"), str
);
716 while (ISSPACE (*scan
))
719 input_line_save
= input_line_pointer
;
720 input_line_pointer
= str
;
722 opcode
= find_opcode (opcode
, myops
);
724 as_bad (_("Invalid operands: '%s'"), input_line_save
);
726 input_line_pointer
= input_line_save
;
727 build_insn (opcode
, myops
);
730 /* This function is called once at the start of assembly, after the command
731 line arguments have been parsed and all the machine independent
732 initializations have been completed.
734 It should set up all the tables, etc., that the machine dependent part of
735 the assembler will need. */
740 char *prev_name
= "";
741 register const struct tic80_opcode
*op
;
742 register const struct tic80_opcode
*op_end
;
743 const struct predefined_symbol
*pdsp
;
744 extern int coff_flags
; /* Defined in obj-coff.c */
746 /* Set F_AR32WR in coff_flags, which will end up in the file header
749 coff_flags
|= F_AR32WR
; /* TIc80 is 32 bit little endian. */
751 /* Insert unique names into hash table. The TIc80 instruction set
752 has many identical opcode names that have different opcodes based
753 on the operands. This hash table then provides a quick index to
754 the first opcode with a particular name in the opcode table. */
756 tic80_hash
= hash_new ();
757 op_end
= tic80_opcodes
+ tic80_num_opcodes
;
758 for (op
= tic80_opcodes
; op
< op_end
; op
++)
760 if (strcmp (prev_name
, op
->name
) != 0)
762 prev_name
= (char *) op
->name
;
763 hash_insert (tic80_hash
, op
->name
, (char *) op
);
767 /* Insert the predefined symbols into the symbol table. We use
768 symbol_create rather than symbol_new so that these symbols don't
769 end up in the object files' symbol table. Note that the values
770 of the predefined symbols include some upper bits that
771 distinguish the type of the symbol (register, bitnum, condition
772 code, etc) and these bits must be masked away before actually
773 inserting the values into the instruction stream. For registers
774 we put these bits in the symbol table since we use them later and
775 there is no question that they aren't part of the register
776 number. For constants we can't do that since the constant can be
777 any value, so they are masked off before putting them into the
781 while ((pdsp
= tic80_next_predefined_symbol (pdsp
)) != NULL
)
787 symtype
= PDS_VALUE (pdsp
) & TIC80_OPERAND_MASK
;
790 case TIC80_OPERAND_GPR
:
791 case TIC80_OPERAND_FPA
:
792 case TIC80_OPERAND_CR
:
793 segment
= reg_section
;
794 valu
= PDS_VALUE (pdsp
);
796 case TIC80_OPERAND_CC
:
797 case TIC80_OPERAND_BITNUM
:
798 segment
= absolute_section
;
799 valu
= PDS_VALUE (pdsp
) & ~TIC80_OPERAND_MASK
;
802 internal_error_a (_("unhandled predefined symbol bits"),
806 symbol_table_insert (symbol_create (PDS_NAME (pdsp
), segment
, valu
,
807 &zero_address_frag
));
811 /* The assembler adds md_shortopts to the string passed to getopt. */
813 const char *md_shortopts
= "";
815 /* The assembler adds md_longopts to the machine independent long options
816 that are passed to getopt. */
818 struct option md_longopts
[] = {
820 #define OPTION_RELAX (OPTION_MD_BASE)
821 {"relax", no_argument
, NULL
, OPTION_RELAX
},
823 #define OPTION_NO_RELAX (OPTION_RELAX + 1)
824 {"no-relax", no_argument
, NULL
, OPTION_NO_RELAX
},
826 {NULL
, no_argument
, NULL
, 0}
829 size_t md_longopts_size
= sizeof (md_longopts
);
831 /* The md_parse_option function will be called whenever getopt returns an
832 unrecognized code, presumably indicating a special code value which
833 appears in md_longopts for machine specific command line options. */
836 md_parse_option (c
, arg
)
838 char *arg ATTRIBUTE_UNUSED
;
845 case OPTION_NO_RELAX
:
854 /* The md_show_usage function will be called whenever a usage message is
855 printed. It should print a description of the machine specific options
856 found in md_longopts. */
859 md_show_usage (stream
)
864 -relax alter PC relative branch instructions to use long form when needed\n\
865 -no-relax always use short PC relative branch instructions, error on overflow\n");
868 /* Attempt to simplify or even eliminate a fixup. The return value is
869 ignored; perhaps it was once meaningful, but now it is historical.
870 To indicate that a fixup has been eliminated, set fixP->fx_done. */
873 md_apply_fix3 (fixP
, valP
, seg
)
876 segT seg ATTRIBUTE_UNUSED
;
878 long val
= * (long *) valP
;
879 char *dest
= fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
;
882 switch (fixP
->fx_r_type
)
885 md_number_to_chars (dest
, (valueT
) val
, 4);
889 val
+= 1; /* Target address computed from inst start */
890 md_number_to_chars (dest
, (valueT
) val
, 4);
893 overflow
= (val
< -65536L) || (val
> 65532L);
896 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
897 _("PC offset 0x%lx outside range 0x%lx-0x%lx"),
898 val
, -65536L, 65532L);
903 *dest
++ = val
& 0xFF;
905 *dest
= (*dest
& 0x80) | (val
& 0x7F);
909 md_number_to_chars (dest
, (valueT
) val
, fixP
->fx_size
);
912 internal_error_a (_("unhandled relocation type in fixup"),
913 (long) fixP
->fx_r_type
);
917 if (fixP
->fx_addsy
== NULL
&& fixP
->fx_pcrel
== 0)
921 /* Functions concerning relocs. */
923 /* The location from which a PC relative jump should be calculated,
924 given a PC relative reloc.
926 For the TIc80, this is the address of the 32 bit opcode containing
927 the PC relative field. */
933 return (fixP
->fx_frag
->fr_address
+ fixP
->fx_where
);
936 /* Called after relax() is finished.
937 * In: Address of frag.
938 * fr_type == rs_machine_dependent.
939 * fr_subtype is what the address relaxed to.
941 * Out: Any fixSs and constants are set up.
942 * Caller will turn frag into a ".space 0".
946 md_convert_frag (headers
, seg
, fragP
)
947 object_headers
*headers ATTRIBUTE_UNUSED
;
948 segT seg ATTRIBUTE_UNUSED
;
949 fragS
*fragP ATTRIBUTE_UNUSED
;
951 internal_error (_("md_convert_frag() not implemented yet"));
956 tc_coff_symbol_emit_hook (ignore
)
957 symbolS
*ignore ATTRIBUTE_UNUSED
;
964 tc_coff_fix2rtype (fixP
)
967 return (fixP
->fx_r_type
);
970 #endif /* OBJ_COFF */