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[deliverable/binutils-gdb.git] / gas / config / tc-v850.c
1 /* tc-v850.c -- Assembler code for the NEC V850
2 Copyright (C) 1996, 1997 Free Software Foundation.
3
4 This file is part of GAS, the GNU Assembler.
5
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
9 any later version.
10
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
20
21 #include <stdio.h>
22 #include <ctype.h>
23 #include "as.h"
24 #include "subsegs.h"
25 #include "opcode/v850.h"
26
27 /* sign-extend a 16-bit number */
28 #define SEXT16(x) ((((x) & 0xffff) ^ (~ 0x7fff)) + 0x8000)
29
30 /* Temporarily holds the reloc in a cons expression. */
31 static bfd_reloc_code_real_type hold_cons_reloc;
32
33 /* Set to TRUE if we want to be pedantic about signed overflows. */
34 static boolean warn_signed_overflows = FALSE;
35 static boolean warn_unsigned_overflows = FALSE;
36
37 /* Indicates the target BFD machine number. */
38 static int machine = -1;
39
40 /* Indicates the target processor(s) for the assemble. */
41 static unsigned int processor_mask = -1;
42
43 \f
44 /* Structure to hold information about predefined registers. */
45 struct reg_name
46 {
47 const char * name;
48 int value;
49 };
50
51 /* Generic assembler global variables which must be defined by all targets. */
52
53 /* Characters which always start a comment. */
54 const char comment_chars[] = "#";
55
56 /* Characters which start a comment at the beginning of a line. */
57 const char line_comment_chars[] = ";#";
58
59 /* Characters which may be used to separate multiple commands on a
60 single line. */
61 const char line_separator_chars[] = ";";
62
63 /* Characters which are used to indicate an exponent in a floating
64 point number. */
65 const char EXP_CHARS[] = "eE";
66
67 /* Characters which mean that a number is a floating point constant,
68 as in 0d1.0. */
69 const char FLT_CHARS[] = "dD";
70 \f
71
72 const relax_typeS md_relax_table[] = {
73 {0xff, -0x100, 2, 1},
74 {0x1fffff, -0x200000, 6, 0},
75 };
76
77
78 static segT sdata_section = NULL;
79 static segT tdata_section = NULL;
80 static segT zdata_section = NULL;
81 static segT sbss_section = NULL;
82 static segT tbss_section = NULL;
83 static segT zbss_section = NULL;
84 static segT rosdata_section = NULL;
85 static segT rozdata_section = NULL;
86 /* start-sanitize-v850e */
87 static segT call_table_data_section = NULL;
88 static segT call_table_text_section = NULL;
89 /* end-sanitize-v850e */
90
91
92 /* local functions */
93 static unsigned long v850_insert_operand
94 PARAMS ((unsigned long insn, const struct v850_operand *operand,
95 offsetT val, char *file, unsigned int line));
96
97
98 /* fixups */
99 #define MAX_INSN_FIXUPS (5)
100 struct v850_fixup
101 {
102 expressionS exp;
103 int opindex;
104 bfd_reloc_code_real_type reloc;
105 };
106 struct v850_fixup fixups[MAX_INSN_FIXUPS];
107 static int fc;
108 \f
109 void
110 v850_sdata (int ignore)
111 {
112 subseg_set (sdata_section, (subsegT) get_absolute_expression ());
113
114 demand_empty_rest_of_line ();
115 }
116
117 void
118 v850_tdata (int ignore)
119 {
120 subseg_set (tdata_section, (subsegT) get_absolute_expression ());
121
122 demand_empty_rest_of_line ();
123 }
124
125 void
126 v850_zdata (int ignore)
127 {
128 subseg_set (zdata_section, (subsegT) get_absolute_expression ());
129
130 demand_empty_rest_of_line ();
131 }
132
133 void
134 v850_sbss (int ignore)
135 {
136 subseg_set (sbss_section, (subsegT) get_absolute_expression ());
137
138 demand_empty_rest_of_line ();
139 }
140
141 void
142 v850_tbss (int ignore)
143 {
144 subseg_set (tbss_section, (subsegT) get_absolute_expression ());
145
146 demand_empty_rest_of_line ();
147 }
148
149 void
150 v850_zbss (int ignore)
151 {
152 subseg_set (zbss_section, (subsegT) get_absolute_expression ());
153
154 demand_empty_rest_of_line ();
155 }
156
157 void
158 v850_rosdata (int ignore)
159 {
160 subseg_set (rosdata_section, (subsegT) get_absolute_expression ());
161
162 demand_empty_rest_of_line ();
163 }
164
165 void
166 v850_rozdata (int ignore)
167 {
168 subseg_set (rozdata_section, (subsegT) get_absolute_expression ());
169
170 demand_empty_rest_of_line ();
171 }
172
173 /* start-sanitize-v850e */
174 void
175 v850_call_table_data (int ignore)
176 {
177 subseg_set (call_table_data_section, (subsegT) get_absolute_expression ());
178
179 demand_empty_rest_of_line ();
180 }
181
182 void
183 v850_call_table_text (int ignore)
184 {
185 subseg_set (call_table_text_section, (subsegT) get_absolute_expression ());
186
187 demand_empty_rest_of_line ();
188 }
189 /* end-sanitize-v850e */
190
191 static void
192 v850_section (int arg)
193 {
194 char saved_c;
195 char * ptr;
196
197 for (ptr = input_line_pointer; * ptr != '\n' && * ptr != 0; ptr ++)
198 if (* ptr == ',' && ptr[1] == '.')
199 break;
200
201 saved_c = * ptr;
202 * ptr = ';';
203
204 obj_elf_section (arg);
205
206 * ptr = saved_c;
207 }
208
209 void
210 v850_bss (int ignore)
211 {
212 register int temp = get_absolute_expression ();
213
214 obj_elf_section_change_hook();
215
216 subseg_set (bss_section, (subsegT) temp);
217
218 demand_empty_rest_of_line ();
219 }
220
221 void
222 v850_offset (int ignore)
223 {
224 int temp = get_absolute_expression ();
225
226 temp -= frag_now_fix();
227
228 if (temp > 0)
229 (void) frag_more (temp);
230
231 demand_empty_rest_of_line ();
232 }
233
234 void
235 set_machine (int number)
236 {
237 machine = number;
238 bfd_set_arch_mach (stdoutput, TARGET_ARCH, machine);
239
240 switch (machine)
241 {
242 case 0: processor_mask = PROCESSOR_V850; break;
243 /* start-sanitize-v850e */
244 case bfd_mach_v850e: processor_mask = PROCESSOR_V850E; break;
245 case bfd_mach_v850eq: processor_mask = PROCESSOR_V850EQ; break;
246 /* end-sanitize-v850e */
247 }
248 }
249
250 /* The target specific pseudo-ops which we support. */
251 const pseudo_typeS md_pseudo_table[] =
252 {
253 {"sdata", v850_sdata, 0},
254 {"tdata", v850_tdata, 0},
255 {"zdata", v850_zdata, 0},
256 {"sbss", v850_sbss, 0},
257 {"tbss", v850_tbss, 0},
258 {"zbss", v850_zbss, 0},
259 {"rosdata", v850_rosdata, 0},
260 {"rozdata", v850_rozdata, 0},
261 {"bss", v850_bss, 0},
262 {"offset", v850_offset, 0},
263 {"section", v850_section, 0},
264 {"word", cons, 4},
265 {"v850", set_machine, 0},
266 /* start-sanitize-v850e */
267 {"call_table_data", v850_call_table_data, 0},
268 {"call_table_text", v850_call_table_text, 0},
269 {"v850e", set_machine, bfd_mach_v850e},
270 {"v850eq", set_machine, bfd_mach_v850eq},
271 /* end-sanitize-v850e */
272 { NULL, NULL, 0}
273 };
274
275 /* Opcode hash table. */
276 static struct hash_control *v850_hash;
277
278 /* This table is sorted. Suitable for searching by a binary search. */
279 static const struct reg_name pre_defined_registers[] =
280 {
281 { "ep", 30 }, /* ep - element ptr */
282 { "gp", 4 }, /* gp - global ptr */
283 { "hp", 2 }, /* hp - handler stack ptr */
284 { "lp", 31 }, /* lp - link ptr */
285 { "r0", 0 },
286 { "r1", 1 },
287 { "r10", 10 },
288 { "r11", 11 },
289 { "r12", 12 },
290 { "r13", 13 },
291 { "r14", 14 },
292 { "r15", 15 },
293 { "r16", 16 },
294 { "r17", 17 },
295 { "r18", 18 },
296 { "r19", 19 },
297 { "r2", 2 },
298 { "r20", 20 },
299 { "r21", 21 },
300 { "r22", 22 },
301 { "r23", 23 },
302 { "r24", 24 },
303 { "r25", 25 },
304 { "r26", 26 },
305 { "r27", 27 },
306 { "r28", 28 },
307 { "r29", 29 },
308 { "r3", 3 },
309 { "r30", 30 },
310 { "r31", 31 },
311 { "r4", 4 },
312 { "r5", 5 },
313 { "r6", 6 },
314 { "r7", 7 },
315 { "r8", 8 },
316 { "r9", 9 },
317 { "sp", 3 }, /* sp - stack ptr */
318 { "tp", 5 }, /* tp - text ptr */
319 { "zero", 0 },
320 };
321 #define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct reg_name))
322
323
324 static const struct reg_name system_registers[] =
325 {
326 /* start-sanitize-v850e */
327 { "ctbp", 20 },
328 { "ctpc", 16 },
329 { "ctpsw", 17 },
330 { "dbpc", 18 },
331 { "dbpsw", 19 },
332 /* end-sanitize-v850e */
333 { "ecr", 4 },
334 { "eipc", 0 },
335 { "eipsw", 1 },
336 { "fepc", 2 },
337 { "fepsw", 3 },
338 { "psw", 5 },
339 };
340 #define SYSREG_NAME_CNT (sizeof (system_registers) / sizeof (struct reg_name))
341
342 static const struct reg_name cc_names[] =
343 {
344 { "c", 0x1 },
345 { "e", 0x2 },
346 { "ge", 0xe },
347 { "gt", 0xf },
348 { "h", 0xb },
349 { "l", 0x1 },
350 { "le", 0x7 },
351 { "lt", 0x6 },
352 { "n", 0x4 },
353 { "nc", 0x9 },
354 { "ne", 0xa },
355 { "nh", 0x3 },
356 { "nl", 0x9 },
357 { "ns", 0xc },
358 { "nv", 0x8 },
359 { "nz", 0xa },
360 { "p", 0xc },
361 { "s", 0x4 },
362 { "sa", 0xd },
363 { "t", 0x5 },
364 { "v", 0x0 },
365 { "z", 0x2 },
366 };
367 #define CC_NAME_CNT (sizeof (cc_names) / sizeof (struct reg_name))
368
369 /* reg_name_search does a binary search of the given register table
370 to see if "name" is a valid regiter name. Returns the register
371 number from the array on success, or -1 on failure. */
372
373 static int
374 reg_name_search (regs, regcount, name)
375 const struct reg_name * regs;
376 int regcount;
377 const char * name;
378 {
379 int middle, low, high;
380 int cmp;
381
382 low = 0;
383 high = regcount - 1;
384
385 do
386 {
387 middle = (low + high) / 2;
388 cmp = strcasecmp (name, regs[middle].name);
389 if (cmp < 0)
390 high = middle - 1;
391 else if (cmp > 0)
392 low = middle + 1;
393 else
394 return regs[middle].value;
395 }
396 while (low <= high);
397 return -1;
398 }
399
400
401 /* Summary of register_name().
402 *
403 * in: Input_line_pointer points to 1st char of operand.
404 *
405 * out: A expressionS.
406 * The operand may have been a register: in this case, X_op == O_register,
407 * X_add_number is set to the register number, and truth is returned.
408 * Input_line_pointer->(next non-blank) char after operand, or is in
409 * its original state.
410 */
411 static boolean
412 register_name (expressionP)
413 expressionS * expressionP;
414 {
415 int reg_number;
416 char * name;
417 char * start;
418 char c;
419
420 /* Find the spelling of the operand */
421 start = name = input_line_pointer;
422
423 c = get_symbol_end ();
424
425 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
426
427 * input_line_pointer = c; /* put back the delimiting char */
428
429 /* look to see if it's in the register table */
430 if (reg_number >= 0)
431 {
432 expressionP->X_op = O_register;
433 expressionP->X_add_number = reg_number;
434
435 /* make the rest nice */
436 expressionP->X_add_symbol = NULL;
437 expressionP->X_op_symbol = NULL;
438
439 return true;
440 }
441 else
442 {
443 /* reset the line as if we had not done anything */
444 input_line_pointer = start;
445
446 return false;
447 }
448 }
449
450 /* Summary of system_register_name().
451 *
452 * in: Input_line_pointer points to 1st char of operand.
453 *
454 * out: A expressionS.
455 * The operand may have been a register: in this case, X_op == O_register,
456 * X_add_number is set to the register number, and truth is returned.
457 * Input_line_pointer->(next non-blank) char after operand, or is in
458 * its original state.
459 */
460 static boolean
461 system_register_name (expressionP, accept_numbers)
462 expressionS * expressionP;
463 boolean accept_numbers;
464 {
465 int reg_number;
466 char * name;
467 char * start;
468 char c;
469
470 /* Find the spelling of the operand */
471 start = name = input_line_pointer;
472
473 c = get_symbol_end ();
474 reg_number = reg_name_search (system_registers, SYSREG_NAME_CNT, name);
475
476 * input_line_pointer = c; /* put back the delimiting char */
477
478 if (reg_number < 0
479 && accept_numbers)
480 {
481 input_line_pointer = start; /* reset input_line pointer */
482
483 if (isdigit (* input_line_pointer))
484 reg_number = strtol (input_line_pointer, & input_line_pointer, 10);
485
486 /* Make sure that the register number is allowable. */
487 if ( reg_number < 0
488 || reg_number > 5
489 /* start-sanitize-v850e */
490 && reg_number < 16
491 || reg_number > 20
492 /* end-sanitize-v850e */
493 )
494 {
495 reg_number = -1;
496 }
497 }
498
499 /* look to see if it's in the register table */
500 if (reg_number >= 0)
501 {
502 expressionP->X_op = O_register;
503 expressionP->X_add_number = reg_number;
504
505 /* make the rest nice */
506 expressionP->X_add_symbol = NULL;
507 expressionP->X_op_symbol = NULL;
508
509 return true;
510 }
511 else
512 {
513 /* reset the line as if we had not done anything */
514 input_line_pointer = start;
515
516 return false;
517 }
518 }
519
520 /* Summary of cc_name().
521 *
522 * in: Input_line_pointer points to 1st char of operand.
523 *
524 * out: A expressionS.
525 * The operand may have been a register: in this case, X_op == O_register,
526 * X_add_number is set to the register number, and truth is returned.
527 * Input_line_pointer->(next non-blank) char after operand, or is in
528 * its original state.
529 */
530 static boolean
531 cc_name (expressionP)
532 expressionS * expressionP;
533 {
534 int reg_number;
535 char * name;
536 char * start;
537 char c;
538
539 /* Find the spelling of the operand */
540 start = name = input_line_pointer;
541
542 c = get_symbol_end ();
543 reg_number = reg_name_search (cc_names, CC_NAME_CNT, name);
544
545 * input_line_pointer = c; /* put back the delimiting char */
546
547 /* look to see if it's in the register table */
548 if (reg_number >= 0)
549 {
550 expressionP->X_op = O_constant;
551 expressionP->X_add_number = reg_number;
552
553 /* make the rest nice */
554 expressionP->X_add_symbol = NULL;
555 expressionP->X_op_symbol = NULL;
556
557 return true;
558 }
559 else
560 {
561 /* reset the line as if we had not done anything */
562 input_line_pointer = start;
563
564 return false;
565 }
566 }
567
568 static void
569 skip_white_space (void)
570 {
571 while ( * input_line_pointer == ' '
572 || * input_line_pointer == '\t')
573 ++ input_line_pointer;
574 }
575
576 /* start-sanitize-v850e */
577 /* Summary of parse_register_list ().
578 *
579 * in: Input_line_pointer points to 1st char of a list of registers.
580 * insn is the partially constructed instruction.
581 * operand is the operand being inserted.
582 *
583 * out: True if the parse completed successfully, False otherwise.
584 * If the parse completes the correct bit fields in the
585 * instruction will be filled in.
586 *
587 * Parses register lists with the syntax:
588 *
589 * { rX }
590 * { rX, rY }
591 * { rX - rY }
592 * { rX - rY, rZ }
593 * etc
594 *
595 * and also parses constant epxressions whoes bits indicate the
596 * registers in the lists. The LSB in the expression refers to
597 * the lowest numbered permissable register in the register list,
598 * and so on upwards. System registers are considered to be very
599 * high numbers.
600 *
601 */
602 static char *
603 parse_register_list
604 (
605 unsigned long * insn,
606 const struct v850_operand * operand
607 )
608 {
609 static int type1_regs[ 32 ] = { 30, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 31, 29, 28, 23, 22, 21, 20, 27, 26, 25, 24 };
610 static int type2_regs[ 32 ] = { 19, 18, 17, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 30, 31, 29, 28, 23, 22, 21, 20, 27, 26, 25, 24 };
611 static int type3_regs[ 32 ] = { 3, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 14, 15, 13, 12, 7, 6, 5, 4, 11, 10, 9, 8 };
612 int * regs;
613 expressionS exp;
614
615
616 /* Select a register array to parse. */
617 switch (operand->shift)
618 {
619 case 0xffe00001: regs = type1_regs; break;
620 case 0xfff8000f: regs = type2_regs; break;
621 case 0xfff8001f: regs = type3_regs; break;
622 default:
623 as_bad ("unknown operand shift: %x\n", operand->shift );
624 return "internal failure in parse_register_list";
625 }
626
627 skip_white_space();
628
629 /* If the expression starts with a curly brace it is a register list.
630 Otherwise it is a constant expression ,whoes bits indicate which
631 registers are to be included in the list. */
632
633 if (* input_line_pointer != '{')
634 {
635 int bits;
636 int reg;
637 int i;
638
639 expression (& exp);
640
641 if (exp.X_op != O_constant)
642 return "constant expression or register list expected";
643
644 if (regs == type1_regs)
645 {
646 if (exp.X_add_number & 0xFFFFF000)
647 return "high bits set in register list expression";
648
649 for (reg = 20; reg < 32; reg ++)
650 if (exp.X_add_number & (1 << (reg - 20)))
651 {
652 for (i = 0; i < 32; i++)
653 if (regs[i] == reg)
654 * insn |= (1 << i);
655 }
656 }
657 else if (regs == type2_regs)
658 {
659 if (exp.X_add_number & 0xFFFE0000)
660 return "high bits set in register list expression";
661
662 for (reg = 1; reg < 16; reg ++)
663 if (exp.X_add_number & (1 << (reg - 1)))
664 {
665 for (i = 0; i < 32; i++)
666 if (regs[i] == reg)
667 * insn |= (1 << i);
668 }
669
670 if (exp.X_add_number & (1 << 15))
671 * insn |= (1 << 3);
672
673 if (exp.X_add_number & (1 << 16))
674 * insn |= (1 << 19);
675 }
676 else /* regs == type3_regs */
677 {
678 if (exp.X_add_number & 0xFFFE0000)
679 return "high bits set in register list expression";
680
681 for (reg = 16; reg < 32; reg ++)
682 if (exp.X_add_number & (1 << (reg - 16)))
683 {
684 for (i = 0; i < 32; i++)
685 if (regs[i] == reg)
686 * insn |= (1 << i);
687 }
688
689 if (exp.X_add_number & (1 << 16))
690 * insn |= (1 << 19);
691 }
692
693 return NULL;
694 }
695
696 input_line_pointer ++;
697
698 /* Parse the register list until a terminator (closing curly brace or new-line) is found. */
699 for (;;)
700 {
701 if (register_name (& exp))
702 {
703 int i;
704
705 /* Locate the given register in the list, and if it is there, insert the corresponding bit into the instruction. */
706 for (i = 0; i < 32; i++)
707 {
708 if (regs[ i ] == exp.X_add_number)
709 {
710 * insn |= (1 << i);
711 break;
712 }
713 }
714
715 if (i == 32)
716 {
717 return "illegal register included in list";
718 }
719 }
720 else if (system_register_name (& exp, true))
721 {
722 if (regs == type1_regs)
723 {
724 return "system registers cannot be included in list";
725 }
726 else if (exp.X_add_number == 5)
727 {
728 if (regs == type2_regs)
729 return "PSW cannot be included in list";
730 else
731 * insn |= 0x8;
732 }
733 else
734 * insn |= 0x80000;
735 }
736 else if (* input_line_pointer == '}')
737 {
738 input_line_pointer ++;
739 break;
740 }
741 else if (* input_line_pointer == ',')
742 {
743 input_line_pointer ++;
744 continue;
745 }
746 else if (* input_line_pointer == '-')
747 {
748 /* We have encountered a range of registers: rX - rY */
749 int j;
750 expressionS exp2;
751
752 /* Skip the dash. */
753 ++ input_line_pointer;
754
755 /* Get the second register in the range. */
756 if (! register_name (& exp2))
757 {
758 return "second register should follow dash in register list";
759 exp2.X_add_number = exp.X_add_number;
760 }
761
762 /* Add the rest of the registers in the range. */
763 for (j = exp.X_add_number + 1; j <= exp2.X_add_number; j++)
764 {
765 int i;
766
767 /* Locate the given register in the list, and if it is there, insert the corresponding bit into the instruction. */
768 for (i = 0; i < 32; i++)
769 {
770 if (regs[ i ] == j)
771 {
772 * insn |= (1 << i);
773 break;
774 }
775 }
776
777 if (i == 32)
778 {
779 return "illegal register included in list";
780 }
781 }
782 }
783 else
784 {
785 break;
786 }
787
788 skip_white_space();
789 }
790
791 return NULL;
792 }
793 /* end-sanitize-v850e */
794
795 CONST char * md_shortopts = "m:";
796
797 struct option md_longopts[] =
798 {
799 {NULL, no_argument, NULL, 0}
800 };
801 size_t md_longopts_size = sizeof md_longopts;
802
803
804 void
805 md_show_usage (stream)
806 FILE * stream;
807 {
808 fprintf (stream, "V850 options:\n");
809 fprintf (stream, "\t-wsigned_overflow Warn if signed immediate values overflow\n");
810 fprintf (stream, "\t-wunsigned_overflow Warn if unsigned immediate values overflow\n");
811 fprintf (stream, "\t-mv850 The code is targeted at the v850\n");
812 /* start-sanitize-v850e */
813 fprintf (stream, "\t-mv850e The code is targeted at the v850e\n");
814 fprintf (stream, "\t-mv850eq The code is targeted at the v850eq\n");
815 /* end-sanitize-v850e */
816 }
817
818 int
819 md_parse_option (c, arg)
820 int c;
821 char * arg;
822 {
823 switch (c)
824 {
825 case 'w':
826 if (strcmp (arg, "signed_overflow") == 0)
827 {
828 warn_signed_overflows = TRUE;
829 return 1;
830 }
831 else if (strcmp (arg, "unsigned_overflow") == 0)
832 {
833 warn_unsigned_overflows = TRUE;
834 return 1;
835 }
836 break;
837
838 case 'm':
839 if (strcmp (arg, "v850") == 0)
840 {
841 machine = 0;
842 processor_mask = PROCESSOR_V850;
843 return 1;
844 }
845 /* start-sanitize-v850e */
846 else if (strcmp (arg, "v850e") == 0)
847 {
848 machine = bfd_mach_v850e;
849 processor_mask = PROCESSOR_V850E;
850 return 1;
851 }
852 else if (strcmp (arg, "v850eq") == 0)
853 {
854 machine = bfd_mach_v850eq;
855 processor_mask = PROCESSOR_V850EQ;
856 return 1;
857 }
858 /* end-sanitize-v850e */
859 break;
860 }
861
862 return 0;
863 }
864
865 symbolS *
866 md_undefined_symbol (name)
867 char * name;
868 {
869 return 0;
870 }
871
872 char *
873 md_atof (type, litp, sizep)
874 int type;
875 char * litp;
876 int * sizep;
877 {
878 int prec;
879 LITTLENUM_TYPE words[4];
880 char * t;
881 int i;
882
883 switch (type)
884 {
885 case 'f':
886 prec = 2;
887 break;
888
889 case 'd':
890 prec = 4;
891 break;
892
893 default:
894 *sizep = 0;
895 return "bad call to md_atof";
896 }
897
898 t = atof_ieee (input_line_pointer, type, words);
899 if (t)
900 input_line_pointer = t;
901
902 *sizep = prec * 2;
903
904 for (i = prec - 1; i >= 0; i--)
905 {
906 md_number_to_chars (litp, (valueT) words[i], 2);
907 litp += 2;
908 }
909
910 return NULL;
911 }
912
913
914 /* Very gross. */
915 void
916 md_convert_frag (abfd, sec, fragP)
917 bfd * abfd;
918 asection * sec;
919 fragS * fragP;
920 {
921 subseg_change (sec, 0);
922 if (fragP->fr_subtype == 0)
923 {
924 fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol,
925 fragP->fr_offset, 1, BFD_RELOC_UNUSED + (int)fragP->fr_opcode);
926 fragP->fr_var = 0;
927 fragP->fr_fix += 2;
928 }
929 else if (fragP->fr_subtype == 1)
930 {
931 /* Reverse the condition of the first branch. */
932 fragP->fr_literal[0] &= 0xf7;
933 /* Mask off all the displacement bits. */
934 fragP->fr_literal[0] &= 0x8f;
935 fragP->fr_literal[1] &= 0x07;
936 /* Now set the displacement bits so that we branch
937 around the unconditional branch. */
938 fragP->fr_literal[0] |= 0x30;
939
940 /* Now create the unconditional branch + fixup to the final
941 target. */
942 md_number_to_chars (&fragP->fr_literal[2], 0x00000780, 4);
943 fix_new (fragP, fragP->fr_fix + 2, 4, fragP->fr_symbol,
944 fragP->fr_offset, 1, BFD_RELOC_UNUSED + (int)fragP->fr_opcode + 1);
945 fragP->fr_var = 0;
946 fragP->fr_fix += 6;
947 }
948 else
949 abort ();
950 }
951
952 valueT
953 md_section_align (seg, addr)
954 asection * seg;
955 valueT addr;
956 {
957 int align = bfd_get_section_alignment (stdoutput, seg);
958 return ((addr + (1 << align) - 1) & (-1 << align));
959 }
960
961 void
962 md_begin ()
963 {
964 char * prev_name = "";
965 register const struct v850_opcode * op;
966 flagword applicable;
967
968 /* start-sanitize-v850e */
969 if (strncmp (TARGET_CPU, "v850eq", 6) == 0)
970 {
971 if (machine == -1)
972 machine = bfd_mach_v850eq;
973
974 if (processor_mask == -1)
975 processor_mask = PROCESSOR_V850EQ;
976 }
977 else if (strncmp (TARGET_CPU, "v850e", 5) == 0)
978 {
979 if (machine == -1)
980 machine = bfd_mach_v850e;
981
982 if (processor_mask == -1)
983 processor_mask = PROCESSOR_V850E;
984 }
985 else
986 /* end-sanitize-v850e */
987 if (strncmp (TARGET_CPU, "v850", 4) == 0)
988 {
989 if (machine == -1)
990 machine = 0;
991
992 if (processor_mask == -1)
993 processor_mask = PROCESSOR_V850;
994 }
995 else
996 as_bad ("Unable to determine default target processor from string: %s",
997 TARGET_CPU);
998
999 v850_hash = hash_new();
1000
1001 /* Insert unique names into hash table. The V850 instruction set
1002 has many identical opcode names that have different opcodes based
1003 on the operands. This hash table then provides a quick index to
1004 the first opcode with a particular name in the opcode table. */
1005
1006 op = v850_opcodes;
1007 while (op->name)
1008 {
1009 if (strcmp (prev_name, op->name))
1010 {
1011 prev_name = (char *) op->name;
1012 hash_insert (v850_hash, op->name, (char *) op);
1013 }
1014 op++;
1015 }
1016
1017 bfd_set_arch_mach (stdoutput, TARGET_ARCH, machine);
1018
1019 applicable = bfd_applicable_section_flags (stdoutput);
1020
1021 sdata_section = subseg_new (".sdata", 0);
1022 bfd_set_section_flags (stdoutput, sdata_section, applicable & (SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS));
1023
1024 tdata_section = subseg_new (".tdata", 0);
1025 bfd_set_section_flags (stdoutput, tdata_section, applicable & (SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS));
1026
1027 zdata_section = subseg_new (".zdata", 0);
1028 bfd_set_section_flags (stdoutput, zdata_section, applicable & (SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS));
1029
1030 sbss_section = subseg_new (".sbss", 0);
1031 bfd_set_section_flags (stdoutput, sbss_section, applicable & SEC_ALLOC);
1032
1033 tbss_section = subseg_new (".tbss", 0);
1034 bfd_set_section_flags (stdoutput, tbss_section, applicable & SEC_ALLOC);
1035
1036 zbss_section = subseg_new (".zbss", 0);
1037 bfd_set_section_flags (stdoutput, zbss_section, applicable & SEC_ALLOC);
1038
1039 rosdata_section = subseg_new (".rosdata", 0);
1040 bfd_set_section_flags (stdoutput, rosdata_section, applicable & (SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_READONLY));
1041
1042 rozdata_section = subseg_new (".rozdata", 0);
1043 bfd_set_section_flags (stdoutput, rozdata_section, applicable & (SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_READONLY));
1044
1045 /* start-sanitize-v850e */
1046 call_table_data_section = subseg_new (".call_table_data", 0);
1047 bfd_set_section_flags (stdoutput, call_table_data_section, applicable & (SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS));
1048
1049 call_table_text_section = subseg_new (".call_table_text", 0);
1050 bfd_set_section_flags (stdoutput, call_table_text_section, applicable & (SEC_ALLOC | SEC_LOAD | SEC_READONLY | SEC_CODE));
1051 /* end-sanitize-v850e */
1052 }
1053
1054
1055 /* start-sanitize-v850e */
1056 static bfd_reloc_code_real_type
1057 handle_ctoff (const struct v850_operand * operand)
1058 {
1059 if (operand == NULL)
1060 return BFD_RELOC_V850_CALLT_16_16_OFFSET;
1061
1062 if ( operand->bits != 6
1063 || operand->shift != 0)
1064 {
1065 as_bad ("ctoff() relocation used on an instruction which does not support it");
1066 return BFD_RELOC_64; /* Used to indicate an error condition. */
1067 }
1068
1069 return BFD_RELOC_V850_CALLT_6_7_OFFSET;
1070 }
1071 /* end-sanitize-v850e */
1072
1073 static bfd_reloc_code_real_type
1074 handle_sdaoff (const struct v850_operand * operand)
1075 {
1076 if (operand == NULL) return BFD_RELOC_V850_SDA_16_16_OFFSET;
1077 if (operand->bits == 15 && operand->shift == 17) return BFD_RELOC_V850_SDA_15_16_OFFSET;
1078 /* start-sanitize-v850e */
1079 if (operand->bits == -1) return BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET;
1080 /* end-sanitize-v850e */
1081
1082 if ( operand->bits != 16
1083 || operand->shift != 16)
1084 {
1085 as_bad ("sdaoff() relocation used on an instruction which does not support it");
1086 return BFD_RELOC_64; /* Used to indicate an error condition. */
1087 }
1088
1089 return BFD_RELOC_V850_SDA_16_16_OFFSET;
1090 }
1091
1092 static bfd_reloc_code_real_type
1093 handle_zdaoff (const struct v850_operand * operand)
1094 {
1095 if (operand == NULL) return BFD_RELOC_V850_ZDA_16_16_OFFSET;
1096 if (operand->bits == 15 && operand->shift == 17) return BFD_RELOC_V850_ZDA_15_16_OFFSET;
1097 /* start-sanitize-v850e */
1098 if (operand->bits == -1) return BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET;
1099 /* end-sanitize-v850e */
1100
1101 if ( operand->bits != 16
1102 || operand->shift != 16)
1103 {
1104 as_bad ("zdaoff() relocation used on an instruction which does not support it");
1105 return BFD_RELOC_64; /* Used to indicate an error condition. */
1106 }
1107
1108 return BFD_RELOC_V850_ZDA_16_16_OFFSET;
1109 }
1110
1111 static bfd_reloc_code_real_type
1112 handle_tdaoff (const struct v850_operand * operand)
1113 {
1114 if (operand == NULL) return BFD_RELOC_V850_TDA_7_7_OFFSET; /* data item, not an instruction. */
1115 if (operand->bits == 6 && operand->shift == 1) return BFD_RELOC_V850_TDA_6_8_OFFSET; /* sld.w/sst.w, operand: D8_6 */
1116 /* start-sanitize-v850e */
1117 if (operand->bits == 4 && operand->insert != NULL) return BFD_RELOC_V850_TDA_4_5_OFFSET; /* sld.hu, operand: D5-4 */
1118 if (operand->bits == 4 && operand->insert == NULL) return BFD_RELOC_V850_TDA_4_4_OFFSET; /* sld.bu, operand: D4 */
1119 /* end-sanitize-v850e */
1120 if (operand->bits == 16 && operand->shift == 16) return BFD_RELOC_V850_TDA_16_16_OFFSET; /* set1 & chums, operands: D16 */
1121
1122 if (operand->bits != 7)
1123 {
1124 as_bad ("tdaoff() relocation used on an instruction which does not support it");
1125 return BFD_RELOC_64; /* Used to indicate an error condition. */
1126 }
1127
1128 return operand->insert != NULL
1129 ? BFD_RELOC_V850_TDA_7_8_OFFSET /* sld.h/sst.h, operand: D8_7 */
1130 : BFD_RELOC_V850_TDA_7_7_OFFSET; /* sld.b/sst.b, opreand: D7 */
1131 }
1132
1133 /* Warning: The code in this function relies upon the definitions
1134 in the v850_operands[] array (defined in opcodes/v850-opc.c)
1135 matching the hard coded values contained herein. */
1136
1137 static bfd_reloc_code_real_type
1138 v850_reloc_prefix (const struct v850_operand * operand)
1139 {
1140 boolean paren_skipped = false;
1141
1142
1143 /* Skip leading opening parenthesis. */
1144 if (* input_line_pointer == '(')
1145 {
1146 ++ input_line_pointer;
1147 paren_skipped = true;
1148 }
1149
1150 #define CHECK_(name, reloc) \
1151 if (strncmp (input_line_pointer, name##"(", strlen (name) + 1) == 0) \
1152 { \
1153 input_line_pointer += strlen (name); \
1154 return reloc; \
1155 }
1156
1157 CHECK_ ("hi0", BFD_RELOC_HI16);
1158 CHECK_ ("hi", BFD_RELOC_HI16_S);
1159 CHECK_ ("lo", BFD_RELOC_LO16);
1160 CHECK_ ("sdaoff", handle_sdaoff (operand));
1161 CHECK_ ("zdaoff", handle_zdaoff (operand));
1162 CHECK_ ("tdaoff", handle_tdaoff (operand));
1163
1164 /* start-sanitize-v850e */
1165 CHECK_ ("hilo", BFD_RELOC_32);
1166 CHECK_ ("ctoff", handle_ctoff (operand));
1167 /* end-sanitize-v850e */
1168
1169 /* Restore skipped parenthesis. */
1170 if (paren_skipped)
1171 -- input_line_pointer;
1172
1173 return BFD_RELOC_UNUSED;
1174 }
1175
1176 void
1177 md_assemble (str)
1178 char * str;
1179 {
1180 char * s;
1181 char * start_of_operands;
1182 struct v850_opcode * opcode;
1183 struct v850_opcode * next_opcode;
1184 const unsigned char * opindex_ptr;
1185 int next_opindex;
1186 int relaxable;
1187 unsigned long insn;
1188 unsigned long insn_size;
1189 char * f;
1190 int i;
1191 int match;
1192 boolean extra_data_after_insn = false;
1193 unsigned extra_data_len;
1194 unsigned long extra_data;
1195 char * saved_input_line_pointer;
1196
1197 /* Get the opcode. */
1198 for (s = str; *s != '\0' && ! isspace (*s); s++)
1199 continue;
1200
1201 if (*s != '\0')
1202 *s++ = '\0';
1203
1204 /* find the first opcode with the proper name */
1205 opcode = (struct v850_opcode *)hash_find (v850_hash, str);
1206 if (opcode == NULL)
1207 {
1208 as_bad ("Unrecognized opcode: `%s'", str);
1209 ignore_rest_of_line ();
1210 return;
1211 }
1212
1213 str = s;
1214 while (isspace (* str))
1215 ++ str;
1216
1217 start_of_operands = str;
1218
1219 saved_input_line_pointer = input_line_pointer;
1220
1221 for (;;)
1222 {
1223 const char * errmsg = NULL;
1224
1225 match = 0;
1226
1227 if ((opcode->processors & processor_mask) == 0)
1228 {
1229 errmsg = "Target processor does not support this instruction.";
1230 goto error;
1231 }
1232
1233 relaxable = 0;
1234 fc = 0;
1235 next_opindex = 0;
1236 insn = opcode->opcode;
1237 extra_data_after_insn = false;
1238
1239 input_line_pointer = str = start_of_operands;
1240
1241 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
1242 {
1243 const struct v850_operand * operand;
1244 char * hold;
1245 expressionS ex;
1246 bfd_reloc_code_real_type reloc;
1247
1248 if (next_opindex == 0)
1249 {
1250 operand = & v850_operands[ * opindex_ptr ];
1251 }
1252 else
1253 {
1254 operand = & v850_operands[ next_opindex ];
1255 next_opindex = 0;
1256 }
1257
1258 errmsg = NULL;
1259
1260 while (*str == ' ' || *str == ',' || *str == '[' || *str == ']')
1261 ++str;
1262
1263 if (operand->flags & V850_OPERAND_RELAX)
1264 relaxable = 1;
1265
1266 /* Gather the operand. */
1267 hold = input_line_pointer;
1268 input_line_pointer = str;
1269
1270 /* lo(), hi(), hi0(), etc... */
1271 if ((reloc = v850_reloc_prefix (operand)) != BFD_RELOC_UNUSED)
1272 {
1273 if (reloc == BFD_RELOC_64) /* This is a fake reloc, used to indicate an error condition. */
1274 {
1275 match = 1;
1276 goto error;
1277 }
1278
1279 expression (& ex);
1280
1281 if (ex.X_op == O_constant)
1282 {
1283 switch (reloc)
1284 {
1285 case BFD_RELOC_V850_ZDA_16_16_OFFSET:
1286 /* To cope with "not1 7, zdaoff(0xfffff006)[r0]" and the like. */
1287 /* Fall through. */
1288
1289 case BFD_RELOC_LO16:
1290 {
1291 /* Truncate, then sign extend the value. */
1292 ex.X_add_number = SEXT16 (ex.X_add_number);
1293 break;
1294 }
1295
1296 case BFD_RELOC_HI16:
1297 {
1298 /* Truncate, then sign extend the value. */
1299 ex.X_add_number = SEXT16 (ex.X_add_number >> 16);
1300 break;
1301 }
1302
1303 case BFD_RELOC_HI16_S:
1304 {
1305 /* Truncate, then sign extend the value. */
1306 int temp = (ex.X_add_number >> 16) & 0xffff;
1307
1308 temp += (ex.X_add_number >> 15) & 1;
1309
1310 ex.X_add_number = SEXT16 (temp);
1311 break;
1312 }
1313
1314 /* start-sanitize-v850e */
1315 case BFD_RELOC_32:
1316 if ((operand->flags & V850E_IMMEDIATE32) == 0)
1317 {
1318 errmsg = "use bigger instruction";
1319 goto error;
1320 }
1321
1322 extra_data_after_insn = true;
1323 extra_data_len = 4;
1324 extra_data = ex.X_add_number;
1325 ex.X_add_number = 0;
1326 break;
1327 /* end-sanitize-v850e */
1328
1329 default:
1330 fprintf (stderr, "reloc: %d\n", reloc);
1331 as_bad ("AAARG -> unhandled constant reloc");
1332 break;
1333 }
1334
1335 insn = v850_insert_operand (insn, operand, ex.X_add_number,
1336 (char *) NULL, 0);
1337 }
1338 else
1339 {
1340 if (reloc == BFD_RELOC_32)
1341 {
1342 if ((operand->flags & V850E_IMMEDIATE32) == 0)
1343 {
1344 errmsg = "use bigger instruction";
1345 goto error;
1346 }
1347
1348 extra_data_after_insn = true;
1349 extra_data_len = 4;
1350 extra_data = ex.X_add_number;
1351 ex.X_add_number = 0;
1352 }
1353
1354 if (fc > MAX_INSN_FIXUPS)
1355 as_fatal ("too many fixups");
1356
1357 fixups[ fc ].exp = ex;
1358 fixups[ fc ].opindex = * opindex_ptr;
1359 fixups[ fc ].reloc = reloc;
1360 fc++;
1361 }
1362 }
1363 else
1364 {
1365 errmsg = NULL;
1366
1367 if ((operand->flags & V850_OPERAND_REG) != 0)
1368 {
1369 if (!register_name (& ex))
1370 {
1371 errmsg = "invalid register name";
1372 }
1373
1374 if ((operand->flags & V850_NOT_R0)
1375 && ex.X_add_number == 0)
1376 {
1377 errmsg = "register r0 cannot be used here";
1378 }
1379 }
1380 else if ((operand->flags & V850_OPERAND_SRG) != 0)
1381 {
1382 if (!system_register_name (& ex, true))
1383 {
1384 errmsg = "invalid system register name";
1385 }
1386 }
1387 else if ((operand->flags & V850_OPERAND_EP) != 0)
1388 {
1389 char * start = input_line_pointer;
1390 char c = get_symbol_end ();
1391
1392 if (strcmp (start, "ep") != 0 && strcmp (start, "r30") != 0)
1393 {
1394 /* Put things back the way we found them. */
1395 *input_line_pointer = c;
1396 input_line_pointer = start;
1397 errmsg = "expected EP register";
1398 goto error;
1399 }
1400
1401 *input_line_pointer = c;
1402 str = input_line_pointer;
1403 input_line_pointer = hold;
1404
1405 while (*str == ' ' || *str == ',' || *str == '[' || *str == ']')
1406 ++str;
1407 continue;
1408 }
1409 else if ((operand->flags & V850_OPERAND_CC) != 0)
1410 {
1411 if (!cc_name (& ex))
1412 {
1413 errmsg = "invalid condition code name";
1414 }
1415 }
1416 /* start-sanitize-v850e */
1417 else if (operand->flags & V850E_PUSH_POP)
1418 {
1419 errmsg = parse_register_list (& insn, operand);
1420
1421 /* The parse_register_list() function has already done everything, so fake a dummy expression. */
1422 ex.X_op = O_constant;
1423 ex.X_add_number = 0;
1424 }
1425 else if (operand->flags & V850E_IMMEDIATE16)
1426 {
1427 expression (& ex);
1428
1429 if (ex.X_op != O_constant)
1430 errmsg = "constant expression expected";
1431 else if (ex.X_add_number & 0xffff0000)
1432 {
1433 if (ex.X_add_number & 0xffff)
1434 errmsg = "constant too big to fit into instruction";
1435 else if ((insn & 0x001fffc0) == 0x00130780)
1436 ex.X_add_number >>= 16;
1437 else
1438 errmsg = "constant too big to fit into instruction";
1439 }
1440
1441 extra_data_after_insn = true;
1442 extra_data_len = 2;
1443 extra_data = ex.X_add_number;
1444 ex.X_add_number = 0;
1445 }
1446 else if (operand->flags & V850E_IMMEDIATE32)
1447 {
1448 expression (& ex);
1449
1450 if (ex.X_op != O_constant)
1451 errmsg = "constant expression expected";
1452
1453 extra_data_after_insn = true;
1454 extra_data_len = 4;
1455 extra_data = ex.X_add_number;
1456 ex.X_add_number = 0;
1457 }
1458 /* end-sanitize-v850e */
1459 else if (register_name (&ex)
1460 && (operand->flags & V850_OPERAND_REG) == 0)
1461 {
1462 errmsg = "syntax error: register not expected";
1463 }
1464 else if (system_register_name (& ex, false)
1465 && (operand->flags & V850_OPERAND_SRG) == 0)
1466 {
1467 errmsg = "syntax error: system register not expected";
1468 }
1469 else if (cc_name (&ex)
1470 && (operand->flags & V850_OPERAND_CC) == 0)
1471 {
1472 errmsg = "syntax error: condition code not expected";
1473 }
1474 else
1475 {
1476 expression (& ex);
1477 /* start-sanitize-v850e */
1478 /* Special case:
1479 If we are assembling a MOV instruction (or a CALLT.... :-)
1480 and the immediate value does not fit into the bits available
1481 then create a fake error so that the next MOV instruction
1482 will be selected. This one has a 32 bit immediate field. */
1483
1484 if (((insn & 0x07e0) == 0x0200)
1485 && ex.X_op == O_constant
1486 && (ex.X_add_number < (- (1 << (operand->bits - 1))) || ex.X_add_number > ((1 << operand->bits) - 1)))
1487 errmsg = "use bigger instruction";
1488 /* end-sanitize-v850e */
1489 }
1490
1491 if (errmsg)
1492 goto error;
1493
1494 /* fprintf (stderr, "insn: %x, operand %d, op: %d, add_number: %d\n", insn, opindex_ptr - opcode->operands, ex.X_op, ex.X_add_number ); */
1495
1496 switch (ex.X_op)
1497 {
1498 case O_illegal:
1499 errmsg = "illegal operand";
1500 goto error;
1501 case O_absent:
1502 errmsg = "missing operand";
1503 goto error;
1504 case O_register:
1505 if ((operand->flags & (V850_OPERAND_REG | V850_OPERAND_SRG)) == 0)
1506 {
1507 errmsg = "invalid operand";
1508 goto error;
1509 }
1510 insn = v850_insert_operand (insn, operand, ex.X_add_number,
1511 (char *) NULL, 0);
1512 break;
1513
1514 case O_constant:
1515 insn = v850_insert_operand (insn, operand, ex.X_add_number,
1516 (char *) NULL, 0);
1517 break;
1518
1519 default:
1520 /* We need to generate a fixup for this expression. */
1521 if (fc >= MAX_INSN_FIXUPS)
1522 as_fatal ("too many fixups");
1523
1524 fixups[ fc ].exp = ex;
1525 fixups[ fc ].opindex = * opindex_ptr;
1526 fixups[ fc ].reloc = BFD_RELOC_UNUSED;
1527 ++fc;
1528 break;
1529 }
1530 }
1531
1532 str = input_line_pointer;
1533 input_line_pointer = hold;
1534
1535 while (*str == ' ' || *str == ',' || *str == '[' || *str == ']'
1536 || *str == ')')
1537 ++str;
1538 }
1539 match = 1;
1540
1541 error:
1542 if (match == 0)
1543 {
1544 next_opcode = opcode + 1;
1545 if (next_opcode->name != NULL && strcmp (next_opcode->name, opcode->name) == 0)
1546 {
1547 opcode = next_opcode;
1548 continue;
1549 }
1550
1551 as_bad (errmsg);
1552 ignore_rest_of_line ();
1553 input_line_pointer = saved_input_line_pointer;
1554 return;
1555 }
1556 break;
1557 }
1558
1559 while (isspace (*str))
1560 ++str;
1561
1562 if (*str != '\0')
1563 as_bad ("junk at end of line: `%s'", str);
1564
1565 input_line_pointer = str;
1566
1567 /* Write out the instruction.
1568
1569 Four byte insns have an opcode with the two high bits on. */
1570 if (relaxable && fc > 0)
1571 {
1572 f = frag_var (rs_machine_dependent, 6, 4, 0,
1573 fixups[0].exp.X_add_symbol,
1574 fixups[0].exp.X_add_number,
1575 (char *)fixups[0].opindex);
1576 insn_size = 2;
1577 md_number_to_chars (f, insn, insn_size);
1578 md_number_to_chars (f + 2, 0, 4);
1579 fc = 0;
1580 }
1581 else
1582 {
1583 if ((insn & 0x0600) == 0x0600)
1584 insn_size = 4;
1585 else
1586 insn_size = 2;
1587
1588 /* start-sanitize-v850e */
1589 /* Special case: 32 bit MOV */
1590 if ((insn & 0xffe0) == 0x0620)
1591 insn_size = 2;
1592 /* end-sanitize-v850e */
1593
1594 f = frag_more (insn_size);
1595
1596 md_number_to_chars (f, insn, insn_size);
1597
1598 if (extra_data_after_insn)
1599 {
1600 f = frag_more (extra_data_len);
1601
1602 md_number_to_chars (f, extra_data, extra_data_len);
1603
1604 extra_data_after_insn = false;
1605 }
1606 }
1607
1608 /* Create any fixups. At this point we do not use a
1609 bfd_reloc_code_real_type, but instead just use the
1610 BFD_RELOC_UNUSED plus the operand index. This lets us easily
1611 handle fixups for any operand type, although that is admittedly
1612 not a very exciting feature. We pick a BFD reloc type in
1613 md_apply_fix. */
1614 for (i = 0; i < fc; i++)
1615 {
1616 const struct v850_operand * operand;
1617 bfd_reloc_code_real_type reloc;
1618
1619 operand = & v850_operands[ fixups[i].opindex ];
1620
1621 reloc = fixups[i].reloc;
1622
1623 if (reloc != BFD_RELOC_UNUSED)
1624 {
1625 reloc_howto_type * reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
1626 int size;
1627 int address;
1628 fixS * fixP;
1629
1630 if (!reloc_howto)
1631 abort();
1632
1633 size = bfd_get_reloc_size (reloc_howto);
1634
1635 if (size != 2 && size != 4) /* XXX this will abort on an R_V850_8 reloc - is this reloc actually used ? */
1636 abort();
1637
1638 address = (f - frag_now->fr_literal) + insn_size - size;
1639
1640 if (reloc == BFD_RELOC_32)
1641 {
1642 address += 2;
1643 }
1644
1645 fixP = fix_new_exp (frag_now, address, size,
1646 & fixups[i].exp,
1647 reloc_howto->pc_relative,
1648 reloc);
1649
1650 switch (reloc)
1651 {
1652 case BFD_RELOC_LO16:
1653 case BFD_RELOC_HI16:
1654 case BFD_RELOC_HI16_S:
1655 fixP->fx_no_overflow = 1;
1656 break;
1657 }
1658 }
1659 else
1660 {
1661 fix_new_exp (
1662 frag_now,
1663 f - frag_now->fr_literal, 4,
1664 & fixups[i].exp,
1665 1 /* FIXME: V850_OPERAND_RELATIVE ??? */,
1666 (bfd_reloc_code_real_type) (fixups[i].opindex + (int) BFD_RELOC_UNUSED)
1667 );
1668 }
1669 }
1670
1671 input_line_pointer = saved_input_line_pointer;
1672 }
1673
1674
1675 /* If while processing a fixup, a reloc really needs to be created */
1676 /* then it is done here. */
1677
1678 arelent *
1679 tc_gen_reloc (seg, fixp)
1680 asection * seg;
1681 fixS * fixp;
1682 {
1683 arelent * reloc;
1684
1685 reloc = (arelent *) xmalloc (sizeof (arelent));
1686 reloc->sym_ptr_ptr = & fixp->fx_addsy->bsym;
1687 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
1688 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
1689
1690 if (reloc->howto == (reloc_howto_type *) NULL)
1691 {
1692 as_bad_where (fixp->fx_file, fixp->fx_line,
1693 "reloc %d not supported by object file format", (int)fixp->fx_r_type);
1694
1695 xfree (reloc);
1696
1697 return NULL;
1698 }
1699
1700 reloc->addend = fixp->fx_addnumber;
1701
1702 return reloc;
1703 }
1704
1705 /* Assume everything will fit in two bytes, then expand as necessary. */
1706 int
1707 md_estimate_size_before_relax (fragp, seg)
1708 fragS * fragp;
1709 asection * seg;
1710 {
1711 fragp->fr_var = 4;
1712 return 2;
1713 }
1714
1715 long
1716 md_pcrel_from (fixp)
1717 fixS * fixp;
1718 {
1719 /* If the symbol is undefined, or in a section other than our own,
1720 then let the linker figure it out. */
1721 if (fixp->fx_addsy != (symbolS *) NULL && ! S_IS_DEFINED (fixp->fx_addsy))
1722 {
1723 /* The symbol is undefined. Let the linker figure it out. */
1724 return 0;
1725 }
1726 return fixp->fx_frag->fr_address + fixp->fx_where;
1727 }
1728
1729 int
1730 md_apply_fix3 (fixp, valuep, seg)
1731 fixS * fixp;
1732 valueT * valuep;
1733 segT seg;
1734 {
1735 valueT value;
1736 char * where;
1737
1738 if (fixp->fx_addsy == (symbolS *) NULL)
1739 {
1740 value = * valuep;
1741 fixp->fx_done = 1;
1742 }
1743 else if (fixp->fx_pcrel)
1744 value = * valuep;
1745 else
1746 {
1747 value = fixp->fx_offset;
1748 if (fixp->fx_subsy != (symbolS *) NULL)
1749 {
1750 if (S_GET_SEGMENT (fixp->fx_subsy) == absolute_section)
1751 value -= S_GET_VALUE (fixp->fx_subsy);
1752 else
1753 {
1754 /* We don't actually support subtracting a symbol. */
1755 as_bad_where (fixp->fx_file, fixp->fx_line,
1756 "expression too complex");
1757 }
1758 }
1759 }
1760
1761 if ((int) fixp->fx_r_type >= (int) BFD_RELOC_UNUSED)
1762 {
1763 int opindex;
1764 const struct v850_operand * operand;
1765 unsigned long insn;
1766
1767 opindex = (int) fixp->fx_r_type - (int) BFD_RELOC_UNUSED;
1768 operand = & v850_operands[ opindex ];
1769
1770 /* Fetch the instruction, insert the fully resolved operand
1771 value, and stuff the instruction back again.
1772
1773 Note the instruction has been stored in little endian
1774 format! */
1775 where = fixp->fx_frag->fr_literal + fixp->fx_where;
1776
1777 insn = bfd_getl32 ((unsigned char *) where);
1778 insn = v850_insert_operand (insn, operand, (offsetT) value,
1779 fixp->fx_file, fixp->fx_line);
1780 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
1781
1782 if (fixp->fx_done)
1783 {
1784 /* Nothing else to do here. */
1785 return 1;
1786 }
1787
1788 /* Determine a BFD reloc value based on the operand information.
1789 We are only prepared to turn a few of the operands into relocs. */
1790
1791 if (operand->bits == 22)
1792 fixp->fx_r_type = BFD_RELOC_V850_22_PCREL;
1793 else if (operand->bits == 9)
1794 fixp->fx_r_type = BFD_RELOC_V850_9_PCREL;
1795 else
1796 {
1797 /* fprintf (stderr, "bits: %d, insn: %x\n", operand->bits, insn); */
1798
1799 as_bad_where(fixp->fx_file, fixp->fx_line,
1800 "unresolved expression that must be resolved");
1801 fixp->fx_done = 1;
1802 return 1;
1803 }
1804 }
1805 else if (fixp->fx_done)
1806 {
1807 /* We still have to insert the value into memory! */
1808 where = fixp->fx_frag->fr_literal + fixp->fx_where;
1809 if (fixp->fx_size == 1)
1810 *where = value & 0xff;
1811 else if (fixp->fx_size == 2)
1812 bfd_putl16 (value & 0xffff, (unsigned char *) where);
1813 else if (fixp->fx_size == 4)
1814 bfd_putl32 (value, (unsigned char *) where);
1815 }
1816
1817 fixp->fx_addnumber = value;
1818 return 1;
1819 }
1820
1821 \f
1822 /* Insert an operand value into an instruction. */
1823
1824 static unsigned long
1825 v850_insert_operand (insn, operand, val, file, line)
1826 unsigned long insn;
1827 const struct v850_operand * operand;
1828 offsetT val;
1829 char *file;
1830 unsigned int line;
1831 {
1832 if (operand->insert)
1833 {
1834 const char * message = NULL;
1835
1836 insn = (*operand->insert) (insn, val, & message);
1837 if (message != NULL)
1838 {
1839 if (file == (char *) NULL)
1840 as_warn (message);
1841 else
1842 as_warn_where (file, line, message);
1843 }
1844 }
1845 else
1846 {
1847 if (operand->bits != 32)
1848 {
1849 long min, max;
1850 offsetT test;
1851
1852 if ((operand->flags & V850_OPERAND_SIGNED) != 0)
1853 {
1854 if (! warn_signed_overflows)
1855 max = (1 << operand->bits) - 1;
1856 else
1857 max = (1 << (operand->bits - 1)) - 1;
1858
1859 min = - (1 << (operand->bits - 1));
1860 }
1861 else
1862 {
1863 max = (1 << operand->bits) - 1;
1864
1865 if (! warn_unsigned_overflows)
1866 min = - (1 << (operand->bits - 1));
1867 else
1868 min = 0;
1869 }
1870
1871 test = val;
1872
1873 if (test < (offsetT) min || test > (offsetT) max)
1874 {
1875 const char * err = "operand out of range (%s not between %ld and %ld)";
1876 char buf[100];
1877
1878 sprint_value (buf, test);
1879 if (file == (char *) NULL)
1880 as_warn (err, buf, min, max);
1881 else
1882 as_warn_where (file, line, err, buf, min, max);
1883 }
1884 }
1885
1886 insn |= (((long) val & ((1 << operand->bits) - 1)) << operand->shift);
1887 }
1888
1889 return insn;
1890 }
1891
1892 /* Parse a cons expression. We have to handle hi(), lo(), etc
1893 on the v850. */
1894 void
1895 parse_cons_expression_v850 (exp)
1896 expressionS *exp;
1897 {
1898 /* See if there's a reloc prefix like hi() we have to handle. */
1899 hold_cons_reloc = v850_reloc_prefix (NULL);
1900
1901 /* Do normal expression parsing. */
1902 expression (exp);
1903 }
1904
1905 /* Create a fixup for a cons expression. If parse_cons_expression_v850
1906 found a reloc prefix, then we use that reloc, else we choose an
1907 appropriate one based on the size of the expression. */
1908 void
1909 cons_fix_new_v850 (frag, where, size, exp)
1910 fragS *frag;
1911 int where;
1912 int size;
1913 expressionS *exp;
1914 {
1915 if (hold_cons_reloc == BFD_RELOC_UNUSED)
1916 {
1917 if (size == 4)
1918 hold_cons_reloc = BFD_RELOC_32;
1919 if (size == 2)
1920 hold_cons_reloc = BFD_RELOC_16;
1921 if (size == 1)
1922 hold_cons_reloc = BFD_RELOC_8;
1923 }
1924
1925 if (exp != NULL)
1926 fix_new_exp (frag, where, size, exp, 0, hold_cons_reloc);
1927 else
1928 fix_new (frag, where, size, NULL, 0, 0, hold_cons_reloc);
1929 }
GDB Binutils - Deliverables
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