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Added missing sanitization markers.
[deliverable/binutils-gdb.git] / gas / config / tc-v850.c
1 /* tc-v850.c -- Assembler code for the NEC V850
2 Copyright (C) 1996, 1997 Free Software Foundation.
3
4 This file is part of GAS, the GNU Assembler.
5
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
9 any later version.
10
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
20
21 #include <stdio.h>
22 #include <ctype.h>
23 #include "as.h"
24 #include "subsegs.h"
25 #include "opcode/v850.h"
26
27 #define AREA_ZDA 0
28 #define AREA_SDA 1
29 #define AREA_TDA 2
30
31 /* sign-extend a 16-bit number */
32 #define SEXT16(x) ((((x) & 0xffff) ^ (~ 0x7fff)) + 0x8000)
33
34 /* Temporarily holds the reloc in a cons expression. */
35 static bfd_reloc_code_real_type hold_cons_reloc;
36
37 /* Set to TRUE if we want to be pedantic about signed overflows. */
38 static boolean warn_signed_overflows = FALSE;
39 static boolean warn_unsigned_overflows = FALSE;
40
41 /* Indicates the target BFD machine number. */
42 static int machine = -1;
43
44 /* Indicates the target processor(s) for the assemble. */
45 static unsigned int processor_mask = -1;
46
47 \f
48 /* Structure to hold information about predefined registers. */
49 struct reg_name
50 {
51 const char * name;
52 int value;
53 };
54
55 /* Generic assembler global variables which must be defined by all targets. */
56
57 /* Characters which always start a comment. */
58 const char comment_chars[] = "#";
59
60 /* Characters which start a comment at the beginning of a line. */
61 const char line_comment_chars[] = ";#";
62
63 /* Characters which may be used to separate multiple commands on a
64 single line. */
65 const char line_separator_chars[] = ";";
66
67 /* Characters which are used to indicate an exponent in a floating
68 point number. */
69 const char EXP_CHARS[] = "eE";
70
71 /* Characters which mean that a number is a floating point constant,
72 as in 0d1.0. */
73 const char FLT_CHARS[] = "dD";
74 \f
75
76 const relax_typeS md_relax_table[] =
77 {
78 /* Conditional branches. */
79 {0xff, -0x100, 2, 1},
80 {0x1fffff, -0x200000, 6, 0},
81 /* Unconditional branches. */
82 {0xff, -0x100, 2, 3},
83 {0x1fffff, -0x200000, 4, 0},
84 };
85
86
87 static segT sdata_section = NULL;
88 static segT tdata_section = NULL;
89 static segT zdata_section = NULL;
90 static segT sbss_section = NULL;
91 static segT tbss_section = NULL;
92 static segT zbss_section = NULL;
93 static segT rosdata_section = NULL;
94 static segT rozdata_section = NULL;
95 static segT scommon_section = NULL;
96 static segT tcommon_section = NULL;
97 static segT zcommon_section = NULL;
98 /* start-sanitize-v850e */
99 static segT call_table_data_section = NULL;
100 static segT call_table_text_section = NULL;
101 /* end-sanitize-v850e */
102
103
104 /* local functions */
105 static unsigned long v850_insert_operand
106 PARAMS ((unsigned long insn, const struct v850_operand *operand,
107 offsetT val, char *file, unsigned int line));
108
109
110 /* fixups */
111 #define MAX_INSN_FIXUPS (5)
112 struct v850_fixup
113 {
114 expressionS exp;
115 int opindex;
116 bfd_reloc_code_real_type reloc;
117 };
118 struct v850_fixup fixups[MAX_INSN_FIXUPS];
119 static int fc;
120 \f
121 void
122 v850_sdata (int ignore)
123 {
124 obj_elf_section_change_hook();
125
126 subseg_set (sdata_section, (subsegT) get_absolute_expression ());
127
128 demand_empty_rest_of_line ();
129 }
130
131 void
132 v850_tdata (int ignore)
133 {
134 obj_elf_section_change_hook();
135
136 subseg_set (tdata_section, (subsegT) get_absolute_expression ());
137
138 demand_empty_rest_of_line ();
139 }
140
141 void
142 v850_zdata (int ignore)
143 {
144 obj_elf_section_change_hook();
145
146 subseg_set (zdata_section, (subsegT) get_absolute_expression ());
147
148 demand_empty_rest_of_line ();
149 }
150
151 void
152 v850_sbss (int ignore)
153 {
154 obj_elf_section_change_hook();
155
156 subseg_set (sbss_section, (subsegT) get_absolute_expression ());
157
158 demand_empty_rest_of_line ();
159 }
160
161 void
162 v850_tbss (int ignore)
163 {
164 obj_elf_section_change_hook();
165
166 subseg_set (tbss_section, (subsegT) get_absolute_expression ());
167
168 demand_empty_rest_of_line ();
169 }
170
171 void
172 v850_zbss (int ignore)
173 {
174 obj_elf_section_change_hook();
175
176 subseg_set (zbss_section, (subsegT) get_absolute_expression ());
177
178 demand_empty_rest_of_line ();
179 }
180
181 void
182 v850_rosdata (int ignore)
183 {
184 obj_elf_section_change_hook();
185
186 subseg_set (rosdata_section, (subsegT) get_absolute_expression ());
187
188 demand_empty_rest_of_line ();
189 }
190
191 void
192 v850_rozdata (int ignore)
193 {
194 obj_elf_section_change_hook();
195
196 subseg_set (rozdata_section, (subsegT) get_absolute_expression ());
197
198 demand_empty_rest_of_line ();
199 }
200
201 /* start-sanitize-v850e */
202 void
203 v850_call_table_data (int ignore)
204 {
205 obj_elf_section_change_hook();
206
207 subseg_set (call_table_data_section, (subsegT) get_absolute_expression ());
208
209 demand_empty_rest_of_line ();
210 }
211
212 void
213 v850_call_table_text (int ignore)
214 {
215 obj_elf_section_change_hook();
216
217 subseg_set (call_table_text_section, (subsegT) get_absolute_expression ());
218
219 demand_empty_rest_of_line ();
220 }
221 /* end-sanitize-v850e */
222
223 void
224 v850_bss (int ignore)
225 {
226 register int temp = get_absolute_expression ();
227
228 obj_elf_section_change_hook();
229
230 subseg_set (bss_section, (subsegT) temp);
231
232 demand_empty_rest_of_line ();
233 }
234
235 void
236 v850_offset (int ignore)
237 {
238 int temp = get_absolute_expression ();
239
240 temp -= frag_now_fix();
241
242 if (temp > 0)
243 (void) frag_more (temp);
244
245 demand_empty_rest_of_line ();
246 }
247
248 /* Copied from obj_elf_common() in gas/config/obj-elf.c */
249 static void
250 v850_comm (area)
251 int area;
252 {
253 char * name;
254 char c;
255 char * p;
256 int temp;
257 int size;
258 symbolS * symbolP;
259 int have_align;
260
261 name = input_line_pointer;
262 c = get_symbol_end ();
263 /* just after name is now '\0' */
264 p = input_line_pointer;
265 *p = c;
266 SKIP_WHITESPACE ();
267 if (*input_line_pointer != ',')
268 {
269 as_bad ("Expected comma after symbol-name");
270 ignore_rest_of_line ();
271 return;
272 }
273 input_line_pointer++; /* skip ',' */
274 if ((temp = get_absolute_expression ()) < 0)
275 {
276 as_bad (".COMMon length (%d.) <0! Ignored.", temp);
277 ignore_rest_of_line ();
278 return;
279 }
280 size = temp;
281 *p = 0;
282 symbolP = symbol_find_or_make (name);
283 *p = c;
284 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
285 {
286 as_bad ("Ignoring attempt to re-define symbol");
287 ignore_rest_of_line ();
288 return;
289 }
290 if (S_GET_VALUE (symbolP) != 0)
291 {
292 if (S_GET_VALUE (symbolP) != size)
293 {
294 as_warn ("Length of .comm \"%s\" is already %ld. Not changed to %d.",
295 S_GET_NAME (symbolP), (long) S_GET_VALUE (symbolP), size);
296 }
297 }
298 know (symbolP->sy_frag == &zero_address_frag);
299 if (*input_line_pointer != ',')
300 have_align = 0;
301 else
302 {
303 have_align = 1;
304 input_line_pointer++;
305 SKIP_WHITESPACE ();
306 }
307 if (! have_align || *input_line_pointer != '"')
308 {
309 if (! have_align)
310 temp = 0;
311 else
312 {
313 temp = get_absolute_expression ();
314 if (temp < 0)
315 {
316 temp = 0;
317 as_warn ("Common alignment negative; 0 assumed");
318 }
319 }
320 if (symbolP->local)
321 {
322 segT old_sec;
323 int old_subsec;
324 char * pfrag;
325 int align;
326
327 /* allocate_bss: */
328 old_sec = now_seg;
329 old_subsec = now_subseg;
330 if (temp)
331 {
332 /* convert to a power of 2 alignment */
333 for (align = 0; (temp & 1) == 0; temp >>= 1, ++align);
334 if (temp != 1)
335 {
336 as_bad ("Common alignment not a power of 2");
337 ignore_rest_of_line ();
338 return;
339 }
340 }
341 else
342 align = 0;
343 switch (area)
344 {
345 case AREA_SDA:
346 record_alignment (sbss_section, align);
347 obj_elf_section_change_hook();
348 subseg_set (sbss_section, 0);
349 break;
350
351 case AREA_ZDA:
352 record_alignment (zbss_section, align);
353 obj_elf_section_change_hook();
354 subseg_set (zbss_section, 0);
355 break;
356
357 case AREA_TDA:
358 record_alignment (tbss_section, align);
359 obj_elf_section_change_hook();
360 subseg_set (tbss_section, 0);
361 break;
362
363 default:
364 abort();
365 }
366
367 if (align)
368 frag_align (align, 0, 0);
369
370 switch (area)
371 {
372 case AREA_SDA:
373 if (S_GET_SEGMENT (symbolP) == sbss_section)
374 symbolP->sy_frag->fr_symbol = 0;
375 break;
376
377 case AREA_ZDA:
378 if (S_GET_SEGMENT (symbolP) == zbss_section)
379 symbolP->sy_frag->fr_symbol = 0;
380 break;
381
382 case AREA_TDA:
383 if (S_GET_SEGMENT (symbolP) == tbss_section)
384 symbolP->sy_frag->fr_symbol = 0;
385 break;
386
387 default:
388 abort();
389 }
390
391 symbolP->sy_frag = frag_now;
392 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP,
393 (offsetT) size, (char *) 0);
394 *pfrag = 0;
395 S_SET_SIZE (symbolP, size);
396
397 switch (area)
398 {
399 case AREA_SDA: S_SET_SEGMENT (symbolP, sbss_section); break;
400 case AREA_ZDA: S_SET_SEGMENT (symbolP, zbss_section); break;
401 case AREA_TDA: S_SET_SEGMENT (symbolP, tbss_section); break;
402 default:
403 abort();
404 }
405
406 S_CLEAR_EXTERNAL (symbolP);
407 obj_elf_section_change_hook();
408 subseg_set (old_sec, old_subsec);
409 }
410 else
411 {
412 allocate_common:
413 S_SET_VALUE (symbolP, (valueT) size);
414 S_SET_ALIGN (symbolP, temp);
415 S_SET_EXTERNAL (symbolP);
416
417 switch (area)
418 {
419 case AREA_SDA: S_SET_SEGMENT (symbolP, scommon_section); break;
420 case AREA_ZDA: S_SET_SEGMENT (symbolP, zcommon_section); break;
421 case AREA_TDA: S_SET_SEGMENT (symbolP, tcommon_section); break;
422 default:
423 abort();
424 }
425 }
426 }
427 else
428 {
429 input_line_pointer++;
430 /* @@ Some use the dot, some don't. Can we get some consistency?? */
431 if (*input_line_pointer == '.')
432 input_line_pointer++;
433 /* @@ Some say data, some say bss. */
434 if (strncmp (input_line_pointer, "bss\"", 4)
435 && strncmp (input_line_pointer, "data\"", 5))
436 {
437 while (*--input_line_pointer != '"')
438 ;
439 input_line_pointer--;
440 goto bad_common_segment;
441 }
442 while (*input_line_pointer++ != '"')
443 ;
444 goto allocate_common;
445 }
446
447 symbolP->bsym->flags |= BSF_OBJECT;
448
449 demand_empty_rest_of_line ();
450 return;
451
452 {
453 bad_common_segment:
454 p = input_line_pointer;
455 while (*p && *p != '\n')
456 p++;
457 c = *p;
458 *p = '\0';
459 as_bad ("bad .common segment %s", input_line_pointer + 1);
460 *p = c;
461 input_line_pointer = p;
462 ignore_rest_of_line ();
463 return;
464 }
465 }
466
467 void
468 set_machine (int number)
469 {
470 machine = number;
471 bfd_set_arch_mach (stdoutput, TARGET_ARCH, machine);
472
473 switch (machine)
474 {
475 case 0: processor_mask = PROCESSOR_V850; break;
476 /* start-sanitize-v850e */
477 case bfd_mach_v850e: processor_mask = PROCESSOR_V850E; break;
478 case bfd_mach_v850eq: processor_mask = PROCESSOR_V850EQ; break;
479 /* end-sanitize-v850e */
480 }
481 }
482
483 /* The target specific pseudo-ops which we support. */
484 const pseudo_typeS md_pseudo_table[] =
485 {
486 {"sdata", v850_sdata, 0},
487 {"tdata", v850_tdata, 0},
488 {"zdata", v850_zdata, 0},
489 {"sbss", v850_sbss, 0},
490 {"tbss", v850_tbss, 0},
491 {"zbss", v850_zbss, 0},
492 {"rosdata", v850_rosdata, 0},
493 {"rozdata", v850_rozdata, 0},
494 {"bss", v850_bss, 0},
495 {"offset", v850_offset, 0},
496 {"word", cons, 4},
497 {"zcomm", v850_comm, AREA_ZDA},
498 {"scomm", v850_comm, AREA_SDA},
499 {"tcomm", v850_comm, AREA_TDA},
500 {"v850", set_machine, 0},
501 /* start-sanitize-v850e */
502 {"call_table_data", v850_call_table_data, 0},
503 {"call_table_text", v850_call_table_text, 0},
504 {"v850e", set_machine, bfd_mach_v850e},
505 {"v850eq", set_machine, bfd_mach_v850eq},
506 /* end-sanitize-v850e */
507 { NULL, NULL, 0}
508 };
509
510 /* Opcode hash table. */
511 static struct hash_control *v850_hash;
512
513 /* This table is sorted. Suitable for searching by a binary search. */
514 static const struct reg_name pre_defined_registers[] =
515 {
516 { "ep", 30 }, /* ep - element ptr */
517 { "gp", 4 }, /* gp - global ptr */
518 { "hp", 2 }, /* hp - handler stack ptr */
519 { "lp", 31 }, /* lp - link ptr */
520 { "r0", 0 },
521 { "r1", 1 },
522 { "r10", 10 },
523 { "r11", 11 },
524 { "r12", 12 },
525 { "r13", 13 },
526 { "r14", 14 },
527 { "r15", 15 },
528 { "r16", 16 },
529 { "r17", 17 },
530 { "r18", 18 },
531 { "r19", 19 },
532 { "r2", 2 },
533 { "r20", 20 },
534 { "r21", 21 },
535 { "r22", 22 },
536 { "r23", 23 },
537 { "r24", 24 },
538 { "r25", 25 },
539 { "r26", 26 },
540 { "r27", 27 },
541 { "r28", 28 },
542 { "r29", 29 },
543 { "r3", 3 },
544 { "r30", 30 },
545 { "r31", 31 },
546 { "r4", 4 },
547 { "r5", 5 },
548 { "r6", 6 },
549 { "r7", 7 },
550 { "r8", 8 },
551 { "r9", 9 },
552 { "sp", 3 }, /* sp - stack ptr */
553 { "tp", 5 }, /* tp - text ptr */
554 { "zero", 0 },
555 };
556 #define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct reg_name))
557
558
559 static const struct reg_name system_registers[] =
560 {
561 /* start-sanitize-v850e */
562 { "ctbp", 20 },
563 { "ctpc", 16 },
564 { "ctpsw", 17 },
565 { "dbpc", 18 },
566 { "dbpsw", 19 },
567 /* end-sanitize-v850e */
568 { "ecr", 4 },
569 { "eipc", 0 },
570 { "eipsw", 1 },
571 { "fepc", 2 },
572 { "fepsw", 3 },
573 { "psw", 5 },
574 };
575 #define SYSREG_NAME_CNT (sizeof (system_registers) / sizeof (struct reg_name))
576
577 /* start-sanitize-v850e */
578 static const struct reg_name system_list_registers[] =
579 {
580 {"PS", 5 },
581 {"SR", 0 + 1}
582 };
583 #define SYSREGLIST_NAME_CNT (sizeof (system_list_registers) / sizeof (struct reg_name))
584 /* end-sanitize-v850e */
585
586 static const struct reg_name cc_names[] =
587 {
588 { "c", 0x1 },
589 { "e", 0x2 },
590 { "ge", 0xe },
591 { "gt", 0xf },
592 { "h", 0xb },
593 { "l", 0x1 },
594 { "le", 0x7 },
595 { "lt", 0x6 },
596 { "n", 0x4 },
597 { "nc", 0x9 },
598 { "ne", 0xa },
599 { "nh", 0x3 },
600 { "nl", 0x9 },
601 { "ns", 0xc },
602 { "nv", 0x8 },
603 { "nz", 0xa },
604 { "p", 0xc },
605 { "s", 0x4 },
606 { "sa", 0xd },
607 { "t", 0x5 },
608 { "v", 0x0 },
609 { "z", 0x2 },
610 };
611 #define CC_NAME_CNT (sizeof (cc_names) / sizeof (struct reg_name))
612
613 /* reg_name_search does a binary search of the given register table
614 to see if "name" is a valid regiter name. Returns the register
615 number from the array on success, or -1 on failure. */
616
617 static int
618 reg_name_search (regs, regcount, name, accept_numbers)
619 const struct reg_name * regs;
620 int regcount;
621 const char * name;
622 boolean accept_numbers;
623 {
624 int middle, low, high;
625 int cmp;
626 symbolS * symbolP;
627
628 /* If the register name is a symbol, then evaluate it. */
629 if ((symbolP = symbol_find (name)) != NULL)
630 {
631 /* If the symbol is an alias for another name then use that.
632 If the symbol is an alias for a number, then return the number. */
633 if (symbolP->sy_value.X_op == O_symbol)
634 {
635 name = S_GET_NAME (symbolP->sy_value.X_add_symbol);
636 }
637 else if (accept_numbers)
638 {
639 int reg = S_GET_VALUE (symbolP);
640
641 if (reg >= 0 && reg <= 31)
642 return reg;
643 }
644 }
645
646 low = 0;
647 high = regcount - 1;
648
649 do
650 {
651 middle = (low + high) / 2;
652 cmp = strcasecmp (name, regs[middle].name);
653 if (cmp < 0)
654 high = middle - 1;
655 else if (cmp > 0)
656 low = middle + 1;
657 else
658 return regs[middle].value;
659 }
660 while (low <= high);
661 return -1;
662 }
663
664
665 /* Summary of register_name().
666 *
667 * in: Input_line_pointer points to 1st char of operand.
668 *
669 * out: A expressionS.
670 * The operand may have been a register: in this case, X_op == O_register,
671 * X_add_number is set to the register number, and truth is returned.
672 * Input_line_pointer->(next non-blank) char after operand, or is in
673 * its original state.
674 */
675 static boolean
676 register_name (expressionP)
677 expressionS * expressionP;
678 {
679 int reg_number;
680 char * name;
681 char * start;
682 char c;
683
684 /* Find the spelling of the operand */
685 start = name = input_line_pointer;
686
687 c = get_symbol_end ();
688
689 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name, FALSE);
690
691 * input_line_pointer = c; /* put back the delimiting char */
692
693 /* look to see if it's in the register table */
694 if (reg_number >= 0)
695 {
696 expressionP->X_op = O_register;
697 expressionP->X_add_number = reg_number;
698
699 /* make the rest nice */
700 expressionP->X_add_symbol = NULL;
701 expressionP->X_op_symbol = NULL;
702
703 return true;
704 }
705 else
706 {
707 /* reset the line as if we had not done anything */
708 input_line_pointer = start;
709
710 return false;
711 }
712 }
713
714 /* Summary of system_register_name().
715 *
716 * in: Input_line_pointer points to 1st char of operand.
717 * expressionP points to an expression structure to be filled in.
718 * accept_numbers is true iff numerical register names may be used.
719 * start-sanitize-v850e
720 * accept_list_names is true iff the special names PS and SR may be
721 * accepted.
722 * end-sanitize-v850eq
723 *
724 * out: A expressionS structure in expressionP.
725 * The operand may have been a register: in this case, X_op == O_register,
726 * X_add_number is set to the register number, and truth is returned.
727 * Input_line_pointer->(next non-blank) char after operand, or is in
728 * its original state.
729 */
730 static boolean
731 system_register_name (expressionP, accept_numbers
732 /* start-sanitize-v850e */
733 , accept_list_names
734 /* end-sanitize-v850e */
735 )
736 expressionS * expressionP;
737 boolean accept_numbers;
738 /* start-sanitize-v850e */
739 boolean accept_list_names;
740 /* end-sanitize-v850e */
741 {
742 int reg_number;
743 char * name;
744 char * start;
745 char c;
746
747 /* Find the spelling of the operand */
748 start = name = input_line_pointer;
749
750 c = get_symbol_end ();
751 reg_number = reg_name_search (system_registers, SYSREG_NAME_CNT, name, accept_numbers);
752
753 * input_line_pointer = c; /* put back the delimiting char */
754
755 if (reg_number < 0
756 && accept_numbers)
757 {
758 input_line_pointer = start; /* reset input_line pointer */
759
760 if (isdigit (* input_line_pointer))
761 {
762 reg_number = strtol (input_line_pointer, & input_line_pointer, 10);
763
764 /* Make sure that the register number is allowable. */
765 if ( reg_number < 0
766 || reg_number > 5
767 /* start-sanitize-v850e */
768 && reg_number < 16
769 || reg_number > 20
770 /* end-sanitize-v850e */
771 )
772 {
773 reg_number = -1;
774 }
775 }
776 /* start-sanitize-v850e */
777 else if (accept_list_names)
778 {
779 c = get_symbol_end ();
780 reg_number = reg_name_search (system_list_registers, SYSREGLIST_NAME_CNT, name, FALSE);
781
782 * input_line_pointer = c; /* put back the delimiting char */
783 }
784 /* end-sanitize-v850e */
785 }
786
787 /* look to see if it's in the register table */
788 if (reg_number >= 0)
789 {
790 expressionP->X_op = O_register;
791 expressionP->X_add_number = reg_number;
792
793 /* make the rest nice */
794 expressionP->X_add_symbol = NULL;
795 expressionP->X_op_symbol = NULL;
796
797 return true;
798 }
799 else
800 {
801 /* reset the line as if we had not done anything */
802 input_line_pointer = start;
803
804 return false;
805 }
806 }
807
808 /* Summary of cc_name().
809 *
810 * in: Input_line_pointer points to 1st char of operand.
811 *
812 * out: A expressionS.
813 * The operand may have been a register: in this case, X_op == O_register,
814 * X_add_number is set to the register number, and truth is returned.
815 * Input_line_pointer->(next non-blank) char after operand, or is in
816 * its original state.
817 */
818 static boolean
819 cc_name (expressionP)
820 expressionS * expressionP;
821 {
822 int reg_number;
823 char * name;
824 char * start;
825 char c;
826
827 /* Find the spelling of the operand */
828 start = name = input_line_pointer;
829
830 c = get_symbol_end ();
831 reg_number = reg_name_search (cc_names, CC_NAME_CNT, name, FALSE);
832
833 * input_line_pointer = c; /* put back the delimiting char */
834
835 /* look to see if it's in the register table */
836 if (reg_number >= 0)
837 {
838 expressionP->X_op = O_constant;
839 expressionP->X_add_number = reg_number;
840
841 /* make the rest nice */
842 expressionP->X_add_symbol = NULL;
843 expressionP->X_op_symbol = NULL;
844
845 return true;
846 }
847 else
848 {
849 /* reset the line as if we had not done anything */
850 input_line_pointer = start;
851
852 return false;
853 }
854 }
855
856 static void
857 skip_white_space (void)
858 {
859 while ( * input_line_pointer == ' '
860 || * input_line_pointer == '\t')
861 ++ input_line_pointer;
862 }
863
864 /* start-sanitize-v850e */
865 /* Summary of parse_register_list ().
866 *
867 * in: Input_line_pointer points to 1st char of a list of registers.
868 * insn is the partially constructed instruction.
869 * operand is the operand being inserted.
870 *
871 * out: NULL if the parse completed successfully, otherwise a
872 * pointer to an error message is returned. If the parse
873 * completes the correct bit fields in the instruction
874 * will be filled in.
875 *
876 * Parses register lists with the syntax:
877 *
878 * { rX }
879 * { rX, rY }
880 * { rX - rY }
881 * { rX - rY, rZ }
882 * etc
883 *
884 * and also parses constant epxressions whoes bits indicate the
885 * registers in the lists. The LSB in the expression refers to
886 * the lowest numbered permissable register in the register list,
887 * and so on upwards. System registers are considered to be very
888 * high numbers.
889 *
890 */
891 static char *
892 parse_register_list
893 (
894 unsigned long * insn,
895 const struct v850_operand * operand
896 )
897 {
898 static int type1_regs[ 32 ] = { 30, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 31, 29, 28, 23, 22, 21, 20, 27, 26, 25, 24 };
899 static int type2_regs[ 32 ] = { 19, 18, 17, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 30, 31, 29, 28, 23, 22, 21, 20, 27, 26, 25, 24 };
900 static int type3_regs[ 32 ] = { 3, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 14, 15, 13, 12, 7, 6, 5, 4, 11, 10, 9, 8 };
901 int * regs;
902 expressionS exp;
903
904
905 /* Select a register array to parse. */
906 switch (operand->shift)
907 {
908 case 0xffe00001: regs = type1_regs; break;
909 case 0xfff8000f: regs = type2_regs; break;
910 case 0xfff8001f: regs = type3_regs; break;
911 default:
912 as_bad ("unknown operand shift: %x\n", operand->shift );
913 return "internal failure in parse_register_list";
914 }
915
916 skip_white_space();
917
918 /* If the expression starts with a curly brace it is a register list.
919 Otherwise it is a constant expression, whoes bits indicate which
920 registers are to be included in the list. */
921
922 if (* input_line_pointer != '{')
923 {
924 int bits;
925 int reg;
926 int i;
927
928 expression (& exp);
929
930 if (exp.X_op != O_constant)
931 return "constant expression or register list expected";
932
933 if (regs == type1_regs)
934 {
935 if (exp.X_add_number & 0xFFFFF000)
936 return "high bits set in register list expression";
937
938 for (reg = 20; reg < 32; reg ++)
939 if (exp.X_add_number & (1 << (reg - 20)))
940 {
941 for (i = 0; i < 32; i++)
942 if (regs[i] == reg)
943 * insn |= (1 << i);
944 }
945 }
946 else if (regs == type2_regs)
947 {
948 if (exp.X_add_number & 0xFFFE0000)
949 return "high bits set in register list expression";
950
951 for (reg = 1; reg < 16; reg ++)
952 if (exp.X_add_number & (1 << (reg - 1)))
953 {
954 for (i = 0; i < 32; i++)
955 if (regs[i] == reg)
956 * insn |= (1 << i);
957 }
958
959 if (exp.X_add_number & (1 << 15))
960 * insn |= (1 << 3);
961
962 if (exp.X_add_number & (1 << 16))
963 * insn |= (1 << 19);
964 }
965 else /* regs == type3_regs */
966 {
967 if (exp.X_add_number & 0xFFFE0000)
968 return "high bits set in register list expression";
969
970 for (reg = 16; reg < 32; reg ++)
971 if (exp.X_add_number & (1 << (reg - 16)))
972 {
973 for (i = 0; i < 32; i++)
974 if (regs[i] == reg)
975 * insn |= (1 << i);
976 }
977
978 if (exp.X_add_number & (1 << 16))
979 * insn |= (1 << 19);
980 }
981
982 return NULL;
983 }
984
985 input_line_pointer ++;
986
987 /* Parse the register list until a terminator (closing curly brace or new-line) is found. */
988 for (;;)
989 {
990 if (register_name (& exp))
991 {
992 int i;
993
994 /* Locate the given register in the list, and if it is there, insert the corresponding bit into the instruction. */
995 for (i = 0; i < 32; i++)
996 {
997 if (regs[ i ] == exp.X_add_number)
998 {
999 * insn |= (1 << i);
1000 break;
1001 }
1002 }
1003
1004 if (i == 32)
1005 {
1006 return "illegal register included in list";
1007 }
1008 }
1009 else if (system_register_name (& exp, true, true))
1010 {
1011 if (regs == type1_regs)
1012 {
1013 return "system registers cannot be included in list";
1014 }
1015 else if (exp.X_add_number == 5)
1016 {
1017 if (regs == type2_regs)
1018 return "PSW cannot be included in list";
1019 else
1020 * insn |= 0x8;
1021 }
1022 else if (exp.X_add_number < 4)
1023 * insn |= 0x80000;
1024 else
1025 return "High value system registers cannot be included in list";
1026 }
1027 else if (* input_line_pointer == '}')
1028 {
1029 input_line_pointer ++;
1030 break;
1031 }
1032 else if (* input_line_pointer == ',')
1033 {
1034 input_line_pointer ++;
1035 continue;
1036 }
1037 else if (* input_line_pointer == '-')
1038 {
1039 /* We have encountered a range of registers: rX - rY */
1040 int j;
1041 expressionS exp2;
1042
1043 /* Skip the dash. */
1044 ++ input_line_pointer;
1045
1046 /* Get the second register in the range. */
1047 if (! register_name (& exp2))
1048 {
1049 return "second register should follow dash in register list";
1050 exp2.X_add_number = exp.X_add_number;
1051 }
1052
1053 /* Add the rest of the registers in the range. */
1054 for (j = exp.X_add_number + 1; j <= exp2.X_add_number; j++)
1055 {
1056 int i;
1057
1058 /* Locate the given register in the list, and if it is there, insert the corresponding bit into the instruction. */
1059 for (i = 0; i < 32; i++)
1060 {
1061 if (regs[ i ] == j)
1062 {
1063 * insn |= (1 << i);
1064 break;
1065 }
1066 }
1067
1068 if (i == 32)
1069 {
1070 return "illegal register included in list";
1071 }
1072 }
1073 }
1074 else
1075 {
1076 break;
1077 }
1078
1079 skip_white_space();
1080 }
1081
1082 return NULL;
1083 }
1084 /* end-sanitize-v850e */
1085
1086 CONST char * md_shortopts = "m:";
1087
1088 struct option md_longopts[] =
1089 {
1090 {NULL, no_argument, NULL, 0}
1091 };
1092 size_t md_longopts_size = sizeof md_longopts;
1093
1094
1095 void
1096 md_show_usage (stream)
1097 FILE * stream;
1098 {
1099 fprintf (stream, "V850 options:\n");
1100 fprintf (stream, "\t-mwarn_signed_overflow Warn if signed immediate values overflow\n");
1101 fprintf (stream, "\t-mwarn_unsigned_overflow Warn if unsigned immediate values overflow\n");
1102 fprintf (stream, "\t-mv850 The code is targeted at the v850\n");
1103 /* start-sanitize-v850e */
1104 fprintf (stream, "\t-mv850e The code is targeted at the v850e\n");
1105 fprintf (stream, "\t-mv850eq The code is targeted at the v850eq\n");
1106 /* end-sanitize-v850e */
1107 }
1108
1109 int
1110 md_parse_option (c, arg)
1111 int c;
1112 char * arg;
1113 {
1114 if (c != 'm')
1115 return 0;
1116
1117 if (strcmp (arg, "warn_signed_overflow") == 0)
1118 {
1119 warn_signed_overflows = TRUE;
1120 }
1121 else if (strcmp (arg, "warn_unsigned_overflow") == 0)
1122 {
1123 warn_unsigned_overflows = TRUE;
1124 }
1125 else if (strcmp (arg, "v850") == 0)
1126 {
1127 machine = 0;
1128 processor_mask = PROCESSOR_V850;
1129 }
1130 /* start-sanitize-v850e */
1131 else if (strcmp (arg, "v850e") == 0)
1132 {
1133 machine = bfd_mach_v850e;
1134 processor_mask = PROCESSOR_V850E;
1135 }
1136 else if (strcmp (arg, "v850eq") == 0)
1137 {
1138 machine = bfd_mach_v850eq;
1139 processor_mask = PROCESSOR_V850EQ;
1140 }
1141 /* end-sanitize-v850e */
1142 else
1143 return 0;
1144
1145 return 1;
1146 }
1147
1148 symbolS *
1149 md_undefined_symbol (name)
1150 char * name;
1151 {
1152 return 0;
1153 }
1154
1155 char *
1156 md_atof (type, litp, sizep)
1157 int type;
1158 char * litp;
1159 int * sizep;
1160 {
1161 int prec;
1162 LITTLENUM_TYPE words[4];
1163 char * t;
1164 int i;
1165
1166 switch (type)
1167 {
1168 case 'f':
1169 prec = 2;
1170 break;
1171
1172 case 'd':
1173 prec = 4;
1174 break;
1175
1176 default:
1177 *sizep = 0;
1178 return "bad call to md_atof";
1179 }
1180
1181 t = atof_ieee (input_line_pointer, type, words);
1182 if (t)
1183 input_line_pointer = t;
1184
1185 *sizep = prec * 2;
1186
1187 for (i = prec - 1; i >= 0; i--)
1188 {
1189 md_number_to_chars (litp, (valueT) words[i], 2);
1190 litp += 2;
1191 }
1192
1193 return NULL;
1194 }
1195
1196
1197 /* Very gross. */
1198 void
1199 md_convert_frag (abfd, sec, fragP)
1200 bfd * abfd;
1201 asection * sec;
1202 fragS * fragP;
1203 {
1204 subseg_change (sec, 0);
1205
1206 /* In range conditional or unconditional branch. */
1207 if (fragP->fr_subtype == 0 || fragP->fr_subtype == 2)
1208 {
1209 fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol,
1210 fragP->fr_offset, 1, BFD_RELOC_UNUSED + (int)fragP->fr_opcode);
1211 fragP->fr_var = 0;
1212 fragP->fr_fix += 2;
1213 }
1214 /* Out of range conditional branch. Emit a branch around a jump. */
1215 else if (fragP->fr_subtype == 1)
1216 {
1217 unsigned char *buffer =
1218 (unsigned char *) (fragP->fr_fix + fragP->fr_literal);
1219
1220 /* Reverse the condition of the first branch. */
1221 buffer[0] ^= 0x08;
1222 /* Mask off all the displacement bits. */
1223 buffer[0] &= 0x8f;
1224 buffer[1] &= 0x07;
1225 /* Now set the displacement bits so that we branch
1226 around the unconditional branch. */
1227 buffer[0] |= 0x30;
1228
1229 /* Now create the unconditional branch + fixup to the final
1230 target. */
1231 md_number_to_chars (buffer + 2, 0x00000780, 4);
1232 fix_new (fragP, fragP->fr_fix + 2, 4, fragP->fr_symbol,
1233 fragP->fr_offset, 1, BFD_RELOC_UNUSED + (int)fragP->fr_opcode + 1);
1234 fragP->fr_var = 0;
1235 fragP->fr_fix += 6;
1236 }
1237 /* Out of range unconditional branch. Emit a jump. */
1238 else if (fragP->fr_subtype == 3)
1239 {
1240 md_number_to_chars (fragP->fr_fix + fragP->fr_literal, 0x00000780, 4);
1241 fix_new (fragP, fragP->fr_fix, 4, fragP->fr_symbol,
1242 fragP->fr_offset, 1, BFD_RELOC_UNUSED + (int)fragP->fr_opcode + 1);
1243 fragP->fr_var = 0;
1244 fragP->fr_fix += 4;
1245 }
1246 else
1247 abort ();
1248 }
1249
1250 valueT
1251 md_section_align (seg, addr)
1252 asection * seg;
1253 valueT addr;
1254 {
1255 int align = bfd_get_section_alignment (stdoutput, seg);
1256 return ((addr + (1 << align) - 1) & (-1 << align));
1257 }
1258
1259 void
1260 md_begin ()
1261 {
1262 char * prev_name = "";
1263 register const struct v850_opcode * op;
1264 flagword applicable;
1265
1266 /* start-sanitize-v850e */
1267 if (strncmp (TARGET_CPU, "v850eq", 6) == 0)
1268 {
1269 if (machine == -1)
1270 machine = bfd_mach_v850eq;
1271
1272 if (processor_mask == -1)
1273 processor_mask = PROCESSOR_V850EQ;
1274 }
1275 else if (strncmp (TARGET_CPU, "v850e", 5) == 0)
1276 {
1277 if (machine == -1)
1278 machine = bfd_mach_v850e;
1279
1280 if (processor_mask == -1)
1281 processor_mask = PROCESSOR_V850E;
1282 }
1283 else
1284 /* end-sanitize-v850e */
1285 if (strncmp (TARGET_CPU, "v850", 4) == 0)
1286 {
1287 if (machine == -1)
1288 machine = 0;
1289
1290 if (processor_mask == -1)
1291 processor_mask = PROCESSOR_V850;
1292 }
1293 else
1294 as_bad ("Unable to determine default target processor from string: %s",
1295 TARGET_CPU);
1296
1297 v850_hash = hash_new();
1298
1299 /* Insert unique names into hash table. The V850 instruction set
1300 has many identical opcode names that have different opcodes based
1301 on the operands. This hash table then provides a quick index to
1302 the first opcode with a particular name in the opcode table. */
1303
1304 op = v850_opcodes;
1305 while (op->name)
1306 {
1307 if (strcmp (prev_name, op->name))
1308 {
1309 prev_name = (char *) op->name;
1310 hash_insert (v850_hash, op->name, (char *) op);
1311 }
1312 op++;
1313 }
1314
1315 bfd_set_arch_mach (stdoutput, TARGET_ARCH, machine);
1316
1317 applicable = bfd_applicable_section_flags (stdoutput);
1318
1319 sdata_section = subseg_new (".sdata", 0);
1320 bfd_set_section_flags (stdoutput, sdata_section, applicable & (SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS));
1321
1322 tdata_section = subseg_new (".tdata", 0);
1323 bfd_set_section_flags (stdoutput, tdata_section, applicable & (SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS));
1324
1325 zdata_section = subseg_new (".zdata", 0);
1326 bfd_set_section_flags (stdoutput, zdata_section, applicable & (SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS));
1327
1328 sbss_section = subseg_new (".sbss", 0);
1329 bfd_set_section_flags (stdoutput, sbss_section, applicable & SEC_ALLOC);
1330 seg_info (sbss_section)->bss = 1;
1331
1332 tbss_section = subseg_new (".tbss", 0);
1333 bfd_set_section_flags (stdoutput, tbss_section, applicable & SEC_ALLOC);
1334 seg_info (tbss_section)->bss = 1;
1335
1336 zbss_section = subseg_new (".zbss", 0);
1337 bfd_set_section_flags (stdoutput, zbss_section, applicable & SEC_ALLOC);
1338 seg_info (zbss_section)->bss = 1;
1339
1340 rosdata_section = subseg_new (".rosdata", 0);
1341 bfd_set_section_flags (stdoutput, rosdata_section, applicable & (SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_READONLY));
1342
1343 rozdata_section = subseg_new (".rozdata", 0);
1344 bfd_set_section_flags (stdoutput, rozdata_section, applicable & (SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_READONLY));
1345
1346 scommon_section = subseg_new (".scommon", 0);
1347 bfd_set_section_flags (stdoutput, scommon_section, applicable & (SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS | SEC_IS_COMMON));
1348
1349 zcommon_section = subseg_new (".zcommon", 0);
1350 bfd_set_section_flags (stdoutput, zcommon_section, applicable & (SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS | SEC_IS_COMMON));
1351
1352 tcommon_section = subseg_new (".tcommon", 0);
1353 bfd_set_section_flags (stdoutput, tcommon_section, applicable & (SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS | SEC_IS_COMMON));
1354
1355 /* start-sanitize-v850e */
1356 call_table_data_section = subseg_new (".call_table_data", 0);
1357 bfd_set_section_flags (stdoutput, call_table_data_section, applicable & (SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS));
1358
1359 call_table_text_section = subseg_new (".call_table_text", 0);
1360 bfd_set_section_flags (stdoutput, call_table_text_section, applicable & (SEC_ALLOC | SEC_LOAD | SEC_READONLY | SEC_CODE));
1361 /* end-sanitize-v850e */
1362 }
1363
1364
1365 /* start-sanitize-v850e */
1366 static bfd_reloc_code_real_type
1367 handle_ctoff (const struct v850_operand * operand)
1368 {
1369 if (operand == NULL)
1370 return BFD_RELOC_V850_CALLT_16_16_OFFSET;
1371
1372 if ( operand->bits != 6
1373 || operand->shift != 0)
1374 {
1375 as_bad ("ctoff() relocation used on an instruction which does not support it");
1376 return BFD_RELOC_64; /* Used to indicate an error condition. */
1377 }
1378
1379 return BFD_RELOC_V850_CALLT_6_7_OFFSET;
1380 }
1381 /* end-sanitize-v850e */
1382
1383 static bfd_reloc_code_real_type
1384 handle_sdaoff (const struct v850_operand * operand)
1385 {
1386 if (operand == NULL) return BFD_RELOC_V850_SDA_16_16_OFFSET;
1387 if (operand->bits == 15 && operand->shift == 17) return BFD_RELOC_V850_SDA_15_16_OFFSET;
1388 /* start-sanitize-v850e */
1389 if (operand->bits == -1) return BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET;
1390 /* end-sanitize-v850e */
1391
1392 if ( operand->bits != 16
1393 || operand->shift != 16)
1394 {
1395 as_bad ("sdaoff() relocation used on an instruction which does not support it");
1396 return BFD_RELOC_64; /* Used to indicate an error condition. */
1397 }
1398
1399 return BFD_RELOC_V850_SDA_16_16_OFFSET;
1400 }
1401
1402 static bfd_reloc_code_real_type
1403 handle_zdaoff (const struct v850_operand * operand)
1404 {
1405 if (operand == NULL) return BFD_RELOC_V850_ZDA_16_16_OFFSET;
1406 if (operand->bits == 15 && operand->shift == 17) return BFD_RELOC_V850_ZDA_15_16_OFFSET;
1407 /* start-sanitize-v850e */
1408 if (operand->bits == -1) return BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET;
1409 /* end-sanitize-v850e */
1410
1411 if ( operand->bits != 16
1412 || operand->shift != 16)
1413 {
1414 as_bad ("zdaoff() relocation used on an instruction which does not support it");
1415 return BFD_RELOC_64; /* Used to indicate an error condition. */
1416 }
1417
1418 return BFD_RELOC_V850_ZDA_16_16_OFFSET;
1419 }
1420
1421 static bfd_reloc_code_real_type
1422 handle_tdaoff (const struct v850_operand * operand)
1423 {
1424 if (operand == NULL) return BFD_RELOC_V850_TDA_7_7_OFFSET; /* data item, not an instruction. */
1425 if (operand->bits == 6 && operand->shift == 1) return BFD_RELOC_V850_TDA_6_8_OFFSET; /* sld.w/sst.w, operand: D8_6 */
1426 /* start-sanitize-v850e */
1427 if (operand->bits == 4 && operand->insert != NULL) return BFD_RELOC_V850_TDA_4_5_OFFSET; /* sld.hu, operand: D5-4 */
1428 if (operand->bits == 4 && operand->insert == NULL) return BFD_RELOC_V850_TDA_4_4_OFFSET; /* sld.bu, operand: D4 */
1429 /* end-sanitize-v850e */
1430 if (operand->bits == 16 && operand->shift == 16) return BFD_RELOC_V850_TDA_16_16_OFFSET; /* set1 & chums, operands: D16 */
1431
1432 if (operand->bits != 7)
1433 {
1434 as_bad ("tdaoff() relocation used on an instruction which does not support it");
1435 return BFD_RELOC_64; /* Used to indicate an error condition. */
1436 }
1437
1438 return operand->insert != NULL
1439 ? BFD_RELOC_V850_TDA_7_8_OFFSET /* sld.h/sst.h, operand: D8_7 */
1440 : BFD_RELOC_V850_TDA_7_7_OFFSET; /* sld.b/sst.b, opreand: D7 */
1441 }
1442
1443 /* Warning: The code in this function relies upon the definitions
1444 in the v850_operands[] array (defined in opcodes/v850-opc.c)
1445 matching the hard coded values contained herein. */
1446
1447 static bfd_reloc_code_real_type
1448 v850_reloc_prefix (const struct v850_operand * operand)
1449 {
1450 boolean paren_skipped = false;
1451
1452
1453 /* Skip leading opening parenthesis. */
1454 if (* input_line_pointer == '(')
1455 {
1456 ++ input_line_pointer;
1457 paren_skipped = true;
1458 }
1459
1460 #define CHECK_(name, reloc) \
1461 if (strncmp (input_line_pointer, name##"(", strlen (name) + 1) == 0) \
1462 { \
1463 input_line_pointer += strlen (name); \
1464 return reloc; \
1465 }
1466
1467 CHECK_ ("hi0", BFD_RELOC_HI16);
1468 CHECK_ ("hi", BFD_RELOC_HI16_S);
1469 CHECK_ ("lo", BFD_RELOC_LO16);
1470 CHECK_ ("sdaoff", handle_sdaoff (operand));
1471 CHECK_ ("zdaoff", handle_zdaoff (operand));
1472 CHECK_ ("tdaoff", handle_tdaoff (operand));
1473
1474 /* start-sanitize-v850e */
1475 CHECK_ ("hilo", BFD_RELOC_32);
1476 CHECK_ ("ctoff", handle_ctoff (operand));
1477 /* end-sanitize-v850e */
1478
1479 /* Restore skipped parenthesis. */
1480 if (paren_skipped)
1481 -- input_line_pointer;
1482
1483 return BFD_RELOC_UNUSED;
1484 }
1485
1486 void
1487 md_assemble (str)
1488 char * str;
1489 {
1490 char * s;
1491 char * start_of_operands;
1492 struct v850_opcode * opcode;
1493 struct v850_opcode * next_opcode;
1494 const unsigned char * opindex_ptr;
1495 int next_opindex;
1496 int relaxable;
1497 unsigned long insn;
1498 unsigned long insn_size;
1499 char * f;
1500 int i;
1501 int match;
1502 boolean extra_data_after_insn = false;
1503 unsigned extra_data_len;
1504 unsigned long extra_data;
1505 char * saved_input_line_pointer;
1506
1507 /* Get the opcode. */
1508 for (s = str; *s != '\0' && ! isspace (*s); s++)
1509 continue;
1510
1511 if (*s != '\0')
1512 *s++ = '\0';
1513
1514 /* find the first opcode with the proper name */
1515 opcode = (struct v850_opcode *)hash_find (v850_hash, str);
1516 if (opcode == NULL)
1517 {
1518 as_bad ("Unrecognized opcode: `%s'", str);
1519 ignore_rest_of_line ();
1520 return;
1521 }
1522
1523 str = s;
1524 while (isspace (* str))
1525 ++ str;
1526
1527 start_of_operands = str;
1528
1529 saved_input_line_pointer = input_line_pointer;
1530
1531 for (;;)
1532 {
1533 const char * errmsg = NULL;
1534
1535 match = 0;
1536
1537 if ((opcode->processors & processor_mask) == 0)
1538 {
1539 errmsg = "Target processor does not support this instruction.";
1540 goto error;
1541 }
1542
1543 relaxable = 0;
1544 fc = 0;
1545 next_opindex = 0;
1546 insn = opcode->opcode;
1547 extra_data_after_insn = false;
1548
1549 input_line_pointer = str = start_of_operands;
1550
1551 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
1552 {
1553 const struct v850_operand * operand;
1554 char * hold;
1555 expressionS ex;
1556 bfd_reloc_code_real_type reloc;
1557
1558 if (next_opindex == 0)
1559 {
1560 operand = & v850_operands[ * opindex_ptr ];
1561 }
1562 else
1563 {
1564 operand = & v850_operands[ next_opindex ];
1565 next_opindex = 0;
1566 }
1567
1568 errmsg = NULL;
1569
1570 while (*str == ' ' || *str == ',' || *str == '[' || *str == ']')
1571 ++str;
1572
1573 if (operand->flags & V850_OPERAND_RELAX)
1574 relaxable = 1;
1575
1576 /* Gather the operand. */
1577 hold = input_line_pointer;
1578 input_line_pointer = str;
1579
1580 /* lo(), hi(), hi0(), etc... */
1581 if ((reloc = v850_reloc_prefix (operand)) != BFD_RELOC_UNUSED)
1582 {
1583 if (reloc == BFD_RELOC_64) /* This is a fake reloc, used to indicate an error condition. */
1584 {
1585 match = 1;
1586 goto error;
1587 }
1588
1589 expression (& ex);
1590
1591 if (ex.X_op == O_constant)
1592 {
1593 switch (reloc)
1594 {
1595 case BFD_RELOC_V850_ZDA_16_16_OFFSET:
1596 /* To cope with "not1 7, zdaoff(0xfffff006)[r0]" and the like. */
1597 /* Fall through. */
1598
1599 case BFD_RELOC_LO16:
1600 {
1601 /* Truncate, then sign extend the value. */
1602 ex.X_add_number = SEXT16 (ex.X_add_number);
1603 break;
1604 }
1605
1606 case BFD_RELOC_HI16:
1607 {
1608 /* Truncate, then sign extend the value. */
1609 ex.X_add_number = SEXT16 (ex.X_add_number >> 16);
1610 break;
1611 }
1612
1613 case BFD_RELOC_HI16_S:
1614 {
1615 /* Truncate, then sign extend the value. */
1616 int temp = (ex.X_add_number >> 16) & 0xffff;
1617
1618 temp += (ex.X_add_number >> 15) & 1;
1619
1620 ex.X_add_number = SEXT16 (temp);
1621 break;
1622 }
1623
1624 /* start-sanitize-v850e */
1625 case BFD_RELOC_32:
1626 if ((operand->flags & V850E_IMMEDIATE32) == 0)
1627 {
1628 errmsg = "use bigger instruction";
1629 goto error;
1630 }
1631
1632 extra_data_after_insn = true;
1633 extra_data_len = 4;
1634 extra_data = ex.X_add_number;
1635 ex.X_add_number = 0;
1636 break;
1637 /* end-sanitize-v850e */
1638
1639 default:
1640 fprintf (stderr, "reloc: %d\n", reloc);
1641 as_bad ("AAARG -> unhandled constant reloc");
1642 break;
1643 }
1644
1645 insn = v850_insert_operand (insn, operand, ex.X_add_number,
1646 (char *) NULL, 0);
1647 }
1648 else
1649 {
1650 /* start-sanitize-v850e */
1651 if (reloc == BFD_RELOC_32)
1652 {
1653 if ((operand->flags & V850E_IMMEDIATE32) == 0)
1654 {
1655 errmsg = "use bigger instruction";
1656 goto error;
1657 }
1658
1659 extra_data_after_insn = true;
1660 extra_data_len = 4;
1661 extra_data = ex.X_add_number;
1662 ex.X_add_number = 0;
1663 }
1664 /* end-sanitize-v850e */
1665
1666 if (fc > MAX_INSN_FIXUPS)
1667 as_fatal ("too many fixups");
1668
1669 fixups[ fc ].exp = ex;
1670 fixups[ fc ].opindex = * opindex_ptr;
1671 fixups[ fc ].reloc = reloc;
1672 fc++;
1673 }
1674 }
1675 else
1676 {
1677 errmsg = NULL;
1678
1679 if ((operand->flags & V850_OPERAND_REG) != 0)
1680 {
1681 if (!register_name (& ex))
1682 {
1683 errmsg = "invalid register name";
1684 }
1685
1686 if ((operand->flags & V850_NOT_R0)
1687 && ex.X_add_number == 0)
1688 {
1689 errmsg = "register r0 cannot be used here";
1690 }
1691 }
1692 else if ((operand->flags & V850_OPERAND_SRG) != 0)
1693 {
1694 if (!system_register_name (& ex, true
1695 /* start-sanitize-v850e */
1696 , false
1697 /* end-sanitize-v850e */
1698 ))
1699 {
1700 errmsg = "invalid system register name";
1701 }
1702 }
1703 else if ((operand->flags & V850_OPERAND_EP) != 0)
1704 {
1705 char * start = input_line_pointer;
1706 char c = get_symbol_end ();
1707
1708 if (strcmp (start, "ep") != 0 && strcmp (start, "r30") != 0)
1709 {
1710 /* Put things back the way we found them. */
1711 *input_line_pointer = c;
1712 input_line_pointer = start;
1713 errmsg = "expected EP register";
1714 goto error;
1715 }
1716
1717 *input_line_pointer = c;
1718 str = input_line_pointer;
1719 input_line_pointer = hold;
1720
1721 while (*str == ' ' || *str == ',' || *str == '[' || *str == ']')
1722 ++str;
1723 continue;
1724 }
1725 else if ((operand->flags & V850_OPERAND_CC) != 0)
1726 {
1727 if (!cc_name (& ex))
1728 {
1729 errmsg = "invalid condition code name";
1730 }
1731 }
1732 /* start-sanitize-v850e */
1733 else if (operand->flags & V850E_PUSH_POP)
1734 {
1735 errmsg = parse_register_list (& insn, operand);
1736
1737 /* The parse_register_list() function has already done everything, so fake a dummy expression. */
1738 ex.X_op = O_constant;
1739 ex.X_add_number = 0;
1740 }
1741 else if (operand->flags & V850E_IMMEDIATE16)
1742 {
1743 expression (& ex);
1744
1745 if (ex.X_op != O_constant)
1746 errmsg = "constant expression expected";
1747 else if (ex.X_add_number & 0xffff0000)
1748 {
1749 if (ex.X_add_number & 0xffff)
1750 errmsg = "constant too big to fit into instruction";
1751 else if ((insn & 0x001fffc0) == 0x00130780)
1752 ex.X_add_number >>= 16;
1753 else
1754 errmsg = "constant too big to fit into instruction";
1755 }
1756
1757 extra_data_after_insn = true;
1758 extra_data_len = 2;
1759 extra_data = ex.X_add_number;
1760 ex.X_add_number = 0;
1761 }
1762 else if (operand->flags & V850E_IMMEDIATE32)
1763 {
1764 expression (& ex);
1765
1766 if (ex.X_op != O_constant)
1767 errmsg = "constant expression expected";
1768
1769 extra_data_after_insn = true;
1770 extra_data_len = 4;
1771 extra_data = ex.X_add_number;
1772 ex.X_add_number = 0;
1773 }
1774 /* end-sanitize-v850e */
1775 else if (register_name (& ex)
1776 && (operand->flags & V850_OPERAND_REG) == 0)
1777 {
1778 /* It is possible that an alias has been defined that
1779 matches a register name. For example the code may
1780 include a ".set ZERO, 0" directive, which matches
1781 the register name "zero". Attempt to reparse the
1782 field as an expression, and only complain if we
1783 cannot generate a constant. */
1784
1785 input_line_pointer = str;
1786
1787 expression (& ex);
1788
1789 if (ex.X_op != O_constant)
1790 errmsg = "syntax error: register not expected";
1791 }
1792 else if (system_register_name (& ex, false
1793 /* start-sanitize-v850e */
1794 , false
1795 /* end-sanitize-v850e */
1796 )
1797 && (operand->flags & V850_OPERAND_SRG) == 0)
1798 {
1799 errmsg = "syntax error: system register not expected";
1800 }
1801 else if (cc_name (&ex)
1802 && (operand->flags & V850_OPERAND_CC) == 0)
1803 {
1804 errmsg = "syntax error: condition code not expected";
1805 }
1806 else
1807 {
1808 expression (& ex);
1809 /* start-sanitize-v850e */
1810 /* Special case:
1811 If we are assembling a MOV instruction (or a CALLT.... :-)
1812 and the immediate value does not fit into the bits available
1813 then create a fake error so that the next MOV instruction
1814 will be selected. This one has a 32 bit immediate field. */
1815
1816 if (((insn & 0x07e0) == 0x0200)
1817 && ex.X_op == O_constant
1818 && (ex.X_add_number < (- (1 << (operand->bits - 1))) || ex.X_add_number > ((1 << operand->bits) - 1)))
1819 errmsg = "use bigger instruction";
1820 /* end-sanitize-v850e */
1821 }
1822
1823 if (errmsg)
1824 goto error;
1825
1826 /* fprintf (stderr, " insn: %x, operand %d, op: %d, add_number: %d\n", insn, opindex_ptr - opcode->operands, ex.X_op, ex.X_add_number); */
1827
1828 switch (ex.X_op)
1829 {
1830 case O_illegal:
1831 errmsg = "illegal operand";
1832 goto error;
1833 case O_absent:
1834 errmsg = "missing operand";
1835 goto error;
1836 case O_register:
1837 if ((operand->flags & (V850_OPERAND_REG | V850_OPERAND_SRG)) == 0)
1838 {
1839 errmsg = "invalid operand";
1840 goto error;
1841 }
1842 insn = v850_insert_operand (insn, operand, ex.X_add_number,
1843 (char *) NULL, 0);
1844 break;
1845
1846 case O_constant:
1847 insn = v850_insert_operand (insn, operand, ex.X_add_number,
1848 (char *) NULL, 0);
1849 break;
1850
1851 default:
1852 /* We need to generate a fixup for this expression. */
1853 if (fc >= MAX_INSN_FIXUPS)
1854 as_fatal ("too many fixups");
1855
1856 fixups[ fc ].exp = ex;
1857 fixups[ fc ].opindex = * opindex_ptr;
1858 fixups[ fc ].reloc = BFD_RELOC_UNUSED;
1859 ++fc;
1860 break;
1861 }
1862 }
1863
1864 str = input_line_pointer;
1865 input_line_pointer = hold;
1866
1867 while (*str == ' ' || *str == ',' || *str == '[' || *str == ']'
1868 || *str == ')')
1869 ++str;
1870 }
1871 match = 1;
1872
1873 error:
1874 if (match == 0)
1875 {
1876 next_opcode = opcode + 1;
1877 if (next_opcode->name != NULL && strcmp (next_opcode->name, opcode->name) == 0)
1878 {
1879 opcode = next_opcode;
1880 continue;
1881 }
1882
1883 as_bad (errmsg);
1884 ignore_rest_of_line ();
1885 input_line_pointer = saved_input_line_pointer;
1886 return;
1887 }
1888 break;
1889 }
1890
1891 while (isspace (*str))
1892 ++str;
1893
1894 if (*str != '\0')
1895 as_bad ("junk at end of line: `%s'", str);
1896
1897 input_line_pointer = str;
1898
1899 /* Write out the instruction. */
1900
1901 if (relaxable && fc > 0)
1902 {
1903 insn_size = 2;
1904 fc = 0;
1905
1906 if (!strcmp (opcode->name, "br"))
1907 {
1908 f = frag_var (rs_machine_dependent, 4, 2, 2,
1909 fixups[0].exp.X_add_symbol,
1910 fixups[0].exp.X_add_number,
1911 (char *)fixups[0].opindex);
1912 md_number_to_chars (f, insn, insn_size);
1913 md_number_to_chars (f + 2, 0, 2);
1914 }
1915 else
1916 {
1917 f = frag_var (rs_machine_dependent, 6, 4, 0,
1918 fixups[0].exp.X_add_symbol,
1919 fixups[0].exp.X_add_number,
1920 (char *)fixups[0].opindex);
1921 md_number_to_chars (f, insn, insn_size);
1922 md_number_to_chars (f + 2, 0, 4);
1923 }
1924 }
1925 else
1926 {
1927 /* Four byte insns have an opcode with the two high bits on. */
1928 if ((insn & 0x0600) == 0x0600)
1929 insn_size = 4;
1930 else
1931 insn_size = 2;
1932
1933 /* start-sanitize-v850e */
1934 /* Special case: 32 bit MOV */
1935 if ((insn & 0xffe0) == 0x0620)
1936 insn_size = 2;
1937 /* end-sanitize-v850e */
1938
1939 f = frag_more (insn_size);
1940
1941 md_number_to_chars (f, insn, insn_size);
1942
1943 if (extra_data_after_insn)
1944 {
1945 f = frag_more (extra_data_len);
1946
1947 md_number_to_chars (f, extra_data, extra_data_len);
1948
1949 extra_data_after_insn = false;
1950 }
1951 }
1952
1953 /* Create any fixups. At this point we do not use a
1954 bfd_reloc_code_real_type, but instead just use the
1955 BFD_RELOC_UNUSED plus the operand index. This lets us easily
1956 handle fixups for any operand type, although that is admittedly
1957 not a very exciting feature. We pick a BFD reloc type in
1958 md_apply_fix. */
1959 for (i = 0; i < fc; i++)
1960 {
1961 const struct v850_operand * operand;
1962 bfd_reloc_code_real_type reloc;
1963
1964 operand = & v850_operands[ fixups[i].opindex ];
1965
1966 reloc = fixups[i].reloc;
1967
1968 if (reloc != BFD_RELOC_UNUSED)
1969 {
1970 reloc_howto_type * reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
1971 int size;
1972 int address;
1973 fixS * fixP;
1974
1975 if (!reloc_howto)
1976 abort();
1977
1978 size = bfd_get_reloc_size (reloc_howto);
1979
1980 if (size != 2 && size != 4) /* XXX this will abort on an R_V850_8 reloc - is this reloc actually used ? */
1981 abort();
1982
1983 address = (f - frag_now->fr_literal) + insn_size - size;
1984
1985 if (reloc == BFD_RELOC_32)
1986 {
1987 address += 2;
1988 }
1989
1990 fixP = fix_new_exp (frag_now, address, size,
1991 & fixups[i].exp,
1992 reloc_howto->pc_relative,
1993 reloc);
1994
1995 switch (reloc)
1996 {
1997 case BFD_RELOC_LO16:
1998 case BFD_RELOC_HI16:
1999 case BFD_RELOC_HI16_S:
2000 fixP->fx_no_overflow = 1;
2001 break;
2002 }
2003 }
2004 else
2005 {
2006 fix_new_exp (
2007 frag_now,
2008 f - frag_now->fr_literal, 4,
2009 & fixups[i].exp,
2010 1 /* FIXME: V850_OPERAND_RELATIVE ??? */,
2011 (bfd_reloc_code_real_type) (fixups[i].opindex + (int) BFD_RELOC_UNUSED)
2012 );
2013 }
2014 }
2015
2016 input_line_pointer = saved_input_line_pointer;
2017 }
2018
2019
2020 /* If while processing a fixup, a reloc really needs to be created */
2021 /* then it is done here. */
2022
2023 arelent *
2024 tc_gen_reloc (seg, fixp)
2025 asection * seg;
2026 fixS * fixp;
2027 {
2028 arelent * reloc;
2029
2030 reloc = (arelent *) xmalloc (sizeof (arelent));
2031 reloc->sym_ptr_ptr = & fixp->fx_addsy->bsym;
2032 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
2033 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
2034
2035 if (reloc->howto == (reloc_howto_type *) NULL)
2036 {
2037 as_bad_where (fixp->fx_file, fixp->fx_line,
2038 "reloc %d not supported by object file format", (int)fixp->fx_r_type);
2039
2040 xfree (reloc);
2041
2042 return NULL;
2043 }
2044
2045 reloc->addend = fixp->fx_addnumber;
2046
2047 return reloc;
2048 }
2049
2050 /* Assume everything will fit in two bytes, then expand as necessary. */
2051 int
2052 md_estimate_size_before_relax (fragp, seg)
2053 fragS * fragp;
2054 asection * seg;
2055 {
2056 if (fragp->fr_subtype == 0)
2057 fragp->fr_var = 4;
2058 else if (fragp->fr_subtype == 2)
2059 fragp->fr_var = 2;
2060 else
2061 abort ();
2062 return 2;
2063 }
2064
2065 long
2066 md_pcrel_from (fixp)
2067 fixS * fixp;
2068 {
2069 /* If the symbol is undefined, or in a section other than our own,
2070 then let the linker figure it out. */
2071 if (fixp->fx_addsy != (symbolS *) NULL && ! S_IS_DEFINED (fixp->fx_addsy))
2072 {
2073 /* The symbol is undefined. Let the linker figure it out. */
2074 return 0;
2075 }
2076 return fixp->fx_frag->fr_address + fixp->fx_where;
2077 }
2078
2079 int
2080 md_apply_fix3 (fixp, valuep, seg)
2081 fixS * fixp;
2082 valueT * valuep;
2083 segT seg;
2084 {
2085 valueT value;
2086 char * where;
2087
2088 if (fixp->fx_addsy == (symbolS *) NULL)
2089 {
2090 value = * valuep;
2091 fixp->fx_done = 1;
2092 }
2093 else if (fixp->fx_pcrel)
2094 value = * valuep;
2095 else
2096 {
2097 value = fixp->fx_offset;
2098 if (fixp->fx_subsy != (symbolS *) NULL)
2099 {
2100 if (S_GET_SEGMENT (fixp->fx_subsy) == absolute_section)
2101 value -= S_GET_VALUE (fixp->fx_subsy);
2102 else
2103 {
2104 /* We don't actually support subtracting a symbol. */
2105 as_bad_where (fixp->fx_file, fixp->fx_line,
2106 "expression too complex");
2107 }
2108 }
2109 }
2110
2111 if ((int) fixp->fx_r_type >= (int) BFD_RELOC_UNUSED)
2112 {
2113 int opindex;
2114 const struct v850_operand * operand;
2115 unsigned long insn;
2116
2117 opindex = (int) fixp->fx_r_type - (int) BFD_RELOC_UNUSED;
2118 operand = & v850_operands[ opindex ];
2119
2120 /* Fetch the instruction, insert the fully resolved operand
2121 value, and stuff the instruction back again.
2122
2123 Note the instruction has been stored in little endian
2124 format! */
2125 where = fixp->fx_frag->fr_literal + fixp->fx_where;
2126
2127 insn = bfd_getl32 ((unsigned char *) where);
2128 insn = v850_insert_operand (insn, operand, (offsetT) value,
2129 fixp->fx_file, fixp->fx_line);
2130 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
2131
2132 if (fixp->fx_done)
2133 {
2134 /* Nothing else to do here. */
2135 return 1;
2136 }
2137
2138 /* Determine a BFD reloc value based on the operand information.
2139 We are only prepared to turn a few of the operands into relocs. */
2140
2141 if (operand->bits == 22)
2142 fixp->fx_r_type = BFD_RELOC_V850_22_PCREL;
2143 else if (operand->bits == 9)
2144 fixp->fx_r_type = BFD_RELOC_V850_9_PCREL;
2145 else
2146 {
2147 /* fprintf (stderr, "bits: %d, insn: %x\n", operand->bits, insn); */
2148
2149 as_bad_where(fixp->fx_file, fixp->fx_line,
2150 "unresolved expression that must be resolved");
2151 fixp->fx_done = 1;
2152 return 1;
2153 }
2154 }
2155 else if (fixp->fx_done)
2156 {
2157 /* We still have to insert the value into memory! */
2158 where = fixp->fx_frag->fr_literal + fixp->fx_where;
2159
2160 if (fixp->fx_size == 1)
2161 *where = value & 0xff;
2162 else if (fixp->fx_size == 2)
2163 bfd_putl16 (value & 0xffff, (unsigned char *) where);
2164 else if (fixp->fx_size == 4)
2165 bfd_putl32 (value, (unsigned char *) where);
2166 }
2167
2168 fixp->fx_addnumber = value;
2169 return 1;
2170 }
2171
2172 \f
2173 /* Insert an operand value into an instruction. */
2174
2175 static unsigned long
2176 v850_insert_operand (insn, operand, val, file, line)
2177 unsigned long insn;
2178 const struct v850_operand * operand;
2179 offsetT val;
2180 char *file;
2181 unsigned int line;
2182 {
2183 if (operand->insert)
2184 {
2185 const char * message = NULL;
2186
2187 insn = (*operand->insert) (insn, val, & message);
2188 if (message != NULL)
2189 {
2190 if (file == (char *) NULL)
2191 as_warn (message);
2192 else
2193 as_warn_where (file, line, message);
2194 }
2195 }
2196 else
2197 {
2198 if (operand->bits != 32)
2199 {
2200 long min, max;
2201 offsetT test;
2202
2203 if ((operand->flags & V850_OPERAND_SIGNED) != 0)
2204 {
2205 if (! warn_signed_overflows)
2206 max = (1 << operand->bits) - 1;
2207 else
2208 max = (1 << (operand->bits - 1)) - 1;
2209
2210 min = - (1 << (operand->bits - 1));
2211 }
2212 else
2213 {
2214 max = (1 << operand->bits) - 1;
2215
2216 if (! warn_unsigned_overflows)
2217 min = - (1 << (operand->bits - 1));
2218 else
2219 min = 0;
2220 }
2221
2222 test = val;
2223
2224 if (test < (offsetT) min || test > (offsetT) max)
2225 {
2226 const char * err = "operand out of range (%s not between %ld and %ld)";
2227 char buf[100];
2228
2229 /* Restore min and mix to expected values for decimal ranges. */
2230 if ((operand->flags & V850_OPERAND_SIGNED) && ! warn_signed_overflows)
2231 max = (1 << (operand->bits - 1)) - 1;
2232
2233 if (! (operand->flags & V850_OPERAND_SIGNED)
2234 && ! warn_unsigned_overflows)
2235 min = 0;
2236
2237 sprint_value (buf, test);
2238 if (file == (char *) NULL)
2239 as_warn (err, buf, min, max);
2240 else
2241 as_warn_where (file, line, err, buf, min, max);
2242 }
2243 }
2244
2245 insn |= (((long) val & ((1 << operand->bits) - 1)) << operand->shift);
2246 }
2247
2248 return insn;
2249 }
2250
2251 /* Parse a cons expression. We have to handle hi(), lo(), etc
2252 on the v850. */
2253 void
2254 parse_cons_expression_v850 (exp)
2255 expressionS *exp;
2256 {
2257 /* See if there's a reloc prefix like hi() we have to handle. */
2258 hold_cons_reloc = v850_reloc_prefix (NULL);
2259
2260 /* Do normal expression parsing. */
2261 expression (exp);
2262 }
2263
2264 /* Create a fixup for a cons expression. If parse_cons_expression_v850
2265 found a reloc prefix, then we use that reloc, else we choose an
2266 appropriate one based on the size of the expression. */
2267 void
2268 cons_fix_new_v850 (frag, where, size, exp)
2269 fragS *frag;
2270 int where;
2271 int size;
2272 expressionS *exp;
2273 {
2274 if (hold_cons_reloc == BFD_RELOC_UNUSED)
2275 {
2276 if (size == 4)
2277 hold_cons_reloc = BFD_RELOC_32;
2278 if (size == 2)
2279 hold_cons_reloc = BFD_RELOC_16;
2280 if (size == 1)
2281 hold_cons_reloc = BFD_RELOC_8;
2282 }
2283
2284 if (exp != NULL)
2285 fix_new_exp (frag, where, size, exp, 0, hold_cons_reloc);
2286 else
2287 fix_new (frag, where, size, NULL, 0, 0, hold_cons_reloc);
2288 }
GDB Binutils - Deliverables
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