Add support for a 16 bit relocation against the TDA register!
[deliverable/binutils-gdb.git] / gas / config / tc-v850.c
1 /* tc-v850.c -- Assembler code for the NEC V850
2 Copyright (C) 1996, 1997 Free Software Foundation.
3
4 This file is part of GAS, the GNU Assembler.
5
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
9 any later version.
10
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
20
21 #include <stdio.h>
22 #include <ctype.h>
23 #include "as.h"
24 #include "subsegs.h"
25 #include "opcode/v850.h"
26
27 /* sign-extend a 16-bit number */
28 #define SEXT16(x) ((((x) & 0xffff) ^ (~ 0x7fff)) + 0x8000)
29
30 /* Temporarily holds the reloc in a cons expression. */
31 static bfd_reloc_code_real_type hold_cons_reloc;
32
33 /* Set to TRUE if we want to be pedantic about signed overflows. */
34 static boolean warn_signed_overflows = FALSE;
35 static boolean warn_unsigned_overflows = FALSE;
36
37 /* Indicates the target BFD machine number. */
38 static int machine = TARGET_MACHINE;
39
40 /* Indicates the target processor(s) for the assemble. */
41 static unsigned int processor_mask = TARGET_PROCESSOR;
42
43 \f
44 /* Structure to hold information about predefined registers. */
45 struct reg_name
46 {
47 const char * name;
48 int value;
49 };
50
51 /* Generic assembler global variables which must be defined by all targets. */
52
53 /* Characters which always start a comment. */
54 const char comment_chars[] = "#";
55
56 /* Characters which start a comment at the beginning of a line. */
57 const char line_comment_chars[] = ";#";
58
59 /* Characters which may be used to separate multiple commands on a
60 single line. */
61 const char line_separator_chars[] = ";";
62
63 /* Characters which are used to indicate an exponent in a floating
64 point number. */
65 const char EXP_CHARS[] = "eE";
66
67 /* Characters which mean that a number is a floating point constant,
68 as in 0d1.0. */
69 const char FLT_CHARS[] = "dD";
70 \f
71
72 const relax_typeS md_relax_table[] = {
73 {0xff, -0x100, 2, 1},
74 {0x1fffff, -0x200000, 6, 0},
75 };
76
77
78 static segT sdata_section = NULL;
79 static segT tdata_section = NULL;
80 static segT zdata_section = NULL;
81 static segT sbss_section = NULL;
82 static segT tbss_section = NULL;
83 static segT zbss_section = NULL;
84 static segT rosdata_section = NULL;
85 static segT rozdata_section = NULL;
86
87
88 /* local functions */
89 static unsigned long v850_insert_operand
90 PARAMS ((unsigned long insn, const struct v850_operand *operand,
91 offsetT val, char *file, unsigned int line));
92
93
94 /* fixups */
95 #define MAX_INSN_FIXUPS (5)
96 struct v850_fixup
97 {
98 expressionS exp;
99 int opindex;
100 bfd_reloc_code_real_type reloc;
101 };
102 struct v850_fixup fixups[MAX_INSN_FIXUPS];
103 static int fc;
104 \f
105 void
106 v850_sdata (int ignore)
107 {
108 subseg_set (sdata_section, (subsegT) get_absolute_expression ());
109
110 demand_empty_rest_of_line ();
111 }
112
113 void
114 v850_tdata (int ignore)
115 {
116 subseg_set (tdata_section, (subsegT) get_absolute_expression ());
117
118 demand_empty_rest_of_line ();
119 }
120
121 void
122 v850_zdata (int ignore)
123 {
124 subseg_set (zdata_section, (subsegT) get_absolute_expression ());
125
126 demand_empty_rest_of_line ();
127 }
128
129 void
130 v850_sbss (int ignore)
131 {
132 subseg_set (sbss_section, (subsegT) get_absolute_expression ());
133
134 demand_empty_rest_of_line ();
135 }
136
137 void
138 v850_tbss (int ignore)
139 {
140 subseg_set (tbss_section, (subsegT) get_absolute_expression ());
141
142 demand_empty_rest_of_line ();
143 }
144
145 void
146 v850_zbss (int ignore)
147 {
148 subseg_set (zbss_section, (subsegT) get_absolute_expression ());
149
150 demand_empty_rest_of_line ();
151 }
152
153 void
154 v850_rosdata (int ignore)
155 {
156 subseg_set (rosdata_section, (subsegT) get_absolute_expression ());
157
158 demand_empty_rest_of_line ();
159 }
160
161 void
162 v850_rozdata (int ignore)
163 {
164 subseg_set (rozdata_section, (subsegT) get_absolute_expression ());
165
166 demand_empty_rest_of_line ();
167 }
168
169 static void
170 v850_section (int arg)
171 {
172 char saved_c;
173 char * ptr;
174
175 for (ptr = input_line_pointer; * ptr != '\n' && * ptr != 0; ptr ++)
176 if (* ptr == ',' && ptr[1] == '.')
177 break;
178
179 saved_c = * ptr;
180 * ptr = ';';
181
182 obj_elf_section (arg);
183
184 * ptr = saved_c;
185 }
186
187 void
188 v850_bss (int ignore)
189 {
190 register int temp = get_absolute_expression ();
191
192 obj_elf_section_change_hook();
193
194 subseg_set (bss_section, (subsegT) temp);
195
196 demand_empty_rest_of_line ();
197 }
198
199 void
200 v850_offset (int ignore)
201 {
202 int temp = get_absolute_expression ();
203
204 temp -= frag_now_fix();
205
206 if (temp > 0)
207 (void) frag_more (temp);
208
209 demand_empty_rest_of_line ();
210 }
211
212 void
213 set_machine (int number)
214 {
215 machine = number;
216 bfd_set_arch_mach (stdoutput, TARGET_ARCH, machine);
217
218 switch (machine)
219 {
220 case 0: processor_mask = PROCESSOR_V850; break;
221 /* start-sanitize-v850e */
222 case bfd_mach_v850e: processor_mask = PROCESSOR_V850E; break;
223 /* end-sanitize-v850e */
224 /* start-sanitize-v850eq */
225 case bfd_mach_v850eq: processor_mask = PROCESSOR_V850EQ; break;
226 /* end-sanitize-v850eq */
227 }
228 }
229
230 /* The target specific pseudo-ops which we support. */
231 const pseudo_typeS md_pseudo_table[] =
232 {
233 {"sdata", v850_sdata, 0},
234 {"tdata", v850_tdata, 0},
235 {"zdata", v850_zdata, 0},
236 {"sbss", v850_sbss, 0},
237 {"tbss", v850_tbss, 0},
238 {"zbss", v850_zbss, 0},
239 {"rosdata", v850_rosdata, 0},
240 {"rozdata", v850_rozdata, 0},
241 {"bss", v850_bss, 0},
242 {"offset", v850_offset, 0},
243 {"section", v850_section, 0},
244 {"word", cons, 4},
245 {"v850", set_machine, 0},
246 /* start-sanitize-v850e */
247 {"v850e", set_machine, bfd_mach_v850e},
248 /* end-sanitize-v850e */
249 /* start-sanitize-v850eq */
250 {"v850eq", set_machine, bfd_mach_v850eq},
251 /* end-sanitize-v850eq */
252 { NULL, NULL, 0}
253 };
254
255 /* Opcode hash table. */
256 static struct hash_control *v850_hash;
257
258 /* This table is sorted. Suitable for searching by a binary search. */
259 static const struct reg_name pre_defined_registers[] =
260 {
261 { "ep", 30 }, /* ep - element ptr */
262 { "gp", 4 }, /* gp - global ptr */
263 { "hp", 2 }, /* hp - handler stack ptr */
264 { "lp", 31 }, /* lp - link ptr */
265 { "r0", 0 },
266 { "r1", 1 },
267 { "r10", 10 },
268 { "r11", 11 },
269 { "r12", 12 },
270 { "r13", 13 },
271 { "r14", 14 },
272 { "r15", 15 },
273 { "r16", 16 },
274 { "r17", 17 },
275 { "r18", 18 },
276 { "r19", 19 },
277 { "r2", 2 },
278 { "r20", 20 },
279 { "r21", 21 },
280 { "r22", 22 },
281 { "r23", 23 },
282 { "r24", 24 },
283 { "r25", 25 },
284 { "r26", 26 },
285 { "r27", 27 },
286 { "r28", 28 },
287 { "r29", 29 },
288 { "r3", 3 },
289 { "r30", 30 },
290 { "r31", 31 },
291 { "r4", 4 },
292 { "r5", 5 },
293 { "r6", 6 },
294 { "r7", 7 },
295 { "r8", 8 },
296 { "r9", 9 },
297 { "sp", 3 }, /* sp - stack ptr */
298 { "tp", 5 }, /* tp - text ptr */
299 { "zero", 0 },
300 };
301 #define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct reg_name))
302
303
304 static const struct reg_name system_registers[] =
305 {
306 /* start-sanitize-v850e */
307 { "ctbp", 20 },
308 { "ctpc", 16 },
309 { "ctpsw", 17 },
310 { "dbpc", 18 },
311 { "dbpsw", 19 },
312 /* end-sanitize-v850e */
313 { "ecr", 4 },
314 { "eipc", 0 },
315 { "eipsw", 1 },
316 { "fepc", 2 },
317 { "fepsw", 3 },
318 { "psw", 5 },
319 };
320 #define SYSREG_NAME_CNT (sizeof (system_registers) / sizeof (struct reg_name))
321
322 static const struct reg_name cc_names[] =
323 {
324 { "c", 0x1 },
325 { "e", 0x2 },
326 { "ge", 0xe },
327 { "gt", 0xf },
328 { "h", 0xb },
329 { "l", 0x1 },
330 { "le", 0x7 },
331 { "lt", 0x6 },
332 { "n", 0x4 },
333 { "nc", 0x9 },
334 { "ne", 0xa },
335 { "nh", 0x3 },
336 { "nl", 0x9 },
337 { "ns", 0xc },
338 { "nv", 0x8 },
339 { "nz", 0xa },
340 { "p", 0xc },
341 { "s", 0x4 },
342 { "sa", 0xd },
343 { "t", 0x5 },
344 { "v", 0x0 },
345 { "z", 0x2 },
346 };
347 #define CC_NAME_CNT (sizeof (cc_names) / sizeof (struct reg_name))
348
349 /* reg_name_search does a binary search of the given register table
350 to see if "name" is a valid regiter name. Returns the register
351 number from the array on success, or -1 on failure. */
352
353 static int
354 reg_name_search (regs, regcount, name)
355 const struct reg_name * regs;
356 int regcount;
357 const char * name;
358 {
359 int middle, low, high;
360 int cmp;
361
362 low = 0;
363 high = regcount - 1;
364
365 do
366 {
367 middle = (low + high) / 2;
368 cmp = strcasecmp (name, regs[middle].name);
369 if (cmp < 0)
370 high = middle - 1;
371 else if (cmp > 0)
372 low = middle + 1;
373 else
374 return regs[middle].value;
375 }
376 while (low <= high);
377 return -1;
378 }
379
380
381 /* Summary of register_name().
382 *
383 * in: Input_line_pointer points to 1st char of operand.
384 *
385 * out: A expressionS.
386 * The operand may have been a register: in this case, X_op == O_register,
387 * X_add_number is set to the register number, and truth is returned.
388 * Input_line_pointer->(next non-blank) char after operand, or is in
389 * its original state.
390 */
391 static boolean
392 register_name (expressionP)
393 expressionS * expressionP;
394 {
395 int reg_number;
396 char * name;
397 char * start;
398 char c;
399
400 /* Find the spelling of the operand */
401 start = name = input_line_pointer;
402
403 c = get_symbol_end ();
404
405 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
406
407 * input_line_pointer = c; /* put back the delimiting char */
408
409 /* look to see if it's in the register table */
410 if (reg_number >= 0)
411 {
412 expressionP->X_op = O_register;
413 expressionP->X_add_number = reg_number;
414
415 /* make the rest nice */
416 expressionP->X_add_symbol = NULL;
417 expressionP->X_op_symbol = NULL;
418
419 return true;
420 }
421 else
422 {
423 /* reset the line as if we had not done anything */
424 input_line_pointer = start;
425
426 return false;
427 }
428 }
429
430 /* Summary of system_register_name().
431 *
432 * in: Input_line_pointer points to 1st char of operand.
433 *
434 * out: A expressionS.
435 * The operand may have been a register: in this case, X_op == O_register,
436 * X_add_number is set to the register number, and truth is returned.
437 * Input_line_pointer->(next non-blank) char after operand, or is in
438 * its original state.
439 */
440 static boolean
441 system_register_name (expressionP, accept_numbers)
442 expressionS * expressionP;
443 boolean accept_numbers;
444 {
445 int reg_number;
446 char * name;
447 char * start;
448 char c;
449
450 /* Find the spelling of the operand */
451 start = name = input_line_pointer;
452
453 c = get_symbol_end ();
454 reg_number = reg_name_search (system_registers, SYSREG_NAME_CNT, name);
455
456 * input_line_pointer = c; /* put back the delimiting char */
457
458 if (reg_number < 0
459 && accept_numbers)
460 {
461 input_line_pointer = start; /* reset input_line pointer */
462
463 if (isdigit (* input_line_pointer))
464 reg_number = strtol (input_line_pointer, & input_line_pointer, 10);
465
466 /* Make sure that the register number is allowable. */
467 if ( reg_number < 0
468 || reg_number > 5
469 /* start-sanitize-v850e */
470 && reg_number < 16
471 || reg_number > 20
472 /* end-sanitize-v850e */
473 )
474 {
475 reg_number = -1;
476 }
477 }
478
479 /* look to see if it's in the register table */
480 if (reg_number >= 0)
481 {
482 expressionP->X_op = O_register;
483 expressionP->X_add_number = reg_number;
484
485 /* make the rest nice */
486 expressionP->X_add_symbol = NULL;
487 expressionP->X_op_symbol = NULL;
488
489 return true;
490 }
491 else
492 {
493 /* reset the line as if we had not done anything */
494 input_line_pointer = start;
495
496 return false;
497 }
498 }
499
500 /* Summary of cc_name().
501 *
502 * in: Input_line_pointer points to 1st char of operand.
503 *
504 * out: A expressionS.
505 * The operand may have been a register: in this case, X_op == O_register,
506 * X_add_number is set to the register number, and truth is returned.
507 * Input_line_pointer->(next non-blank) char after operand, or is in
508 * its original state.
509 */
510 static boolean
511 cc_name (expressionP)
512 expressionS *expressionP;
513 {
514 int reg_number;
515 char * name;
516 char * start;
517 char c;
518
519 /* Find the spelling of the operand */
520 start = name = input_line_pointer;
521
522 c = get_symbol_end ();
523 reg_number = reg_name_search (cc_names, CC_NAME_CNT, name);
524
525 * input_line_pointer = c; /* put back the delimiting char */
526
527 /* look to see if it's in the register table */
528 if (reg_number >= 0)
529 {
530 expressionP->X_op = O_constant;
531 expressionP->X_add_number = reg_number;
532
533 /* make the rest nice */
534 expressionP->X_add_symbol = NULL;
535 expressionP->X_op_symbol = NULL;
536
537 return true;
538 }
539 else
540 {
541 /* reset the line as if we had not done anything */
542 input_line_pointer = start;
543
544 return false;
545 }
546 }
547
548 static void
549 skip_white_space (void)
550 {
551 while ( * input_line_pointer == ' '
552 || * input_line_pointer == '\t')
553 ++ input_line_pointer;
554 }
555
556 /* start-sanitize-v850e */
557 /* Summary of parse_register_list ().
558 *
559 * in: Input_line_pointer points to 1st char of a list of registers.
560 * insn is the partially constructed instruction.
561 * operand is the operand being inserted.
562 *
563 * out: True if the parse completed successfully, False otherwise.
564 * If the parse completes the correct bit fields in the
565 * instruction will be filled in.
566 *
567 * Parses register lists with the syntax:
568 *
569 * { rX }
570 * { rX, rY }
571 * { rX - rY }
572 * { rX - rY, rZ }
573 * etc
574 *
575 * and also parses constant epxressions whoes bits indicate the
576 * registers in the lists. The LSB in the expression refers to
577 * the lowest numbered permissable register in the register list,
578 * and so on upwards. System registers are considered to be very
579 * high numbers.
580 *
581 */
582 static char *
583 parse_register_list
584 (
585 unsigned long * insn,
586 const struct v850_operand * operand
587 )
588 {
589 static int type1_regs[ 32 ] = { 30, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 31, 29, 28, 23, 22, 21, 20, 27, 26, 25, 24 };
590 /* start-sanitize-v850eq */
591 static int type2_regs[ 32 ] = { 19, 18, 17, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 30, 31, 29, 28, 23, 22, 21, 20, 27, 26, 25, 24 };
592 static int type3_regs[ 32 ] = { 3, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 14, 15, 13, 12, 7, 6, 5, 4, 11, 10, 9, 8 };
593 /* end-sanitize-v850eq */
594 int * regs;
595 expressionS exp;
596
597
598 /* Select a register array to parse. */
599 switch (operand->shift)
600 {
601 case 0xffe00001: regs = type1_regs; break;
602 /* start-sanitize-v850eq */
603 case 0xfff8000f: regs = type2_regs; break;
604 case 0xfff8001f: regs = type3_regs; break;
605 /* end-sanitize-v850eq */
606 default:
607 as_bad ("unknown operand shift: %x\n", operand->shift );
608 return "internal failure in parse_register_list";
609 }
610
611 skip_white_space();
612
613 /* If the expression starts with a curly brace it is a register list.
614 Otherwise it is a constant expression ,whoes bits indicate which
615 registers are to be included in the list. */
616
617 if (* input_line_pointer != '{')
618 {
619 int bits;
620 int reg;
621 int i;
622
623 expression (& exp);
624
625 if (exp.X_op != O_constant)
626 return "constant expression or register list expected";
627
628 /* start-sanitize-v850eq */
629 if (regs == type1_regs)
630 /* end-sanitize-v850eq */
631 {
632 if (exp.X_add_number & 0xFFFFF000)
633 return "high bits set in register list expression";
634
635 for (reg = 20; reg < 32; reg ++)
636 if (exp.X_add_number & (1 << (reg - 20)))
637 {
638 for (i = 0; i < 32; i++)
639 if (regs[i] == reg)
640 * insn |= (1 << i);
641 }
642 }
643 /* start-sanitize-v850eq */
644 else if (regs == type2_regs)
645 {
646 if (exp.X_add_number & 0xFFFE0000)
647 return "high bits set in register list expression";
648
649 for (reg = 1; reg < 16; reg ++)
650 if (exp.X_add_number & (1 << (reg - 1)))
651 {
652 for (i = 0; i < 32; i++)
653 if (regs[i] == reg)
654 * insn |= (1 << i);
655 }
656
657 if (exp.X_add_number & (1 << 15))
658 * insn |= (1 << 3);
659
660 if (exp.X_add_number & (1 << 16))
661 * insn |= (1 << 19);
662 }
663 else /* regs == type3_regs */
664 {
665 if (exp.X_add_number & 0xFFFE0000)
666 return "high bits set in register list expression";
667
668 for (reg = 16; reg < 32; reg ++)
669 if (exp.X_add_number & (1 << (reg - 16)))
670 {
671 for (i = 0; i < 32; i++)
672 if (regs[i] == reg)
673 * insn |= (1 << i);
674 }
675
676 if (exp.X_add_number & (1 << 16))
677 * insn |= (1 << 19);
678 }
679 /* end-sanitize-v850eq */
680
681 return NULL;
682 }
683
684 input_line_pointer ++;
685
686 /* Parse the register list until a terminator (closing curly brace or new-line) is found. */
687 for (;;)
688 {
689 if (register_name (& exp))
690 {
691 int i;
692
693 /* Locate the given register in the list, and if it is there, insert the corresponding bit into the instruction. */
694 for (i = 0; i < 32; i++)
695 {
696 if (regs[ i ] == exp.X_add_number)
697 {
698 * insn |= (1 << i);
699 break;
700 }
701 }
702
703 if (i == 32)
704 {
705 return "illegal register included in list";
706 }
707 }
708 else if (system_register_name (& exp, true))
709 {
710 if (regs == type1_regs)
711 {
712 return "system registers cannot be included in list";
713 }
714 else if (exp.X_add_number == 5)
715 {
716 if (regs == type2_regs)
717 return "PSW cannot be included in list";
718 else
719 * insn |= 0x8;
720 }
721 else
722 * insn |= 0x80000;
723 }
724 else if (* input_line_pointer == '}')
725 {
726 input_line_pointer ++;
727 break;
728 }
729 else if (* input_line_pointer == ',')
730 {
731 input_line_pointer ++;
732 continue;
733 }
734 else if (* input_line_pointer == '-')
735 {
736 /* We have encountered a range of registers: rX - rY */
737 int j;
738 expressionS exp2;
739
740 /* Skip the dash. */
741 ++ input_line_pointer;
742
743 /* Get the second register in the range. */
744 if (! register_name (& exp2))
745 {
746 return "second register should follow dash in register list";
747 exp2.X_add_number = exp.X_add_number;
748 }
749
750 /* Add the rest of the registers in the range. */
751 for (j = exp.X_add_number + 1; j <= exp2.X_add_number; j++)
752 {
753 int i;
754
755 /* Locate the given register in the list, and if it is there, insert the corresponding bit into the instruction. */
756 for (i = 0; i < 32; i++)
757 {
758 if (regs[ i ] == j)
759 {
760 * insn |= (1 << i);
761 break;
762 }
763 }
764
765 if (i == 32)
766 {
767 return "illegal register included in list";
768 }
769 }
770 }
771 else
772 {
773 break;
774 }
775
776 skip_white_space();
777 }
778
779 return NULL;
780 }
781 /* end-sanitize-v850e */
782
783 CONST char * md_shortopts = "m:";
784
785 struct option md_longopts[] =
786 {
787 {NULL, no_argument, NULL, 0}
788 };
789 size_t md_longopts_size = sizeof md_longopts;
790
791
792 void
793 md_show_usage (stream)
794 FILE *stream;
795 {
796 fprintf (stream, "V850 options:\n");
797 fprintf (stream, "\t-wsigned_overflow Warn if signed immediate values overflow\n");
798 fprintf (stream, "\t-wunsigned_overflow Warn if unsigned immediate values overflow\n");
799 fprintf (stream, "\t-mv850 The code is targeted at the v850\n");
800 /* start-sanitize-v850e */
801 fprintf (stream, "\t-mv850e The code is targeted at the v850e\n");
802 /* end-sanitize-v850e */
803 /* start-sanitize-v850eq */
804 fprintf (stream, "\t-mv850eq The code is targeted at the v850eq\n");
805 /* end-sanitize-v850eq */
806 }
807
808 int
809 md_parse_option (c, arg)
810 int c;
811 char * arg;
812 {
813 switch (c)
814 {
815 case 'w':
816 if (strcmp (arg, "signed_overflow") == 0)
817 {
818 warn_signed_overflows = TRUE;
819 return 1;
820 }
821 else if (strcmp (arg, "unsigned_overflow") == 0)
822 {
823 warn_unsigned_overflows = TRUE;
824 return 1;
825 }
826 break;
827
828 case 'm':
829 if (strcmp (arg, "v850") == 0)
830 {
831 machine = 0;
832 return 1;
833 }
834 /* start-sanitize-v850e */
835 else if (strcmp (arg, "v850e") == 0)
836 {
837 machine = bfd_mach_v850e;
838 processor_mask = PROCESSOR_V850 | PROCESSOR_V850E;
839
840 return 1;
841 }
842 /* end-sanitize-v850e */
843 /* start-sanitize-v850eq */
844 else if (strcmp (arg, "v850eq") == 0)
845 {
846 machine = bfd_mach_v850eq;
847 processor_mask = PROCESSOR_V850EQ;
848 return 1;
849 }
850 /* end-sanitize-v850eq */
851 break;
852 }
853
854 return 0;
855 }
856
857 symbolS *
858 md_undefined_symbol (name)
859 char * name;
860 {
861 return 0;
862 }
863
864 char *
865 md_atof (type, litp, sizep)
866 int type;
867 char * litp;
868 int * sizep;
869 {
870 int prec;
871 LITTLENUM_TYPE words[4];
872 char * t;
873 int i;
874
875 switch (type)
876 {
877 case 'f':
878 prec = 2;
879 break;
880
881 case 'd':
882 prec = 4;
883 break;
884
885 default:
886 *sizep = 0;
887 return "bad call to md_atof";
888 }
889
890 t = atof_ieee (input_line_pointer, type, words);
891 if (t)
892 input_line_pointer = t;
893
894 *sizep = prec * 2;
895
896 for (i = prec - 1; i >= 0; i--)
897 {
898 md_number_to_chars (litp, (valueT) words[i], 2);
899 litp += 2;
900 }
901
902 return NULL;
903 }
904
905
906 /* Very gross. */
907 void
908 md_convert_frag (abfd, sec, fragP)
909 bfd * abfd;
910 asection * sec;
911 fragS * fragP;
912 {
913 subseg_change (sec, 0);
914 if (fragP->fr_subtype == 0)
915 {
916 fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol,
917 fragP->fr_offset, 1, BFD_RELOC_UNUSED + (int)fragP->fr_opcode);
918 fragP->fr_var = 0;
919 fragP->fr_fix += 2;
920 }
921 else if (fragP->fr_subtype == 1)
922 {
923 /* Reverse the condition of the first branch. */
924 fragP->fr_literal[0] &= 0xf7;
925 /* Mask off all the displacement bits. */
926 fragP->fr_literal[0] &= 0x8f;
927 fragP->fr_literal[1] &= 0x07;
928 /* Now set the displacement bits so that we branch
929 around the unconditional branch. */
930 fragP->fr_literal[0] |= 0x30;
931
932 /* Now create the unconditional branch + fixup to the final
933 target. */
934 md_number_to_chars (&fragP->fr_literal[2], 0x00000780, 4);
935 fix_new (fragP, fragP->fr_fix + 2, 4, fragP->fr_symbol,
936 fragP->fr_offset, 1, BFD_RELOC_UNUSED + (int)fragP->fr_opcode + 1);
937 fragP->fr_var = 0;
938 fragP->fr_fix += 6;
939 }
940 else
941 abort ();
942 }
943
944 valueT
945 md_section_align (seg, addr)
946 asection * seg;
947 valueT addr;
948 {
949 int align = bfd_get_section_alignment (stdoutput, seg);
950 return ((addr + (1 << align) - 1) & (-1 << align));
951 }
952
953 void
954 md_begin ()
955 {
956 char * prev_name = "";
957 register const struct v850_opcode * op;
958 flagword applicable;
959
960
961 v850_hash = hash_new();
962
963 /* Insert unique names into hash table. The V850 instruction set
964 has many identical opcode names that have different opcodes based
965 on the operands. This hash table then provides a quick index to
966 the first opcode with a particular name in the opcode table. */
967
968 op = v850_opcodes;
969 while (op->name)
970 {
971 if (strcmp (prev_name, op->name))
972 {
973 prev_name = (char *) op->name;
974 hash_insert (v850_hash, op->name, (char *) op);
975 }
976 op++;
977 }
978
979 bfd_set_arch_mach (stdoutput, TARGET_ARCH, machine);
980
981 applicable = bfd_applicable_section_flags (stdoutput);
982
983 sdata_section = subseg_new (".sdata", 0);
984 bfd_set_section_flags (stdoutput, sdata_section, applicable & (SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS));
985
986 tdata_section = subseg_new (".tdata", 0);
987 bfd_set_section_flags (stdoutput, tdata_section, applicable & (SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS));
988
989 zdata_section = subseg_new (".zdata", 0);
990 bfd_set_section_flags (stdoutput, zdata_section, applicable & (SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS));
991
992 sbss_section = subseg_new (".sbss", 0);
993 bfd_set_section_flags (stdoutput, sbss_section, applicable & SEC_ALLOC);
994
995 tbss_section = subseg_new (".tbss", 0);
996 bfd_set_section_flags (stdoutput, tbss_section, applicable & SEC_ALLOC);
997
998 zbss_section = subseg_new (".zbss", 0);
999 bfd_set_section_flags (stdoutput, zbss_section, applicable & SEC_ALLOC);
1000
1001 rosdata_section = subseg_new (".rosdata", 0);
1002 bfd_set_section_flags (stdoutput, rosdata_section, applicable & (SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_READONLY));
1003
1004 rozdata_section = subseg_new (".rozdata", 0);
1005 bfd_set_section_flags (stdoutput, rozdata_section, applicable & (SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_READONLY));
1006 }
1007
1008
1009 /* Warning: The code in this function relies upon the definitions
1010 in the v850_operands[] array (defined in opcodes/v850-opc.c)
1011 matching the hard coded values contained herein. */
1012
1013 static bfd_reloc_code_real_type
1014 v850_reloc_prefix (const struct v850_operand * operand)
1015 {
1016 boolean paren_skipped = false;
1017
1018
1019 /* Skip leading opening parenthesis. */
1020 if (* input_line_pointer == '(')
1021 {
1022 ++ input_line_pointer;
1023 paren_skipped = true;
1024 }
1025
1026 if (strncmp (input_line_pointer, "hi0(", 4) == 0)
1027 {
1028 input_line_pointer += 3;
1029 return BFD_RELOC_HI16;
1030 }
1031 if (strncmp (input_line_pointer, "hi(", 3) == 0)
1032 {
1033 input_line_pointer += 2;
1034 return BFD_RELOC_HI16_S;
1035 }
1036 if (strncmp (input_line_pointer, "lo(", 3) == 0)
1037 {
1038 input_line_pointer += 2;
1039 return BFD_RELOC_LO16;
1040 }
1041 /* start-sanitize-v850e */
1042 if (strncmp (input_line_pointer, "hilo(", 5) == 0)
1043 {
1044 input_line_pointer += 4;
1045 return BFD_RELOC_32;
1046 }
1047 /* end-sanitize-v850e */
1048
1049 if (strncmp (input_line_pointer, "sdaoff(", 7) == 0)
1050 {
1051 input_line_pointer += 6;
1052
1053 if (operand == NULL) return BFD_RELOC_V850_SDA_16_16_OFFSET;
1054 if (operand->bits == 15 && operand->shift == 17) return BFD_RELOC_V850_SDA_15_16_OFFSET;
1055 /* start-sanitize-v850e */
1056 if (operand->bits == -1) return BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET;
1057 /* end-sanitize-v850e */
1058
1059 assert (operand->bits == 16);
1060 assert (operand->shift == 16);
1061
1062 return BFD_RELOC_V850_SDA_16_16_OFFSET;
1063 }
1064
1065 if (strncmp (input_line_pointer, "zdaoff(", 7) == 0)
1066 {
1067 input_line_pointer += 6;
1068
1069 if (operand == NULL) return BFD_RELOC_V850_ZDA_16_16_OFFSET;
1070 if (operand->bits == 15 && operand->shift == 17) return BFD_RELOC_V850_ZDA_15_16_OFFSET;
1071 /* start-sanitize-v850e */
1072 if (operand->bits == -1) return BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET;
1073 /* end-sanitize-v850e */
1074
1075 assert (operand->bits == 16);
1076 assert (operand->shift == 16);
1077
1078 return BFD_RELOC_V850_ZDA_16_16_OFFSET;
1079 }
1080
1081 if (strncmp (input_line_pointer, "tdaoff(", 7) == 0)
1082 {
1083 input_line_pointer += 6;
1084
1085 if (operand == NULL) return BFD_RELOC_V850_TDA_7_7_OFFSET;
1086 if (operand->bits == 6 && operand->shift == 1) return BFD_RELOC_V850_TDA_6_8_OFFSET; /* sld.w/sst.w, operand: D8_6 */
1087 /* start-sanitize-v850e */
1088 if (operand->bits == 4 && operand->insert != NULL) return BFD_RELOC_V850_TDA_4_5_OFFSET; /* sld.hu, operand: D5-4 */
1089 if (operand->bits == 4 && operand->insert == NULL) return BFD_RELOC_V850_TDA_4_4_OFFSET; /* sld.bu, operand: D4 */
1090 /* end-sanitize-v850e */
1091 if (operand->bits == 16 && operand->shift == 16) return BFD_RELOC_V850_TDA_16_16_OFFSET; /* set1 & chums, operands: D16 */
1092
1093 assert (operand->bits == 7);
1094
1095 return operand->insert != NULL
1096 ? BFD_RELOC_V850_TDA_7_8_OFFSET /* sld.h/sst.h, operand: D8_7 */
1097 : BFD_RELOC_V850_TDA_7_7_OFFSET; /* sld.b/sst.b, opreand: D7 */
1098 }
1099
1100 if (paren_skipped)
1101 /* Restore skipped character. */
1102 -- input_line_pointer;
1103
1104 return BFD_RELOC_UNUSED;
1105 }
1106
1107 void
1108 md_assemble (str)
1109 char * str;
1110 {
1111 char * s;
1112 char * start_of_operands;
1113 struct v850_opcode * opcode;
1114 struct v850_opcode * next_opcode;
1115 const unsigned char * opindex_ptr;
1116 int next_opindex;
1117 int relaxable;
1118 unsigned long insn;
1119 unsigned long insn_size;
1120 char * f;
1121 int i;
1122 int match;
1123 boolean extra_data_after_insn = false;
1124 unsigned extra_data_len;
1125 unsigned long extra_data;
1126 char * saved_input_line_pointer;
1127
1128 /* Get the opcode. */
1129 for (s = str; *s != '\0' && ! isspace (*s); s++)
1130 continue;
1131
1132 if (*s != '\0')
1133 *s++ = '\0';
1134
1135 /* find the first opcode with the proper name */
1136 opcode = (struct v850_opcode *)hash_find (v850_hash, str);
1137 if (opcode == NULL)
1138 {
1139 as_bad ("Unrecognized opcode: `%s'", str);
1140 ignore_rest_of_line ();
1141 return;
1142 }
1143
1144 str = s;
1145 while (isspace (* str))
1146 ++ str;
1147
1148 start_of_operands = str;
1149
1150 saved_input_line_pointer = input_line_pointer;
1151
1152 for (;;)
1153 {
1154 const char * errmsg = NULL;
1155
1156 match = 0;
1157
1158 if ((opcode->processors & processor_mask) == 0)
1159 {
1160 errmsg = "Target processor doe snot support this instruction.";
1161 goto error;
1162 }
1163
1164 relaxable = 0;
1165 fc = 0;
1166 next_opindex = 0;
1167 insn = opcode->opcode;
1168 extra_data_after_insn = false;
1169
1170 input_line_pointer = str = start_of_operands;
1171
1172 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
1173 {
1174 const struct v850_operand * operand;
1175 char * hold;
1176 expressionS ex;
1177 bfd_reloc_code_real_type reloc;
1178
1179 if (next_opindex == 0)
1180 {
1181 operand = & v850_operands[ * opindex_ptr ];
1182 }
1183 else
1184 {
1185 operand = & v850_operands[ next_opindex ];
1186 next_opindex = 0;
1187 }
1188
1189 errmsg = NULL;
1190
1191 while (*str == ' ' || *str == ',' || *str == '[' || *str == ']')
1192 ++str;
1193
1194 if (operand->flags & V850_OPERAND_RELAX)
1195 relaxable = 1;
1196
1197 /* Gather the operand. */
1198 hold = input_line_pointer;
1199 input_line_pointer = str;
1200
1201 /* fprintf (stderr, "operand: %s index = %d, opcode = %s\n", input_line_pointer, opindex_ptr - opcode->operands, opcode->name ); */
1202
1203 /* lo(), hi(), hi0(), etc... */
1204 if ((reloc = v850_reloc_prefix (operand)) != BFD_RELOC_UNUSED)
1205 {
1206 expression (& ex);
1207
1208 if (ex.X_op == O_constant)
1209 {
1210 switch (reloc)
1211 {
1212 case BFD_RELOC_LO16:
1213 {
1214 /* Truncate, then sign extend the value. */
1215 ex.X_add_number = SEXT16 (ex.X_add_number);
1216 break;
1217 }
1218
1219 case BFD_RELOC_HI16:
1220 {
1221 /* Truncate, then sign extend the value. */
1222 ex.X_add_number = SEXT16 (ex.X_add_number >> 16);
1223 break;
1224 }
1225
1226 case BFD_RELOC_HI16_S:
1227 {
1228 /* Truncate, then sign extend the value. */
1229 int temp = (ex.X_add_number >> 16) & 0xffff;
1230
1231 temp += (ex.X_add_number >> 15) & 1;
1232
1233 ex.X_add_number = SEXT16 (temp);
1234 break;
1235 }
1236
1237 /* start-sanitize-v850e */
1238 case BFD_RELOC_32:
1239 if ((operand->flags & V850E_IMMEDIATE32) == 0)
1240 {
1241 errmsg = "use bigger instruction";
1242 goto error;
1243 }
1244
1245 extra_data_after_insn = true;
1246 extra_data_len = 4;
1247 extra_data = ex.X_add_number;
1248 ex.X_add_number = 0;
1249 break;
1250 /* end-sanitize-v850e */
1251
1252 default:
1253 as_bad ( "AAARG -> unhandled constant reloc");
1254 break;
1255 }
1256
1257 insn = v850_insert_operand (insn, operand, ex.X_add_number,
1258 (char *) NULL, 0);
1259 }
1260 else
1261 {
1262 if (reloc == BFD_RELOC_32)
1263 {
1264 if ((operand->flags & V850E_IMMEDIATE32) == 0)
1265 {
1266 errmsg = "use bigger instruction";
1267 goto error;
1268 }
1269
1270 extra_data_after_insn = true;
1271 extra_data_len = 4;
1272 extra_data = ex.X_add_number;
1273 ex.X_add_number = 0;
1274 }
1275
1276 if (fc > MAX_INSN_FIXUPS)
1277 as_fatal ("too many fixups");
1278
1279 fixups[ fc ].exp = ex;
1280 fixups[ fc ].opindex = * opindex_ptr;
1281 fixups[ fc ].reloc = reloc;
1282 fc++;
1283 }
1284 }
1285 else
1286 {
1287 errmsg = NULL;
1288
1289 if ((operand->flags & V850_OPERAND_REG) != 0)
1290 {
1291 if (!register_name (& ex))
1292 {
1293 errmsg = "invalid register name";
1294 }
1295
1296 if ((operand->flags & V850_NOT_R0)
1297 && ex.X_add_number == 0)
1298 {
1299 errmsg = "register r0 cannot be used here";
1300 }
1301 }
1302 else if ((operand->flags & V850_OPERAND_SRG) != 0)
1303 {
1304 if (!system_register_name (& ex, true))
1305 {
1306 errmsg = "invalid system register name";
1307 }
1308 }
1309 else if ((operand->flags & V850_OPERAND_EP) != 0)
1310 {
1311 char * start = input_line_pointer;
1312 char c = get_symbol_end ();
1313
1314 if (strcmp (start, "ep") != 0 && strcmp (start, "r30") != 0)
1315 {
1316 /* Put things back the way we found them. */
1317 *input_line_pointer = c;
1318 input_line_pointer = start;
1319 errmsg = "expected EP register";
1320 goto error;
1321 }
1322
1323 *input_line_pointer = c;
1324 str = input_line_pointer;
1325 input_line_pointer = hold;
1326
1327 while (*str == ' ' || *str == ',' || *str == '[' || *str == ']')
1328 ++str;
1329 continue;
1330 }
1331 else if ((operand->flags & V850_OPERAND_CC) != 0)
1332 {
1333 if (!cc_name (& ex))
1334 {
1335 errmsg = "invalid condition code name";
1336 }
1337 }
1338 /* start-sanitize-v850e */
1339 else if (operand->flags & V850E_PUSH_POP)
1340 {
1341 errmsg = parse_register_list (& insn, operand);
1342
1343 /* The parse_register_list() function has already done everything, so fake a dummy expression. */
1344 ex.X_op = O_constant;
1345 ex.X_add_number = 0;
1346 }
1347 else if (operand->flags & V850E_IMMEDIATE16)
1348 {
1349 expression (& ex);
1350
1351 if (ex.X_op != O_constant)
1352 errmsg = "constant expression expected";
1353 else if (ex.X_add_number & 0xffff0000)
1354 {
1355 if (ex.X_add_number & 0xffff)
1356 errmsg = "constant too big to fit into instruction";
1357 else if ((insn & 0x001fffc0) == 0x00130780)
1358 ex.X_add_number >>= 16;
1359 else
1360 errmsg = "constant too big to fit into instruction";
1361 }
1362
1363 extra_data_after_insn = true;
1364 extra_data_len = 2;
1365 extra_data = ex.X_add_number;
1366 ex.X_add_number = 0;
1367 }
1368 else if (operand->flags & V850E_IMMEDIATE32)
1369 {
1370 expression (& ex);
1371
1372 if (ex.X_op != O_constant)
1373 errmsg = "constant expression expected";
1374
1375 extra_data_after_insn = true;
1376 extra_data_len = 4;
1377 extra_data = ex.X_add_number;
1378 ex.X_add_number = 0;
1379 }
1380 /* end-sanitize-v850e */
1381 else if (register_name (&ex)
1382 && (operand->flags & V850_OPERAND_REG) == 0)
1383 {
1384 errmsg = "syntax error: register not expected";
1385 }
1386 else if (system_register_name (& ex, false)
1387 && (operand->flags & V850_OPERAND_SRG) == 0)
1388 {
1389 errmsg = "syntax error: system register not expected";
1390 }
1391 else if (cc_name (&ex)
1392 && (operand->flags & V850_OPERAND_CC) == 0)
1393 {
1394 errmsg = "syntax error: condition code not expected";
1395 }
1396 else
1397 {
1398 expression (& ex);
1399 /* start-sanitize-v850e */
1400 /* Special case:
1401 If we are assembling a MOV instruction (or a CALLT.... :-)
1402 and the immediate value does not fit into the bits available
1403 then create a fake error so that the next MOV instruction
1404 will be selected. This one has a 32 bit immediate field. */
1405
1406 if (((insn & 0x07e0) == 0x0200)
1407 && ex.X_op == O_constant
1408 && (ex.X_add_number < (- (1 << (operand->bits - 1))) || ex.X_add_number > ((1 << operand->bits) - 1)))
1409 errmsg = "use bigger instruction";
1410 /* end-sanitize-v850e */
1411 }
1412
1413 if (errmsg)
1414 goto error;
1415
1416 /* fprintf (stderr, "insn: %x, operand %d, op: %d, add_number: %d\n", insn, opindex_ptr - opcode->operands, ex.X_op, ex.X_add_number ); */
1417
1418 switch (ex.X_op)
1419 {
1420 case O_illegal:
1421 errmsg = "illegal operand";
1422 goto error;
1423 case O_absent:
1424 errmsg = "missing operand";
1425 goto error;
1426 case O_register:
1427 if ((operand->flags & (V850_OPERAND_REG | V850_OPERAND_SRG)) == 0)
1428 {
1429 errmsg = "invalid operand";
1430 goto error;
1431 }
1432 insn = v850_insert_operand (insn, operand, ex.X_add_number,
1433 (char *) NULL, 0);
1434 break;
1435
1436 case O_constant:
1437 insn = v850_insert_operand (insn, operand, ex.X_add_number,
1438 (char *) NULL, 0);
1439 break;
1440
1441 default:
1442 /* We need to generate a fixup for this expression. */
1443 if (fc >= MAX_INSN_FIXUPS)
1444 as_fatal ("too many fixups");
1445
1446 fixups[ fc ].exp = ex;
1447 fixups[ fc ].opindex = * opindex_ptr;
1448 fixups[ fc ].reloc = BFD_RELOC_UNUSED;
1449 ++fc;
1450 break;
1451 }
1452 }
1453
1454 str = input_line_pointer;
1455 input_line_pointer = hold;
1456
1457 while (*str == ' ' || *str == ',' || *str == '[' || *str == ']'
1458 || *str == ')')
1459 ++str;
1460 }
1461 match = 1;
1462
1463 error:
1464 if (match == 0)
1465 {
1466 next_opcode = opcode + 1;
1467 if (next_opcode->name != NULL && strcmp (next_opcode->name, opcode->name) == 0)
1468 {
1469 opcode = next_opcode;
1470 continue;
1471 }
1472
1473 as_bad (errmsg);
1474 ignore_rest_of_line ();
1475 input_line_pointer = saved_input_line_pointer;
1476 return;
1477 }
1478 break;
1479 }
1480
1481 while (isspace (*str))
1482 ++str;
1483
1484 if (*str != '\0')
1485 as_bad ("junk at end of line: `%s'", str);
1486
1487 input_line_pointer = str;
1488
1489 /* Write out the instruction.
1490
1491 Four byte insns have an opcode with the two high bits on. */
1492 if (relaxable && fc > 0)
1493 {
1494 f = frag_var (rs_machine_dependent, 6, 4, 0,
1495 fixups[0].exp.X_add_symbol,
1496 fixups[0].exp.X_add_number,
1497 (char *)fixups[0].opindex);
1498 insn_size = 2;
1499 md_number_to_chars (f, insn, insn_size);
1500 md_number_to_chars (f + 2, 0, 4);
1501 fc = 0;
1502 }
1503 else
1504 {
1505 if ((insn & 0x0600) == 0x0600)
1506 insn_size = 4;
1507 else
1508 insn_size = 2;
1509
1510 /* start-sanitize-v850e */
1511 /* Special case: 32 bit MOV */
1512 if ((insn & 0xffe0) == 0x0620)
1513 insn_size = 2;
1514 /* end-sanitize-v850e */
1515
1516 f = frag_more (insn_size);
1517
1518 md_number_to_chars (f, insn, insn_size);
1519
1520 if (extra_data_after_insn)
1521 {
1522 f = frag_more (extra_data_len);
1523
1524 md_number_to_chars (f, extra_data, extra_data_len);
1525
1526 extra_data_after_insn = false;
1527 }
1528 }
1529
1530 /* Create any fixups. At this point we do not use a
1531 bfd_reloc_code_real_type, but instead just use the
1532 BFD_RELOC_UNUSED plus the operand index. This lets us easily
1533 handle fixups for any operand type, although that is admittedly
1534 not a very exciting feature. We pick a BFD reloc type in
1535 md_apply_fix. */
1536 for (i = 0; i < fc; i++)
1537 {
1538 const struct v850_operand * operand;
1539 bfd_reloc_code_real_type reloc;
1540
1541 operand = & v850_operands[ fixups[i].opindex ];
1542
1543 reloc = fixups[i].reloc;
1544
1545 if (reloc != BFD_RELOC_UNUSED)
1546 {
1547 reloc_howto_type * reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
1548 int size;
1549 int address;
1550 fixS * fixP;
1551
1552 if (!reloc_howto)
1553 abort();
1554
1555 size = bfd_get_reloc_size (reloc_howto);
1556
1557 if (size != 2 && size != 4) /* XXX this will abort on an R_V850_8 reloc - is this reloc actually used ? */
1558 abort();
1559
1560 address = (f - frag_now->fr_literal) + insn_size - size;
1561
1562 if (reloc == BFD_RELOC_32)
1563 {
1564 address += 2;
1565 }
1566
1567 fixP = fix_new_exp (frag_now, address, size,
1568 & fixups[i].exp,
1569 reloc_howto->pc_relative,
1570 reloc);
1571
1572 switch (reloc)
1573 {
1574 case BFD_RELOC_LO16:
1575 case BFD_RELOC_HI16:
1576 case BFD_RELOC_HI16_S:
1577 fixP->fx_no_overflow = 1;
1578 break;
1579 }
1580 }
1581 else
1582 {
1583 fix_new_exp (
1584 frag_now,
1585 f - frag_now->fr_literal, 4,
1586 & fixups[i].exp,
1587 1 /* FIXME: V850_OPERAND_RELATIVE ??? */,
1588 (bfd_reloc_code_real_type) (fixups[i].opindex + (int) BFD_RELOC_UNUSED)
1589 );
1590 }
1591 }
1592
1593 input_line_pointer = saved_input_line_pointer;
1594 }
1595
1596
1597 /* If while processing a fixup, a reloc really needs to be created */
1598 /* then it is done here. */
1599
1600 arelent *
1601 tc_gen_reloc (seg, fixp)
1602 asection * seg;
1603 fixS * fixp;
1604 {
1605 arelent * reloc;
1606
1607 reloc = (arelent *) xmalloc (sizeof (arelent));
1608 reloc->sym_ptr_ptr = & fixp->fx_addsy->bsym;
1609 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
1610 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
1611
1612 if (reloc->howto == (reloc_howto_type *) NULL)
1613 {
1614 as_bad_where (fixp->fx_file, fixp->fx_line,
1615 "reloc %d not supported by object file format", (int)fixp->fx_r_type);
1616
1617 xfree (reloc);
1618
1619 return NULL;
1620 }
1621
1622 reloc->addend = fixp->fx_addnumber;
1623
1624 return reloc;
1625 }
1626
1627 /* Assume everything will fit in two bytes, then expand as necessary. */
1628 int
1629 md_estimate_size_before_relax (fragp, seg)
1630 fragS * fragp;
1631 asection * seg;
1632 {
1633 fragp->fr_var = 4;
1634 return 2;
1635 }
1636
1637 long
1638 md_pcrel_from (fixp)
1639 fixS * fixp;
1640 {
1641 /* If the symbol is undefined, or in a section other than our own,
1642 then let the linker figure it out. */
1643 if (fixp->fx_addsy != (symbolS *) NULL && ! S_IS_DEFINED (fixp->fx_addsy))
1644 {
1645 /* The symbol is undefined. Let the linker figure it out. */
1646 return 0;
1647 }
1648 return fixp->fx_frag->fr_address + fixp->fx_where;
1649 }
1650
1651 int
1652 md_apply_fix3 (fixp, valuep, seg)
1653 fixS * fixp;
1654 valueT * valuep;
1655 segT seg;
1656 {
1657 valueT value;
1658 char * where;
1659
1660 if (fixp->fx_addsy == (symbolS *) NULL)
1661 {
1662 value = * valuep;
1663 fixp->fx_done = 1;
1664 }
1665 else if (fixp->fx_pcrel)
1666 value = * valuep;
1667 else
1668 {
1669 value = fixp->fx_offset;
1670 if (fixp->fx_subsy != (symbolS *) NULL)
1671 {
1672 if (S_GET_SEGMENT (fixp->fx_subsy) == absolute_section)
1673 value -= S_GET_VALUE (fixp->fx_subsy);
1674 else
1675 {
1676 /* We don't actually support subtracting a symbol. */
1677 as_bad_where (fixp->fx_file, fixp->fx_line,
1678 "expression too complex");
1679 }
1680 }
1681 }
1682
1683 if ((int) fixp->fx_r_type >= (int) BFD_RELOC_UNUSED)
1684 {
1685 int opindex;
1686 const struct v850_operand * operand;
1687 unsigned long insn;
1688
1689 opindex = (int) fixp->fx_r_type - (int) BFD_RELOC_UNUSED;
1690 operand = & v850_operands[ opindex ];
1691
1692 /* Fetch the instruction, insert the fully resolved operand
1693 value, and stuff the instruction back again.
1694
1695 Note the instruction has been stored in little endian
1696 format! */
1697 where = fixp->fx_frag->fr_literal + fixp->fx_where;
1698
1699 insn = bfd_getl32 ((unsigned char *) where);
1700 insn = v850_insert_operand (insn, operand, (offsetT) value,
1701 fixp->fx_file, fixp->fx_line);
1702 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
1703
1704 if (fixp->fx_done)
1705 {
1706 /* Nothing else to do here. */
1707 return 1;
1708 }
1709
1710 /* Determine a BFD reloc value based on the operand information.
1711 We are only prepared to turn a few of the operands into relocs. */
1712
1713 if (operand->bits == 22)
1714 fixp->fx_r_type = BFD_RELOC_V850_22_PCREL;
1715 else if (operand->bits == 9)
1716 fixp->fx_r_type = BFD_RELOC_V850_9_PCREL;
1717 else
1718 {
1719 /* fprintf (stderr, "bits: %d, insn: %x\n", operand->bits, insn); */
1720
1721 as_bad_where(fixp->fx_file, fixp->fx_line,
1722 "unresolved expression that must be resolved");
1723 fixp->fx_done = 1;
1724 return 1;
1725 }
1726 }
1727 else if (fixp->fx_done)
1728 {
1729 /* We still have to insert the value into memory! */
1730 where = fixp->fx_frag->fr_literal + fixp->fx_where;
1731 if (fixp->fx_size == 1)
1732 *where = value & 0xff;
1733 else if (fixp->fx_size == 2)
1734 bfd_putl16 (value & 0xffff, (unsigned char *) where);
1735 else if (fixp->fx_size == 4)
1736 bfd_putl32 (value, (unsigned char *) where);
1737 }
1738
1739 fixp->fx_addnumber = value;
1740 return 1;
1741 }
1742
1743 \f
1744 /* Insert an operand value into an instruction. */
1745
1746 static unsigned long
1747 v850_insert_operand (insn, operand, val, file, line)
1748 unsigned long insn;
1749 const struct v850_operand * operand;
1750 offsetT val;
1751 char *file;
1752 unsigned int line;
1753 {
1754 if (operand->insert)
1755 {
1756 const char * message = NULL;
1757
1758 insn = (*operand->insert) (insn, val, & message);
1759 if (message != NULL)
1760 {
1761 if (file == (char *) NULL)
1762 as_warn (message);
1763 else
1764 as_warn_where (file, line, message);
1765 }
1766 }
1767 else
1768 {
1769 if (operand->bits != 32)
1770 {
1771 long min, max;
1772 offsetT test;
1773
1774 if ((operand->flags & V850_OPERAND_SIGNED) != 0)
1775 {
1776 if (! warn_signed_overflows)
1777 max = (1 << operand->bits) - 1;
1778 else
1779 max = (1 << (operand->bits - 1)) - 1;
1780
1781 min = - (1 << (operand->bits - 1));
1782 }
1783 else
1784 {
1785 max = (1 << operand->bits) - 1;
1786
1787 if (! warn_unsigned_overflows)
1788 min = - (1 << (operand->bits - 1));
1789 else
1790 min = 0;
1791 }
1792
1793 test = val;
1794
1795 if (test < (offsetT) min || test > (offsetT) max)
1796 {
1797 const char * err = "operand out of range (%s not between %ld and %ld)";
1798 char buf[100];
1799
1800 sprint_value (buf, test);
1801 if (file == (char *) NULL)
1802 as_warn (err, buf, min, max);
1803 else
1804 as_warn_where (file, line, err, buf, min, max);
1805 }
1806 }
1807
1808 insn |= (((long) val & ((1 << operand->bits) - 1)) << operand->shift);
1809 }
1810
1811 return insn;
1812 }
1813
1814 /* Parse a cons expression. We have to handle hi(), lo(), etc
1815 on the v850. */
1816 void
1817 parse_cons_expression_v850 (exp)
1818 expressionS *exp;
1819 {
1820 /* See if there's a reloc prefix like hi() we have to handle. */
1821 hold_cons_reloc = v850_reloc_prefix (NULL);
1822
1823 /* Do normal expression parsing. */
1824 expression (exp);
1825 }
1826
1827 /* Create a fixup for a cons expression. If parse_cons_expression_v850
1828 found a reloc prefix, then we use that reloc, else we choose an
1829 appropriate one based on the size of the expression. */
1830 void
1831 cons_fix_new_v850 (frag, where, size, exp)
1832 fragS *frag;
1833 int where;
1834 int size;
1835 expressionS *exp;
1836 {
1837 if (hold_cons_reloc == BFD_RELOC_UNUSED)
1838 {
1839 if (size == 4)
1840 hold_cons_reloc = BFD_RELOC_32;
1841 if (size == 2)
1842 hold_cons_reloc = BFD_RELOC_16;
1843 if (size == 1)
1844 hold_cons_reloc = BFD_RELOC_8;
1845 }
1846
1847 if (exp != NULL)
1848 fix_new_exp (frag, where, size, exp, 0, hold_cons_reloc);
1849 else
1850 fix_new (frag, where, size, NULL, 0, 0, hold_cons_reloc);
1851 }
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