1 /* tc-xtensa.c -- Assemble Xtensa instructions.
2 Copyright (C) 2003-2016 Free Software Foundation, Inc.
4 This file is part of GAS, the GNU Assembler.
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
24 #include "safe-ctype.h"
25 #include "tc-xtensa.h"
27 #include "xtensa-relax.h"
28 #include "dwarf2dbg.h"
29 #include "xtensa-istack.h"
30 #include "struc-symbol.h"
31 #include "xtensa-config.h"
32 #include "elf/xtensa.h"
34 /* Provide default values for new configuration settings. */
40 #define uint32 unsigned int
43 #define int32 signed int
48 Naming conventions (used somewhat inconsistently):
49 The xtensa_ functions are exported
50 The xg_ functions are internal
52 We also have a couple of different extensibility mechanisms.
53 1) The idiom replacement:
54 This is used when a line is first parsed to
55 replace an instruction pattern with another instruction
56 It is currently limited to replacements of instructions
57 with constant operands.
58 2) The xtensa-relax.c mechanism that has stronger instruction
59 replacement patterns. When an instruction's immediate field
60 does not fit the next instruction sequence is attempted.
61 In addition, "narrow" opcodes are supported this way. */
64 /* Define characters with special meanings to GAS. */
65 const char comment_chars
[] = "#";
66 const char line_comment_chars
[] = "#";
67 const char line_separator_chars
[] = ";";
68 const char EXP_CHARS
[] = "eE";
69 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
72 /* Flags to indicate whether the hardware supports the density and
73 absolute literals options. */
75 bfd_boolean density_supported
= XCHAL_HAVE_DENSITY
;
76 bfd_boolean absolute_literals_supported
= XSHAL_USE_ABSOLUTE_LITERALS
;
78 static vliw_insn cur_vinsn
;
80 unsigned xtensa_num_pipe_stages
;
81 unsigned xtensa_fetch_width
= XCHAL_INST_FETCH_WIDTH
;
83 static enum debug_info_type xt_saved_debug_type
= DEBUG_NONE
;
85 /* Some functions are only valid in the front end. This variable
86 allows us to assert that we haven't crossed over into the
88 static bfd_boolean past_xtensa_end
= FALSE
;
90 /* Flags for properties of the last instruction in a segment. */
91 #define FLAG_IS_A0_WRITER 0x1
92 #define FLAG_IS_BAD_LOOPEND 0x2
95 /* We define a special segment names ".literal" to place literals
96 into. The .fini and .init sections are special because they
97 contain code that is moved together by the linker. We give them
98 their own special .fini.literal and .init.literal sections. */
100 #define LITERAL_SECTION_NAME xtensa_section_rename (".literal")
101 #define LIT4_SECTION_NAME xtensa_section_rename (".lit4")
102 #define INIT_SECTION_NAME xtensa_section_rename (".init")
103 #define FINI_SECTION_NAME xtensa_section_rename (".fini")
106 /* This type is used for the directive_stack to keep track of the
107 state of the literal collection pools. If lit_prefix is set, it is
108 used to determine the literal section names; otherwise, the literal
109 sections are determined based on the current text section. The
110 lit_seg and lit4_seg fields cache these literal sections, with the
111 current_text_seg field used a tag to indicate whether the cached
114 typedef struct lit_state_struct
117 segT current_text_seg
;
122 static lit_state default_lit_sections
;
125 /* We keep a list of literal segments. The seg_list type is the node
126 for this list. The literal_head pointer is the head of the list,
127 with the literal_head_h dummy node at the start. */
129 typedef struct seg_list_struct
131 struct seg_list_struct
*next
;
135 static seg_list literal_head_h
;
136 static seg_list
*literal_head
= &literal_head_h
;
139 /* Lists of symbols. We keep a list of symbols that label the current
140 instruction, so that we can adjust the symbols when inserting alignment
141 for various instructions. We also keep a list of all the symbols on
142 literals, so that we can fix up those symbols when the literals are
143 later moved into the text sections. */
145 typedef struct sym_list_struct
147 struct sym_list_struct
*next
;
151 static sym_list
*insn_labels
= NULL
;
152 static sym_list
*free_insn_labels
= NULL
;
153 static sym_list
*saved_insn_labels
= NULL
;
155 static sym_list
*literal_syms
;
158 /* Flags to determine whether to prefer const16 or l32r
159 if both options are available. */
160 int prefer_const16
= 0;
163 /* Global flag to indicate when we are emitting literals. */
164 int generating_literals
= 0;
166 /* The following PROPERTY table definitions are copied from
167 <elf/xtensa.h> and must be kept in sync with the code there. */
169 /* Flags in the property tables to specify whether blocks of memory
170 are literals, instructions, data, or unreachable. For
171 instructions, blocks that begin loop targets and branch targets are
172 designated. Blocks that do not allow density, instruction
173 reordering or transformation are also specified. Finally, for
174 branch targets, branch target alignment priority is included.
175 Alignment of the next block is specified in the current block
176 and the size of the current block does not include any fill required
177 to align to the next block. */
179 #define XTENSA_PROP_LITERAL 0x00000001
180 #define XTENSA_PROP_INSN 0x00000002
181 #define XTENSA_PROP_DATA 0x00000004
182 #define XTENSA_PROP_UNREACHABLE 0x00000008
183 /* Instruction only properties at beginning of code. */
184 #define XTENSA_PROP_INSN_LOOP_TARGET 0x00000010
185 #define XTENSA_PROP_INSN_BRANCH_TARGET 0x00000020
186 /* Instruction only properties about code. */
187 #define XTENSA_PROP_INSN_NO_DENSITY 0x00000040
188 #define XTENSA_PROP_INSN_NO_REORDER 0x00000080
189 /* Historically, NO_TRANSFORM was a property of instructions,
190 but it should apply to literals under certain circumstances. */
191 #define XTENSA_PROP_NO_TRANSFORM 0x00000100
193 /* Branch target alignment information. This transmits information
194 to the linker optimization about the priority of aligning a
195 particular block for branch target alignment: None, low priority,
196 high priority, or required. These only need to be checked in
197 instruction blocks marked as XTENSA_PROP_INSN_BRANCH_TARGET.
200 switch (GET_XTENSA_PROP_BT_ALIGN (flags))
201 case XTENSA_PROP_BT_ALIGN_NONE:
202 case XTENSA_PROP_BT_ALIGN_LOW:
203 case XTENSA_PROP_BT_ALIGN_HIGH:
204 case XTENSA_PROP_BT_ALIGN_REQUIRE:
206 #define XTENSA_PROP_BT_ALIGN_MASK 0x00000600
208 /* No branch target alignment. */
209 #define XTENSA_PROP_BT_ALIGN_NONE 0x0
210 /* Low priority branch target alignment. */
211 #define XTENSA_PROP_BT_ALIGN_LOW 0x1
212 /* High priority branch target alignment. */
213 #define XTENSA_PROP_BT_ALIGN_HIGH 0x2
214 /* Required branch target alignment. */
215 #define XTENSA_PROP_BT_ALIGN_REQUIRE 0x3
217 #define SET_XTENSA_PROP_BT_ALIGN(flag, align) \
218 (((flag) & (~XTENSA_PROP_BT_ALIGN_MASK)) | \
219 (((align) << 9) & XTENSA_PROP_BT_ALIGN_MASK))
222 /* Alignment is specified in the block BEFORE the one that needs
223 alignment. Up to 5 bits. Use GET_XTENSA_PROP_ALIGNMENT(flags) to
224 get the required alignment specified as a power of 2. Use
225 SET_XTENSA_PROP_ALIGNMENT(flags, pow2) to set the required
226 alignment. Be careful of side effects since the SET will evaluate
227 flags twice. Also, note that the SIZE of a block in the property
228 table does not include the alignment size, so the alignment fill
229 must be calculated to determine if two blocks are contiguous.
230 TEXT_ALIGN is not currently implemented but is a placeholder for a
231 possible future implementation. */
233 #define XTENSA_PROP_ALIGN 0x00000800
235 #define XTENSA_PROP_ALIGNMENT_MASK 0x0001f000
237 #define SET_XTENSA_PROP_ALIGNMENT(flag, align) \
238 (((flag) & (~XTENSA_PROP_ALIGNMENT_MASK)) | \
239 (((align) << 12) & XTENSA_PROP_ALIGNMENT_MASK))
241 #define XTENSA_PROP_INSN_ABSLIT 0x00020000
244 /* Structure for saving instruction and alignment per-fragment data
245 that will be written to the object file. This structure is
246 equivalent to the actual data that will be written out to the file
247 but is easier to use. We provide a conversion to file flags
248 in frag_flags_to_number. */
250 typedef struct frag_flags_struct frag_flags
;
252 struct frag_flags_struct
254 /* is_literal should only be used after xtensa_move_literals.
255 If you need to check if you are generating a literal fragment,
256 then use the generating_literals global. */
258 unsigned is_literal
: 1;
259 unsigned is_insn
: 1;
260 unsigned is_data
: 1;
261 unsigned is_unreachable
: 1;
263 /* is_specific_opcode implies no_transform. */
264 unsigned is_no_transform
: 1;
268 unsigned is_loop_target
: 1;
269 unsigned is_branch_target
: 1; /* Branch targets have a priority. */
270 unsigned bt_align_priority
: 2;
272 unsigned is_no_density
: 1;
273 /* no_longcalls flag does not need to be placed in the object file. */
275 unsigned is_no_reorder
: 1;
277 /* Uses absolute literal addressing for l32r. */
278 unsigned is_abslit
: 1;
280 unsigned is_align
: 1;
281 unsigned alignment
: 5;
285 /* Structure for saving information about a block of property data
286 for frags that have the same flags. */
287 struct xtensa_block_info_struct
293 struct xtensa_block_info_struct
*next
;
297 /* Structure for saving the current state before emitting literals. */
298 typedef struct emit_state_struct
303 int generating_literals
;
307 /* Opcode placement information */
309 typedef unsigned long long bitfield
;
310 #define bit_is_set(bit, bf) ((bf) & (0x01ll << (bit)))
311 #define set_bit(bit, bf) ((bf) |= (0x01ll << (bit)))
312 #define clear_bit(bit, bf) ((bf) &= ~(0x01ll << (bit)))
314 #define MAX_FORMATS 32
316 typedef struct op_placement_info_struct
319 /* A number describing how restrictive the issue is for this
320 opcode. For example, an opcode that fits lots of different
321 formats has a high freedom, as does an opcode that fits
322 only one format but many slots in that format. The most
323 restrictive is the opcode that fits only one slot in one
326 xtensa_format narrowest
;
330 /* formats is a bitfield with the Nth bit set
331 if the opcode fits in the Nth xtensa_format. */
334 /* slots[N]'s Mth bit is set if the op fits in the
335 Mth slot of the Nth xtensa_format. */
336 bitfield slots
[MAX_FORMATS
];
338 /* A count of the number of slots in a given format
339 an op can fit (i.e., the bitcount of the slot field above). */
340 char slots_in_format
[MAX_FORMATS
];
342 } op_placement_info
, *op_placement_info_table
;
344 op_placement_info_table op_placement_table
;
347 /* Extra expression types. */
349 #define O_pltrel O_md1 /* like O_symbol but use a PLT reloc */
350 #define O_hi16 O_md2 /* use high 16 bits of symbolic value */
351 #define O_lo16 O_md3 /* use low 16 bits of symbolic value */
352 #define O_pcrel O_md4 /* value is a PC-relative offset */
353 #define O_tlsfunc O_md5 /* TLS_FUNC/TLSDESC_FN relocation */
354 #define O_tlsarg O_md6 /* TLS_ARG/TLSDESC_ARG relocation */
355 #define O_tlscall O_md7 /* TLS_CALL relocation */
356 #define O_tpoff O_md8 /* TPOFF relocation */
357 #define O_dtpoff O_md9 /* DTPOFF relocation */
359 struct suffix_reloc_map
363 bfd_reloc_code_real_type reloc
;
367 #define SUFFIX_MAP(str, reloc, op) { str, sizeof (str) - 1, reloc, op }
369 static struct suffix_reloc_map suffix_relocs
[] =
371 SUFFIX_MAP ("l", BFD_RELOC_LO16
, O_lo16
),
372 SUFFIX_MAP ("h", BFD_RELOC_HI16
, O_hi16
),
373 SUFFIX_MAP ("plt", BFD_RELOC_XTENSA_PLT
, O_pltrel
),
374 SUFFIX_MAP ("pcrel", BFD_RELOC_32_PCREL
, O_pcrel
),
375 SUFFIX_MAP ("tlsfunc", BFD_RELOC_XTENSA_TLS_FUNC
, O_tlsfunc
),
376 SUFFIX_MAP ("tlsarg", BFD_RELOC_XTENSA_TLS_ARG
, O_tlsarg
),
377 SUFFIX_MAP ("tlscall", BFD_RELOC_XTENSA_TLS_CALL
, O_tlscall
),
378 SUFFIX_MAP ("tpoff", BFD_RELOC_XTENSA_TLS_TPOFF
, O_tpoff
),
379 SUFFIX_MAP ("dtpoff", BFD_RELOC_XTENSA_TLS_DTPOFF
, O_dtpoff
),
380 { (char *) 0, 0, BFD_RELOC_UNUSED
, 0 }
394 directive_literal_prefix
,
396 directive_absolute_literals
,
397 directive_last_directive
403 bfd_boolean can_be_negated
;
406 const directive_infoS directive_info
[] =
409 { "literal", FALSE
},
411 { "transform", TRUE
},
412 { "freeregs", FALSE
},
413 { "longcalls", TRUE
},
414 { "literal_prefix", FALSE
},
415 { "schedule", TRUE
},
416 { "absolute-literals", TRUE
}
419 bfd_boolean directive_state
[] =
423 #if !XCHAL_HAVE_DENSITY
428 TRUE
, /* transform */
429 FALSE
, /* freeregs */
430 FALSE
, /* longcalls */
431 FALSE
, /* literal_prefix */
432 FALSE
, /* schedule */
433 #if XSHAL_USE_ABSOLUTE_LITERALS
434 TRUE
/* absolute_literals */
436 FALSE
/* absolute_literals */
440 /* A circular list of all potential and actual literal pool locations
444 struct litpool_frag
*next
;
445 struct litpool_frag
*prev
;
448 short priority
; /* 1, 2, or 3 -- 1 is highest */
449 short original_priority
;
452 /* Map a segment to its litpool_frag list. */
455 struct litpool_seg
*next
;
457 struct litpool_frag frag_list
;
458 int frag_count
; /* since last litpool location */
461 static struct litpool_seg litpool_seg_list
;
464 /* Directive functions. */
466 static void xtensa_begin_directive (int);
467 static void xtensa_end_directive (int);
468 static void xtensa_literal_prefix (void);
469 static void xtensa_literal_position (int);
470 static void xtensa_literal_pseudo (int);
471 static void xtensa_frequency_pseudo (int);
472 static void xtensa_elf_cons (int);
473 static void xtensa_leb128 (int);
475 /* Parsing and Idiom Translation. */
477 static bfd_reloc_code_real_type
xtensa_elf_suffix (char **, expressionS
*);
479 /* Various Other Internal Functions. */
481 extern bfd_boolean
xg_is_single_relaxable_insn (TInsn
*, TInsn
*, bfd_boolean
);
482 static bfd_boolean
xg_build_to_insn (TInsn
*, TInsn
*, BuildInstr
*);
483 static void xtensa_mark_literal_pool_location (void);
484 static addressT
get_expanded_loop_offset (xtensa_opcode
);
485 static fragS
*get_literal_pool_location (segT
);
486 static void set_literal_pool_location (segT
, fragS
*);
487 static void xtensa_set_frag_assembly_state (fragS
*);
488 static void finish_vinsn (vliw_insn
*);
489 static bfd_boolean
emit_single_op (TInsn
*);
490 static int total_frag_text_expansion (fragS
*);
491 static bfd_boolean use_trampolines
= TRUE
;
492 static void xtensa_check_frag_count (void);
493 static void xtensa_create_trampoline_frag (bfd_boolean
);
494 static void xtensa_maybe_create_trampoline_frag (void);
495 struct trampoline_frag
;
496 static int init_trampoline_frag (struct trampoline_frag
*);
497 static void xtensa_maybe_create_literal_pool_frag (bfd_boolean
, bfd_boolean
);
498 static bfd_boolean auto_litpools
= FALSE
;
499 static int auto_litpool_limit
= 10000;
501 /* Alignment Functions. */
503 static int get_text_align_power (unsigned);
504 static int get_text_align_max_fill_size (int, bfd_boolean
, bfd_boolean
);
505 static int branch_align_power (segT
);
507 /* Helpers for xtensa_relax_frag(). */
509 static long relax_frag_add_nop (fragS
*);
511 /* Accessors for additional per-subsegment information. */
513 static unsigned get_last_insn_flags (segT
, subsegT
);
514 static void set_last_insn_flags (segT
, subsegT
, unsigned, bfd_boolean
);
515 static float get_subseg_total_freq (segT
, subsegT
);
516 static float get_subseg_target_freq (segT
, subsegT
);
517 static void set_subseg_freq (segT
, subsegT
, float, float);
519 /* Segment list functions. */
521 static void xtensa_move_literals (void);
522 static void xtensa_reorder_segments (void);
523 static void xtensa_switch_to_literal_fragment (emit_state
*);
524 static void xtensa_switch_to_non_abs_literal_fragment (emit_state
*);
525 static void xtensa_switch_section_emit_state (emit_state
*, segT
, subsegT
);
526 static void xtensa_restore_emit_state (emit_state
*);
527 static segT
cache_literal_section (bfd_boolean
);
529 /* Import from elf32-xtensa.c in BFD library. */
531 extern asection
*xtensa_make_property_section (asection
*, const char *);
533 /* op_placement_info functions. */
535 static void init_op_placement_info_table (void);
536 extern bfd_boolean
opcode_fits_format_slot (xtensa_opcode
, xtensa_format
, int);
537 static int xg_get_single_size (xtensa_opcode
);
538 static xtensa_format
xg_get_single_format (xtensa_opcode
);
539 static int xg_get_single_slot (xtensa_opcode
);
541 /* TInsn and IStack functions. */
543 static bfd_boolean
tinsn_has_symbolic_operands (const TInsn
*);
544 static bfd_boolean
tinsn_has_invalid_symbolic_operands (const TInsn
*);
545 static bfd_boolean
tinsn_has_complex_operands (const TInsn
*);
546 static bfd_boolean
tinsn_to_insnbuf (TInsn
*, xtensa_insnbuf
);
547 static bfd_boolean
tinsn_check_arguments (const TInsn
*);
548 static void tinsn_from_chars (TInsn
*, char *, int);
549 static void tinsn_immed_from_frag (TInsn
*, fragS
*, int);
550 static int get_num_stack_text_bytes (IStack
*);
551 static int get_num_stack_literal_bytes (IStack
*);
552 static bfd_boolean
tinsn_to_slotbuf (xtensa_format
, int, TInsn
*, xtensa_insnbuf
);
554 /* vliw_insn functions. */
556 static void xg_init_vinsn (vliw_insn
*);
557 static void xg_copy_vinsn (vliw_insn
*, vliw_insn
*);
558 static void xg_clear_vinsn (vliw_insn
*);
559 static bfd_boolean
vinsn_has_specific_opcodes (vliw_insn
*);
560 static void xg_free_vinsn (vliw_insn
*);
561 static bfd_boolean vinsn_to_insnbuf
562 (vliw_insn
*, char *, fragS
*, bfd_boolean
);
563 static void vinsn_from_chars (vliw_insn
*, char *);
565 /* Expression Utilities. */
567 bfd_boolean
expr_is_const (const expressionS
*);
568 offsetT
get_expr_const (const expressionS
*);
569 void set_expr_const (expressionS
*, offsetT
);
570 bfd_boolean
expr_is_register (const expressionS
*);
571 offsetT
get_expr_register (const expressionS
*);
572 void set_expr_symbol_offset (expressionS
*, symbolS
*, offsetT
);
573 bfd_boolean
expr_is_equal (expressionS
*, expressionS
*);
574 static void copy_expr (expressionS
*, const expressionS
*);
576 /* Section renaming. */
578 static void build_section_rename (const char *);
581 /* ISA imported from bfd. */
582 extern xtensa_isa xtensa_default_isa
;
584 extern int target_big_endian
;
586 static xtensa_opcode xtensa_addi_opcode
;
587 static xtensa_opcode xtensa_addmi_opcode
;
588 static xtensa_opcode xtensa_call0_opcode
;
589 static xtensa_opcode xtensa_call4_opcode
;
590 static xtensa_opcode xtensa_call8_opcode
;
591 static xtensa_opcode xtensa_call12_opcode
;
592 static xtensa_opcode xtensa_callx0_opcode
;
593 static xtensa_opcode xtensa_callx4_opcode
;
594 static xtensa_opcode xtensa_callx8_opcode
;
595 static xtensa_opcode xtensa_callx12_opcode
;
596 static xtensa_opcode xtensa_const16_opcode
;
597 static xtensa_opcode xtensa_entry_opcode
;
598 static xtensa_opcode xtensa_extui_opcode
;
599 static xtensa_opcode xtensa_movi_opcode
;
600 static xtensa_opcode xtensa_movi_n_opcode
;
601 static xtensa_opcode xtensa_isync_opcode
;
602 static xtensa_opcode xtensa_j_opcode
;
603 static xtensa_opcode xtensa_jx_opcode
;
604 static xtensa_opcode xtensa_l32r_opcode
;
605 static xtensa_opcode xtensa_loop_opcode
;
606 static xtensa_opcode xtensa_loopnez_opcode
;
607 static xtensa_opcode xtensa_loopgtz_opcode
;
608 static xtensa_opcode xtensa_nop_opcode
;
609 static xtensa_opcode xtensa_nop_n_opcode
;
610 static xtensa_opcode xtensa_or_opcode
;
611 static xtensa_opcode xtensa_ret_opcode
;
612 static xtensa_opcode xtensa_ret_n_opcode
;
613 static xtensa_opcode xtensa_retw_opcode
;
614 static xtensa_opcode xtensa_retw_n_opcode
;
615 static xtensa_opcode xtensa_rsr_lcount_opcode
;
616 static xtensa_opcode xtensa_waiti_opcode
;
617 static int config_max_slots
= 0;
620 /* Command-line Options. */
622 bfd_boolean use_literal_section
= TRUE
;
623 enum flix_level produce_flix
= FLIX_ALL
;
624 static bfd_boolean align_targets
= TRUE
;
625 static bfd_boolean warn_unaligned_branch_targets
= FALSE
;
626 static bfd_boolean has_a0_b_retw
= FALSE
;
627 static bfd_boolean workaround_a0_b_retw
= FALSE
;
628 static bfd_boolean workaround_b_j_loop_end
= FALSE
;
629 static bfd_boolean workaround_short_loop
= FALSE
;
630 static bfd_boolean maybe_has_short_loop
= FALSE
;
631 static bfd_boolean workaround_close_loop_end
= FALSE
;
632 static bfd_boolean maybe_has_close_loop_end
= FALSE
;
633 static bfd_boolean enforce_three_byte_loop_align
= FALSE
;
635 /* When workaround_short_loops is TRUE, all loops with early exits must
636 have at least 3 instructions. workaround_all_short_loops is a modifier
637 to the workaround_short_loop flag. In addition to the
638 workaround_short_loop actions, all straightline loopgtz and loopnez
639 must have at least 3 instructions. */
641 static bfd_boolean workaround_all_short_loops
= FALSE
;
645 xtensa_setup_hw_workarounds (int earliest
, int latest
)
647 if (earliest
> latest
)
648 as_fatal (_("illegal range of target hardware versions"));
650 /* Enable all workarounds for pre-T1050.0 hardware. */
651 if (earliest
< 105000 || latest
< 105000)
653 workaround_a0_b_retw
|= TRUE
;
654 workaround_b_j_loop_end
|= TRUE
;
655 workaround_short_loop
|= TRUE
;
656 workaround_close_loop_end
|= TRUE
;
657 workaround_all_short_loops
|= TRUE
;
658 enforce_three_byte_loop_align
= TRUE
;
665 option_density
= OPTION_MD_BASE
,
669 option_no_generate_flix
,
676 option_no_link_relax
,
684 option_text_section_literals
,
685 option_no_text_section_literals
,
687 option_absolute_literals
,
688 option_no_absolute_literals
,
690 option_align_targets
,
691 option_no_align_targets
,
693 option_warn_unaligned_targets
,
698 option_workaround_a0_b_retw
,
699 option_no_workaround_a0_b_retw
,
701 option_workaround_b_j_loop_end
,
702 option_no_workaround_b_j_loop_end
,
704 option_workaround_short_loop
,
705 option_no_workaround_short_loop
,
707 option_workaround_all_short_loops
,
708 option_no_workaround_all_short_loops
,
710 option_workaround_close_loop_end
,
711 option_no_workaround_close_loop_end
,
713 option_no_workarounds
,
715 option_rename_section_name
,
718 option_prefer_const16
,
720 option_target_hardware
,
723 option_no_trampolines
,
725 option_auto_litpools
,
726 option_no_auto_litpools
,
727 option_auto_litpool_limit
,
730 const char *md_shortopts
= "";
732 struct option md_longopts
[] =
734 { "density", no_argument
, NULL
, option_density
},
735 { "no-density", no_argument
, NULL
, option_no_density
},
737 { "flix", no_argument
, NULL
, option_flix
},
738 { "no-generate-flix", no_argument
, NULL
, option_no_generate_flix
},
739 { "no-allow-flix", no_argument
, NULL
, option_no_flix
},
741 /* Both "relax" and "generics" are deprecated and treated as equivalent
742 to the "transform" option. */
743 { "relax", no_argument
, NULL
, option_relax
},
744 { "no-relax", no_argument
, NULL
, option_no_relax
},
745 { "generics", no_argument
, NULL
, option_generics
},
746 { "no-generics", no_argument
, NULL
, option_no_generics
},
748 { "transform", no_argument
, NULL
, option_transform
},
749 { "no-transform", no_argument
, NULL
, option_no_transform
},
750 { "text-section-literals", no_argument
, NULL
, option_text_section_literals
},
751 { "no-text-section-literals", no_argument
, NULL
,
752 option_no_text_section_literals
},
753 { "absolute-literals", no_argument
, NULL
, option_absolute_literals
},
754 { "no-absolute-literals", no_argument
, NULL
, option_no_absolute_literals
},
755 /* This option was changed from -align-target to -target-align
756 because it conflicted with the "-al" option. */
757 { "target-align", no_argument
, NULL
, option_align_targets
},
758 { "no-target-align", no_argument
, NULL
, option_no_align_targets
},
759 { "warn-unaligned-targets", no_argument
, NULL
,
760 option_warn_unaligned_targets
},
761 { "longcalls", no_argument
, NULL
, option_longcalls
},
762 { "no-longcalls", no_argument
, NULL
, option_no_longcalls
},
764 { "no-workaround-a0-b-retw", no_argument
, NULL
,
765 option_no_workaround_a0_b_retw
},
766 { "workaround-a0-b-retw", no_argument
, NULL
, option_workaround_a0_b_retw
},
768 { "no-workaround-b-j-loop-end", no_argument
, NULL
,
769 option_no_workaround_b_j_loop_end
},
770 { "workaround-b-j-loop-end", no_argument
, NULL
,
771 option_workaround_b_j_loop_end
},
773 { "no-workaround-short-loops", no_argument
, NULL
,
774 option_no_workaround_short_loop
},
775 { "workaround-short-loops", no_argument
, NULL
,
776 option_workaround_short_loop
},
778 { "no-workaround-all-short-loops", no_argument
, NULL
,
779 option_no_workaround_all_short_loops
},
780 { "workaround-all-short-loop", no_argument
, NULL
,
781 option_workaround_all_short_loops
},
783 { "prefer-l32r", no_argument
, NULL
, option_prefer_l32r
},
784 { "prefer-const16", no_argument
, NULL
, option_prefer_const16
},
786 { "no-workarounds", no_argument
, NULL
, option_no_workarounds
},
788 { "no-workaround-close-loop-end", no_argument
, NULL
,
789 option_no_workaround_close_loop_end
},
790 { "workaround-close-loop-end", no_argument
, NULL
,
791 option_workaround_close_loop_end
},
793 { "rename-section", required_argument
, NULL
, option_rename_section_name
},
795 { "link-relax", no_argument
, NULL
, option_link_relax
},
796 { "no-link-relax", no_argument
, NULL
, option_no_link_relax
},
798 { "target-hardware", required_argument
, NULL
, option_target_hardware
},
800 { "trampolines", no_argument
, NULL
, option_trampolines
},
801 { "no-trampolines", no_argument
, NULL
, option_no_trampolines
},
803 { "auto-litpools", no_argument
, NULL
, option_auto_litpools
},
804 { "no-auto-litpools", no_argument
, NULL
, option_no_auto_litpools
},
805 { "auto-litpool-limit", required_argument
, NULL
, option_auto_litpool_limit
},
807 { NULL
, no_argument
, NULL
, 0 }
810 size_t md_longopts_size
= sizeof md_longopts
;
814 md_parse_option (int c
, const char *arg
)
819 as_warn (_("--density option is ignored"));
821 case option_no_density
:
822 as_warn (_("--no-density option is ignored"));
824 case option_link_relax
:
827 case option_no_link_relax
:
831 produce_flix
= FLIX_ALL
;
833 case option_no_generate_flix
:
834 produce_flix
= FLIX_NO_GENERATE
;
837 produce_flix
= FLIX_NONE
;
839 case option_generics
:
840 as_warn (_("--generics is deprecated; use --transform instead"));
841 return md_parse_option (option_transform
, arg
);
842 case option_no_generics
:
843 as_warn (_("--no-generics is deprecated; use --no-transform instead"));
844 return md_parse_option (option_no_transform
, arg
);
846 as_warn (_("--relax is deprecated; use --transform instead"));
847 return md_parse_option (option_transform
, arg
);
848 case option_no_relax
:
849 as_warn (_("--no-relax is deprecated; use --no-transform instead"));
850 return md_parse_option (option_no_transform
, arg
);
851 case option_longcalls
:
852 directive_state
[directive_longcalls
] = TRUE
;
854 case option_no_longcalls
:
855 directive_state
[directive_longcalls
] = FALSE
;
857 case option_text_section_literals
:
858 use_literal_section
= FALSE
;
860 case option_no_text_section_literals
:
861 use_literal_section
= TRUE
;
863 case option_absolute_literals
:
864 if (!absolute_literals_supported
)
866 as_fatal (_("--absolute-literals option not supported in this Xtensa configuration"));
869 directive_state
[directive_absolute_literals
] = TRUE
;
871 case option_no_absolute_literals
:
872 directive_state
[directive_absolute_literals
] = FALSE
;
875 case option_workaround_a0_b_retw
:
876 workaround_a0_b_retw
= TRUE
;
878 case option_no_workaround_a0_b_retw
:
879 workaround_a0_b_retw
= FALSE
;
881 case option_workaround_b_j_loop_end
:
882 workaround_b_j_loop_end
= TRUE
;
884 case option_no_workaround_b_j_loop_end
:
885 workaround_b_j_loop_end
= FALSE
;
888 case option_workaround_short_loop
:
889 workaround_short_loop
= TRUE
;
891 case option_no_workaround_short_loop
:
892 workaround_short_loop
= FALSE
;
895 case option_workaround_all_short_loops
:
896 workaround_all_short_loops
= TRUE
;
898 case option_no_workaround_all_short_loops
:
899 workaround_all_short_loops
= FALSE
;
902 case option_workaround_close_loop_end
:
903 workaround_close_loop_end
= TRUE
;
905 case option_no_workaround_close_loop_end
:
906 workaround_close_loop_end
= FALSE
;
909 case option_no_workarounds
:
910 workaround_a0_b_retw
= FALSE
;
911 workaround_b_j_loop_end
= FALSE
;
912 workaround_short_loop
= FALSE
;
913 workaround_all_short_loops
= FALSE
;
914 workaround_close_loop_end
= FALSE
;
917 case option_align_targets
:
918 align_targets
= TRUE
;
920 case option_no_align_targets
:
921 align_targets
= FALSE
;
924 case option_warn_unaligned_targets
:
925 warn_unaligned_branch_targets
= TRUE
;
928 case option_rename_section_name
:
929 build_section_rename (arg
);
933 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
934 should be emitted or not. FIXME: Not implemented. */
937 case option_prefer_l32r
:
939 as_fatal (_("prefer-l32r conflicts with prefer-const16"));
943 case option_prefer_const16
:
945 as_fatal (_("prefer-const16 conflicts with prefer-l32r"));
949 case option_target_hardware
:
951 int earliest
, latest
= 0;
953 if (*arg
== 0 || *arg
== '-')
954 as_fatal (_("invalid target hardware version"));
956 earliest
= strtol (arg
, &end
, 0);
960 else if (*end
== '-')
963 as_fatal (_("invalid target hardware version"));
964 latest
= strtol (end
, &end
, 0);
967 as_fatal (_("invalid target hardware version"));
969 xtensa_setup_hw_workarounds (earliest
, latest
);
973 case option_transform
:
974 /* This option has no affect other than to use the defaults,
975 which are already set. */
978 case option_no_transform
:
979 /* This option turns off all transformations of any kind.
980 However, because we want to preserve the state of other
981 directives, we only change its own field. Thus, before
982 you perform any transformation, always check if transform
983 is available. If you use the functions we provide for this
984 purpose, you will be ok. */
985 directive_state
[directive_transform
] = FALSE
;
988 case option_trampolines
:
989 use_trampolines
= TRUE
;
992 case option_no_trampolines
:
993 use_trampolines
= FALSE
;
996 case option_auto_litpools
:
997 auto_litpools
= TRUE
;
998 use_literal_section
= FALSE
;
1001 case option_no_auto_litpools
:
1002 auto_litpools
= FALSE
;
1003 auto_litpool_limit
= -1;
1006 case option_auto_litpool_limit
:
1010 if (auto_litpool_limit
< 0)
1011 as_fatal (_("no-auto-litpools is incompatible with auto-litpool-limit"));
1012 if (*arg
== 0 || *arg
== '-')
1013 as_fatal (_("invalid auto-litpool-limit argument"));
1014 value
= strtol (arg
, &end
, 10);
1016 as_fatal (_("invalid auto-litpool-limit argument"));
1017 if (value
< 100 || value
> 10000)
1018 as_fatal (_("invalid auto-litpool-limit argument (range is 100-10000)"));
1019 auto_litpool_limit
= value
;
1020 auto_litpools
= TRUE
;
1021 use_literal_section
= FALSE
;
1032 md_show_usage (FILE *stream
)
1036 --[no-]text-section-literals\n\
1037 [Do not] put literals in the text section\n\
1038 --[no-]absolute-literals\n\
1039 [Do not] default to use non-PC-relative literals\n\
1040 --[no-]target-align [Do not] try to align branch targets\n\
1041 --[no-]longcalls [Do not] emit 32-bit call sequences\n\
1042 --[no-]transform [Do not] transform instructions\n\
1043 --flix both allow hand-written and generate flix bundles\n\
1044 --no-generate-flix allow hand-written but do not generate\n\
1046 --no-allow-flix neither allow hand-written nor generate\n\
1048 --rename-section old=new Rename section 'old' to 'new'\n\
1049 --[no-]trampolines [Do not] generate trampolines (jumps to jumps)\n\
1050 when jumps do not reach their targets\n\
1051 --[no-]auto-litpools [Do not] automatically create literal pools\n\
1052 --auto-litpool-limit=<value>\n\
1053 (range 100-10000) Maximum number of blocks of\n\
1054 instructions to emit between literal pool\n\
1055 locations; implies --auto-litpools flag\n", stream
);
1059 /* Functions related to the list of current label symbols. */
1062 xtensa_add_insn_label (symbolS
*sym
)
1066 if (!free_insn_labels
)
1067 l
= XNEW (sym_list
);
1070 l
= free_insn_labels
;
1071 free_insn_labels
= l
->next
;
1075 l
->next
= insn_labels
;
1081 xtensa_clear_insn_labels (void)
1085 for (pl
= &free_insn_labels
; *pl
!= NULL
; pl
= &(*pl
)->next
)
1093 xtensa_move_labels (fragS
*new_frag
, valueT new_offset
)
1097 for (lit
= insn_labels
; lit
; lit
= lit
->next
)
1099 symbolS
*lit_sym
= lit
->sym
;
1100 S_SET_VALUE (lit_sym
, new_offset
);
1101 symbol_set_frag (lit_sym
, new_frag
);
1106 /* Directive data and functions. */
1108 typedef struct state_stackS_struct
1110 directiveE directive
;
1111 bfd_boolean negated
;
1112 bfd_boolean old_state
;
1116 struct state_stackS_struct
*prev
;
1119 state_stackS
*directive_state_stack
;
1121 const pseudo_typeS md_pseudo_table
[] =
1123 { "align", s_align_bytes
, 0 }, /* Defaulting is invalid (0). */
1124 { "literal_position", xtensa_literal_position
, 0 },
1125 { "frame", s_ignore
, 0 }, /* Formerly used for STABS debugging. */
1126 { "long", xtensa_elf_cons
, 4 },
1127 { "word", xtensa_elf_cons
, 4 },
1128 { "4byte", xtensa_elf_cons
, 4 },
1129 { "short", xtensa_elf_cons
, 2 },
1130 { "2byte", xtensa_elf_cons
, 2 },
1131 { "sleb128", xtensa_leb128
, 1},
1132 { "uleb128", xtensa_leb128
, 0},
1133 { "begin", xtensa_begin_directive
, 0 },
1134 { "end", xtensa_end_directive
, 0 },
1135 { "literal", xtensa_literal_pseudo
, 0 },
1136 { "frequency", xtensa_frequency_pseudo
, 0 },
1142 use_transform (void)
1144 /* After md_end, you should be checking frag by frag, rather
1145 than state directives. */
1146 gas_assert (!past_xtensa_end
);
1147 return directive_state
[directive_transform
];
1152 do_align_targets (void)
1154 /* Do not use this function after md_end; just look at align_targets
1155 instead. There is no target-align directive, so alignment is either
1156 enabled for all frags or not done at all. */
1157 gas_assert (!past_xtensa_end
);
1158 return align_targets
&& use_transform ();
1163 directive_push (directiveE directive
, bfd_boolean negated
, const void *datum
)
1167 state_stackS
*stack
= XNEW (state_stackS
);
1169 file
= as_where (&line
);
1171 stack
->directive
= directive
;
1172 stack
->negated
= negated
;
1173 stack
->old_state
= directive_state
[directive
];
1176 stack
->datum
= datum
;
1177 stack
->prev
= directive_state_stack
;
1178 directive_state_stack
= stack
;
1180 directive_state
[directive
] = !negated
;
1185 directive_pop (directiveE
*directive
,
1186 bfd_boolean
*negated
,
1191 state_stackS
*top
= directive_state_stack
;
1193 if (!directive_state_stack
)
1195 as_bad (_("unmatched end directive"));
1196 *directive
= directive_none
;
1200 directive_state
[directive_state_stack
->directive
] = top
->old_state
;
1201 *directive
= top
->directive
;
1202 *negated
= top
->negated
;
1205 *datum
= top
->datum
;
1206 directive_state_stack
= top
->prev
;
1212 directive_balance (void)
1214 while (directive_state_stack
)
1216 directiveE directive
;
1217 bfd_boolean negated
;
1222 directive_pop (&directive
, &negated
, &file
, &line
, &datum
);
1223 as_warn_where ((char *) file
, line
,
1224 _(".begin directive with no matching .end directive"));
1230 inside_directive (directiveE dir
)
1232 state_stackS
*top
= directive_state_stack
;
1234 while (top
&& top
->directive
!= dir
)
1237 return (top
!= NULL
);
1242 get_directive (directiveE
*directive
, bfd_boolean
*negated
)
1246 const char *directive_string
;
1248 if (strncmp (input_line_pointer
, "no-", 3) != 0)
1253 input_line_pointer
+= 3;
1256 len
= strspn (input_line_pointer
,
1257 "abcdefghijklmnopqrstuvwxyz_-/0123456789.");
1259 /* This code is a hack to make .begin [no-][generics|relax] exactly
1260 equivalent to .begin [no-]transform. We should remove it when
1261 we stop accepting those options. */
1263 if (strncmp (input_line_pointer
, "generics", strlen ("generics")) == 0)
1265 as_warn (_("[no-]generics is deprecated; use [no-]transform instead"));
1266 directive_string
= "transform";
1268 else if (strncmp (input_line_pointer
, "relax", strlen ("relax")) == 0)
1270 as_warn (_("[no-]relax is deprecated; use [no-]transform instead"));
1271 directive_string
= "transform";
1274 directive_string
= input_line_pointer
;
1276 for (i
= 0; i
< sizeof (directive_info
) / sizeof (*directive_info
); ++i
)
1278 if (strncmp (directive_string
, directive_info
[i
].name
, len
) == 0)
1280 input_line_pointer
+= len
;
1281 *directive
= (directiveE
) i
;
1282 if (*negated
&& !directive_info
[i
].can_be_negated
)
1283 as_bad (_("directive %s cannot be negated"),
1284 directive_info
[i
].name
);
1289 as_bad (_("unknown directive"));
1290 *directive
= (directiveE
) XTENSA_UNDEFINED
;
1295 xtensa_begin_directive (int ignore ATTRIBUTE_UNUSED
)
1297 directiveE directive
;
1298 bfd_boolean negated
;
1302 get_directive (&directive
, &negated
);
1303 if (directive
== (directiveE
) XTENSA_UNDEFINED
)
1305 discard_rest_of_line ();
1309 if (cur_vinsn
.inside_bundle
)
1310 as_bad (_("directives are not valid inside bundles"));
1314 case directive_literal
:
1315 if (!inside_directive (directive_literal
))
1317 /* Previous labels go with whatever follows this directive, not with
1318 the literal, so save them now. */
1319 saved_insn_labels
= insn_labels
;
1322 as_warn (_(".begin literal is deprecated; use .literal instead"));
1323 state
= XNEW (emit_state
);
1324 xtensa_switch_to_literal_fragment (state
);
1325 directive_push (directive_literal
, negated
, state
);
1328 case directive_literal_prefix
:
1329 /* Have to flush pending output because a movi relaxed to an l32r
1330 might produce a literal. */
1331 md_flush_pending_output ();
1332 /* Check to see if the current fragment is a literal
1333 fragment. If it is, then this operation is not allowed. */
1334 if (generating_literals
)
1336 as_bad (_("cannot set literal_prefix inside literal fragment"));
1340 /* Allocate the literal state for this section and push
1341 onto the directive stack. */
1342 ls
= XNEW (lit_state
);
1345 *ls
= default_lit_sections
;
1346 directive_push (directive_literal_prefix
, negated
, ls
);
1348 /* Process the new prefix. */
1349 xtensa_literal_prefix ();
1352 case directive_freeregs
:
1353 /* This information is currently unused, but we'll accept the statement
1354 and just discard the rest of the line. This won't check the syntax,
1355 but it will accept every correct freeregs directive. */
1356 input_line_pointer
+= strcspn (input_line_pointer
, "\n");
1357 directive_push (directive_freeregs
, negated
, 0);
1360 case directive_schedule
:
1361 md_flush_pending_output ();
1362 frag_var (rs_fill
, 0, 0, frag_now
->fr_subtype
,
1363 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
1364 directive_push (directive_schedule
, negated
, 0);
1365 xtensa_set_frag_assembly_state (frag_now
);
1368 case directive_density
:
1369 as_warn (_(".begin [no-]density is ignored"));
1372 case directive_absolute_literals
:
1373 md_flush_pending_output ();
1374 if (!absolute_literals_supported
&& !negated
)
1376 as_warn (_("Xtensa absolute literals option not supported; ignored"));
1379 xtensa_set_frag_assembly_state (frag_now
);
1380 directive_push (directive
, negated
, 0);
1384 md_flush_pending_output ();
1385 xtensa_set_frag_assembly_state (frag_now
);
1386 directive_push (directive
, negated
, 0);
1390 demand_empty_rest_of_line ();
1395 xtensa_end_directive (int ignore ATTRIBUTE_UNUSED
)
1397 directiveE begin_directive
, end_directive
;
1398 bfd_boolean begin_negated
, end_negated
;
1402 emit_state
**state_ptr
;
1405 if (cur_vinsn
.inside_bundle
)
1406 as_bad (_("directives are not valid inside bundles"));
1408 get_directive (&end_directive
, &end_negated
);
1410 md_flush_pending_output ();
1412 switch ((int) end_directive
)
1414 case XTENSA_UNDEFINED
:
1415 discard_rest_of_line ();
1418 case (int) directive_density
:
1419 as_warn (_(".end [no-]density is ignored"));
1420 demand_empty_rest_of_line ();
1423 case (int) directive_absolute_literals
:
1424 if (!absolute_literals_supported
&& !end_negated
)
1426 as_warn (_("Xtensa absolute literals option not supported; ignored"));
1427 demand_empty_rest_of_line ();
1436 state_ptr
= &state
; /* use state_ptr to avoid type-punning warning */
1437 directive_pop (&begin_directive
, &begin_negated
, &file
, &line
,
1438 (const void **) state_ptr
);
1440 if (begin_directive
!= directive_none
)
1442 if (begin_directive
!= end_directive
|| begin_negated
!= end_negated
)
1444 as_bad (_("does not match begin %s%s at %s:%d"),
1445 begin_negated
? "no-" : "",
1446 directive_info
[begin_directive
].name
, file
, line
);
1450 switch (end_directive
)
1452 case directive_literal
:
1453 frag_var (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
1454 xtensa_restore_emit_state (state
);
1455 xtensa_set_frag_assembly_state (frag_now
);
1457 if (!inside_directive (directive_literal
))
1459 /* Restore the list of current labels. */
1460 xtensa_clear_insn_labels ();
1461 insn_labels
= saved_insn_labels
;
1465 case directive_literal_prefix
:
1466 /* Restore the default collection sections from saved state. */
1467 s
= (lit_state
*) state
;
1469 default_lit_sections
= *s
;
1471 /* Free the state storage. */
1472 free (s
->lit_prefix
);
1476 case directive_schedule
:
1477 case directive_freeregs
:
1481 xtensa_set_frag_assembly_state (frag_now
);
1487 demand_empty_rest_of_line ();
1491 /* Place an aligned literal fragment at the current location. */
1494 xtensa_literal_position (int ignore ATTRIBUTE_UNUSED
)
1496 md_flush_pending_output ();
1498 if (inside_directive (directive_literal
))
1499 as_warn (_(".literal_position inside literal directive; ignoring"));
1500 xtensa_mark_literal_pool_location ();
1502 demand_empty_rest_of_line ();
1503 xtensa_clear_insn_labels ();
1507 /* Support .literal label, expr, ... */
1510 xtensa_literal_pseudo (int ignored ATTRIBUTE_UNUSED
)
1513 char *p
, *base_name
;
1517 if (inside_directive (directive_literal
))
1519 as_bad (_(".literal not allowed inside .begin literal region"));
1520 ignore_rest_of_line ();
1524 md_flush_pending_output ();
1526 /* Previous labels go with whatever follows this directive, not with
1527 the literal, so save them now. */
1528 saved_insn_labels
= insn_labels
;
1531 /* If we are using text-section literals, then this is the right value... */
1534 base_name
= input_line_pointer
;
1536 xtensa_switch_to_literal_fragment (&state
);
1538 /* ...but if we aren't using text-section-literals, then we
1539 need to put them in the section we just switched to. */
1540 if (use_literal_section
|| directive_state
[directive_absolute_literals
])
1543 /* FIXME, despite the previous comments, dest_seg is unused... */
1546 /* All literals are aligned to four-byte boundaries. */
1547 frag_align (2, 0, 0);
1548 record_alignment (now_seg
, 2);
1550 c
= get_symbol_name (&base_name
);
1551 /* Just after name is now '\0'. */
1552 p
= input_line_pointer
;
1554 SKIP_WHITESPACE_AFTER_NAME ();
1556 if (*input_line_pointer
!= ',' && *input_line_pointer
!= ':')
1558 as_bad (_("expected comma or colon after symbol name; "
1559 "rest of line ignored"));
1560 ignore_rest_of_line ();
1561 xtensa_restore_emit_state (&state
);
1569 input_line_pointer
++; /* skip ',' or ':' */
1571 xtensa_elf_cons (4);
1573 xtensa_restore_emit_state (&state
);
1575 /* Restore the list of current labels. */
1576 xtensa_clear_insn_labels ();
1577 insn_labels
= saved_insn_labels
;
1582 xtensa_literal_prefix (void)
1587 /* Parse the new prefix from the input_line_pointer. */
1589 len
= strspn (input_line_pointer
,
1590 "ABCDEFGHIJKLMNOPQRSTUVWXYZ"
1591 "abcdefghijklmnopqrstuvwxyz_/0123456789.$");
1593 /* Get a null-terminated copy of the name. */
1594 name
= xmemdup0 (input_line_pointer
, len
);
1596 /* Skip the name in the input line. */
1597 input_line_pointer
+= len
;
1599 default_lit_sections
.lit_prefix
= name
;
1601 /* Clear cached literal sections, since the prefix has changed. */
1602 default_lit_sections
.lit_seg
= NULL
;
1603 default_lit_sections
.lit4_seg
= NULL
;
1607 /* Support ".frequency branch_target_frequency fall_through_frequency". */
1610 xtensa_frequency_pseudo (int ignored ATTRIBUTE_UNUSED
)
1612 float fall_through_f
, target_f
;
1614 fall_through_f
= (float) strtod (input_line_pointer
, &input_line_pointer
);
1615 if (fall_through_f
< 0)
1617 as_bad (_("fall through frequency must be greater than 0"));
1618 ignore_rest_of_line ();
1622 target_f
= (float) strtod (input_line_pointer
, &input_line_pointer
);
1625 as_bad (_("branch target frequency must be greater than 0"));
1626 ignore_rest_of_line ();
1630 set_subseg_freq (now_seg
, now_subseg
, target_f
+ fall_through_f
, target_f
);
1632 demand_empty_rest_of_line ();
1636 /* Like normal .long/.short/.word, except support @plt, etc.
1637 Clobbers input_line_pointer, checks end-of-line. */
1640 xtensa_elf_cons (int nbytes
)
1643 bfd_reloc_code_real_type reloc
;
1645 md_flush_pending_output ();
1647 if (cur_vinsn
.inside_bundle
)
1648 as_bad (_("directives are not valid inside bundles"));
1650 if (is_it_end_of_statement ())
1652 demand_empty_rest_of_line ();
1659 if (exp
.X_op
== O_symbol
1660 && *input_line_pointer
== '@'
1661 && ((reloc
= xtensa_elf_suffix (&input_line_pointer
, &exp
))
1664 reloc_howto_type
*reloc_howto
=
1665 bfd_reloc_type_lookup (stdoutput
, reloc
);
1667 if (reloc
== BFD_RELOC_UNUSED
|| !reloc_howto
)
1668 as_bad (_("unsupported relocation"));
1669 else if ((reloc
>= BFD_RELOC_XTENSA_SLOT0_OP
1670 && reloc
<= BFD_RELOC_XTENSA_SLOT14_OP
)
1671 || (reloc
>= BFD_RELOC_XTENSA_SLOT0_ALT
1672 && reloc
<= BFD_RELOC_XTENSA_SLOT14_ALT
))
1673 as_bad (_("opcode-specific %s relocation used outside "
1674 "an instruction"), reloc_howto
->name
);
1675 else if (nbytes
!= (int) bfd_get_reloc_size (reloc_howto
))
1676 as_bad (_("%s relocations do not fit in %d bytes"),
1677 reloc_howto
->name
, nbytes
);
1678 else if (reloc
== BFD_RELOC_XTENSA_TLS_FUNC
1679 || reloc
== BFD_RELOC_XTENSA_TLS_ARG
1680 || reloc
== BFD_RELOC_XTENSA_TLS_CALL
)
1681 as_bad (_("invalid use of %s relocation"), reloc_howto
->name
);
1684 char *p
= frag_more ((int) nbytes
);
1685 xtensa_set_frag_assembly_state (frag_now
);
1686 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
,
1687 nbytes
, &exp
, reloc_howto
->pc_relative
, reloc
);
1692 xtensa_set_frag_assembly_state (frag_now
);
1693 emit_expr (&exp
, (unsigned int) nbytes
);
1696 while (*input_line_pointer
++ == ',');
1698 input_line_pointer
--; /* Put terminator back into stream. */
1699 demand_empty_rest_of_line ();
1702 static bfd_boolean is_leb128_expr
;
1705 xtensa_leb128 (int sign
)
1707 is_leb128_expr
= TRUE
;
1709 is_leb128_expr
= FALSE
;
1713 /* Parsing and Idiom Translation. */
1715 /* Parse @plt, etc. and return the desired relocation. */
1716 static bfd_reloc_code_real_type
1717 xtensa_elf_suffix (char **str_p
, expressionS
*exp_p
)
1724 struct suffix_reloc_map
*ptr
;
1727 return BFD_RELOC_NONE
;
1729 for (ch
= *str
, str2
= ident
;
1730 (str2
< ident
+ sizeof (ident
) - 1
1731 && (ISALNUM (ch
) || ch
== '@'));
1734 *str2
++ = (ISLOWER (ch
)) ? ch
: TOLOWER (ch
);
1741 for (ptr
= &suffix_relocs
[0]; ptr
->length
> 0; ptr
++)
1742 if (ch
== ptr
->suffix
[0]
1743 && len
== ptr
->length
1744 && memcmp (ident
, ptr
->suffix
, ptr
->length
) == 0)
1746 /* Now check for "identifier@suffix+constant". */
1747 if (*str
== '-' || *str
== '+')
1749 char *orig_line
= input_line_pointer
;
1750 expressionS new_exp
;
1752 input_line_pointer
= str
;
1753 expression (&new_exp
);
1754 if (new_exp
.X_op
== O_constant
)
1756 exp_p
->X_add_number
+= new_exp
.X_add_number
;
1757 str
= input_line_pointer
;
1760 if (&input_line_pointer
!= str_p
)
1761 input_line_pointer
= orig_line
;
1768 return BFD_RELOC_UNUSED
;
1772 /* Find the matching operator type. */
1774 map_suffix_reloc_to_operator (bfd_reloc_code_real_type reloc
)
1776 struct suffix_reloc_map
*sfx
;
1777 operatorT
operator = O_illegal
;
1779 for (sfx
= &suffix_relocs
[0]; sfx
->suffix
; sfx
++)
1781 if (sfx
->reloc
== reloc
)
1783 operator = sfx
->operator;
1787 gas_assert (operator != O_illegal
);
1792 /* Find the matching reloc type. */
1793 static bfd_reloc_code_real_type
1794 map_operator_to_reloc (unsigned char operator, bfd_boolean is_literal
)
1796 struct suffix_reloc_map
*sfx
;
1797 bfd_reloc_code_real_type reloc
= BFD_RELOC_UNUSED
;
1799 for (sfx
= &suffix_relocs
[0]; sfx
->suffix
; sfx
++)
1801 if (sfx
->operator == operator)
1810 if (reloc
== BFD_RELOC_XTENSA_TLS_FUNC
)
1811 return BFD_RELOC_XTENSA_TLSDESC_FN
;
1812 else if (reloc
== BFD_RELOC_XTENSA_TLS_ARG
)
1813 return BFD_RELOC_XTENSA_TLSDESC_ARG
;
1816 if (reloc
== BFD_RELOC_UNUSED
)
1817 return BFD_RELOC_32
;
1824 expression_end (const char *name
)
1847 #define ERROR_REG_NUM ((unsigned) -1)
1850 tc_get_register (const char *prefix
)
1853 const char *next_expr
;
1854 const char *old_line_pointer
;
1857 old_line_pointer
= input_line_pointer
;
1859 if (*input_line_pointer
== '$')
1860 ++input_line_pointer
;
1862 /* Accept "sp" as a synonym for "a1". */
1863 if (input_line_pointer
[0] == 's' && input_line_pointer
[1] == 'p'
1864 && expression_end (input_line_pointer
+ 2))
1866 input_line_pointer
+= 2;
1867 return 1; /* AR[1] */
1870 while (*input_line_pointer
++ == *prefix
++)
1872 --input_line_pointer
;
1877 as_bad (_("bad register name: %s"), old_line_pointer
);
1878 return ERROR_REG_NUM
;
1881 if (!ISDIGIT ((unsigned char) *input_line_pointer
))
1883 as_bad (_("bad register number: %s"), input_line_pointer
);
1884 return ERROR_REG_NUM
;
1889 while (ISDIGIT ((int) *input_line_pointer
))
1890 reg
= reg
* 10 + *input_line_pointer
++ - '0';
1892 if (!(next_expr
= expression_end (input_line_pointer
)))
1894 as_bad (_("bad register name: %s"), old_line_pointer
);
1895 return ERROR_REG_NUM
;
1898 input_line_pointer
= (char *) next_expr
;
1905 expression_maybe_register (xtensa_opcode opc
, int opnd
, expressionS
*tok
)
1907 xtensa_isa isa
= xtensa_default_isa
;
1909 /* Check if this is an immediate operand. */
1910 if (xtensa_operand_is_register (isa
, opc
, opnd
) == 0)
1912 bfd_reloc_code_real_type reloc
;
1913 segT t
= expression (tok
);
1915 if (t
== absolute_section
1916 && xtensa_operand_is_PCrelative (isa
, opc
, opnd
) == 1)
1918 gas_assert (tok
->X_op
== O_constant
);
1919 tok
->X_op
= O_symbol
;
1920 tok
->X_add_symbol
= &abs_symbol
;
1923 if ((tok
->X_op
== O_constant
|| tok
->X_op
== O_symbol
)
1924 && ((reloc
= xtensa_elf_suffix (&input_line_pointer
, tok
))
1929 case BFD_RELOC_LO16
:
1930 if (tok
->X_op
== O_constant
)
1932 tok
->X_add_number
&= 0xffff;
1936 case BFD_RELOC_HI16
:
1937 if (tok
->X_op
== O_constant
)
1939 tok
->X_add_number
= ((unsigned) tok
->X_add_number
) >> 16;
1943 case BFD_RELOC_UNUSED
:
1944 as_bad (_("unsupported relocation"));
1946 case BFD_RELOC_32_PCREL
:
1947 as_bad (_("pcrel relocation not allowed in an instruction"));
1952 tok
->X_op
= map_suffix_reloc_to_operator (reloc
);
1957 xtensa_regfile opnd_rf
= xtensa_operand_regfile (isa
, opc
, opnd
);
1958 unsigned reg
= tc_get_register (xtensa_regfile_shortname (isa
, opnd_rf
));
1960 if (reg
!= ERROR_REG_NUM
) /* Already errored */
1963 if (xtensa_operand_encode (isa
, opc
, opnd
, &buf
))
1964 as_bad (_("register number out of range"));
1967 tok
->X_op
= O_register
;
1968 tok
->X_add_symbol
= 0;
1969 tok
->X_add_number
= reg
;
1974 /* Split up the arguments for an opcode or pseudo-op. */
1977 tokenize_arguments (char **args
, char *str
)
1979 char *old_input_line_pointer
;
1980 bfd_boolean saw_comma
= FALSE
;
1981 bfd_boolean saw_arg
= FALSE
;
1982 bfd_boolean saw_colon
= FALSE
;
1984 char *arg_end
, *arg
;
1987 /* Save and restore input_line_pointer around this function. */
1988 old_input_line_pointer
= input_line_pointer
;
1989 input_line_pointer
= str
;
1991 while (*input_line_pointer
)
1994 switch (*input_line_pointer
)
2001 input_line_pointer
++;
2002 if (saw_comma
|| saw_colon
|| !saw_arg
)
2008 input_line_pointer
++;
2009 if (saw_comma
|| saw_colon
|| !saw_arg
)
2015 if (!saw_comma
&& !saw_colon
&& saw_arg
)
2018 arg_end
= input_line_pointer
+ 1;
2019 while (!expression_end (arg_end
))
2022 arg_len
= arg_end
- input_line_pointer
;
2023 arg
= XNEWVEC (char, (saw_colon
? 1 : 0) + arg_len
+ 1);
2024 args
[num_args
] = arg
;
2028 strncpy (arg
, input_line_pointer
, arg_len
);
2029 arg
[arg_len
] = '\0';
2031 input_line_pointer
= arg_end
;
2041 if (saw_comma
|| saw_colon
)
2043 input_line_pointer
= old_input_line_pointer
;
2048 as_bad (_("extra comma"));
2050 as_bad (_("extra colon"));
2052 as_bad (_("missing argument"));
2054 as_bad (_("missing comma or colon"));
2055 input_line_pointer
= old_input_line_pointer
;
2060 /* Parse the arguments to an opcode. Return TRUE on error. */
2063 parse_arguments (TInsn
*insn
, int num_args
, char **arg_strings
)
2065 expressionS
*tok
, *last_tok
;
2066 xtensa_opcode opcode
= insn
->opcode
;
2067 bfd_boolean had_error
= TRUE
;
2068 xtensa_isa isa
= xtensa_default_isa
;
2069 int n
, num_regs
= 0;
2070 int opcode_operand_count
;
2071 int opnd_cnt
, last_opnd_cnt
;
2072 unsigned int next_reg
= 0;
2073 char *old_input_line_pointer
;
2075 if (insn
->insn_type
== ITYPE_LITERAL
)
2076 opcode_operand_count
= 1;
2078 opcode_operand_count
= xtensa_opcode_num_operands (isa
, opcode
);
2081 memset (tok
, 0, sizeof (*tok
) * MAX_INSN_ARGS
);
2083 /* Save and restore input_line_pointer around this function. */
2084 old_input_line_pointer
= input_line_pointer
;
2090 /* Skip invisible operands. */
2091 while (xtensa_operand_is_visible (isa
, opcode
, opnd_cnt
) == 0)
2097 for (n
= 0; n
< num_args
; n
++)
2099 input_line_pointer
= arg_strings
[n
];
2100 if (*input_line_pointer
== ':')
2102 xtensa_regfile opnd_rf
;
2103 input_line_pointer
++;
2106 gas_assert (opnd_cnt
> 0);
2108 opnd_rf
= xtensa_operand_regfile (isa
, opcode
, last_opnd_cnt
);
2110 != tc_get_register (xtensa_regfile_shortname (isa
, opnd_rf
)))
2111 as_warn (_("incorrect register number, ignoring"));
2116 if (opnd_cnt
>= opcode_operand_count
)
2118 as_warn (_("too many arguments"));
2121 gas_assert (opnd_cnt
< MAX_INSN_ARGS
);
2123 expression_maybe_register (opcode
, opnd_cnt
, tok
);
2124 next_reg
= tok
->X_add_number
+ 1;
2126 if (tok
->X_op
== O_illegal
|| tok
->X_op
== O_absent
)
2128 if (xtensa_operand_is_register (isa
, opcode
, opnd_cnt
) == 1)
2130 num_regs
= xtensa_operand_num_regs (isa
, opcode
, opnd_cnt
) - 1;
2131 /* minus 1 because we are seeing one right now */
2137 last_opnd_cnt
= opnd_cnt
;
2138 demand_empty_rest_of_line ();
2145 while (xtensa_operand_is_visible (isa
, opcode
, opnd_cnt
) == 0);
2149 if (num_regs
> 0 && ((int) next_reg
!= last_tok
->X_add_number
+ 1))
2152 insn
->ntok
= tok
- insn
->tok
;
2156 input_line_pointer
= old_input_line_pointer
;
2162 get_invisible_operands (TInsn
*insn
)
2164 xtensa_isa isa
= xtensa_default_isa
;
2165 static xtensa_insnbuf slotbuf
= NULL
;
2167 xtensa_opcode opc
= insn
->opcode
;
2168 int slot
, opnd
, fmt_found
;
2172 slotbuf
= xtensa_insnbuf_alloc (isa
);
2174 /* Find format/slot where this can be encoded. */
2177 for (fmt
= 0; fmt
< xtensa_isa_num_formats (isa
); fmt
++)
2179 for (slot
= 0; slot
< xtensa_format_num_slots (isa
, fmt
); slot
++)
2181 if (xtensa_opcode_encode (isa
, fmt
, slot
, slotbuf
, opc
) == 0)
2187 if (fmt_found
) break;
2192 as_bad (_("cannot encode opcode \"%s\""), xtensa_opcode_name (isa
, opc
));
2196 /* First encode all the visible operands
2197 (to deal with shared field operands). */
2198 for (opnd
= 0; opnd
< insn
->ntok
; opnd
++)
2200 if (xtensa_operand_is_visible (isa
, opc
, opnd
) == 1
2201 && (insn
->tok
[opnd
].X_op
== O_register
2202 || insn
->tok
[opnd
].X_op
== O_constant
))
2204 val
= insn
->tok
[opnd
].X_add_number
;
2205 xtensa_operand_encode (isa
, opc
, opnd
, &val
);
2206 xtensa_operand_set_field (isa
, opc
, opnd
, fmt
, slot
, slotbuf
, val
);
2210 /* Then pull out the values for the invisible ones. */
2211 for (opnd
= 0; opnd
< insn
->ntok
; opnd
++)
2213 if (xtensa_operand_is_visible (isa
, opc
, opnd
) == 0)
2215 xtensa_operand_get_field (isa
, opc
, opnd
, fmt
, slot
, slotbuf
, &val
);
2216 xtensa_operand_decode (isa
, opc
, opnd
, &val
);
2217 insn
->tok
[opnd
].X_add_number
= val
;
2218 if (xtensa_operand_is_register (isa
, opc
, opnd
) == 1)
2219 insn
->tok
[opnd
].X_op
= O_register
;
2221 insn
->tok
[opnd
].X_op
= O_constant
;
2230 xg_reverse_shift_count (char **cnt_argp
)
2232 char *cnt_arg
, *new_arg
;
2233 cnt_arg
= *cnt_argp
;
2235 /* replace the argument with "31-(argument)" */
2236 new_arg
= concat ("31-(", cnt_argp
, ")", (char *) NULL
);
2239 *cnt_argp
= new_arg
;
2243 /* If "arg" is a constant expression, return non-zero with the value
2247 xg_arg_is_constant (char *arg
, offsetT
*valp
)
2250 char *save_ptr
= input_line_pointer
;
2252 input_line_pointer
= arg
;
2254 input_line_pointer
= save_ptr
;
2256 if (exp
.X_op
== O_constant
)
2258 *valp
= exp
.X_add_number
;
2267 xg_replace_opname (char **popname
, const char *newop
)
2270 *popname
= xstrdup (newop
);
2275 xg_check_num_args (int *pnum_args
,
2280 int num_args
= *pnum_args
;
2282 if (num_args
< expected_num
)
2284 as_bad (_("not enough operands (%d) for '%s'; expected %d"),
2285 num_args
, opname
, expected_num
);
2289 if (num_args
> expected_num
)
2291 as_warn (_("too many operands (%d) for '%s'; expected %d"),
2292 num_args
, opname
, expected_num
);
2293 while (num_args
-- > expected_num
)
2295 free (arg_strings
[num_args
]);
2296 arg_strings
[num_args
] = 0;
2298 *pnum_args
= expected_num
;
2306 /* If the register is not specified as part of the opcode,
2307 then get it from the operand and move it to the opcode. */
2310 xg_translate_sysreg_op (char **popname
, int *pnum_args
, char **arg_strings
)
2312 xtensa_isa isa
= xtensa_default_isa
;
2314 char *opname
, *new_opname
;
2315 const char *sr_name
;
2316 int is_user
, is_write
;
2321 is_user
= (opname
[1] == 'u');
2322 is_write
= (opname
[0] == 'w');
2324 /* Opname == [rw]ur or [rwx]sr... */
2326 if (xg_check_num_args (pnum_args
, 2, opname
, arg_strings
))
2329 /* Check if the argument is a symbolic register name. */
2330 sr
= xtensa_sysreg_lookup_name (isa
, arg_strings
[1]);
2331 /* Handle WSR to "INTSET" as a special case. */
2332 if (sr
== XTENSA_UNDEFINED
&& is_write
&& !is_user
2333 && !strcasecmp (arg_strings
[1], "intset"))
2334 sr
= xtensa_sysreg_lookup_name (isa
, "interrupt");
2335 if (sr
== XTENSA_UNDEFINED
2336 || (xtensa_sysreg_is_user (isa
, sr
) == 1) != is_user
)
2338 /* Maybe it's a register number.... */
2340 if (!xg_arg_is_constant (arg_strings
[1], &val
))
2342 as_bad (_("invalid register '%s' for '%s' instruction"),
2343 arg_strings
[1], opname
);
2346 sr
= xtensa_sysreg_lookup (isa
, val
, is_user
);
2347 if (sr
== XTENSA_UNDEFINED
)
2349 as_bad (_("invalid register number (%ld) for '%s' instruction"),
2350 (long) val
, opname
);
2355 /* Remove the last argument, which is now part of the opcode. */
2356 free (arg_strings
[1]);
2360 /* Translate the opcode. */
2361 sr_name
= xtensa_sysreg_name (isa
, sr
);
2362 /* Another special case for "WSR.INTSET".... */
2363 if (is_write
&& !is_user
&& !strcasecmp ("interrupt", sr_name
))
2365 new_opname
= concat (*popname
, ".", sr_name
, (char *) NULL
);
2367 *popname
= new_opname
;
2374 xtensa_translate_old_userreg_ops (char **popname
)
2376 xtensa_isa isa
= xtensa_default_isa
;
2378 char *opname
, *new_opname
;
2379 const char *sr_name
;
2380 bfd_boolean has_underbar
= FALSE
;
2383 if (opname
[0] == '_')
2385 has_underbar
= TRUE
;
2389 sr
= xtensa_sysreg_lookup_name (isa
, opname
+ 1);
2390 if (sr
!= XTENSA_UNDEFINED
)
2392 /* The new default name ("nnn") is different from the old default
2393 name ("URnnn"). The old default is handled below, and we don't
2394 want to recognize [RW]nnn, so do nothing if the name is the (new)
2396 static char namebuf
[10];
2397 sprintf (namebuf
, "%d", xtensa_sysreg_number (isa
, sr
));
2398 if (strcmp (namebuf
, opname
+ 1) == 0)
2406 /* Only continue if the reg name is "URnnn". */
2407 if (opname
[1] != 'u' || opname
[2] != 'r')
2409 val
= strtoul (opname
+ 3, &end
, 10);
2413 sr
= xtensa_sysreg_lookup (isa
, val
, 1);
2414 if (sr
== XTENSA_UNDEFINED
)
2416 as_bad (_("invalid register number (%ld) for '%s'"),
2417 (long) val
, opname
);
2422 /* Translate the opcode. */
2423 sr_name
= xtensa_sysreg_name (isa
, sr
);
2424 new_opname
= XNEWVEC (char, strlen (sr_name
) + 6);
2425 sprintf (new_opname
, "%s%cur.%s", (has_underbar
? "_" : ""),
2426 opname
[0], sr_name
);
2428 *popname
= new_opname
;
2435 xtensa_translate_zero_immed (const char *old_op
,
2445 gas_assert (opname
[0] != '_');
2447 if (strcmp (opname
, old_op
) != 0)
2450 if (xg_check_num_args (pnum_args
, 3, opname
, arg_strings
))
2452 if (xg_arg_is_constant (arg_strings
[1], &val
) && val
== 0)
2454 xg_replace_opname (popname
, new_op
);
2455 free (arg_strings
[1]);
2456 arg_strings
[1] = arg_strings
[2];
2465 /* If the instruction is an idiom (i.e., a built-in macro), translate it.
2466 Returns non-zero if an error was found. */
2469 xg_translate_idioms (char **popname
, int *pnum_args
, char **arg_strings
)
2471 char *opname
= *popname
;
2472 bfd_boolean has_underbar
= FALSE
;
2476 has_underbar
= TRUE
;
2480 if (strcmp (opname
, "mov") == 0)
2482 if (use_transform () && !has_underbar
&& density_supported
)
2483 xg_replace_opname (popname
, "mov.n");
2486 if (xg_check_num_args (pnum_args
, 2, opname
, arg_strings
))
2488 xg_replace_opname (popname
, (has_underbar
? "_or" : "or"));
2489 arg_strings
[2] = xstrdup (arg_strings
[1]);
2495 if (strcmp (opname
, "bbsi.l") == 0)
2497 if (xg_check_num_args (pnum_args
, 3, opname
, arg_strings
))
2499 xg_replace_opname (popname
, (has_underbar
? "_bbsi" : "bbsi"));
2500 if (target_big_endian
)
2501 xg_reverse_shift_count (&arg_strings
[1]);
2505 if (strcmp (opname
, "bbci.l") == 0)
2507 if (xg_check_num_args (pnum_args
, 3, opname
, arg_strings
))
2509 xg_replace_opname (popname
, (has_underbar
? "_bbci" : "bbci"));
2510 if (target_big_endian
)
2511 xg_reverse_shift_count (&arg_strings
[1]);
2515 /* Don't do anything special with NOPs inside FLIX instructions. They
2516 are handled elsewhere. Real NOP instructions are always available
2517 in configurations with FLIX, so this should never be an issue but
2518 check for it anyway. */
2519 if (!cur_vinsn
.inside_bundle
&& xtensa_nop_opcode
== XTENSA_UNDEFINED
2520 && strcmp (opname
, "nop") == 0)
2522 if (use_transform () && !has_underbar
&& density_supported
)
2523 xg_replace_opname (popname
, "nop.n");
2526 if (xg_check_num_args (pnum_args
, 0, opname
, arg_strings
))
2528 xg_replace_opname (popname
, (has_underbar
? "_or" : "or"));
2529 arg_strings
[0] = xstrdup ("a1");
2530 arg_strings
[1] = xstrdup ("a1");
2531 arg_strings
[2] = xstrdup ("a1");
2537 /* Recognize [RW]UR and [RWX]SR. */
2538 if ((((opname
[0] == 'r' || opname
[0] == 'w')
2539 && (opname
[1] == 'u' || opname
[1] == 's'))
2540 || (opname
[0] == 'x' && opname
[1] == 's'))
2542 && opname
[3] == '\0')
2543 return xg_translate_sysreg_op (popname
, pnum_args
, arg_strings
);
2545 /* Backward compatibility for RUR and WUR: Recognize [RW]UR<nnn> and
2546 [RW]<name> if <name> is the non-default name of a user register. */
2547 if ((opname
[0] == 'r' || opname
[0] == 'w')
2548 && xtensa_opcode_lookup (xtensa_default_isa
, opname
) == XTENSA_UNDEFINED
)
2549 return xtensa_translate_old_userreg_ops (popname
);
2551 /* Relax branches that don't allow comparisons against an immediate value
2552 of zero to the corresponding branches with implicit zero immediates. */
2553 if (!has_underbar
&& use_transform ())
2555 if (xtensa_translate_zero_immed ("bnei", "bnez", popname
,
2556 pnum_args
, arg_strings
))
2559 if (xtensa_translate_zero_immed ("beqi", "beqz", popname
,
2560 pnum_args
, arg_strings
))
2563 if (xtensa_translate_zero_immed ("bgei", "bgez", popname
,
2564 pnum_args
, arg_strings
))
2567 if (xtensa_translate_zero_immed ("blti", "bltz", popname
,
2568 pnum_args
, arg_strings
))
2576 /* Functions for dealing with the Xtensa ISA. */
2578 /* Currently the assembler only allows us to use a single target per
2579 fragment. Because of this, only one operand for a given
2580 instruction may be symbolic. If there is a PC-relative operand,
2581 the last one is chosen. Otherwise, the result is the number of the
2582 last immediate operand, and if there are none of those, we fail and
2586 get_relaxable_immed (xtensa_opcode opcode
)
2588 int last_immed
= -1;
2591 if (opcode
== XTENSA_UNDEFINED
)
2594 noperands
= xtensa_opcode_num_operands (xtensa_default_isa
, opcode
);
2595 for (opi
= noperands
- 1; opi
>= 0; opi
--)
2597 if (xtensa_operand_is_visible (xtensa_default_isa
, opcode
, opi
) == 0)
2599 if (xtensa_operand_is_PCrelative (xtensa_default_isa
, opcode
, opi
) == 1)
2601 if (last_immed
== -1
2602 && xtensa_operand_is_register (xtensa_default_isa
, opcode
, opi
) == 0)
2609 static xtensa_opcode
2610 get_opcode_from_buf (const char *buf
, int slot
)
2612 static xtensa_insnbuf insnbuf
= NULL
;
2613 static xtensa_insnbuf slotbuf
= NULL
;
2614 xtensa_isa isa
= xtensa_default_isa
;
2619 insnbuf
= xtensa_insnbuf_alloc (isa
);
2620 slotbuf
= xtensa_insnbuf_alloc (isa
);
2623 xtensa_insnbuf_from_chars (isa
, insnbuf
, (const unsigned char *) buf
, 0);
2624 fmt
= xtensa_format_decode (isa
, insnbuf
);
2625 if (fmt
== XTENSA_UNDEFINED
)
2626 return XTENSA_UNDEFINED
;
2628 if (slot
>= xtensa_format_num_slots (isa
, fmt
))
2629 return XTENSA_UNDEFINED
;
2631 xtensa_format_get_slot (isa
, fmt
, slot
, insnbuf
, slotbuf
);
2632 return xtensa_opcode_decode (isa
, fmt
, slot
, slotbuf
);
2636 #ifdef TENSILICA_DEBUG
2638 /* For debugging, print out the mapping of opcode numbers to opcodes. */
2641 xtensa_print_insn_table (void)
2643 int num_opcodes
, num_operands
;
2644 xtensa_opcode opcode
;
2645 xtensa_isa isa
= xtensa_default_isa
;
2647 num_opcodes
= xtensa_isa_num_opcodes (xtensa_default_isa
);
2648 for (opcode
= 0; opcode
< num_opcodes
; opcode
++)
2651 fprintf (stderr
, "%d: %s: ", opcode
, xtensa_opcode_name (isa
, opcode
));
2652 num_operands
= xtensa_opcode_num_operands (isa
, opcode
);
2653 for (opn
= 0; opn
< num_operands
; opn
++)
2655 if (xtensa_operand_is_visible (isa
, opcode
, opn
) == 0)
2657 if (xtensa_operand_is_register (isa
, opcode
, opn
) == 1)
2659 xtensa_regfile opnd_rf
=
2660 xtensa_operand_regfile (isa
, opcode
, opn
);
2661 fprintf (stderr
, "%s ", xtensa_regfile_shortname (isa
, opnd_rf
));
2663 else if (xtensa_operand_is_PCrelative (isa
, opcode
, opn
) == 1)
2664 fputs ("[lLr] ", stderr
);
2666 fputs ("i ", stderr
);
2668 fprintf (stderr
, "\n");
2674 print_vliw_insn (xtensa_insnbuf vbuf
)
2676 xtensa_isa isa
= xtensa_default_isa
;
2677 xtensa_format f
= xtensa_format_decode (isa
, vbuf
);
2678 xtensa_insnbuf sbuf
= xtensa_insnbuf_alloc (isa
);
2681 fprintf (stderr
, "format = %d\n", f
);
2683 for (op
= 0; op
< xtensa_format_num_slots (isa
, f
); op
++)
2685 xtensa_opcode opcode
;
2689 xtensa_format_get_slot (isa
, f
, op
, vbuf
, sbuf
);
2690 opcode
= xtensa_opcode_decode (isa
, f
, op
, sbuf
);
2691 opname
= xtensa_opcode_name (isa
, opcode
);
2693 fprintf (stderr
, "op in slot %i is %s;\n", op
, opname
);
2694 fprintf (stderr
, " operands = ");
2696 operands
< xtensa_opcode_num_operands (isa
, opcode
);
2700 if (xtensa_operand_is_visible (isa
, opcode
, operands
) == 0)
2702 xtensa_operand_get_field (isa
, opcode
, operands
, f
, op
, sbuf
, &val
);
2703 xtensa_operand_decode (isa
, opcode
, operands
, &val
);
2704 fprintf (stderr
, "%d ", val
);
2706 fprintf (stderr
, "\n");
2708 xtensa_insnbuf_free (isa
, sbuf
);
2711 #endif /* TENSILICA_DEBUG */
2715 is_direct_call_opcode (xtensa_opcode opcode
)
2717 xtensa_isa isa
= xtensa_default_isa
;
2718 int n
, num_operands
;
2720 if (xtensa_opcode_is_call (isa
, opcode
) != 1)
2723 num_operands
= xtensa_opcode_num_operands (isa
, opcode
);
2724 for (n
= 0; n
< num_operands
; n
++)
2726 if (xtensa_operand_is_register (isa
, opcode
, n
) == 0
2727 && xtensa_operand_is_PCrelative (isa
, opcode
, n
) == 1)
2734 /* Convert from BFD relocation type code to slot and operand number.
2735 Returns non-zero on failure. */
2738 decode_reloc (bfd_reloc_code_real_type reloc
, int *slot
, bfd_boolean
*is_alt
)
2740 if (reloc
>= BFD_RELOC_XTENSA_SLOT0_OP
2741 && reloc
<= BFD_RELOC_XTENSA_SLOT14_OP
)
2743 *slot
= reloc
- BFD_RELOC_XTENSA_SLOT0_OP
;
2746 else if (reloc
>= BFD_RELOC_XTENSA_SLOT0_ALT
2747 && reloc
<= BFD_RELOC_XTENSA_SLOT14_ALT
)
2749 *slot
= reloc
- BFD_RELOC_XTENSA_SLOT0_ALT
;
2759 /* Convert from slot number to BFD relocation type code for the
2760 standard PC-relative relocations. Return BFD_RELOC_NONE on
2763 static bfd_reloc_code_real_type
2764 encode_reloc (int slot
)
2766 if (slot
< 0 || slot
> 14)
2767 return BFD_RELOC_NONE
;
2769 return BFD_RELOC_XTENSA_SLOT0_OP
+ slot
;
2773 /* Convert from slot numbers to BFD relocation type code for the
2774 "alternate" relocations. Return BFD_RELOC_NONE on failure. */
2776 static bfd_reloc_code_real_type
2777 encode_alt_reloc (int slot
)
2779 if (slot
< 0 || slot
> 14)
2780 return BFD_RELOC_NONE
;
2782 return BFD_RELOC_XTENSA_SLOT0_ALT
+ slot
;
2787 xtensa_insnbuf_set_operand (xtensa_insnbuf slotbuf
,
2790 xtensa_opcode opcode
,
2796 uint32 valbuf
= value
;
2798 if (xtensa_operand_encode (xtensa_default_isa
, opcode
, operand
, &valbuf
))
2800 if (xtensa_operand_is_PCrelative (xtensa_default_isa
, opcode
, operand
)
2802 as_bad_where ((char *) file
, line
,
2803 _("operand %d of '%s' has out of range value '%u'"),
2805 xtensa_opcode_name (xtensa_default_isa
, opcode
),
2808 as_bad_where ((char *) file
, line
,
2809 _("operand %d of '%s' has invalid value '%u'"),
2811 xtensa_opcode_name (xtensa_default_isa
, opcode
),
2816 xtensa_operand_set_field (xtensa_default_isa
, opcode
, operand
, fmt
, slot
,
2822 xtensa_insnbuf_get_operand (xtensa_insnbuf slotbuf
,
2825 xtensa_opcode opcode
,
2829 (void) xtensa_operand_get_field (xtensa_default_isa
, opcode
, opnum
,
2830 fmt
, slot
, slotbuf
, &val
);
2831 (void) xtensa_operand_decode (xtensa_default_isa
, opcode
, opnum
, &val
);
2836 /* Checks for rules from xtensa-relax tables. */
2838 /* The routine xg_instruction_matches_option_term must return TRUE
2839 when a given option term is true. The meaning of all of the option
2840 terms is given interpretation by this function. */
2843 xg_instruction_matches_option_term (TInsn
*insn
, const ReqOrOption
*option
)
2845 if (strcmp (option
->option_name
, "realnop") == 0
2846 || strncmp (option
->option_name
, "IsaUse", 6) == 0)
2848 /* These conditions were evaluated statically when building the
2849 relaxation table. There's no need to reevaluate them now. */
2852 else if (strcmp (option
->option_name
, "FREEREG") == 0)
2853 return insn
->extra_arg
.X_op
== O_register
;
2856 as_fatal (_("internal error: unknown option name '%s'"),
2857 option
->option_name
);
2863 xg_instruction_matches_or_options (TInsn
*insn
,
2864 const ReqOrOptionList
*or_option
)
2866 const ReqOrOption
*option
;
2867 /* Must match each of the AND terms. */
2868 for (option
= or_option
; option
!= NULL
; option
= option
->next
)
2870 if (xg_instruction_matches_option_term (insn
, option
))
2878 xg_instruction_matches_options (TInsn
*insn
, const ReqOptionList
*options
)
2880 const ReqOption
*req_options
;
2881 /* Must match each of the AND terms. */
2882 for (req_options
= options
;
2883 req_options
!= NULL
;
2884 req_options
= req_options
->next
)
2886 /* Must match one of the OR clauses. */
2887 if (!xg_instruction_matches_or_options (insn
,
2888 req_options
->or_option_terms
))
2895 /* Return the transition rule that matches or NULL if none matches. */
2898 xg_instruction_matches_rule (TInsn
*insn
, TransitionRule
*rule
)
2900 PreconditionList
*condition_l
;
2902 if (rule
->opcode
!= insn
->opcode
)
2905 for (condition_l
= rule
->conditions
;
2906 condition_l
!= NULL
;
2907 condition_l
= condition_l
->next
)
2911 Precondition
*cond
= condition_l
->precond
;
2916 /* The expression must be the constant. */
2917 gas_assert (cond
->op_num
< insn
->ntok
);
2918 exp1
= &insn
->tok
[cond
->op_num
];
2919 if (expr_is_const (exp1
))
2924 if (get_expr_const (exp1
) != cond
->op_data
)
2928 if (get_expr_const (exp1
) == cond
->op_data
)
2935 else if (expr_is_register (exp1
))
2940 if (get_expr_register (exp1
) != cond
->op_data
)
2944 if (get_expr_register (exp1
) == cond
->op_data
)
2956 gas_assert (cond
->op_num
< insn
->ntok
);
2957 gas_assert (cond
->op_data
< insn
->ntok
);
2958 exp1
= &insn
->tok
[cond
->op_num
];
2959 exp2
= &insn
->tok
[cond
->op_data
];
2964 if (!expr_is_equal (exp1
, exp2
))
2968 if (expr_is_equal (exp1
, exp2
))
2980 if (!xg_instruction_matches_options (insn
, rule
->options
))
2988 transition_rule_cmp (const TransitionRule
*a
, const TransitionRule
*b
)
2990 bfd_boolean a_greater
= FALSE
;
2991 bfd_boolean b_greater
= FALSE
;
2993 ReqOptionList
*l_a
= a
->options
;
2994 ReqOptionList
*l_b
= b
->options
;
2996 /* We only care if they both are the same except for
2997 a const16 vs. an l32r. */
2999 while (l_a
&& l_b
&& ((l_a
->next
== NULL
) == (l_b
->next
== NULL
)))
3001 ReqOrOptionList
*l_or_a
= l_a
->or_option_terms
;
3002 ReqOrOptionList
*l_or_b
= l_b
->or_option_terms
;
3003 while (l_or_a
&& l_or_b
&& ((l_a
->next
== NULL
) == (l_b
->next
== NULL
)))
3005 if (l_or_a
->is_true
!= l_or_b
->is_true
)
3007 if (strcmp (l_or_a
->option_name
, l_or_b
->option_name
) != 0)
3009 /* This is the case we care about. */
3010 if (strcmp (l_or_a
->option_name
, "IsaUseConst16") == 0
3011 && strcmp (l_or_b
->option_name
, "IsaUseL32R") == 0)
3018 else if (strcmp (l_or_a
->option_name
, "IsaUseL32R") == 0
3019 && strcmp (l_or_b
->option_name
, "IsaUseConst16") == 0)
3029 l_or_a
= l_or_a
->next
;
3030 l_or_b
= l_or_b
->next
;
3032 if (l_or_a
|| l_or_b
)
3041 /* Incomparable if the substitution was used differently in two cases. */
3042 if (a_greater
&& b_greater
)
3054 static TransitionRule
*
3055 xg_instruction_match (TInsn
*insn
)
3057 TransitionTable
*table
= xg_build_simplify_table (&transition_rule_cmp
);
3059 gas_assert (insn
->opcode
< table
->num_opcodes
);
3061 /* Walk through all of the possible transitions. */
3062 for (l
= table
->table
[insn
->opcode
]; l
!= NULL
; l
= l
->next
)
3064 TransitionRule
*rule
= l
->rule
;
3065 if (xg_instruction_matches_rule (insn
, rule
))
3072 /* Various Other Internal Functions. */
3075 is_unique_insn_expansion (TransitionRule
*r
)
3077 if (!r
->to_instr
|| r
->to_instr
->next
!= NULL
)
3079 if (r
->to_instr
->typ
!= INSTR_INSTR
)
3085 /* Check if there is exactly one relaxation for INSN that converts it to
3086 another instruction of equal or larger size. If so, and if TARG is
3087 non-null, go ahead and generate the relaxed instruction into TARG. If
3088 NARROW_ONLY is true, then only consider relaxations that widen a narrow
3089 instruction, i.e., ignore relaxations that convert to an instruction of
3090 equal size. In some contexts where this function is used, only
3091 a single widening is allowed and the NARROW_ONLY argument is used to
3092 exclude cases like ADDI being "widened" to an ADDMI, which may
3093 later be relaxed to an ADDMI/ADDI pair. */
3096 xg_is_single_relaxable_insn (TInsn
*insn
, TInsn
*targ
, bfd_boolean narrow_only
)
3098 TransitionTable
*table
= xg_build_widen_table (&transition_rule_cmp
);
3100 TransitionRule
*match
= 0;
3102 gas_assert (insn
->insn_type
== ITYPE_INSN
);
3103 gas_assert (insn
->opcode
< table
->num_opcodes
);
3105 for (l
= table
->table
[insn
->opcode
]; l
!= NULL
; l
= l
->next
)
3107 TransitionRule
*rule
= l
->rule
;
3109 if (xg_instruction_matches_rule (insn
, rule
)
3110 && is_unique_insn_expansion (rule
)
3111 && (xg_get_single_size (insn
->opcode
) + (narrow_only
? 1 : 0)
3112 <= xg_get_single_size (rule
->to_instr
->opcode
)))
3123 xg_build_to_insn (targ
, insn
, match
->to_instr
);
3128 /* Return the maximum number of bytes this opcode can expand to. */
3131 xg_get_max_insn_widen_size (xtensa_opcode opcode
)
3133 TransitionTable
*table
= xg_build_widen_table (&transition_rule_cmp
);
3135 int max_size
= xg_get_single_size (opcode
);
3137 gas_assert (opcode
< table
->num_opcodes
);
3139 for (l
= table
->table
[opcode
]; l
!= NULL
; l
= l
->next
)
3141 TransitionRule
*rule
= l
->rule
;
3142 BuildInstr
*build_list
;
3147 build_list
= rule
->to_instr
;
3148 if (is_unique_insn_expansion (rule
))
3150 gas_assert (build_list
->typ
== INSTR_INSTR
);
3151 this_size
= xg_get_max_insn_widen_size (build_list
->opcode
);
3154 for (; build_list
!= NULL
; build_list
= build_list
->next
)
3156 switch (build_list
->typ
)
3159 this_size
+= xg_get_single_size (build_list
->opcode
);
3161 case INSTR_LITERAL_DEF
:
3162 case INSTR_LABEL_DEF
:
3167 if (this_size
> max_size
)
3168 max_size
= this_size
;
3174 /* Return the maximum number of literal bytes this opcode can generate. */
3177 xg_get_max_insn_widen_literal_size (xtensa_opcode opcode
)
3179 TransitionTable
*table
= xg_build_widen_table (&transition_rule_cmp
);
3183 gas_assert (opcode
< table
->num_opcodes
);
3185 for (l
= table
->table
[opcode
]; l
!= NULL
; l
= l
->next
)
3187 TransitionRule
*rule
= l
->rule
;
3188 BuildInstr
*build_list
;
3193 build_list
= rule
->to_instr
;
3194 if (is_unique_insn_expansion (rule
))
3196 gas_assert (build_list
->typ
== INSTR_INSTR
);
3197 this_size
= xg_get_max_insn_widen_literal_size (build_list
->opcode
);
3200 for (; build_list
!= NULL
; build_list
= build_list
->next
)
3202 switch (build_list
->typ
)
3204 case INSTR_LITERAL_DEF
:
3205 /* Hard-coded 4-byte literal. */
3209 case INSTR_LABEL_DEF
:
3214 if (this_size
> max_size
)
3215 max_size
= this_size
;
3222 xg_is_relaxable_insn (TInsn
*insn
, int lateral_steps
)
3224 int steps_taken
= 0;
3225 TransitionTable
*table
= xg_build_widen_table (&transition_rule_cmp
);
3228 gas_assert (insn
->insn_type
== ITYPE_INSN
);
3229 gas_assert (insn
->opcode
< table
->num_opcodes
);
3231 for (l
= table
->table
[insn
->opcode
]; l
!= NULL
; l
= l
->next
)
3233 TransitionRule
*rule
= l
->rule
;
3235 if (xg_instruction_matches_rule (insn
, rule
))
3237 if (steps_taken
== lateral_steps
)
3247 get_special_literal_symbol (void)
3249 static symbolS
*sym
= NULL
;
3252 sym
= symbol_find_or_make ("SPECIAL_LITERAL0\001");
3258 get_special_label_symbol (void)
3260 static symbolS
*sym
= NULL
;
3263 sym
= symbol_find_or_make ("SPECIAL_LABEL0\001");
3269 xg_valid_literal_expression (const expressionS
*exp
)
3291 /* This will check to see if the value can be converted into the
3292 operand type. It will return TRUE if it does not fit. */
3295 xg_check_operand (int32 value
, xtensa_opcode opcode
, int operand
)
3297 uint32 valbuf
= value
;
3298 if (xtensa_operand_encode (xtensa_default_isa
, opcode
, operand
, &valbuf
))
3304 /* Assumes: All immeds are constants. Check that all constants fit
3305 into their immeds; return FALSE if not. */
3308 xg_immeds_fit (const TInsn
*insn
)
3310 xtensa_isa isa
= xtensa_default_isa
;
3314 gas_assert (insn
->insn_type
== ITYPE_INSN
);
3315 for (i
= 0; i
< n
; ++i
)
3317 const expressionS
*exp
= &insn
->tok
[i
];
3319 if (xtensa_operand_is_register (isa
, insn
->opcode
, i
) == 1)
3326 if (xg_check_operand (exp
->X_add_number
, insn
->opcode
, i
))
3331 /* The symbol should have a fixup associated with it. */
3340 /* This should only be called after we have an initial
3341 estimate of the addresses. */
3344 xg_symbolic_immeds_fit (const TInsn
*insn
,
3350 xtensa_isa isa
= xtensa_default_isa
;
3358 gas_assert (insn
->insn_type
== ITYPE_INSN
);
3360 for (i
= 0; i
< n
; ++i
)
3362 const expressionS
*exp
= &insn
->tok
[i
];
3364 if (xtensa_operand_is_register (isa
, insn
->opcode
, i
) == 1)
3371 if (xg_check_operand (exp
->X_add_number
, insn
->opcode
, i
))
3377 /* Check for the worst case. */
3378 if (xg_check_operand (0xffff, insn
->opcode
, i
))
3383 /* We only allow symbols for PC-relative references.
3384 If pc_frag == 0, then we don't have frag locations yet. */
3386 || xtensa_operand_is_PCrelative (isa
, insn
->opcode
, i
) == 0)
3389 /* If it is a weak symbol or a symbol in a different section,
3390 it cannot be known to fit at assembly time. */
3391 if (S_IS_WEAK (exp
->X_add_symbol
)
3392 || S_GET_SEGMENT (exp
->X_add_symbol
) != pc_seg
)
3394 /* For a direct call with --no-longcalls, be optimistic and
3395 assume it will be in range. If the symbol is weak and
3396 undefined, it may remain undefined at link-time, in which
3397 case it will have a zero value and almost certainly be out
3398 of range for a direct call; thus, relax for undefined weak
3399 symbols even if longcalls is not enabled. */
3400 if (is_direct_call_opcode (insn
->opcode
)
3401 && ! pc_frag
->tc_frag_data
.use_longcalls
3402 && (! S_IS_WEAK (exp
->X_add_symbol
)
3403 || S_IS_DEFINED (exp
->X_add_symbol
)))
3409 symbolP
= exp
->X_add_symbol
;
3410 sym_frag
= symbol_get_frag (symbolP
);
3411 target
= S_GET_VALUE (symbolP
) + exp
->X_add_number
;
3412 pc
= pc_frag
->fr_address
+ pc_offset
;
3414 /* If frag has yet to be reached on this pass, assume it
3415 will move by STRETCH just as we did. If this is not so,
3416 it will be because some frag between grows, and that will
3417 force another pass. Beware zero-length frags. There
3418 should be a faster way to do this. */
3421 && sym_frag
->relax_marker
!= pc_frag
->relax_marker
3422 && S_GET_SEGMENT (symbolP
) == pc_seg
)
3427 new_offset
= target
;
3428 xtensa_operand_do_reloc (isa
, insn
->opcode
, i
, &new_offset
, pc
);
3429 if (xg_check_operand (new_offset
, insn
->opcode
, i
))
3434 /* The symbol should have a fixup associated with it. */
3443 /* Return TRUE on success. */
3446 xg_build_to_insn (TInsn
*targ
, TInsn
*insn
, BuildInstr
*bi
)
3452 targ
->debug_line
= insn
->debug_line
;
3453 targ
->loc_directive_seen
= insn
->loc_directive_seen
;
3458 targ
->opcode
= bi
->opcode
;
3459 targ
->insn_type
= ITYPE_INSN
;
3460 targ
->is_specific_opcode
= FALSE
;
3462 for (; op
!= NULL
; op
= op
->next
)
3464 int op_num
= op
->op_num
;
3465 int op_data
= op
->op_data
;
3467 gas_assert (op
->op_num
< MAX_INSN_ARGS
);
3469 if (targ
->ntok
<= op_num
)
3470 targ
->ntok
= op_num
+ 1;
3475 set_expr_const (&targ
->tok
[op_num
], op_data
);
3478 gas_assert (op_data
< insn
->ntok
);
3479 copy_expr (&targ
->tok
[op_num
], &insn
->tok
[op_data
]);
3482 if (insn
->extra_arg
.X_op
!= O_register
)
3484 copy_expr (&targ
->tok
[op_num
], &insn
->extra_arg
);
3487 sym
= get_special_literal_symbol ();
3488 set_expr_symbol_offset (&targ
->tok
[op_num
], sym
, 0);
3489 if (insn
->tok
[op_data
].X_op
== O_tlsfunc
3490 || insn
->tok
[op_data
].X_op
== O_tlsarg
)
3491 copy_expr (&targ
->extra_arg
, &insn
->tok
[op_data
]);
3494 sym
= get_special_label_symbol ();
3495 set_expr_symbol_offset (&targ
->tok
[op_num
], sym
, 0);
3497 case OP_OPERAND_HI16U
:
3498 case OP_OPERAND_LOW16U
:
3499 gas_assert (op_data
< insn
->ntok
);
3500 if (expr_is_const (&insn
->tok
[op_data
]))
3503 copy_expr (&targ
->tok
[op_num
], &insn
->tok
[op_data
]);
3504 val
= xg_apply_userdef_op_fn (op
->typ
,
3507 targ
->tok
[op_num
].X_add_number
= val
;
3511 /* For const16 we can create relocations for these. */
3512 if (targ
->opcode
== XTENSA_UNDEFINED
3513 || (targ
->opcode
!= xtensa_const16_opcode
))
3515 gas_assert (op_data
< insn
->ntok
);
3516 /* Need to build a O_lo16 or O_hi16. */
3517 copy_expr (&targ
->tok
[op_num
], &insn
->tok
[op_data
]);
3518 if (targ
->tok
[op_num
].X_op
== O_symbol
)
3520 if (op
->typ
== OP_OPERAND_HI16U
)
3521 targ
->tok
[op_num
].X_op
= O_hi16
;
3522 else if (op
->typ
== OP_OPERAND_LOW16U
)
3523 targ
->tok
[op_num
].X_op
= O_lo16
;
3530 /* currently handles:
3533 OP_OPERAND_F32MINUS */
3534 if (xg_has_userdef_op_fn (op
->typ
))
3536 gas_assert (op_data
< insn
->ntok
);
3537 if (expr_is_const (&insn
->tok
[op_data
]))
3540 copy_expr (&targ
->tok
[op_num
], &insn
->tok
[op_data
]);
3541 val
= xg_apply_userdef_op_fn (op
->typ
,
3544 targ
->tok
[op_num
].X_add_number
= val
;
3547 return FALSE
; /* We cannot use a relocation for this. */
3556 case INSTR_LITERAL_DEF
:
3558 targ
->opcode
= XTENSA_UNDEFINED
;
3559 targ
->insn_type
= ITYPE_LITERAL
;
3560 targ
->is_specific_opcode
= FALSE
;
3561 for (; op
!= NULL
; op
= op
->next
)
3563 int op_num
= op
->op_num
;
3564 int op_data
= op
->op_data
;
3565 gas_assert (op
->op_num
< MAX_INSN_ARGS
);
3567 if (targ
->ntok
<= op_num
)
3568 targ
->ntok
= op_num
+ 1;
3573 gas_assert (op_data
< insn
->ntok
);
3574 /* We can only pass resolvable literals through. */
3575 if (!xg_valid_literal_expression (&insn
->tok
[op_data
]))
3577 copy_expr (&targ
->tok
[op_num
], &insn
->tok
[op_data
]);
3589 case INSTR_LABEL_DEF
:
3591 targ
->opcode
= XTENSA_UNDEFINED
;
3592 targ
->insn_type
= ITYPE_LABEL
;
3593 targ
->is_specific_opcode
= FALSE
;
3594 /* Literal with no ops is a label? */
3595 gas_assert (op
== NULL
);
3606 /* Return TRUE on success. */
3609 xg_build_to_stack (IStack
*istack
, TInsn
*insn
, BuildInstr
*bi
)
3611 for (; bi
!= NULL
; bi
= bi
->next
)
3613 TInsn
*next_insn
= istack_push_space (istack
);
3615 if (!xg_build_to_insn (next_insn
, insn
, bi
))
3622 /* Return TRUE on valid expansion. */
3625 xg_expand_to_stack (IStack
*istack
, TInsn
*insn
, int lateral_steps
)
3627 int stack_size
= istack
->ninsn
;
3628 int steps_taken
= 0;
3629 TransitionTable
*table
= xg_build_widen_table (&transition_rule_cmp
);
3632 gas_assert (insn
->insn_type
== ITYPE_INSN
);
3633 gas_assert (insn
->opcode
< table
->num_opcodes
);
3635 for (l
= table
->table
[insn
->opcode
]; l
!= NULL
; l
= l
->next
)
3637 TransitionRule
*rule
= l
->rule
;
3639 if (xg_instruction_matches_rule (insn
, rule
))
3641 if (lateral_steps
== steps_taken
)
3645 /* This is it. Expand the rule to the stack. */
3646 if (!xg_build_to_stack (istack
, insn
, rule
->to_instr
))
3649 /* Check to see if it fits. */
3650 for (i
= stack_size
; i
< istack
->ninsn
; i
++)
3652 TInsn
*tinsn
= &istack
->insn
[i
];
3654 if (tinsn
->insn_type
== ITYPE_INSN
3655 && !tinsn_has_symbolic_operands (tinsn
)
3656 && !xg_immeds_fit (tinsn
))
3658 istack
->ninsn
= stack_size
;
3671 /* Relax the assembly instruction at least "min_steps".
3672 Return the number of steps taken.
3674 For relaxation to correctly terminate, every relaxation chain must
3675 terminate in one of two ways:
3677 1. If the chain from one instruction to the next consists entirely of
3678 single instructions, then the chain *must* handle all possible
3679 immediates without failing. It must not ever fail because an
3680 immediate is out of range. The MOVI.N -> MOVI -> L32R relaxation
3681 chain is one example. L32R loads 32 bits, and there cannot be an
3682 immediate larger than 32 bits, so it satisfies this condition.
3683 Single instruction relaxation chains are as defined by
3684 xg_is_single_relaxable_instruction.
3686 2. Otherwise, the chain must end in a multi-instruction expansion: e.g.,
3687 BNEZ.N -> BNEZ -> BNEZ.W15 -> BENZ.N/J
3689 Strictly speaking, in most cases you can violate condition 1 and be OK
3690 -- in particular when the last two instructions have the same single
3691 size. But nevertheless, you should guarantee the above two conditions.
3693 We could fix this so that single-instruction expansions correctly
3694 terminate when they can't handle the range, but the error messages are
3695 worse, and it actually turns out that in every case but one (18-bit wide
3696 branches), you need a multi-instruction expansion to get the full range
3697 anyway. And because 18-bit branches are handled identically to 15-bit
3698 branches, there isn't any point in changing it. */
3701 xg_assembly_relax (IStack
*istack
,
3704 fragS
*pc_frag
, /* if pc_frag == 0, not pc-relative */
3705 offsetT pc_offset
, /* offset in fragment */
3706 int min_steps
, /* minimum conversion steps */
3707 long stretch
) /* number of bytes stretched so far */
3709 int steps_taken
= 0;
3711 /* Some of its immeds don't fit. Try to build a relaxed version.
3712 This may go through a couple of stages of single instruction
3713 transformations before we get there. */
3715 TInsn single_target
;
3717 int lateral_steps
= 0;
3718 int istack_size
= istack
->ninsn
;
3720 if (xg_symbolic_immeds_fit (insn
, pc_seg
, pc_frag
, pc_offset
, stretch
)
3721 && steps_taken
>= min_steps
)
3723 istack_push (istack
, insn
);
3726 current_insn
= *insn
;
3728 /* Walk through all of the single instruction expansions. */
3729 while (xg_is_single_relaxable_insn (¤t_insn
, &single_target
, FALSE
))
3732 if (xg_symbolic_immeds_fit (&single_target
, pc_seg
, pc_frag
, pc_offset
,
3735 if (steps_taken
>= min_steps
)
3737 istack_push (istack
, &single_target
);
3741 current_insn
= single_target
;
3744 /* Now check for a multi-instruction expansion. */
3745 while (xg_is_relaxable_insn (¤t_insn
, lateral_steps
))
3747 if (xg_symbolic_immeds_fit (¤t_insn
, pc_seg
, pc_frag
, pc_offset
,
3750 if (steps_taken
>= min_steps
)
3752 istack_push (istack
, ¤t_insn
);
3757 if (xg_expand_to_stack (istack
, ¤t_insn
, lateral_steps
))
3759 if (steps_taken
>= min_steps
)
3763 istack
->ninsn
= istack_size
;
3766 /* It's not going to work -- use the original. */
3767 istack_push (istack
, insn
);
3773 xg_finish_frag (char *last_insn
,
3774 enum xtensa_relax_statesE frag_state
,
3775 enum xtensa_relax_statesE slot0_state
,
3777 bfd_boolean is_insn
)
3779 /* Finish off this fragment so that it has at LEAST the desired
3780 max_growth. If it doesn't fit in this fragment, close this one
3781 and start a new one. In either case, return a pointer to the
3782 beginning of the growth area. */
3786 frag_grow (max_growth
);
3787 old_frag
= frag_now
;
3789 frag_now
->fr_opcode
= last_insn
;
3791 frag_now
->tc_frag_data
.is_insn
= TRUE
;
3793 frag_var (rs_machine_dependent
, max_growth
, max_growth
,
3794 frag_state
, frag_now
->fr_symbol
, frag_now
->fr_offset
, last_insn
);
3796 old_frag
->tc_frag_data
.slot_subtypes
[0] = slot0_state
;
3797 xtensa_set_frag_assembly_state (frag_now
);
3799 /* Just to make sure that we did not split it up. */
3800 gas_assert (old_frag
->fr_next
== frag_now
);
3804 /* Return TRUE if the target frag is one of the next non-empty frags. */
3807 is_next_frag_target (const fragS
*fragP
, const fragS
*target
)
3812 for (; fragP
; fragP
= fragP
->fr_next
)
3814 if (fragP
== target
)
3816 if (fragP
->fr_fix
!= 0)
3818 if (fragP
->fr_type
== rs_fill
&& fragP
->fr_offset
!= 0)
3820 if ((fragP
->fr_type
== rs_align
|| fragP
->fr_type
== rs_align_code
)
3821 && ((fragP
->fr_address
% (1 << fragP
->fr_offset
)) != 0))
3823 if (fragP
->fr_type
== rs_space
)
3831 is_branch_jmp_to_next (TInsn
*insn
, fragS
*fragP
)
3833 xtensa_isa isa
= xtensa_default_isa
;
3835 int num_ops
= xtensa_opcode_num_operands (isa
, insn
->opcode
);
3840 if (xtensa_opcode_is_branch (isa
, insn
->opcode
) != 1
3841 && xtensa_opcode_is_jump (isa
, insn
->opcode
) != 1)
3844 for (i
= 0; i
< num_ops
; i
++)
3846 if (xtensa_operand_is_PCrelative (isa
, insn
->opcode
, i
) == 1)
3852 if (target_op
== -1)
3855 if (insn
->ntok
<= target_op
)
3858 if (insn
->tok
[target_op
].X_op
!= O_symbol
)
3861 sym
= insn
->tok
[target_op
].X_add_symbol
;
3865 if (insn
->tok
[target_op
].X_add_number
!= 0)
3868 target_frag
= symbol_get_frag (sym
);
3869 if (target_frag
== NULL
)
3872 if (is_next_frag_target (fragP
->fr_next
, target_frag
)
3873 && S_GET_VALUE (sym
) == target_frag
->fr_address
)
3881 xg_add_branch_and_loop_targets (TInsn
*insn
)
3883 xtensa_isa isa
= xtensa_default_isa
;
3884 int num_ops
= xtensa_opcode_num_operands (isa
, insn
->opcode
);
3886 if (xtensa_opcode_is_loop (isa
, insn
->opcode
) == 1)
3889 if (xtensa_operand_is_PCrelative (isa
, insn
->opcode
, i
) == 1
3890 && insn
->tok
[i
].X_op
== O_symbol
)
3891 symbol_get_tc (insn
->tok
[i
].X_add_symbol
)->is_loop_target
= TRUE
;
3895 if (xtensa_opcode_is_branch (isa
, insn
->opcode
) == 1
3896 || xtensa_opcode_is_loop (isa
, insn
->opcode
) == 1)
3900 for (i
= 0; i
< insn
->ntok
&& i
< num_ops
; i
++)
3902 if (xtensa_operand_is_PCrelative (isa
, insn
->opcode
, i
) == 1
3903 && insn
->tok
[i
].X_op
== O_symbol
)
3905 symbolS
*sym
= insn
->tok
[i
].X_add_symbol
;
3906 symbol_get_tc (sym
)->is_branch_target
= TRUE
;
3907 if (S_IS_DEFINED (sym
))
3908 symbol_get_frag (sym
)->tc_frag_data
.is_branch_target
= TRUE
;
3915 /* Return FALSE if no error. */
3918 xg_build_token_insn (BuildInstr
*instr_spec
, TInsn
*old_insn
, TInsn
*new_insn
)
3923 switch (instr_spec
->typ
)
3926 new_insn
->insn_type
= ITYPE_INSN
;
3927 new_insn
->opcode
= instr_spec
->opcode
;
3929 case INSTR_LITERAL_DEF
:
3930 new_insn
->insn_type
= ITYPE_LITERAL
;
3931 new_insn
->opcode
= XTENSA_UNDEFINED
;
3933 case INSTR_LABEL_DEF
:
3936 new_insn
->is_specific_opcode
= FALSE
;
3937 new_insn
->debug_line
= old_insn
->debug_line
;
3938 new_insn
->loc_directive_seen
= old_insn
->loc_directive_seen
;
3940 for (b_op
= instr_spec
->ops
; b_op
!= NULL
; b_op
= b_op
->next
)
3943 const expressionS
*src_exp
;
3949 /* The expression must be the constant. */
3950 gas_assert (b_op
->op_num
< MAX_INSN_ARGS
);
3951 exp
= &new_insn
->tok
[b_op
->op_num
];
3952 set_expr_const (exp
, b_op
->op_data
);
3956 gas_assert (b_op
->op_num
< MAX_INSN_ARGS
);
3957 gas_assert (b_op
->op_data
< (unsigned) old_insn
->ntok
);
3958 src_exp
= &old_insn
->tok
[b_op
->op_data
];
3959 exp
= &new_insn
->tok
[b_op
->op_num
];
3960 copy_expr (exp
, src_exp
);
3965 as_bad (_("can't handle generation of literal/labels yet"));
3969 as_bad (_("can't handle undefined OP TYPE"));
3974 new_insn
->ntok
= num_ops
;
3979 /* Return TRUE if it was simplified. */
3982 xg_simplify_insn (TInsn
*old_insn
, TInsn
*new_insn
)
3984 TransitionRule
*rule
;
3985 BuildInstr
*insn_spec
;
3987 if (old_insn
->is_specific_opcode
|| !density_supported
)
3990 rule
= xg_instruction_match (old_insn
);
3994 insn_spec
= rule
->to_instr
;
3995 /* There should only be one. */
3996 gas_assert (insn_spec
!= NULL
);
3997 gas_assert (insn_spec
->next
== NULL
);
3998 if (insn_spec
->next
!= NULL
)
4001 xg_build_token_insn (insn_spec
, old_insn
, new_insn
);
4007 /* xg_expand_assembly_insn: (1) Simplify the instruction, i.e., l32i ->
4008 l32i.n. (2) Check the number of operands. (3) Place the instruction
4009 tokens into the stack or relax it and place multiple
4010 instructions/literals onto the stack. Return FALSE if no error. */
4013 xg_expand_assembly_insn (IStack
*istack
, TInsn
*orig_insn
)
4017 bfd_boolean do_expand
;
4019 tinsn_init (&new_insn
);
4021 /* Narrow it if we can. xg_simplify_insn now does all the
4022 appropriate checking (e.g., for the density option). */
4023 if (xg_simplify_insn (orig_insn
, &new_insn
))
4024 orig_insn
= &new_insn
;
4026 noperands
= xtensa_opcode_num_operands (xtensa_default_isa
,
4028 if (orig_insn
->ntok
< noperands
)
4030 as_bad (_("found %d operands for '%s': Expected %d"),
4032 xtensa_opcode_name (xtensa_default_isa
, orig_insn
->opcode
),
4036 if (orig_insn
->ntok
> noperands
)
4037 as_warn (_("found too many (%d) operands for '%s': Expected %d"),
4039 xtensa_opcode_name (xtensa_default_isa
, orig_insn
->opcode
),
4042 /* If there are not enough operands, we will assert above. If there
4043 are too many, just cut out the extras here. */
4044 orig_insn
->ntok
= noperands
;
4046 if (tinsn_has_invalid_symbolic_operands (orig_insn
))
4049 /* Special case for extui opcode which has constraints not handled
4050 by the ordinary operand encoding checks. The number of operands
4051 and related syntax issues have already been checked. */
4052 if (orig_insn
->opcode
== xtensa_extui_opcode
)
4054 int shiftimm
= orig_insn
->tok
[2].X_add_number
;
4055 int maskimm
= orig_insn
->tok
[3].X_add_number
;
4056 if (shiftimm
+ maskimm
> 32)
4058 as_bad (_("immediate operands sum to greater than 32"));
4063 /* If the instruction will definitely need to be relaxed, it is better
4064 to expand it now for better scheduling. Decide whether to expand
4066 do_expand
= (!orig_insn
->is_specific_opcode
&& use_transform ());
4068 /* Calls should be expanded to longcalls only in the backend relaxation
4069 so that the assembly scheduler will keep the L32R/CALLX instructions
4071 if (is_direct_call_opcode (orig_insn
->opcode
))
4074 if (tinsn_has_symbolic_operands (orig_insn
))
4076 /* The values of symbolic operands are not known yet, so only expand
4077 now if an operand is "complex" (e.g., difference of symbols) and
4078 will have to be stored as a literal regardless of the value. */
4079 if (!tinsn_has_complex_operands (orig_insn
))
4082 else if (xg_immeds_fit (orig_insn
))
4086 xg_assembly_relax (istack
, orig_insn
, 0, 0, 0, 0, 0);
4088 istack_push (istack
, orig_insn
);
4094 /* Return TRUE if the section flags are marked linkonce
4095 or the name is .gnu.linkonce.*. */
4097 static int linkonce_len
= sizeof (".gnu.linkonce.") - 1;
4100 get_is_linkonce_section (bfd
*abfd ATTRIBUTE_UNUSED
, segT sec
)
4102 flagword flags
, link_once_flags
;
4104 flags
= bfd_get_section_flags (abfd
, sec
);
4105 link_once_flags
= (flags
& SEC_LINK_ONCE
);
4107 /* Flags might not be set yet. */
4108 if (!link_once_flags
4109 && strncmp (segment_name (sec
), ".gnu.linkonce.", linkonce_len
) == 0)
4110 link_once_flags
= SEC_LINK_ONCE
;
4112 return (link_once_flags
!= 0);
4117 xtensa_add_literal_sym (symbolS
*sym
)
4121 l
= XNEW (sym_list
);
4123 l
->next
= literal_syms
;
4129 xtensa_create_literal_symbol (segT sec
, fragS
*frag
)
4131 static int lit_num
= 0;
4132 static char name
[256];
4135 sprintf (name
, ".L_lit_sym%d", lit_num
);
4137 /* Create a local symbol. If it is in a linkonce section, we have to
4138 be careful to make sure that if it is used in a relocation that the
4139 symbol will be in the output file. */
4140 if (get_is_linkonce_section (stdoutput
, sec
))
4142 symbolP
= symbol_new (name
, sec
, 0, frag
);
4143 S_CLEAR_EXTERNAL (symbolP
);
4144 /* symbolP->local = 1; */
4147 symbolP
= symbol_new (name
, sec
, 0, frag
);
4149 xtensa_add_literal_sym (symbolP
);
4156 /* Currently all literals that are generated here are 32-bit L32R targets. */
4159 xg_assemble_literal (/* const */ TInsn
*insn
)
4162 symbolS
*lit_sym
= NULL
;
4163 bfd_reloc_code_real_type reloc
;
4164 bfd_boolean pcrel
= FALSE
;
4167 /* size = 4 for L32R. It could easily be larger when we move to
4168 larger constants. Add a parameter later. */
4169 offsetT litsize
= 4;
4170 offsetT litalign
= 2; /* 2^2 = 4 */
4171 expressionS saved_loc
;
4172 expressionS
* emit_val
;
4174 set_expr_symbol_offset (&saved_loc
, frag_now
->fr_symbol
, frag_now_fix ());
4176 gas_assert (insn
->insn_type
== ITYPE_LITERAL
);
4177 gas_assert (insn
->ntok
== 1); /* must be only one token here */
4179 xtensa_switch_to_literal_fragment (&state
);
4181 emit_val
= &insn
->tok
[0];
4182 if (emit_val
->X_op
== O_big
)
4184 int size
= emit_val
->X_add_number
* CHARS_PER_LITTLENUM
;
4187 /* This happens when someone writes a "movi a2, big_number". */
4188 as_bad_where (frag_now
->fr_file
, frag_now
->fr_line
,
4189 _("invalid immediate"));
4190 xtensa_restore_emit_state (&state
);
4195 /* Force a 4-byte align here. Note that this opens a new frag, so all
4196 literals done with this function have a frag to themselves. That's
4197 important for the way text section literals work. */
4198 frag_align (litalign
, 0, 0);
4199 record_alignment (now_seg
, litalign
);
4201 switch (emit_val
->X_op
)
4211 p
= frag_more (litsize
);
4212 xtensa_set_frag_assembly_state (frag_now
);
4213 reloc
= map_operator_to_reloc (emit_val
->X_op
, TRUE
);
4214 if (emit_val
->X_add_symbol
)
4215 emit_val
->X_op
= O_symbol
;
4217 emit_val
->X_op
= O_constant
;
4218 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
,
4219 litsize
, emit_val
, pcrel
, reloc
);
4223 emit_expr (emit_val
, litsize
);
4227 gas_assert (frag_now
->tc_frag_data
.literal_frag
== NULL
);
4228 frag_now
->tc_frag_data
.literal_frag
= get_literal_pool_location (now_seg
);
4229 frag_now
->fr_symbol
= xtensa_create_literal_symbol (now_seg
, frag_now
);
4230 lit_sym
= frag_now
->fr_symbol
;
4233 xtensa_restore_emit_state (&state
);
4239 xg_assemble_literal_space (/* const */ int size
, int slot
)
4242 /* We might have to do something about this alignment. It only
4243 takes effect if something is placed here. */
4244 offsetT litalign
= 2; /* 2^2 = 4 */
4245 fragS
*lit_saved_frag
;
4247 gas_assert (size
% 4 == 0);
4249 xtensa_switch_to_literal_fragment (&state
);
4251 /* Force a 4-byte align here. */
4252 frag_align (litalign
, 0, 0);
4253 record_alignment (now_seg
, litalign
);
4257 lit_saved_frag
= frag_now
;
4258 frag_now
->tc_frag_data
.literal_frag
= get_literal_pool_location (now_seg
);
4259 frag_now
->fr_symbol
= xtensa_create_literal_symbol (now_seg
, frag_now
);
4260 xg_finish_frag (0, RELAX_LITERAL
, 0, size
, FALSE
);
4263 xtensa_restore_emit_state (&state
);
4264 frag_now
->tc_frag_data
.literal_frags
[slot
] = lit_saved_frag
;
4268 /* Put in a fixup record based on the opcode.
4269 Return TRUE on success. */
4272 xg_add_opcode_fix (TInsn
*tinsn
,
4280 xtensa_opcode opcode
= tinsn
->opcode
;
4281 bfd_reloc_code_real_type reloc
;
4282 reloc_howto_type
*howto
;
4286 reloc
= BFD_RELOC_NONE
;
4288 /* First try the special cases for "alternate" relocs. */
4289 if (opcode
== xtensa_l32r_opcode
)
4291 if (fragP
->tc_frag_data
.use_absolute_literals
)
4292 reloc
= encode_alt_reloc (slot
);
4294 else if (opcode
== xtensa_const16_opcode
)
4296 if (exp
->X_op
== O_lo16
)
4298 reloc
= encode_reloc (slot
);
4299 exp
->X_op
= O_symbol
;
4301 else if (exp
->X_op
== O_hi16
)
4303 reloc
= encode_alt_reloc (slot
);
4304 exp
->X_op
= O_symbol
;
4308 if (opnum
!= get_relaxable_immed (opcode
))
4310 as_bad (_("invalid relocation for operand %i of '%s'"),
4311 opnum
+ 1, xtensa_opcode_name (xtensa_default_isa
, opcode
));
4315 /* Handle erroneous "@h" and "@l" expressions here before they propagate
4316 into the symbol table where the generic portions of the assembler
4317 won't know what to do with them. */
4318 if (exp
->X_op
== O_lo16
|| exp
->X_op
== O_hi16
)
4320 as_bad (_("invalid expression for operand %i of '%s'"),
4321 opnum
+ 1, xtensa_opcode_name (xtensa_default_isa
, opcode
));
4325 /* Next try the generic relocs. */
4326 if (reloc
== BFD_RELOC_NONE
)
4327 reloc
= encode_reloc (slot
);
4328 if (reloc
== BFD_RELOC_NONE
)
4330 as_bad (_("invalid relocation in instruction slot %i"), slot
);
4334 howto
= bfd_reloc_type_lookup (stdoutput
, reloc
);
4337 as_bad (_("undefined symbol for opcode \"%s\""),
4338 xtensa_opcode_name (xtensa_default_isa
, opcode
));
4342 fmt_length
= xtensa_format_length (xtensa_default_isa
, fmt
);
4343 the_fix
= fix_new_exp (fragP
, offset
, fmt_length
, exp
,
4344 howto
->pc_relative
, reloc
);
4345 the_fix
->fx_no_overflow
= 1;
4346 the_fix
->tc_fix_data
.X_add_symbol
= exp
->X_add_symbol
;
4347 the_fix
->tc_fix_data
.X_add_number
= exp
->X_add_number
;
4348 the_fix
->tc_fix_data
.slot
= slot
;
4355 xg_emit_insn_to_buf (TInsn
*tinsn
,
4359 bfd_boolean build_fix
)
4361 static xtensa_insnbuf insnbuf
= NULL
;
4362 bfd_boolean has_symbolic_immed
= FALSE
;
4363 bfd_boolean ok
= TRUE
;
4366 insnbuf
= xtensa_insnbuf_alloc (xtensa_default_isa
);
4368 has_symbolic_immed
= tinsn_to_insnbuf (tinsn
, insnbuf
);
4369 if (has_symbolic_immed
&& build_fix
)
4372 xtensa_format fmt
= xg_get_single_format (tinsn
->opcode
);
4373 int slot
= xg_get_single_slot (tinsn
->opcode
);
4374 int opnum
= get_relaxable_immed (tinsn
->opcode
);
4375 expressionS
*exp
= &tinsn
->tok
[opnum
];
4377 if (!xg_add_opcode_fix (tinsn
, opnum
, fmt
, slot
, exp
, fragP
, offset
))
4380 fragP
->tc_frag_data
.is_insn
= TRUE
;
4381 xtensa_insnbuf_to_chars (xtensa_default_isa
, insnbuf
,
4382 (unsigned char *) buf
, 0);
4388 xg_resolve_literals (TInsn
*insn
, symbolS
*lit_sym
)
4390 symbolS
*sym
= get_special_literal_symbol ();
4394 gas_assert (insn
->insn_type
== ITYPE_INSN
);
4395 for (i
= 0; i
< insn
->ntok
; i
++)
4396 if (insn
->tok
[i
].X_add_symbol
== sym
)
4397 insn
->tok
[i
].X_add_symbol
= lit_sym
;
4403 xg_resolve_labels (TInsn
*insn
, symbolS
*label_sym
)
4405 symbolS
*sym
= get_special_label_symbol ();
4407 for (i
= 0; i
< insn
->ntok
; i
++)
4408 if (insn
->tok
[i
].X_add_symbol
== sym
)
4409 insn
->tok
[i
].X_add_symbol
= label_sym
;
4414 /* Return TRUE if the instruction can write to the specified
4415 integer register. */
4418 is_register_writer (const TInsn
*insn
, const char *regset
, int regnum
)
4422 xtensa_isa isa
= xtensa_default_isa
;
4424 num_ops
= xtensa_opcode_num_operands (isa
, insn
->opcode
);
4426 for (i
= 0; i
< num_ops
; i
++)
4429 inout
= xtensa_operand_inout (isa
, insn
->opcode
, i
);
4430 if ((inout
== 'o' || inout
== 'm')
4431 && xtensa_operand_is_register (isa
, insn
->opcode
, i
) == 1)
4433 xtensa_regfile opnd_rf
=
4434 xtensa_operand_regfile (isa
, insn
->opcode
, i
);
4435 if (!strcmp (xtensa_regfile_shortname (isa
, opnd_rf
), regset
))
4437 if ((insn
->tok
[i
].X_op
== O_register
)
4438 && (insn
->tok
[i
].X_add_number
== regnum
))
4448 is_bad_loopend_opcode (const TInsn
*tinsn
)
4450 xtensa_opcode opcode
= tinsn
->opcode
;
4452 if (opcode
== XTENSA_UNDEFINED
)
4455 if (opcode
== xtensa_call0_opcode
4456 || opcode
== xtensa_callx0_opcode
4457 || opcode
== xtensa_call4_opcode
4458 || opcode
== xtensa_callx4_opcode
4459 || opcode
== xtensa_call8_opcode
4460 || opcode
== xtensa_callx8_opcode
4461 || opcode
== xtensa_call12_opcode
4462 || opcode
== xtensa_callx12_opcode
4463 || opcode
== xtensa_isync_opcode
4464 || opcode
== xtensa_ret_opcode
4465 || opcode
== xtensa_ret_n_opcode
4466 || opcode
== xtensa_retw_opcode
4467 || opcode
== xtensa_retw_n_opcode
4468 || opcode
== xtensa_waiti_opcode
4469 || opcode
== xtensa_rsr_lcount_opcode
)
4476 /* Labels that begin with ".Ln" or ".LM" are unaligned.
4477 This allows the debugger to add unaligned labels.
4478 Also, the assembler generates stabs labels that need
4479 not be aligned: FAKE_LABEL_NAME . {"F", "L", "endfunc"}. */
4482 is_unaligned_label (symbolS
*sym
)
4484 const char *name
= S_GET_NAME (sym
);
4485 static size_t fake_size
= 0;
4489 && name
[1] == 'L' && (name
[2] == 'n' || name
[2] == 'M'))
4492 /* FAKE_LABEL_NAME followed by "F", "L" or "endfunc" */
4494 fake_size
= strlen (FAKE_LABEL_NAME
);
4497 && strncmp (FAKE_LABEL_NAME
, name
, fake_size
) == 0
4498 && (name
[fake_size
] == 'F'
4499 || name
[fake_size
] == 'L'
4500 || (name
[fake_size
] == 'e'
4501 && strncmp ("endfunc", name
+fake_size
, 7) == 0)))
4509 next_non_empty_frag (const fragS
*fragP
)
4511 fragS
*next_fragP
= fragP
->fr_next
;
4513 /* Sometimes an empty will end up here due storage allocation issues.
4514 So we have to skip until we find something legit. */
4515 while (next_fragP
&& next_fragP
->fr_fix
== 0)
4516 next_fragP
= next_fragP
->fr_next
;
4518 if (next_fragP
== NULL
|| next_fragP
->fr_fix
== 0)
4526 next_frag_opcode_is_loop (const fragS
*fragP
, xtensa_opcode
*opcode
)
4528 xtensa_opcode out_opcode
;
4529 const fragS
*next_fragP
= next_non_empty_frag (fragP
);
4531 if (next_fragP
== NULL
)
4534 out_opcode
= get_opcode_from_buf (next_fragP
->fr_literal
, 0);
4535 if (xtensa_opcode_is_loop (xtensa_default_isa
, out_opcode
) == 1)
4537 *opcode
= out_opcode
;
4545 frag_format_size (const fragS
*fragP
)
4547 static xtensa_insnbuf insnbuf
= NULL
;
4548 xtensa_isa isa
= xtensa_default_isa
;
4553 insnbuf
= xtensa_insnbuf_alloc (isa
);
4556 return XTENSA_UNDEFINED
;
4558 xtensa_insnbuf_from_chars (isa
, insnbuf
,
4559 (unsigned char *) fragP
->fr_literal
, 0);
4561 fmt
= xtensa_format_decode (isa
, insnbuf
);
4562 if (fmt
== XTENSA_UNDEFINED
)
4563 return XTENSA_UNDEFINED
;
4564 fmt_size
= xtensa_format_length (isa
, fmt
);
4566 /* If the next format won't be changing due to relaxation, just
4567 return the length of the first format. */
4568 if (fragP
->fr_opcode
!= fragP
->fr_literal
)
4571 /* If during relaxation we have to pull an instruction out of a
4572 multi-slot instruction, we will return the more conservative
4573 number. This works because alignment on bigger instructions
4574 is more restrictive than alignment on smaller instructions.
4575 This is more conservative than we would like, but it happens
4578 if (xtensa_format_num_slots (xtensa_default_isa
, fmt
) > 1)
4581 /* If we aren't doing one of our own relaxations or it isn't
4582 slot-based, then the insn size won't change. */
4583 if (fragP
->fr_type
!= rs_machine_dependent
)
4585 if (fragP
->fr_subtype
!= RELAX_SLOTS
)
4588 /* If an instruction is about to grow, return the longer size. */
4589 if (fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_IMMED_STEP1
4590 || fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_IMMED_STEP2
4591 || fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_IMMED_STEP3
)
4593 /* For most frags at RELAX_IMMED_STEPX, with X > 0, the first
4594 instruction in the relaxed version is of length 3. (The case
4595 where we have to pull the instruction out of a FLIX bundle
4596 is handled conservatively above.) However, frags with opcodes
4597 that are expanding to wide branches end up having formats that
4598 are not determinable by the RELAX_IMMED_STEPX enumeration, and
4599 we can't tell directly what format the relaxer picked. This
4600 is a wart in the design of the relaxer that should someday be
4601 fixed, but would require major changes, or at least should
4602 be accompanied by major changes to make use of that data.
4604 In any event, we can tell that we are expanding from a single-slot
4605 format to a wider one with the logic below. */
4608 int relaxed_size
= fmt_size
+ fragP
->tc_frag_data
.text_expansion
[0];
4610 for (i
= 0; i
< xtensa_isa_num_formats (isa
); i
++)
4612 if (relaxed_size
== xtensa_format_length (isa
, i
))
4613 return relaxed_size
;
4619 if (fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_NARROW
)
4620 return 2 + fragP
->tc_frag_data
.text_expansion
[0];
4627 next_frag_format_size (const fragS
*fragP
)
4629 const fragS
*next_fragP
= next_non_empty_frag (fragP
);
4630 return frag_format_size (next_fragP
);
4634 /* In early Xtensa Processors, for reasons that are unclear, the ISA
4635 required two-byte instructions to be treated as three-byte instructions
4636 for loop instruction alignment. This restriction was removed beginning
4637 with Xtensa LX. Now the only requirement on loop instruction alignment
4638 is that the first instruction of the loop must appear at an address that
4639 does not cross a fetch boundary. */
4642 get_loop_align_size (int insn_size
)
4644 if (insn_size
== XTENSA_UNDEFINED
)
4645 return xtensa_fetch_width
;
4647 if (enforce_three_byte_loop_align
&& insn_size
== 2)
4654 /* If the next legit fragment is an end-of-loop marker,
4655 switch its state so it will instantiate a NOP. */
4658 update_next_frag_state (fragS
*fragP
)
4660 fragS
*next_fragP
= fragP
->fr_next
;
4661 fragS
*new_target
= NULL
;
4665 /* We are guaranteed there will be one of these... */
4666 while (!(next_fragP
->fr_type
== rs_machine_dependent
4667 && (next_fragP
->fr_subtype
== RELAX_MAYBE_UNREACHABLE
4668 || next_fragP
->fr_subtype
== RELAX_UNREACHABLE
)))
4669 next_fragP
= next_fragP
->fr_next
;
4671 gas_assert (next_fragP
->fr_type
== rs_machine_dependent
4672 && (next_fragP
->fr_subtype
== RELAX_MAYBE_UNREACHABLE
4673 || next_fragP
->fr_subtype
== RELAX_UNREACHABLE
));
4675 /* ...and one of these. */
4676 new_target
= next_fragP
->fr_next
;
4677 while (!(new_target
->fr_type
== rs_machine_dependent
4678 && (new_target
->fr_subtype
== RELAX_MAYBE_DESIRE_ALIGN
4679 || new_target
->fr_subtype
== RELAX_DESIRE_ALIGN
)))
4680 new_target
= new_target
->fr_next
;
4682 gas_assert (new_target
->fr_type
== rs_machine_dependent
4683 && (new_target
->fr_subtype
== RELAX_MAYBE_DESIRE_ALIGN
4684 || new_target
->fr_subtype
== RELAX_DESIRE_ALIGN
));
4687 while (next_fragP
&& next_fragP
->fr_fix
== 0)
4689 if (next_fragP
->fr_type
== rs_machine_dependent
4690 && next_fragP
->fr_subtype
== RELAX_LOOP_END
)
4692 next_fragP
->fr_subtype
= RELAX_LOOP_END_ADD_NOP
;
4696 next_fragP
= next_fragP
->fr_next
;
4702 next_frag_is_branch_target (const fragS
*fragP
)
4704 /* Sometimes an empty will end up here due to storage allocation issues,
4705 so we have to skip until we find something legit. */
4706 for (fragP
= fragP
->fr_next
; fragP
; fragP
= fragP
->fr_next
)
4708 if (fragP
->tc_frag_data
.is_branch_target
)
4710 if (fragP
->fr_fix
!= 0)
4718 next_frag_is_loop_target (const fragS
*fragP
)
4720 /* Sometimes an empty will end up here due storage allocation issues.
4721 So we have to skip until we find something legit. */
4722 for (fragP
= fragP
->fr_next
; fragP
; fragP
= fragP
->fr_next
)
4724 if (fragP
->tc_frag_data
.is_loop_target
)
4726 if (fragP
->fr_fix
!= 0)
4733 /* As specified in the relaxation table, when a loop instruction is
4734 relaxed, there are 24 bytes between the loop instruction itself and
4735 the first instruction in the loop. */
4737 #define RELAXED_LOOP_INSN_BYTES 24
4740 next_frag_pre_opcode_bytes (const fragS
*fragp
)
4742 const fragS
*next_fragp
= fragp
->fr_next
;
4743 xtensa_opcode next_opcode
;
4745 if (!next_frag_opcode_is_loop (fragp
, &next_opcode
))
4748 /* Sometimes an empty will end up here due to storage allocation issues,
4749 so we have to skip until we find something legit. */
4750 while (next_fragp
->fr_fix
== 0)
4751 next_fragp
= next_fragp
->fr_next
;
4753 if (next_fragp
->fr_type
!= rs_machine_dependent
)
4756 /* There is some implicit knowledge encoded in here.
4757 The LOOP instructions that are NOT RELAX_IMMED have
4758 been relaxed. Note that we can assume that the LOOP
4759 instruction is in slot 0 because loops aren't bundleable. */
4760 if (next_fragp
->tc_frag_data
.slot_subtypes
[0] > RELAX_IMMED
)
4761 return get_expanded_loop_offset (next_opcode
) + RELAXED_LOOP_INSN_BYTES
;
4767 /* Mark a location where we can later insert literal frags. Update
4768 the section's literal_pool_loc, so subsequent literals can be
4769 placed nearest to their use. */
4772 xtensa_mark_literal_pool_location (void)
4774 /* Any labels pointing to the current location need
4775 to be adjusted to after the literal pool. */
4777 fragS
*pool_location
;
4779 if (use_literal_section
)
4782 /* We stash info in these frags so we can later move the literal's
4783 fixes into this frchain's fix list. */
4784 pool_location
= frag_now
;
4785 frag_now
->tc_frag_data
.lit_frchain
= frchain_now
;
4786 frag_now
->tc_frag_data
.literal_frag
= frag_now
;
4787 /* Just record this frag. */
4788 xtensa_maybe_create_literal_pool_frag (FALSE
, FALSE
);
4789 frag_variant (rs_machine_dependent
, 0, 0,
4790 RELAX_LITERAL_POOL_BEGIN
, NULL
, 0, NULL
);
4791 xtensa_set_frag_assembly_state (frag_now
);
4792 frag_now
->tc_frag_data
.lit_seg
= now_seg
;
4793 frag_variant (rs_machine_dependent
, 0, 0,
4794 RELAX_LITERAL_POOL_END
, NULL
, 0, NULL
);
4795 xtensa_set_frag_assembly_state (frag_now
);
4797 /* Now put a frag into the literal pool that points to this location. */
4798 set_literal_pool_location (now_seg
, pool_location
);
4799 xtensa_switch_to_non_abs_literal_fragment (&s
);
4800 frag_align (2, 0, 0);
4801 record_alignment (now_seg
, 2);
4803 /* Close whatever frag is there. */
4804 frag_variant (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
4805 xtensa_set_frag_assembly_state (frag_now
);
4806 frag_now
->tc_frag_data
.literal_frag
= pool_location
;
4807 frag_variant (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
4808 xtensa_restore_emit_state (&s
);
4809 xtensa_set_frag_assembly_state (frag_now
);
4813 /* Build a nop of the correct size into tinsn. */
4816 build_nop (TInsn
*tinsn
, int size
)
4822 tinsn
->opcode
= xtensa_nop_n_opcode
;
4824 if (tinsn
->opcode
== XTENSA_UNDEFINED
)
4825 as_fatal (_("opcode 'NOP.N' unavailable in this configuration"));
4829 if (xtensa_nop_opcode
== XTENSA_UNDEFINED
)
4831 tinsn
->opcode
= xtensa_or_opcode
;
4832 set_expr_const (&tinsn
->tok
[0], 1);
4833 set_expr_const (&tinsn
->tok
[1], 1);
4834 set_expr_const (&tinsn
->tok
[2], 1);
4838 tinsn
->opcode
= xtensa_nop_opcode
;
4840 gas_assert (tinsn
->opcode
!= XTENSA_UNDEFINED
);
4845 /* Assemble a NOP of the requested size in the buffer. User must have
4846 allocated "buf" with at least "size" bytes. */
4849 assemble_nop (int size
, char *buf
)
4851 static xtensa_insnbuf insnbuf
= NULL
;
4854 build_nop (&tinsn
, size
);
4857 insnbuf
= xtensa_insnbuf_alloc (xtensa_default_isa
);
4859 tinsn_to_insnbuf (&tinsn
, insnbuf
);
4860 xtensa_insnbuf_to_chars (xtensa_default_isa
, insnbuf
,
4861 (unsigned char *) buf
, 0);
4865 /* Return the number of bytes for the offset of the expanded loop
4866 instruction. This should be incorporated into the relaxation
4867 specification but is hard-coded here. This is used to auto-align
4868 the loop instruction. It is invalid to call this function if the
4869 configuration does not have loops or if the opcode is not a loop
4873 get_expanded_loop_offset (xtensa_opcode opcode
)
4875 /* This is the OFFSET of the loop instruction in the expanded loop.
4876 This MUST correspond directly to the specification of the loop
4877 expansion. It will be validated on fragment conversion. */
4878 gas_assert (opcode
!= XTENSA_UNDEFINED
);
4879 if (opcode
== xtensa_loop_opcode
)
4881 if (opcode
== xtensa_loopnez_opcode
)
4883 if (opcode
== xtensa_loopgtz_opcode
)
4885 as_fatal (_("get_expanded_loop_offset: invalid opcode"));
4891 get_literal_pool_location (segT seg
)
4893 struct litpool_seg
*lps
= litpool_seg_list
.next
;
4894 struct litpool_frag
*lpf
;
4895 for ( ; lps
&& lps
->seg
->id
!= seg
->id
; lps
= lps
->next
)
4899 for (lpf
= lps
->frag_list
.prev
; lpf
->fragP
; lpf
= lpf
->prev
)
4900 { /* Skip "candidates" for now. */
4901 if (lpf
->fragP
->fr_subtype
== RELAX_LITERAL_POOL_BEGIN
&&
4905 /* Must convert a lower-priority pool. */
4906 for (lpf
= lps
->frag_list
.prev
; lpf
->fragP
; lpf
= lpf
->prev
)
4908 if (lpf
->fragP
->fr_subtype
== RELAX_LITERAL_POOL_BEGIN
)
4911 /* Still no match -- try for a low priority pool. */
4912 for (lpf
= lps
->frag_list
.prev
; lpf
->fragP
; lpf
= lpf
->prev
)
4914 if (lpf
->fragP
->fr_subtype
== RELAX_LITERAL_POOL_CANDIDATE_BEGIN
)
4918 return seg_info (seg
)->tc_segment_info_data
.literal_pool_loc
;
4923 set_literal_pool_location (segT seg
, fragS
*literal_pool_loc
)
4925 seg_info (seg
)->tc_segment_info_data
.literal_pool_loc
= literal_pool_loc
;
4929 /* Set frag assembly state should be called when a new frag is
4930 opened and after a frag has been closed. */
4933 xtensa_set_frag_assembly_state (fragS
*fragP
)
4935 if (!density_supported
)
4936 fragP
->tc_frag_data
.is_no_density
= TRUE
;
4938 /* This function is called from subsegs_finish, which is called
4939 after xtensa_end, so we can't use "use_transform" or
4940 "use_schedule" here. */
4941 if (!directive_state
[directive_transform
])
4942 fragP
->tc_frag_data
.is_no_transform
= TRUE
;
4943 if (directive_state
[directive_longcalls
])
4944 fragP
->tc_frag_data
.use_longcalls
= TRUE
;
4945 fragP
->tc_frag_data
.use_absolute_literals
=
4946 directive_state
[directive_absolute_literals
];
4947 fragP
->tc_frag_data
.is_assembly_state_set
= TRUE
;
4952 relaxable_section (asection
*sec
)
4954 return ((sec
->flags
& SEC_DEBUGGING
) == 0
4955 && strcmp (sec
->name
, ".eh_frame") != 0);
4960 xtensa_mark_frags_for_org (void)
4964 /* Walk over each fragment of all of the current segments. If we find
4965 a .org frag in any of the segments, mark all frags prior to it as
4966 "no transform", which will prevent linker optimizations from messing
4967 up the .org distance. This should be done after
4968 xtensa_find_unmarked_state_frags, because we don't want to worry here
4969 about that function trashing the data we save here. */
4971 for (seclist
= &stdoutput
->sections
;
4972 seclist
&& *seclist
;
4973 seclist
= &(*seclist
)->next
)
4975 segT sec
= *seclist
;
4976 segment_info_type
*seginfo
;
4979 flags
= bfd_get_section_flags (stdoutput
, sec
);
4980 if (flags
& SEC_DEBUGGING
)
4982 if (!(flags
& SEC_ALLOC
))
4985 seginfo
= seg_info (sec
);
4986 if (seginfo
&& seginfo
->frchainP
)
4988 fragS
*last_fragP
= seginfo
->frchainP
->frch_root
;
4989 for (fragP
= seginfo
->frchainP
->frch_root
; fragP
;
4990 fragP
= fragP
->fr_next
)
4992 /* cvt_frag_to_fill has changed the fr_type of org frags to
4993 rs_fill, so use the value as cached in rs_subtype here. */
4994 if (fragP
->fr_subtype
== RELAX_ORG
)
4996 while (last_fragP
!= fragP
->fr_next
)
4998 last_fragP
->tc_frag_data
.is_no_transform
= TRUE
;
4999 last_fragP
= last_fragP
->fr_next
;
5009 xtensa_find_unmarked_state_frags (void)
5013 /* Walk over each fragment of all of the current segments. For each
5014 unmarked fragment, mark it with the same info as the previous
5016 for (seclist
= &stdoutput
->sections
;
5017 seclist
&& *seclist
;
5018 seclist
= &(*seclist
)->next
)
5020 segT sec
= *seclist
;
5021 segment_info_type
*seginfo
;
5024 flags
= bfd_get_section_flags (stdoutput
, sec
);
5025 if (flags
& SEC_DEBUGGING
)
5027 if (!(flags
& SEC_ALLOC
))
5030 seginfo
= seg_info (sec
);
5031 if (seginfo
&& seginfo
->frchainP
)
5033 fragS
*last_fragP
= 0;
5034 for (fragP
= seginfo
->frchainP
->frch_root
; fragP
;
5035 fragP
= fragP
->fr_next
)
5037 if (fragP
->fr_fix
!= 0
5038 && !fragP
->tc_frag_data
.is_assembly_state_set
)
5040 if (last_fragP
== 0)
5042 as_warn_where (fragP
->fr_file
, fragP
->fr_line
,
5043 _("assembly state not set for first frag in section %s"),
5048 fragP
->tc_frag_data
.is_assembly_state_set
= TRUE
;
5049 fragP
->tc_frag_data
.is_no_density
=
5050 last_fragP
->tc_frag_data
.is_no_density
;
5051 fragP
->tc_frag_data
.is_no_transform
=
5052 last_fragP
->tc_frag_data
.is_no_transform
;
5053 fragP
->tc_frag_data
.use_longcalls
=
5054 last_fragP
->tc_frag_data
.use_longcalls
;
5055 fragP
->tc_frag_data
.use_absolute_literals
=
5056 last_fragP
->tc_frag_data
.use_absolute_literals
;
5059 if (fragP
->tc_frag_data
.is_assembly_state_set
)
5068 xtensa_find_unaligned_branch_targets (bfd
*abfd ATTRIBUTE_UNUSED
,
5070 void *unused ATTRIBUTE_UNUSED
)
5072 flagword flags
= bfd_get_section_flags (abfd
, sec
);
5073 segment_info_type
*seginfo
= seg_info (sec
);
5074 fragS
*frag
= seginfo
->frchainP
->frch_root
;
5076 if (flags
& SEC_CODE
)
5078 xtensa_isa isa
= xtensa_default_isa
;
5079 xtensa_insnbuf insnbuf
= xtensa_insnbuf_alloc (isa
);
5080 while (frag
!= NULL
)
5082 if (frag
->tc_frag_data
.is_branch_target
)
5085 addressT branch_align
, frag_addr
;
5088 xtensa_insnbuf_from_chars
5089 (isa
, insnbuf
, (unsigned char *) frag
->fr_literal
, 0);
5090 fmt
= xtensa_format_decode (isa
, insnbuf
);
5091 op_size
= xtensa_format_length (isa
, fmt
);
5092 branch_align
= 1 << branch_align_power (sec
);
5093 frag_addr
= frag
->fr_address
% branch_align
;
5094 if (frag_addr
+ op_size
> branch_align
)
5095 as_warn_where (frag
->fr_file
, frag
->fr_line
,
5096 _("unaligned branch target: %d bytes at 0x%lx"),
5097 op_size
, (long) frag
->fr_address
);
5099 frag
= frag
->fr_next
;
5101 xtensa_insnbuf_free (isa
, insnbuf
);
5107 xtensa_find_unaligned_loops (bfd
*abfd ATTRIBUTE_UNUSED
,
5109 void *unused ATTRIBUTE_UNUSED
)
5111 flagword flags
= bfd_get_section_flags (abfd
, sec
);
5112 segment_info_type
*seginfo
= seg_info (sec
);
5113 fragS
*frag
= seginfo
->frchainP
->frch_root
;
5114 xtensa_isa isa
= xtensa_default_isa
;
5116 if (flags
& SEC_CODE
)
5118 xtensa_insnbuf insnbuf
= xtensa_insnbuf_alloc (isa
);
5119 while (frag
!= NULL
)
5121 if (frag
->tc_frag_data
.is_first_loop_insn
)
5127 if (frag
->fr_fix
== 0)
5128 frag
= next_non_empty_frag (frag
);
5132 xtensa_insnbuf_from_chars
5133 (isa
, insnbuf
, (unsigned char *) frag
->fr_literal
, 0);
5134 fmt
= xtensa_format_decode (isa
, insnbuf
);
5135 op_size
= xtensa_format_length (isa
, fmt
);
5136 frag_addr
= frag
->fr_address
% xtensa_fetch_width
;
5138 if (frag_addr
+ op_size
> xtensa_fetch_width
)
5139 as_warn_where (frag
->fr_file
, frag
->fr_line
,
5140 _("unaligned loop: %d bytes at 0x%lx"),
5141 op_size
, (long) frag
->fr_address
);
5144 frag
= frag
->fr_next
;
5146 xtensa_insnbuf_free (isa
, insnbuf
);
5152 xg_apply_fix_value (fixS
*fixP
, valueT val
)
5154 xtensa_isa isa
= xtensa_default_isa
;
5155 static xtensa_insnbuf insnbuf
= NULL
;
5156 static xtensa_insnbuf slotbuf
= NULL
;
5159 bfd_boolean alt_reloc
;
5160 xtensa_opcode opcode
;
5161 char *const fixpos
= fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
;
5163 if (decode_reloc (fixP
->fx_r_type
, &slot
, &alt_reloc
)
5165 as_fatal (_("unexpected fix"));
5169 insnbuf
= xtensa_insnbuf_alloc (isa
);
5170 slotbuf
= xtensa_insnbuf_alloc (isa
);
5173 xtensa_insnbuf_from_chars (isa
, insnbuf
, (unsigned char *) fixpos
, 0);
5174 fmt
= xtensa_format_decode (isa
, insnbuf
);
5175 if (fmt
== XTENSA_UNDEFINED
)
5176 as_fatal (_("undecodable fix"));
5177 xtensa_format_get_slot (isa
, fmt
, slot
, insnbuf
, slotbuf
);
5178 opcode
= xtensa_opcode_decode (isa
, fmt
, slot
, slotbuf
);
5179 if (opcode
== XTENSA_UNDEFINED
)
5180 as_fatal (_("undecodable fix"));
5182 /* CONST16 immediates are not PC-relative, despite the fact that we
5183 reuse the normal PC-relative operand relocations for the low part
5184 of a CONST16 operand. */
5185 if (opcode
== xtensa_const16_opcode
)
5188 xtensa_insnbuf_set_operand (slotbuf
, fmt
, slot
, opcode
,
5189 get_relaxable_immed (opcode
), val
,
5190 fixP
->fx_file
, fixP
->fx_line
);
5192 xtensa_format_set_slot (isa
, fmt
, slot
, insnbuf
, slotbuf
);
5193 xtensa_insnbuf_to_chars (isa
, insnbuf
, (unsigned char *) fixpos
, 0);
5199 /* External Functions and Other GAS Hooks. */
5202 xtensa_target_format (void)
5204 return (target_big_endian
? "elf32-xtensa-be" : "elf32-xtensa-le");
5209 xtensa_file_arch_init (bfd
*abfd
)
5211 bfd_set_private_flags (abfd
, 0x100 | 0x200);
5216 md_number_to_chars (char *buf
, valueT val
, int n
)
5218 if (target_big_endian
)
5219 number_to_chars_bigendian (buf
, val
, n
);
5221 number_to_chars_littleendian (buf
, val
, n
);
5225 /* This function is called once, at assembler startup time. It should
5226 set up all the tables, etc. that the MD part of the assembler will
5232 segT current_section
= now_seg
;
5233 int current_subsec
= now_subseg
;
5237 xtensa_default_isa
= xtensa_isa_init (0, 0);
5238 isa
= xtensa_default_isa
;
5242 /* Set up the literal sections. */
5243 memset (&default_lit_sections
, 0, sizeof (default_lit_sections
));
5245 subseg_set (current_section
, current_subsec
);
5247 xtensa_addi_opcode
= xtensa_opcode_lookup (isa
, "addi");
5248 xtensa_addmi_opcode
= xtensa_opcode_lookup (isa
, "addmi");
5249 xtensa_call0_opcode
= xtensa_opcode_lookup (isa
, "call0");
5250 xtensa_call4_opcode
= xtensa_opcode_lookup (isa
, "call4");
5251 xtensa_call8_opcode
= xtensa_opcode_lookup (isa
, "call8");
5252 xtensa_call12_opcode
= xtensa_opcode_lookup (isa
, "call12");
5253 xtensa_callx0_opcode
= xtensa_opcode_lookup (isa
, "callx0");
5254 xtensa_callx4_opcode
= xtensa_opcode_lookup (isa
, "callx4");
5255 xtensa_callx8_opcode
= xtensa_opcode_lookup (isa
, "callx8");
5256 xtensa_callx12_opcode
= xtensa_opcode_lookup (isa
, "callx12");
5257 xtensa_const16_opcode
= xtensa_opcode_lookup (isa
, "const16");
5258 xtensa_entry_opcode
= xtensa_opcode_lookup (isa
, "entry");
5259 xtensa_extui_opcode
= xtensa_opcode_lookup (isa
, "extui");
5260 xtensa_movi_opcode
= xtensa_opcode_lookup (isa
, "movi");
5261 xtensa_movi_n_opcode
= xtensa_opcode_lookup (isa
, "movi.n");
5262 xtensa_isync_opcode
= xtensa_opcode_lookup (isa
, "isync");
5263 xtensa_j_opcode
= xtensa_opcode_lookup (isa
, "j");
5264 xtensa_jx_opcode
= xtensa_opcode_lookup (isa
, "jx");
5265 xtensa_l32r_opcode
= xtensa_opcode_lookup (isa
, "l32r");
5266 xtensa_loop_opcode
= xtensa_opcode_lookup (isa
, "loop");
5267 xtensa_loopnez_opcode
= xtensa_opcode_lookup (isa
, "loopnez");
5268 xtensa_loopgtz_opcode
= xtensa_opcode_lookup (isa
, "loopgtz");
5269 xtensa_nop_opcode
= xtensa_opcode_lookup (isa
, "nop");
5270 xtensa_nop_n_opcode
= xtensa_opcode_lookup (isa
, "nop.n");
5271 xtensa_or_opcode
= xtensa_opcode_lookup (isa
, "or");
5272 xtensa_ret_opcode
= xtensa_opcode_lookup (isa
, "ret");
5273 xtensa_ret_n_opcode
= xtensa_opcode_lookup (isa
, "ret.n");
5274 xtensa_retw_opcode
= xtensa_opcode_lookup (isa
, "retw");
5275 xtensa_retw_n_opcode
= xtensa_opcode_lookup (isa
, "retw.n");
5276 xtensa_rsr_lcount_opcode
= xtensa_opcode_lookup (isa
, "rsr.lcount");
5277 xtensa_waiti_opcode
= xtensa_opcode_lookup (isa
, "waiti");
5279 for (i
= 0; i
< xtensa_isa_num_formats (isa
); i
++)
5281 int format_slots
= xtensa_format_num_slots (isa
, i
);
5282 if (format_slots
> config_max_slots
)
5283 config_max_slots
= format_slots
;
5286 xg_init_vinsn (&cur_vinsn
);
5288 xtensa_num_pipe_stages
= xtensa_isa_num_pipe_stages (isa
);
5290 init_op_placement_info_table ();
5292 /* Set up the assembly state. */
5293 if (!frag_now
->tc_frag_data
.is_assembly_state_set
)
5294 xtensa_set_frag_assembly_state (frag_now
);
5298 /* TC_INIT_FIX_DATA hook */
5301 xtensa_init_fix_data (fixS
*x
)
5303 x
->tc_fix_data
.slot
= 0;
5304 x
->tc_fix_data
.X_add_symbol
= NULL
;
5305 x
->tc_fix_data
.X_add_number
= 0;
5309 /* tc_frob_label hook */
5312 xtensa_frob_label (symbolS
*sym
)
5316 if (cur_vinsn
.inside_bundle
)
5318 as_bad (_("labels are not valid inside bundles"));
5322 freq
= get_subseg_target_freq (now_seg
, now_subseg
);
5324 /* Since the label was already attached to a frag associated with the
5325 previous basic block, it now needs to be reset to the current frag. */
5326 symbol_set_frag (sym
, frag_now
);
5327 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
5329 if (generating_literals
)
5330 xtensa_add_literal_sym (sym
);
5332 xtensa_add_insn_label (sym
);
5334 if (symbol_get_tc (sym
)->is_loop_target
)
5336 if ((get_last_insn_flags (now_seg
, now_subseg
)
5337 & FLAG_IS_BAD_LOOPEND
) != 0)
5338 as_bad (_("invalid last instruction for a zero-overhead loop"));
5340 xtensa_set_frag_assembly_state (frag_now
);
5341 frag_var (rs_machine_dependent
, 4, 4, RELAX_LOOP_END
,
5342 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
5344 xtensa_set_frag_assembly_state (frag_now
);
5345 xtensa_move_labels (frag_now
, 0);
5348 /* No target aligning in the absolute section. */
5349 if (now_seg
!= absolute_section
5350 && !is_unaligned_label (sym
)
5351 && !generating_literals
)
5353 xtensa_set_frag_assembly_state (frag_now
);
5355 if (do_align_targets ())
5356 frag_var (rs_machine_dependent
, 0, (int) freq
,
5357 RELAX_DESIRE_ALIGN_IF_TARGET
, frag_now
->fr_symbol
,
5358 frag_now
->fr_offset
, NULL
);
5360 frag_var (rs_fill
, 0, 0, frag_now
->fr_subtype
,
5361 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
5362 xtensa_set_frag_assembly_state (frag_now
);
5363 xtensa_move_labels (frag_now
, 0);
5366 /* We need to mark the following properties even if we aren't aligning. */
5368 /* If the label is already known to be a branch target, i.e., a
5369 forward branch, mark the frag accordingly. Backward branches
5370 are handled by xg_add_branch_and_loop_targets. */
5371 if (symbol_get_tc (sym
)->is_branch_target
)
5372 symbol_get_frag (sym
)->tc_frag_data
.is_branch_target
= TRUE
;
5374 /* Loops only go forward, so they can be identified here. */
5375 if (symbol_get_tc (sym
)->is_loop_target
)
5376 symbol_get_frag (sym
)->tc_frag_data
.is_loop_target
= TRUE
;
5378 dwarf2_emit_label (sym
);
5382 /* tc_unrecognized_line hook */
5385 xtensa_unrecognized_line (int ch
)
5390 if (cur_vinsn
.inside_bundle
== 0)
5392 /* PR8110: Cannot emit line number info inside a FLIX bundle
5393 when using --gstabs. Temporarily disable debug info. */
5394 generate_lineno_debug ();
5395 if (debug_type
== DEBUG_STABS
)
5397 xt_saved_debug_type
= debug_type
;
5398 debug_type
= DEBUG_NONE
;
5401 cur_vinsn
.inside_bundle
= 1;
5405 as_bad (_("extra opening brace"));
5411 if (cur_vinsn
.inside_bundle
)
5412 finish_vinsn (&cur_vinsn
);
5415 as_bad (_("extra closing brace"));
5420 as_bad (_("syntax error"));
5427 /* md_flush_pending_output hook */
5430 xtensa_flush_pending_output (void)
5432 /* This line fixes a bug where automatically generated gstabs info
5433 separates a function label from its entry instruction, ending up
5434 with the literal position between the function label and the entry
5435 instruction and crashing code. It only happens with --gstabs and
5436 --text-section-literals, and when several other obscure relaxation
5437 conditions are met. */
5438 if (outputting_stabs_line_debug
)
5441 if (cur_vinsn
.inside_bundle
)
5442 as_bad (_("missing closing brace"));
5444 /* If there is a non-zero instruction fragment, close it. */
5445 if (frag_now_fix () != 0 && frag_now
->tc_frag_data
.is_insn
)
5447 frag_wane (frag_now
);
5449 xtensa_set_frag_assembly_state (frag_now
);
5451 frag_now
->tc_frag_data
.is_insn
= FALSE
;
5453 xtensa_clear_insn_labels ();
5457 /* We had an error while parsing an instruction. The string might look
5458 like this: "insn arg1, arg2 }". If so, we need to see the closing
5459 brace and reset some fields. Otherwise, the vinsn never gets closed
5460 and the num_slots field will grow past the end of the array of slots,
5461 and bad things happen. */
5464 error_reset_cur_vinsn (void)
5466 if (cur_vinsn
.inside_bundle
)
5468 if (*input_line_pointer
== '}'
5469 || *(input_line_pointer
- 1) == '}'
5470 || *(input_line_pointer
- 2) == '}')
5471 xg_clear_vinsn (&cur_vinsn
);
5477 md_assemble (char *str
)
5479 xtensa_isa isa
= xtensa_default_isa
;
5482 bfd_boolean has_underbar
= FALSE
;
5483 char *arg_strings
[MAX_INSN_ARGS
];
5485 TInsn orig_insn
; /* Original instruction from the input. */
5487 tinsn_init (&orig_insn
);
5489 /* Split off the opcode. */
5490 opnamelen
= strspn (str
, "abcdefghijklmnopqrstuvwxyz_/0123456789.");
5491 opname
= xstrndup (str
, opnamelen
);
5493 num_args
= tokenize_arguments (arg_strings
, str
+ opnamelen
);
5496 as_bad (_("syntax error"));
5500 if (xg_translate_idioms (&opname
, &num_args
, arg_strings
))
5503 /* Check for an underbar prefix. */
5506 has_underbar
= TRUE
;
5510 orig_insn
.insn_type
= ITYPE_INSN
;
5512 orig_insn
.is_specific_opcode
= (has_underbar
|| !use_transform ());
5513 orig_insn
.opcode
= xtensa_opcode_lookup (isa
, opname
);
5515 /* Special case: Check for "CALLXn.TLS" psuedo op. If found, grab its
5516 extra argument and set the opcode to "CALLXn". */
5517 if (orig_insn
.opcode
== XTENSA_UNDEFINED
5518 && strncasecmp (opname
, "callx", 5) == 0)
5520 unsigned long window_size
;
5523 window_size
= strtoul (opname
+ 5, &suffix
, 10);
5524 if (suffix
!= opname
+ 5
5525 && (window_size
== 0
5528 || window_size
== 12)
5529 && strcasecmp (suffix
, ".tls") == 0)
5531 switch (window_size
)
5533 case 0: orig_insn
.opcode
= xtensa_callx0_opcode
; break;
5534 case 4: orig_insn
.opcode
= xtensa_callx4_opcode
; break;
5535 case 8: orig_insn
.opcode
= xtensa_callx8_opcode
; break;
5536 case 12: orig_insn
.opcode
= xtensa_callx12_opcode
; break;
5540 as_bad (_("wrong number of operands for '%s'"), opname
);
5543 bfd_reloc_code_real_type reloc
;
5544 char *old_input_line_pointer
;
5545 expressionS
*tok
= &orig_insn
.extra_arg
;
5547 old_input_line_pointer
= input_line_pointer
;
5548 input_line_pointer
= arg_strings
[num_args
- 1];
5551 if (tok
->X_op
== O_symbol
5552 && ((reloc
= xtensa_elf_suffix (&input_line_pointer
, tok
))
5553 == BFD_RELOC_XTENSA_TLS_CALL
))
5554 tok
->X_op
= map_suffix_reloc_to_operator (reloc
);
5556 as_bad (_("bad relocation expression for '%s'"), opname
);
5558 input_line_pointer
= old_input_line_pointer
;
5564 /* Special case: Check for "j.l" psuedo op. */
5565 if (orig_insn
.opcode
== XTENSA_UNDEFINED
5566 && strncasecmp (opname
, "j.l", 3) == 0)
5569 as_bad (_("wrong number of operands for '%s'"), opname
);
5572 char *old_input_line_pointer
;
5573 expressionS
*tok
= &orig_insn
.extra_arg
;
5575 old_input_line_pointer
= input_line_pointer
;
5576 input_line_pointer
= arg_strings
[num_args
- 1];
5578 expression_maybe_register (xtensa_jx_opcode
, 0, tok
);
5579 input_line_pointer
= old_input_line_pointer
;
5582 orig_insn
.opcode
= xtensa_j_opcode
;
5586 if (orig_insn
.opcode
== XTENSA_UNDEFINED
)
5588 xtensa_format fmt
= xtensa_format_lookup (isa
, opname
);
5589 if (fmt
== XTENSA_UNDEFINED
)
5591 as_bad (_("unknown opcode or format name '%s'"), opname
);
5592 error_reset_cur_vinsn ();
5595 if (!cur_vinsn
.inside_bundle
)
5597 as_bad (_("format names only valid inside bundles"));
5598 error_reset_cur_vinsn ();
5601 if (cur_vinsn
.format
!= XTENSA_UNDEFINED
)
5602 as_warn (_("multiple formats specified for one bundle; using '%s'"),
5604 cur_vinsn
.format
= fmt
;
5605 free (has_underbar
? opname
- 1 : opname
);
5606 error_reset_cur_vinsn ();
5610 /* Parse the arguments. */
5611 if (parse_arguments (&orig_insn
, num_args
, arg_strings
))
5613 as_bad (_("syntax error"));
5614 error_reset_cur_vinsn ();
5618 /* Free the opcode and argument strings, now that they've been parsed. */
5619 free (has_underbar
? opname
- 1 : opname
);
5621 while (num_args
-- > 0)
5622 free (arg_strings
[num_args
]);
5624 /* Get expressions for invisible operands. */
5625 if (get_invisible_operands (&orig_insn
))
5627 error_reset_cur_vinsn ();
5631 /* Check for the right number and type of arguments. */
5632 if (tinsn_check_arguments (&orig_insn
))
5634 error_reset_cur_vinsn ();
5638 /* Record the line number for each TInsn, because a FLIX bundle may be
5639 spread across multiple input lines and individual instructions may be
5640 moved around in some cases. */
5641 orig_insn
.loc_directive_seen
= dwarf2_loc_directive_seen
;
5642 dwarf2_where (&orig_insn
.debug_line
);
5643 dwarf2_consume_line_info ();
5645 xg_add_branch_and_loop_targets (&orig_insn
);
5647 /* Check that immediate value for ENTRY is >= 16. */
5648 if (orig_insn
.opcode
== xtensa_entry_opcode
&& orig_insn
.ntok
>= 3)
5650 expressionS
*exp
= &orig_insn
.tok
[2];
5651 if (exp
->X_op
== O_constant
&& exp
->X_add_number
< 16)
5652 as_warn (_("entry instruction with stack decrement < 16"));
5656 assemble_tokens (opcode, tok, ntok);
5657 expand the tokens from the orig_insn into the
5658 stack of instructions that will not expand
5659 unless required at relaxation time. */
5661 if (!cur_vinsn
.inside_bundle
)
5662 emit_single_op (&orig_insn
);
5663 else /* We are inside a bundle. */
5665 cur_vinsn
.slots
[cur_vinsn
.num_slots
] = orig_insn
;
5666 cur_vinsn
.num_slots
++;
5667 if (*input_line_pointer
== '}'
5668 || *(input_line_pointer
- 1) == '}'
5669 || *(input_line_pointer
- 2) == '}')
5670 finish_vinsn (&cur_vinsn
);
5673 /* We've just emitted a new instruction so clear the list of labels. */
5674 xtensa_clear_insn_labels ();
5676 xtensa_check_frag_count ();
5680 /* HANDLE_ALIGN hook */
5682 /* For a .align directive, we mark the previous block with the alignment
5683 information. This will be placed in the object file in the
5684 property section corresponding to this section. */
5687 xtensa_handle_align (fragS
*fragP
)
5690 && ! fragP
->tc_frag_data
.is_literal
5691 && (fragP
->fr_type
== rs_align
5692 || fragP
->fr_type
== rs_align_code
)
5693 && fragP
->fr_offset
> 0
5694 && now_seg
!= bss_section
)
5696 fragP
->tc_frag_data
.is_align
= TRUE
;
5697 fragP
->tc_frag_data
.alignment
= fragP
->fr_offset
;
5700 if (fragP
->fr_type
== rs_align_test
)
5703 count
= fragP
->fr_next
->fr_address
- fragP
->fr_address
- fragP
->fr_fix
;
5705 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
5706 _("unaligned entry instruction"));
5709 if (linkrelax
&& fragP
->fr_type
== rs_org
)
5710 fragP
->fr_subtype
= RELAX_ORG
;
5714 /* TC_FRAG_INIT hook */
5717 xtensa_frag_init (fragS
*frag
)
5719 xtensa_set_frag_assembly_state (frag
);
5724 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
5730 /* Round up a section size to the appropriate boundary. */
5733 md_section_align (segT segment ATTRIBUTE_UNUSED
, valueT size
)
5735 return size
; /* Byte alignment is fine. */
5740 md_pcrel_from (fixS
*fixP
)
5743 static xtensa_insnbuf insnbuf
= NULL
;
5744 static xtensa_insnbuf slotbuf
= NULL
;
5747 xtensa_opcode opcode
;
5750 xtensa_isa isa
= xtensa_default_isa
;
5751 valueT addr
= fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
5752 bfd_boolean alt_reloc
;
5754 if (fixP
->fx_r_type
== BFD_RELOC_XTENSA_ASM_EXPAND
)
5757 if (fixP
->fx_r_type
== BFD_RELOC_32_PCREL
)
5762 insnbuf
= xtensa_insnbuf_alloc (isa
);
5763 slotbuf
= xtensa_insnbuf_alloc (isa
);
5766 insn_p
= &fixP
->fx_frag
->fr_literal
[fixP
->fx_where
];
5767 xtensa_insnbuf_from_chars (isa
, insnbuf
, (unsigned char *) insn_p
, 0);
5768 fmt
= xtensa_format_decode (isa
, insnbuf
);
5770 if (fmt
== XTENSA_UNDEFINED
)
5771 as_fatal (_("bad instruction format"));
5773 if (decode_reloc (fixP
->fx_r_type
, &slot
, &alt_reloc
) != 0)
5774 as_fatal (_("invalid relocation"));
5776 xtensa_format_get_slot (isa
, fmt
, slot
, insnbuf
, slotbuf
);
5777 opcode
= xtensa_opcode_decode (isa
, fmt
, slot
, slotbuf
);
5779 /* Check for "alternate" relocations (operand not specified). None
5780 of the current uses for these are really PC-relative. */
5781 if (alt_reloc
|| opcode
== xtensa_const16_opcode
)
5783 if (opcode
!= xtensa_l32r_opcode
5784 && opcode
!= xtensa_const16_opcode
)
5785 as_fatal (_("invalid relocation for '%s' instruction"),
5786 xtensa_opcode_name (isa
, opcode
));
5790 opnum
= get_relaxable_immed (opcode
);
5792 if (xtensa_operand_is_PCrelative (isa
, opcode
, opnum
) != 1
5793 || xtensa_operand_do_reloc (isa
, opcode
, opnum
, &opnd_value
, addr
))
5795 as_bad_where (fixP
->fx_file
,
5797 _("invalid relocation for operand %d of '%s'"),
5798 opnum
, xtensa_opcode_name (isa
, opcode
));
5801 return 0 - opnd_value
;
5805 /* TC_FORCE_RELOCATION hook */
5808 xtensa_force_relocation (fixS
*fix
)
5810 switch (fix
->fx_r_type
)
5812 case BFD_RELOC_XTENSA_ASM_EXPAND
:
5813 case BFD_RELOC_XTENSA_SLOT0_ALT
:
5814 case BFD_RELOC_XTENSA_SLOT1_ALT
:
5815 case BFD_RELOC_XTENSA_SLOT2_ALT
:
5816 case BFD_RELOC_XTENSA_SLOT3_ALT
:
5817 case BFD_RELOC_XTENSA_SLOT4_ALT
:
5818 case BFD_RELOC_XTENSA_SLOT5_ALT
:
5819 case BFD_RELOC_XTENSA_SLOT6_ALT
:
5820 case BFD_RELOC_XTENSA_SLOT7_ALT
:
5821 case BFD_RELOC_XTENSA_SLOT8_ALT
:
5822 case BFD_RELOC_XTENSA_SLOT9_ALT
:
5823 case BFD_RELOC_XTENSA_SLOT10_ALT
:
5824 case BFD_RELOC_XTENSA_SLOT11_ALT
:
5825 case BFD_RELOC_XTENSA_SLOT12_ALT
:
5826 case BFD_RELOC_XTENSA_SLOT13_ALT
:
5827 case BFD_RELOC_XTENSA_SLOT14_ALT
:
5833 if (linkrelax
&& fix
->fx_addsy
5834 && relaxable_section (S_GET_SEGMENT (fix
->fx_addsy
)))
5837 return generic_force_reloc (fix
);
5841 /* TC_VALIDATE_FIX_SUB hook */
5844 xtensa_validate_fix_sub (fixS
*fix
)
5846 segT add_symbol_segment
, sub_symbol_segment
;
5848 /* The difference of two symbols should be resolved by the assembler when
5849 linkrelax is not set. If the linker may relax the section containing
5850 the symbols, then an Xtensa DIFF relocation must be generated so that
5851 the linker knows to adjust the difference value. */
5852 if (!linkrelax
|| fix
->fx_addsy
== NULL
)
5855 /* Make sure both symbols are in the same segment, and that segment is
5856 "normal" and relaxable. If the segment is not "normal", then the
5857 fix is not valid. If the segment is not "relaxable", then the fix
5858 should have been handled earlier. */
5859 add_symbol_segment
= S_GET_SEGMENT (fix
->fx_addsy
);
5860 if (! SEG_NORMAL (add_symbol_segment
) ||
5861 ! relaxable_section (add_symbol_segment
))
5863 sub_symbol_segment
= S_GET_SEGMENT (fix
->fx_subsy
);
5864 return (sub_symbol_segment
== add_symbol_segment
);
5868 /* NO_PSEUDO_DOT hook */
5870 /* This function has nothing to do with pseudo dots, but this is the
5871 nearest macro to where the check needs to take place. FIXME: This
5875 xtensa_check_inside_bundle (void)
5877 if (cur_vinsn
.inside_bundle
&& input_line_pointer
[-1] == '.')
5878 as_bad (_("directives are not valid inside bundles"));
5880 /* This function must always return FALSE because it is called via a
5881 macro that has nothing to do with bundling. */
5886 /* md_elf_section_change_hook */
5889 xtensa_elf_section_change_hook (void)
5891 /* Set up the assembly state. */
5892 if (!frag_now
->tc_frag_data
.is_assembly_state_set
)
5893 xtensa_set_frag_assembly_state (frag_now
);
5897 /* tc_fix_adjustable hook */
5900 xtensa_fix_adjustable (fixS
*fixP
)
5902 /* We need the symbol name for the VTABLE entries. */
5903 if (fixP
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
5904 || fixP
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
5911 /* tc_symbol_new_hook */
5913 symbolS
*expr_symbols
= NULL
;
5916 xtensa_symbol_new_hook (symbolS
*sym
)
5918 if (is_leb128_expr
&& S_GET_SEGMENT (sym
) == expr_section
)
5920 symbol_get_tc (sym
)->next_expr_symbol
= expr_symbols
;
5927 md_apply_fix (fixS
*fixP
, valueT
*valP
, segT seg
)
5929 char *const fixpos
= fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
;
5932 /* Subtracted symbols are only allowed for a few relocation types, and
5933 unless linkrelax is enabled, they should not make it to this point. */
5934 if (fixP
->fx_subsy
&& !(linkrelax
&& (fixP
->fx_r_type
== BFD_RELOC_32
5935 || fixP
->fx_r_type
== BFD_RELOC_16
5936 || fixP
->fx_r_type
== BFD_RELOC_8
)))
5937 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("expression too complex"));
5939 switch (fixP
->fx_r_type
)
5941 case BFD_RELOC_32_PCREL
:
5947 switch (fixP
->fx_r_type
)
5950 fixP
->fx_r_type
= BFD_RELOC_XTENSA_DIFF8
;
5951 fixP
->fx_signed
= 0;
5954 fixP
->fx_r_type
= BFD_RELOC_XTENSA_DIFF16
;
5955 fixP
->fx_signed
= 0;
5958 fixP
->fx_r_type
= BFD_RELOC_XTENSA_DIFF32
;
5959 fixP
->fx_signed
= 0;
5965 val
= (S_GET_VALUE (fixP
->fx_addsy
) + fixP
->fx_offset
5966 - S_GET_VALUE (fixP
->fx_subsy
));
5968 /* The difference value gets written out, and the DIFF reloc
5969 identifies the address of the subtracted symbol (i.e., the one
5970 with the lowest address). */
5972 fixP
->fx_offset
-= val
;
5973 fixP
->fx_subsy
= NULL
;
5975 else if (! fixP
->fx_addsy
)
5982 case BFD_RELOC_XTENSA_PLT
:
5983 md_number_to_chars (fixpos
, val
, fixP
->fx_size
);
5984 fixP
->fx_no_overflow
= 0; /* Use the standard overflow check. */
5987 case BFD_RELOC_XTENSA_TLSDESC_FN
:
5988 case BFD_RELOC_XTENSA_TLSDESC_ARG
:
5989 case BFD_RELOC_XTENSA_TLS_TPOFF
:
5990 case BFD_RELOC_XTENSA_TLS_DTPOFF
:
5991 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
5992 md_number_to_chars (fixpos
, 0, fixP
->fx_size
);
5993 fixP
->fx_no_overflow
= 0; /* Use the standard overflow check. */
5996 case BFD_RELOC_XTENSA_SLOT0_OP
:
5997 case BFD_RELOC_XTENSA_SLOT1_OP
:
5998 case BFD_RELOC_XTENSA_SLOT2_OP
:
5999 case BFD_RELOC_XTENSA_SLOT3_OP
:
6000 case BFD_RELOC_XTENSA_SLOT4_OP
:
6001 case BFD_RELOC_XTENSA_SLOT5_OP
:
6002 case BFD_RELOC_XTENSA_SLOT6_OP
:
6003 case BFD_RELOC_XTENSA_SLOT7_OP
:
6004 case BFD_RELOC_XTENSA_SLOT8_OP
:
6005 case BFD_RELOC_XTENSA_SLOT9_OP
:
6006 case BFD_RELOC_XTENSA_SLOT10_OP
:
6007 case BFD_RELOC_XTENSA_SLOT11_OP
:
6008 case BFD_RELOC_XTENSA_SLOT12_OP
:
6009 case BFD_RELOC_XTENSA_SLOT13_OP
:
6010 case BFD_RELOC_XTENSA_SLOT14_OP
:
6013 /* Write the tentative value of a PC-relative relocation to a
6014 local symbol into the instruction. The value will be ignored
6015 by the linker, and it makes the object file disassembly
6016 readable when all branch targets are encoded in relocations. */
6018 gas_assert (fixP
->fx_addsy
);
6019 if (S_GET_SEGMENT (fixP
->fx_addsy
) == seg
6020 && !S_FORCE_RELOC (fixP
->fx_addsy
, 1))
6022 val
= (S_GET_VALUE (fixP
->fx_addsy
) + fixP
->fx_offset
6023 - md_pcrel_from (fixP
));
6024 (void) xg_apply_fix_value (fixP
, val
);
6027 else if (! fixP
->fx_addsy
)
6030 if (xg_apply_fix_value (fixP
, val
))
6035 case BFD_RELOC_XTENSA_ASM_EXPAND
:
6036 case BFD_RELOC_XTENSA_TLS_FUNC
:
6037 case BFD_RELOC_XTENSA_TLS_ARG
:
6038 case BFD_RELOC_XTENSA_TLS_CALL
:
6039 case BFD_RELOC_XTENSA_SLOT0_ALT
:
6040 case BFD_RELOC_XTENSA_SLOT1_ALT
:
6041 case BFD_RELOC_XTENSA_SLOT2_ALT
:
6042 case BFD_RELOC_XTENSA_SLOT3_ALT
:
6043 case BFD_RELOC_XTENSA_SLOT4_ALT
:
6044 case BFD_RELOC_XTENSA_SLOT5_ALT
:
6045 case BFD_RELOC_XTENSA_SLOT6_ALT
:
6046 case BFD_RELOC_XTENSA_SLOT7_ALT
:
6047 case BFD_RELOC_XTENSA_SLOT8_ALT
:
6048 case BFD_RELOC_XTENSA_SLOT9_ALT
:
6049 case BFD_RELOC_XTENSA_SLOT10_ALT
:
6050 case BFD_RELOC_XTENSA_SLOT11_ALT
:
6051 case BFD_RELOC_XTENSA_SLOT12_ALT
:
6052 case BFD_RELOC_XTENSA_SLOT13_ALT
:
6053 case BFD_RELOC_XTENSA_SLOT14_ALT
:
6054 /* These all need to be resolved at link-time. Do nothing now. */
6057 case BFD_RELOC_VTABLE_INHERIT
:
6058 case BFD_RELOC_VTABLE_ENTRY
:
6063 as_bad (_("unhandled local relocation fix %s"),
6064 bfd_get_reloc_code_name (fixP
->fx_r_type
));
6070 md_atof (int type
, char *litP
, int *sizeP
)
6072 return ieee_md_atof (type
, litP
, sizeP
, target_big_endian
);
6077 md_estimate_size_before_relax (fragS
*fragP
, segT seg ATTRIBUTE_UNUSED
)
6079 return total_frag_text_expansion (fragP
);
6083 /* Translate internal representation of relocation info to BFD target
6087 tc_gen_reloc (asection
*section ATTRIBUTE_UNUSED
, fixS
*fixp
)
6091 reloc
= XNEW (arelent
);
6092 reloc
->sym_ptr_ptr
= XNEW (asymbol
*);
6093 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
6094 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
6096 /* Make sure none of our internal relocations make it this far.
6097 They'd better have been fully resolved by this point. */
6098 gas_assert ((int) fixp
->fx_r_type
> 0);
6100 reloc
->addend
= fixp
->fx_offset
;
6102 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
6103 if (reloc
->howto
== NULL
)
6105 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
6106 _("cannot represent `%s' relocation in object file"),
6107 bfd_get_reloc_code_name (fixp
->fx_r_type
));
6108 free (reloc
->sym_ptr_ptr
);
6113 if (!fixp
->fx_pcrel
!= !reloc
->howto
->pc_relative
)
6114 as_fatal (_("internal error; cannot generate `%s' relocation"),
6115 bfd_get_reloc_code_name (fixp
->fx_r_type
));
6121 /* Checks for resource conflicts between instructions. */
6123 /* The func unit stuff could be implemented as bit-vectors rather
6124 than the iterative approach here. If it ends up being too
6125 slow, we will switch it. */
6128 new_resource_table (void *data
,
6131 unit_num_copies_func uncf
,
6132 opcode_num_units_func onuf
,
6133 opcode_funcUnit_use_unit_func ouuf
,
6134 opcode_funcUnit_use_stage_func ousf
)
6137 resource_table
*rt
= XNEW (resource_table
);
6139 rt
->cycles
= cycles
;
6140 rt
->allocated_cycles
= cycles
;
6142 rt
->unit_num_copies
= uncf
;
6143 rt
->opcode_num_units
= onuf
;
6144 rt
->opcode_unit_use
= ouuf
;
6145 rt
->opcode_unit_stage
= ousf
;
6147 rt
->units
= XCNEWVEC (unsigned char *, cycles
);
6148 for (i
= 0; i
< cycles
; i
++)
6149 rt
->units
[i
] = XCNEWVEC (unsigned char, nu
);
6156 clear_resource_table (resource_table
*rt
)
6159 for (i
= 0; i
< rt
->allocated_cycles
; i
++)
6160 for (j
= 0; j
< rt
->num_units
; j
++)
6161 rt
->units
[i
][j
] = 0;
6165 /* We never shrink it, just fake it into thinking so. */
6168 resize_resource_table (resource_table
*rt
, int cycles
)
6172 rt
->cycles
= cycles
;
6173 if (cycles
<= rt
->allocated_cycles
)
6176 old_cycles
= rt
->allocated_cycles
;
6177 rt
->allocated_cycles
= cycles
;
6179 rt
->units
= XRESIZEVEC (unsigned char *, rt
->units
, rt
->allocated_cycles
);
6180 for (i
= 0; i
< old_cycles
; i
++)
6181 rt
->units
[i
] = XRESIZEVEC (unsigned char, rt
->units
[i
], rt
->num_units
);
6182 for (i
= old_cycles
; i
< cycles
; i
++)
6183 rt
->units
[i
] = XCNEWVEC (unsigned char, rt
->num_units
);
6188 resources_available (resource_table
*rt
, xtensa_opcode opcode
, int cycle
)
6191 int uses
= (rt
->opcode_num_units
) (rt
->data
, opcode
);
6193 for (i
= 0; i
< uses
; i
++)
6195 xtensa_funcUnit unit
= (rt
->opcode_unit_use
) (rt
->data
, opcode
, i
);
6196 int stage
= (rt
->opcode_unit_stage
) (rt
->data
, opcode
, i
);
6197 int copies_in_use
= rt
->units
[stage
+ cycle
][unit
];
6198 int copies
= (rt
->unit_num_copies
) (rt
->data
, unit
);
6199 if (copies_in_use
>= copies
)
6207 reserve_resources (resource_table
*rt
, xtensa_opcode opcode
, int cycle
)
6210 int uses
= (rt
->opcode_num_units
) (rt
->data
, opcode
);
6212 for (i
= 0; i
< uses
; i
++)
6214 xtensa_funcUnit unit
= (rt
->opcode_unit_use
) (rt
->data
, opcode
, i
);
6215 int stage
= (rt
->opcode_unit_stage
) (rt
->data
, opcode
, i
);
6216 /* Note that this allows resources to be oversubscribed. That's
6217 essential to the way the optional scheduler works.
6218 resources_available reports when a resource is over-subscribed,
6219 so it's easy to tell. */
6220 rt
->units
[stage
+ cycle
][unit
]++;
6226 release_resources (resource_table
*rt
, xtensa_opcode opcode
, int cycle
)
6229 int uses
= (rt
->opcode_num_units
) (rt
->data
, opcode
);
6231 for (i
= 0; i
< uses
; i
++)
6233 xtensa_funcUnit unit
= (rt
->opcode_unit_use
) (rt
->data
, opcode
, i
);
6234 int stage
= (rt
->opcode_unit_stage
) (rt
->data
, opcode
, i
);
6235 gas_assert (rt
->units
[stage
+ cycle
][unit
] > 0);
6236 rt
->units
[stage
+ cycle
][unit
]--;
6241 /* Wrapper functions make parameterized resource reservation
6245 opcode_funcUnit_use_unit (void *data
, xtensa_opcode opcode
, int idx
)
6247 xtensa_funcUnit_use
*use
= xtensa_opcode_funcUnit_use (data
, opcode
, idx
);
6253 opcode_funcUnit_use_stage (void *data
, xtensa_opcode opcode
, int idx
)
6255 xtensa_funcUnit_use
*use
= xtensa_opcode_funcUnit_use (data
, opcode
, idx
);
6260 /* Note that this function does not check issue constraints, but
6261 solely whether the hardware is available to execute the given
6262 instructions together. It also doesn't check if the tinsns
6263 write the same state, or access the same tieports. That is
6264 checked by check_t1_t2_reads_and_writes. */
6267 resources_conflict (vliw_insn
*vinsn
)
6270 static resource_table
*rt
= NULL
;
6272 /* This is the most common case by far. Optimize it. */
6273 if (vinsn
->num_slots
== 1)
6278 xtensa_isa isa
= xtensa_default_isa
;
6279 rt
= new_resource_table
6280 (isa
, xtensa_num_pipe_stages
,
6281 xtensa_isa_num_funcUnits (isa
),
6282 (unit_num_copies_func
) xtensa_funcUnit_num_copies
,
6283 (opcode_num_units_func
) xtensa_opcode_num_funcUnit_uses
,
6284 opcode_funcUnit_use_unit
,
6285 opcode_funcUnit_use_stage
);
6288 clear_resource_table (rt
);
6290 for (i
= 0; i
< vinsn
->num_slots
; i
++)
6292 if (!resources_available (rt
, vinsn
->slots
[i
].opcode
, 0))
6294 reserve_resources (rt
, vinsn
->slots
[i
].opcode
, 0);
6301 /* finish_vinsn, emit_single_op and helper functions. */
6303 static bfd_boolean
find_vinsn_conflicts (vliw_insn
*);
6304 static xtensa_format
xg_find_narrowest_format (vliw_insn
*);
6305 static void xg_assemble_vliw_tokens (vliw_insn
*);
6308 /* We have reached the end of a bundle; emit into the frag. */
6311 finish_vinsn (vliw_insn
*vinsn
)
6316 if (find_vinsn_conflicts (vinsn
))
6318 xg_clear_vinsn (vinsn
);
6322 /* First, find a format that works. */
6323 if (vinsn
->format
== XTENSA_UNDEFINED
)
6324 vinsn
->format
= xg_find_narrowest_format (vinsn
);
6326 if (xtensa_format_num_slots (xtensa_default_isa
, vinsn
->format
) > 1
6327 && produce_flix
== FLIX_NONE
)
6329 as_bad (_("The option \"--no-allow-flix\" prohibits multi-slot flix."));
6330 xg_clear_vinsn (vinsn
);
6334 if (vinsn
->format
== XTENSA_UNDEFINED
)
6336 as_bad (_("couldn't find a valid instruction format"));
6337 fprintf (stderr
, _(" ops were: "));
6338 for (i
= 0; i
< vinsn
->num_slots
; i
++)
6339 fprintf (stderr
, _(" %s;"),
6340 xtensa_opcode_name (xtensa_default_isa
,
6341 vinsn
->slots
[i
].opcode
));
6342 fprintf (stderr
, _("\n"));
6343 xg_clear_vinsn (vinsn
);
6347 if (vinsn
->num_slots
6348 != xtensa_format_num_slots (xtensa_default_isa
, vinsn
->format
))
6350 as_bad (_("format '%s' allows %d slots, but there are %d opcodes"),
6351 xtensa_format_name (xtensa_default_isa
, vinsn
->format
),
6352 xtensa_format_num_slots (xtensa_default_isa
, vinsn
->format
),
6354 xg_clear_vinsn (vinsn
);
6358 if (resources_conflict (vinsn
))
6360 as_bad (_("illegal resource usage in bundle"));
6361 fprintf (stderr
, " ops were: ");
6362 for (i
= 0; i
< vinsn
->num_slots
; i
++)
6363 fprintf (stderr
, " %s;",
6364 xtensa_opcode_name (xtensa_default_isa
,
6365 vinsn
->slots
[i
].opcode
));
6366 fprintf (stderr
, "\n");
6367 xg_clear_vinsn (vinsn
);
6371 for (i
= 0; i
< vinsn
->num_slots
; i
++)
6373 if (vinsn
->slots
[i
].opcode
!= XTENSA_UNDEFINED
)
6375 symbolS
*lit_sym
= NULL
;
6377 bfd_boolean e
= FALSE
;
6378 bfd_boolean saved_density
= density_supported
;
6380 /* We don't want to narrow ops inside multi-slot bundles. */
6381 if (vinsn
->num_slots
> 1)
6382 density_supported
= FALSE
;
6384 istack_init (&slotstack
);
6385 if (vinsn
->slots
[i
].opcode
== xtensa_nop_opcode
)
6387 vinsn
->slots
[i
].opcode
=
6388 xtensa_format_slot_nop_opcode (xtensa_default_isa
,
6390 vinsn
->slots
[i
].ntok
= 0;
6393 if (xg_expand_assembly_insn (&slotstack
, &vinsn
->slots
[i
]))
6399 density_supported
= saved_density
;
6403 xg_clear_vinsn (vinsn
);
6407 for (j
= 0; j
< slotstack
.ninsn
; j
++)
6409 TInsn
*insn
= &slotstack
.insn
[j
];
6410 if (insn
->insn_type
== ITYPE_LITERAL
)
6412 gas_assert (lit_sym
== NULL
);
6413 lit_sym
= xg_assemble_literal (insn
);
6417 gas_assert (insn
->insn_type
== ITYPE_INSN
);
6419 xg_resolve_literals (insn
, lit_sym
);
6420 if (j
!= slotstack
.ninsn
- 1)
6421 emit_single_op (insn
);
6425 if (vinsn
->num_slots
> 1)
6427 if (opcode_fits_format_slot
6428 (slotstack
.insn
[slotstack
.ninsn
- 1].opcode
,
6431 vinsn
->slots
[i
] = slotstack
.insn
[slotstack
.ninsn
- 1];
6435 emit_single_op (&slotstack
.insn
[slotstack
.ninsn
- 1]);
6436 if (vinsn
->format
== XTENSA_UNDEFINED
)
6437 vinsn
->slots
[i
].opcode
= xtensa_nop_opcode
;
6439 vinsn
->slots
[i
].opcode
6440 = xtensa_format_slot_nop_opcode (xtensa_default_isa
,
6443 vinsn
->slots
[i
].ntok
= 0;
6448 vinsn
->slots
[0] = slotstack
.insn
[slotstack
.ninsn
- 1];
6449 vinsn
->format
= XTENSA_UNDEFINED
;
6454 /* Now check resource conflicts on the modified bundle. */
6455 if (resources_conflict (vinsn
))
6457 as_bad (_("illegal resource usage in bundle"));
6458 fprintf (stderr
, " ops were: ");
6459 for (i
= 0; i
< vinsn
->num_slots
; i
++)
6460 fprintf (stderr
, " %s;",
6461 xtensa_opcode_name (xtensa_default_isa
,
6462 vinsn
->slots
[i
].opcode
));
6463 fprintf (stderr
, "\n");
6464 xg_clear_vinsn (vinsn
);
6468 /* First, find a format that works. */
6469 if (vinsn
->format
== XTENSA_UNDEFINED
)
6470 vinsn
->format
= xg_find_narrowest_format (vinsn
);
6472 xg_assemble_vliw_tokens (vinsn
);
6474 xg_clear_vinsn (vinsn
);
6476 xtensa_check_frag_count ();
6480 /* Given an vliw instruction, what conflicts are there in register
6481 usage and in writes to states and queues?
6483 This function does two things:
6484 1. Reports an error when a vinsn contains illegal combinations
6485 of writes to registers states or queues.
6486 2. Marks individual tinsns as not relaxable if the combination
6487 contains antidependencies.
6489 Job 2 handles things like swap semantics in instructions that need
6490 to be relaxed. For example,
6494 normally would be relaxed to
6499 _but_, if the above instruction is bundled with an a0 reader, e.g.,
6501 { addi a0, a1, 10000 ; add a2, a0, a4 ; }
6503 then we can't relax it into
6506 { add a0, a1, a0 ; add a2, a0, a4 ; }
6508 because the value of a0 is trashed before the second add can read it. */
6510 static char check_t1_t2_reads_and_writes (TInsn
*, TInsn
*);
6513 find_vinsn_conflicts (vliw_insn
*vinsn
)
6517 xtensa_isa isa
= xtensa_default_isa
;
6519 gas_assert (!past_xtensa_end
);
6521 for (i
= 0 ; i
< vinsn
->num_slots
; i
++)
6523 TInsn
*op1
= &vinsn
->slots
[i
];
6524 if (op1
->is_specific_opcode
)
6525 op1
->keep_wide
= TRUE
;
6527 op1
->keep_wide
= FALSE
;
6530 for (i
= 0 ; i
< vinsn
->num_slots
; i
++)
6532 TInsn
*op1
= &vinsn
->slots
[i
];
6534 if (xtensa_opcode_is_branch (isa
, op1
->opcode
) == 1)
6537 for (j
= 0; j
< vinsn
->num_slots
; j
++)
6541 TInsn
*op2
= &vinsn
->slots
[j
];
6542 char conflict_type
= check_t1_t2_reads_and_writes (op1
, op2
);
6543 switch (conflict_type
)
6546 as_bad (_("opcodes '%s' (slot %d) and '%s' (slot %d) write the same register"),
6547 xtensa_opcode_name (isa
, op1
->opcode
), i
,
6548 xtensa_opcode_name (isa
, op2
->opcode
), j
);
6551 as_bad (_("opcodes '%s' (slot %d) and '%s' (slot %d) write the same state"),
6552 xtensa_opcode_name (isa
, op1
->opcode
), i
,
6553 xtensa_opcode_name (isa
, op2
->opcode
), j
);
6556 as_bad (_("opcodes '%s' (slot %d) and '%s' (slot %d) write the same port"),
6557 xtensa_opcode_name (isa
, op1
->opcode
), i
,
6558 xtensa_opcode_name (isa
, op2
->opcode
), j
);
6561 as_bad (_("opcodes '%s' (slot %d) and '%s' (slot %d) both have volatile port accesses"),
6562 xtensa_opcode_name (isa
, op1
->opcode
), i
,
6563 xtensa_opcode_name (isa
, op2
->opcode
), j
);
6566 /* Everything is OK. */
6569 op2
->is_specific_opcode
= (op2
->is_specific_opcode
6570 || conflict_type
== 'a');
6577 as_bad (_("multiple branches or jumps in the same bundle"));
6585 /* Check how the state used by t1 and t2 relate.
6588 case A: t1 reads a register t2 writes (an antidependency within a bundle)
6589 case B: no relationship between what is read and written (both could
6590 read the same reg though)
6591 case C: t1 writes a register t2 writes (a register conflict within a
6593 case D: t1 writes a state that t2 also writes
6594 case E: t1 writes a tie queue that t2 also writes
6595 case F: two volatile queue accesses
6599 check_t1_t2_reads_and_writes (TInsn
*t1
, TInsn
*t2
)
6601 xtensa_isa isa
= xtensa_default_isa
;
6602 xtensa_regfile t1_regfile
, t2_regfile
;
6604 int t1_base_reg
, t1_last_reg
;
6605 int t2_base_reg
, t2_last_reg
;
6606 char t1_inout
, t2_inout
;
6608 char conflict
= 'b';
6613 bfd_boolean t1_volatile
= FALSE
;
6614 bfd_boolean t2_volatile
= FALSE
;
6616 /* Check registers. */
6617 for (j
= 0; j
< t2
->ntok
; j
++)
6619 if (xtensa_operand_is_register (isa
, t2
->opcode
, j
) != 1)
6622 t2_regfile
= xtensa_operand_regfile (isa
, t2
->opcode
, j
);
6623 t2_base_reg
= t2
->tok
[j
].X_add_number
;
6624 t2_last_reg
= t2_base_reg
+ xtensa_operand_num_regs (isa
, t2
->opcode
, j
);
6626 for (i
= 0; i
< t1
->ntok
; i
++)
6628 if (xtensa_operand_is_register (isa
, t1
->opcode
, i
) != 1)
6631 t1_regfile
= xtensa_operand_regfile (isa
, t1
->opcode
, i
);
6633 if (t1_regfile
!= t2_regfile
)
6636 t1_inout
= xtensa_operand_inout (isa
, t1
->opcode
, i
);
6637 t2_inout
= xtensa_operand_inout (isa
, t2
->opcode
, j
);
6639 if (xtensa_operand_is_known_reg (isa
, t1
->opcode
, i
) == 0
6640 || xtensa_operand_is_known_reg (isa
, t2
->opcode
, j
) == 0)
6642 if (t1_inout
== 'm' || t1_inout
== 'o'
6643 || t2_inout
== 'm' || t2_inout
== 'o')
6650 t1_base_reg
= t1
->tok
[i
].X_add_number
;
6651 t1_last_reg
= (t1_base_reg
6652 + xtensa_operand_num_regs (isa
, t1
->opcode
, i
));
6654 for (t1_reg
= t1_base_reg
; t1_reg
< t1_last_reg
; t1_reg
++)
6656 for (t2_reg
= t2_base_reg
; t2_reg
< t2_last_reg
; t2_reg
++)
6658 if (t1_reg
!= t2_reg
)
6661 if (t2_inout
== 'i' && (t1_inout
== 'm' || t1_inout
== 'o'))
6667 if (t1_inout
== 'i' && (t2_inout
== 'm' || t2_inout
== 'o'))
6673 if (t1_inout
!= 'i' && t2_inout
!= 'i')
6681 t1_states
= xtensa_opcode_num_stateOperands (isa
, t1
->opcode
);
6682 t2_states
= xtensa_opcode_num_stateOperands (isa
, t2
->opcode
);
6683 for (j
= 0; j
< t2_states
; j
++)
6685 xtensa_state t2_so
= xtensa_stateOperand_state (isa
, t2
->opcode
, j
);
6686 t2_inout
= xtensa_stateOperand_inout (isa
, t2
->opcode
, j
);
6687 for (i
= 0; i
< t1_states
; i
++)
6689 xtensa_state t1_so
= xtensa_stateOperand_state (isa
, t1
->opcode
, i
);
6690 t1_inout
= xtensa_stateOperand_inout (isa
, t1
->opcode
, i
);
6691 if (t1_so
!= t2_so
|| xtensa_state_is_shared_or (isa
, t1_so
) == 1)
6694 if (t2_inout
== 'i' && (t1_inout
== 'm' || t1_inout
== 'o'))
6700 if (t1_inout
== 'i' && (t2_inout
== 'm' || t2_inout
== 'o'))
6706 if (t1_inout
!= 'i' && t2_inout
!= 'i')
6711 /* Check tieports. */
6712 t1_interfaces
= xtensa_opcode_num_interfaceOperands (isa
, t1
->opcode
);
6713 t2_interfaces
= xtensa_opcode_num_interfaceOperands (isa
, t2
->opcode
);
6714 for (j
= 0; j
< t2_interfaces
; j
++)
6716 xtensa_interface t2_int
6717 = xtensa_interfaceOperand_interface (isa
, t2
->opcode
, j
);
6718 int t2_class
= xtensa_interface_class_id (isa
, t2_int
);
6720 t2_inout
= xtensa_interface_inout (isa
, t2_int
);
6721 if (xtensa_interface_has_side_effect (isa
, t2_int
) == 1)
6724 for (i
= 0; i
< t1_interfaces
; i
++)
6726 xtensa_interface t1_int
6727 = xtensa_interfaceOperand_interface (isa
, t1
->opcode
, j
);
6728 int t1_class
= xtensa_interface_class_id (isa
, t1_int
);
6730 t1_inout
= xtensa_interface_inout (isa
, t1_int
);
6731 if (xtensa_interface_has_side_effect (isa
, t1_int
) == 1)
6734 if (t1_volatile
&& t2_volatile
&& (t1_class
== t2_class
))
6737 if (t1_int
!= t2_int
)
6740 if (t2_inout
== 'i' && t1_inout
== 'o')
6746 if (t1_inout
== 'i' && t2_inout
== 'o')
6752 if (t1_inout
!= 'i' && t2_inout
!= 'i')
6761 static xtensa_format
6762 xg_find_narrowest_format (vliw_insn
*vinsn
)
6764 /* Right now we assume that the ops within the vinsn are properly
6765 ordered for the slots that the programmer wanted them in. In
6766 other words, we don't rearrange the ops in hopes of finding a
6767 better format. The scheduler handles that. */
6769 xtensa_isa isa
= xtensa_default_isa
;
6770 xtensa_format format
;
6771 xtensa_opcode nop_opcode
= xtensa_nop_opcode
;
6773 if (vinsn
->num_slots
== 1)
6774 return xg_get_single_format (vinsn
->slots
[0].opcode
);
6776 for (format
= 0; format
< xtensa_isa_num_formats (isa
); format
++)
6779 xg_copy_vinsn (&v_copy
, vinsn
);
6780 if (xtensa_format_num_slots (isa
, format
) == v_copy
.num_slots
)
6784 for (slot
= 0; slot
< v_copy
.num_slots
; slot
++)
6786 if (v_copy
.slots
[slot
].opcode
== nop_opcode
)
6788 v_copy
.slots
[slot
].opcode
=
6789 xtensa_format_slot_nop_opcode (isa
, format
, slot
);
6790 v_copy
.slots
[slot
].ntok
= 0;
6793 if (opcode_fits_format_slot (v_copy
.slots
[slot
].opcode
,
6796 else if (v_copy
.num_slots
> 1)
6799 /* Try the widened version. */
6800 if (!v_copy
.slots
[slot
].keep_wide
6801 && !v_copy
.slots
[slot
].is_specific_opcode
6802 && xg_is_single_relaxable_insn (&v_copy
.slots
[slot
],
6804 && opcode_fits_format_slot (widened
.opcode
,
6807 v_copy
.slots
[slot
] = widened
;
6812 if (fit
== v_copy
.num_slots
)
6814 xg_copy_vinsn (vinsn
, &v_copy
);
6815 xtensa_format_encode (isa
, format
, vinsn
->insnbuf
);
6816 vinsn
->format
= format
;
6822 if (format
== xtensa_isa_num_formats (isa
))
6823 return XTENSA_UNDEFINED
;
6829 /* Return the additional space needed in a frag
6830 for possible relaxations of any ops in a VLIW insn.
6831 Also fill out the relaxations that might be required of
6832 each tinsn in the vinsn. */
6835 relaxation_requirements (vliw_insn
*vinsn
, bfd_boolean
*pfinish_frag
)
6837 bfd_boolean finish_frag
= FALSE
;
6838 int extra_space
= 0;
6841 for (slot
= 0; slot
< vinsn
->num_slots
; slot
++)
6843 TInsn
*tinsn
= &vinsn
->slots
[slot
];
6844 if (!tinsn_has_symbolic_operands (tinsn
))
6846 /* A narrow instruction could be widened later to help
6847 alignment issues. */
6848 if (xg_is_single_relaxable_insn (tinsn
, 0, TRUE
)
6849 && !tinsn
->is_specific_opcode
6850 && vinsn
->num_slots
== 1)
6852 /* Difference in bytes between narrow and wide insns... */
6854 tinsn
->subtype
= RELAX_NARROW
;
6859 if (workaround_b_j_loop_end
6860 && tinsn
->opcode
== xtensa_jx_opcode
6861 && use_transform ())
6863 /* Add 2 of these. */
6864 extra_space
+= 3; /* for the nop size */
6865 tinsn
->subtype
= RELAX_ADD_NOP_IF_PRE_LOOP_END
;
6868 /* Need to assemble it with space for the relocation. */
6869 if (xg_is_relaxable_insn (tinsn
, 0)
6870 && !tinsn
->is_specific_opcode
)
6872 int max_size
= xg_get_max_insn_widen_size (tinsn
->opcode
);
6873 int max_literal_size
=
6874 xg_get_max_insn_widen_literal_size (tinsn
->opcode
);
6876 tinsn
->literal_space
= max_literal_size
;
6878 tinsn
->subtype
= RELAX_IMMED
;
6879 extra_space
+= max_size
;
6883 /* A fix record will be added for this instruction prior
6884 to relaxation, so make it end the frag. */
6889 *pfinish_frag
= finish_frag
;
6895 bundle_tinsn (TInsn
*tinsn
, vliw_insn
*vinsn
)
6897 xtensa_isa isa
= xtensa_default_isa
;
6898 int slot
, chosen_slot
;
6900 vinsn
->format
= xg_get_single_format (tinsn
->opcode
);
6901 gas_assert (vinsn
->format
!= XTENSA_UNDEFINED
);
6902 vinsn
->num_slots
= xtensa_format_num_slots (isa
, vinsn
->format
);
6904 chosen_slot
= xg_get_single_slot (tinsn
->opcode
);
6905 for (slot
= 0; slot
< vinsn
->num_slots
; slot
++)
6907 if (slot
== chosen_slot
)
6908 vinsn
->slots
[slot
] = *tinsn
;
6911 vinsn
->slots
[slot
].opcode
=
6912 xtensa_format_slot_nop_opcode (isa
, vinsn
->format
, slot
);
6913 vinsn
->slots
[slot
].ntok
= 0;
6914 vinsn
->slots
[slot
].insn_type
= ITYPE_INSN
;
6921 emit_single_op (TInsn
*orig_insn
)
6924 IStack istack
; /* put instructions into here */
6925 symbolS
*lit_sym
= NULL
;
6926 symbolS
*label_sym
= NULL
;
6928 istack_init (&istack
);
6930 /* Special-case for "movi aX, foo" which is guaranteed to need relaxing.
6931 Because the scheduling and bundling characteristics of movi and
6932 l32r or const16 are so different, we can do much better if we relax
6933 it prior to scheduling and bundling, rather than after. */
6934 if ((orig_insn
->opcode
== xtensa_movi_opcode
6935 || orig_insn
->opcode
== xtensa_movi_n_opcode
)
6936 && !cur_vinsn
.inside_bundle
6937 && (orig_insn
->tok
[1].X_op
== O_symbol
6938 || orig_insn
->tok
[1].X_op
== O_pltrel
6939 || orig_insn
->tok
[1].X_op
== O_tlsfunc
6940 || orig_insn
->tok
[1].X_op
== O_tlsarg
6941 || orig_insn
->tok
[1].X_op
== O_tpoff
6942 || orig_insn
->tok
[1].X_op
== O_dtpoff
)
6943 && !orig_insn
->is_specific_opcode
&& use_transform ())
6944 xg_assembly_relax (&istack
, orig_insn
, now_seg
, frag_now
, 0, 1, 0);
6946 if (xg_expand_assembly_insn (&istack
, orig_insn
))
6949 for (i
= 0; i
< istack
.ninsn
; i
++)
6951 TInsn
*insn
= &istack
.insn
[i
];
6952 switch (insn
->insn_type
)
6955 gas_assert (lit_sym
== NULL
);
6956 lit_sym
= xg_assemble_literal (insn
);
6960 static int relaxed_sym_idx
= 0;
6961 char *label
= XNEWVEC (char, strlen (FAKE_LABEL_NAME
) + 12);
6962 sprintf (label
, "%s_rl_%x", FAKE_LABEL_NAME
, relaxed_sym_idx
++);
6964 gas_assert (label_sym
== NULL
);
6965 label_sym
= symbol_find_or_make (label
);
6966 gas_assert (label_sym
);
6974 xg_resolve_literals (insn
, lit_sym
);
6976 xg_resolve_labels (insn
, label_sym
);
6978 bundle_tinsn (insn
, &v
);
6993 total_frag_text_expansion (fragS
*fragP
)
6996 int total_expansion
= 0;
6998 for (slot
= 0; slot
< config_max_slots
; slot
++)
6999 total_expansion
+= fragP
->tc_frag_data
.text_expansion
[slot
];
7001 return total_expansion
;
7005 /* Emit a vliw instruction to the current fragment. */
7008 xg_assemble_vliw_tokens (vliw_insn
*vinsn
)
7010 bfd_boolean finish_frag
;
7011 bfd_boolean is_jump
= FALSE
;
7012 bfd_boolean is_branch
= FALSE
;
7013 xtensa_isa isa
= xtensa_default_isa
;
7018 struct dwarf2_line_info debug_line
;
7019 bfd_boolean loc_directive_seen
= FALSE
;
7022 memset (&debug_line
, 0, sizeof (struct dwarf2_line_info
));
7024 if (generating_literals
)
7026 static int reported
= 0;
7028 as_bad_where (frag_now
->fr_file
, frag_now
->fr_line
,
7029 _("cannot assemble into a literal fragment"));
7036 if (frag_now_fix () != 0
7037 && (! frag_now
->tc_frag_data
.is_insn
7038 || (vinsn_has_specific_opcodes (vinsn
) && use_transform ())
7039 || (!use_transform ()) != frag_now
->tc_frag_data
.is_no_transform
7040 || (directive_state
[directive_longcalls
]
7041 != frag_now
->tc_frag_data
.use_longcalls
)
7042 || (directive_state
[directive_absolute_literals
]
7043 != frag_now
->tc_frag_data
.use_absolute_literals
)))
7045 frag_wane (frag_now
);
7047 xtensa_set_frag_assembly_state (frag_now
);
7050 if (workaround_a0_b_retw
7051 && vinsn
->num_slots
== 1
7052 && (get_last_insn_flags (now_seg
, now_subseg
) & FLAG_IS_A0_WRITER
) != 0
7053 && xtensa_opcode_is_branch (isa
, vinsn
->slots
[0].opcode
) == 1
7054 && use_transform ())
7056 has_a0_b_retw
= TRUE
;
7058 /* Mark this fragment with the special RELAX_ADD_NOP_IF_A0_B_RETW.
7059 After the first assembly pass we will check all of them and
7060 add a nop if needed. */
7061 frag_now
->tc_frag_data
.is_insn
= TRUE
;
7062 frag_var (rs_machine_dependent
, 4, 4,
7063 RELAX_ADD_NOP_IF_A0_B_RETW
,
7064 frag_now
->fr_symbol
,
7065 frag_now
->fr_offset
,
7067 xtensa_set_frag_assembly_state (frag_now
);
7068 frag_now
->tc_frag_data
.is_insn
= TRUE
;
7069 frag_var (rs_machine_dependent
, 4, 4,
7070 RELAX_ADD_NOP_IF_A0_B_RETW
,
7071 frag_now
->fr_symbol
,
7072 frag_now
->fr_offset
,
7074 xtensa_set_frag_assembly_state (frag_now
);
7077 for (slot
= 0; slot
< vinsn
->num_slots
; slot
++)
7079 tinsn
= &vinsn
->slots
[slot
];
7081 /* See if the instruction implies an aligned section. */
7082 if (xtensa_opcode_is_loop (isa
, tinsn
->opcode
) == 1)
7083 record_alignment (now_seg
, 2);
7085 /* Determine the best line number for debug info. */
7086 if ((tinsn
->loc_directive_seen
|| !loc_directive_seen
)
7087 && (tinsn
->debug_line
.filenum
!= debug_line
.filenum
7088 || tinsn
->debug_line
.line
< debug_line
.line
7089 || tinsn
->debug_line
.column
< debug_line
.column
))
7090 debug_line
= tinsn
->debug_line
;
7091 if (tinsn
->loc_directive_seen
)
7092 loc_directive_seen
= TRUE
;
7095 /* Special cases for instructions that force an alignment... */
7096 /* None of these opcodes are bundle-able. */
7097 if (xtensa_opcode_is_loop (isa
, vinsn
->slots
[0].opcode
) == 1)
7101 /* Remember the symbol that marks the end of the loop in the frag
7102 that marks the start of the loop. This way we can easily find
7103 the end of the loop at the beginning, without adding special code
7104 to mark the loop instructions themselves. */
7105 symbolS
*target_sym
= NULL
;
7106 if (vinsn
->slots
[0].tok
[1].X_op
== O_symbol
)
7107 target_sym
= vinsn
->slots
[0].tok
[1].X_add_symbol
;
7109 xtensa_set_frag_assembly_state (frag_now
);
7110 frag_now
->tc_frag_data
.is_insn
= TRUE
;
7112 max_fill
= get_text_align_max_fill_size
7113 (get_text_align_power (xtensa_fetch_width
),
7114 TRUE
, frag_now
->tc_frag_data
.is_no_density
);
7116 if (use_transform ())
7117 frag_var (rs_machine_dependent
, max_fill
, max_fill
,
7118 RELAX_ALIGN_NEXT_OPCODE
, target_sym
, 0, NULL
);
7120 frag_var (rs_machine_dependent
, 0, 0,
7121 RELAX_CHECK_ALIGN_NEXT_OPCODE
, target_sym
, 0, NULL
);
7122 xtensa_set_frag_assembly_state (frag_now
);
7125 if (vinsn
->slots
[0].opcode
== xtensa_entry_opcode
7126 && !vinsn
->slots
[0].is_specific_opcode
)
7128 xtensa_mark_literal_pool_location ();
7129 xtensa_move_labels (frag_now
, 0);
7130 frag_var (rs_align_test
, 1, 1, 0, NULL
, 2, NULL
);
7133 if (vinsn
->num_slots
== 1)
7135 if (workaround_a0_b_retw
&& use_transform ())
7136 set_last_insn_flags (now_seg
, now_subseg
, FLAG_IS_A0_WRITER
,
7137 is_register_writer (&vinsn
->slots
[0], "a", 0));
7139 set_last_insn_flags (now_seg
, now_subseg
, FLAG_IS_BAD_LOOPEND
,
7140 is_bad_loopend_opcode (&vinsn
->slots
[0]));
7143 set_last_insn_flags (now_seg
, now_subseg
, FLAG_IS_BAD_LOOPEND
, FALSE
);
7145 insn_size
= xtensa_format_length (isa
, vinsn
->format
);
7147 extra_space
= relaxation_requirements (vinsn
, &finish_frag
);
7149 /* vinsn_to_insnbuf will produce the error. */
7150 if (vinsn
->format
!= XTENSA_UNDEFINED
)
7152 f
= frag_more (insn_size
+ extra_space
);
7153 xtensa_set_frag_assembly_state (frag_now
);
7154 frag_now
->tc_frag_data
.is_insn
= TRUE
;
7157 vinsn_to_insnbuf (vinsn
, f
, frag_now
, FALSE
);
7158 if (vinsn
->format
== XTENSA_UNDEFINED
)
7161 xtensa_insnbuf_to_chars (isa
, vinsn
->insnbuf
, (unsigned char *) f
, 0);
7163 if (debug_type
== DEBUG_DWARF2
|| loc_directive_seen
)
7164 dwarf2_gen_line_info (frag_now_fix () - (insn_size
+ extra_space
),
7167 for (slot
= 0; slot
< vinsn
->num_slots
; slot
++)
7169 tinsn
= &vinsn
->slots
[slot
];
7170 frag_now
->tc_frag_data
.slot_subtypes
[slot
] = tinsn
->subtype
;
7171 frag_now
->tc_frag_data
.slot_symbols
[slot
] = tinsn
->symbol
;
7172 frag_now
->tc_frag_data
.slot_offsets
[slot
] = tinsn
->offset
;
7173 frag_now
->tc_frag_data
.literal_frags
[slot
] = tinsn
->literal_frag
;
7174 if (tinsn
->opcode
== xtensa_l32r_opcode
)
7176 frag_now
->tc_frag_data
.literal_frags
[slot
] =
7177 tinsn
->tok
[1].X_add_symbol
->sy_frag
;
7179 if (tinsn
->literal_space
!= 0)
7180 xg_assemble_literal_space (tinsn
->literal_space
, slot
);
7181 frag_now
->tc_frag_data
.free_reg
[slot
] = tinsn
->extra_arg
;
7183 if (tinsn
->subtype
== RELAX_NARROW
)
7184 gas_assert (vinsn
->num_slots
== 1);
7185 if (xtensa_opcode_is_jump (isa
, tinsn
->opcode
) == 1)
7187 if (xtensa_opcode_is_branch (isa
, tinsn
->opcode
) == 1)
7190 if (tinsn
->subtype
|| tinsn
->symbol
|| tinsn
->offset
7191 || tinsn
->literal_frag
|| is_jump
|| is_branch
)
7195 if (vinsn_has_specific_opcodes (vinsn
) && use_transform ())
7196 frag_now
->tc_frag_data
.is_specific_opcode
= TRUE
;
7200 frag_variant (rs_machine_dependent
,
7201 extra_space
, extra_space
, RELAX_SLOTS
,
7202 frag_now
->fr_symbol
, frag_now
->fr_offset
, f
);
7203 xtensa_set_frag_assembly_state (frag_now
);
7206 /* Special cases for loops:
7207 close_loop_end should be inserted AFTER short_loop.
7208 Make sure that CLOSE loops are processed BEFORE short_loops
7209 when converting them. */
7211 /* "short_loop": Add a NOP if the loop is < 4 bytes. */
7212 if (xtensa_opcode_is_loop (isa
, vinsn
->slots
[0].opcode
) == 1
7213 && !vinsn
->slots
[0].is_specific_opcode
)
7215 if (workaround_short_loop
&& use_transform ())
7217 maybe_has_short_loop
= TRUE
;
7218 frag_now
->tc_frag_data
.is_insn
= TRUE
;
7219 frag_var (rs_machine_dependent
, 4, 4,
7220 RELAX_ADD_NOP_IF_SHORT_LOOP
,
7221 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
7222 frag_now
->tc_frag_data
.is_insn
= TRUE
;
7223 frag_var (rs_machine_dependent
, 4, 4,
7224 RELAX_ADD_NOP_IF_SHORT_LOOP
,
7225 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
7228 /* "close_loop_end": Add up to 12 bytes of NOPs to keep a
7229 loop at least 12 bytes away from another loop's end. */
7230 if (workaround_close_loop_end
&& use_transform ())
7232 maybe_has_close_loop_end
= TRUE
;
7233 frag_now
->tc_frag_data
.is_insn
= TRUE
;
7234 frag_var (rs_machine_dependent
, 12, 12,
7235 RELAX_ADD_NOP_IF_CLOSE_LOOP_END
,
7236 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
7240 if (use_transform ())
7244 gas_assert (finish_frag
);
7245 frag_var (rs_machine_dependent
,
7246 xtensa_fetch_width
, xtensa_fetch_width
,
7248 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
7249 xtensa_set_frag_assembly_state (frag_now
);
7250 xtensa_maybe_create_trampoline_frag ();
7251 /* Always create one here. */
7252 xtensa_maybe_create_literal_pool_frag (TRUE
, FALSE
);
7254 else if (is_branch
&& do_align_targets ())
7256 gas_assert (finish_frag
);
7257 frag_var (rs_machine_dependent
,
7258 xtensa_fetch_width
, xtensa_fetch_width
,
7259 RELAX_MAYBE_UNREACHABLE
,
7260 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
7261 xtensa_set_frag_assembly_state (frag_now
);
7262 frag_var (rs_machine_dependent
,
7264 RELAX_MAYBE_DESIRE_ALIGN
,
7265 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
7266 xtensa_set_frag_assembly_state (frag_now
);
7270 /* Now, if the original opcode was a call... */
7271 if (do_align_targets ()
7272 && xtensa_opcode_is_call (isa
, vinsn
->slots
[0].opcode
) == 1)
7274 float freq
= get_subseg_total_freq (now_seg
, now_subseg
);
7275 frag_now
->tc_frag_data
.is_insn
= TRUE
;
7276 frag_var (rs_machine_dependent
, 4, (int) freq
, RELAX_DESIRE_ALIGN
,
7277 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
7278 xtensa_set_frag_assembly_state (frag_now
);
7281 if (vinsn_has_specific_opcodes (vinsn
) && use_transform ())
7283 frag_wane (frag_now
);
7285 xtensa_set_frag_assembly_state (frag_now
);
7290 /* xtensa_end and helper functions. */
7292 static void xtensa_cleanup_align_frags (void);
7293 static void xtensa_fix_target_frags (void);
7294 static void xtensa_mark_narrow_branches (void);
7295 static void xtensa_mark_zcl_first_insns (void);
7296 static void xtensa_mark_difference_of_two_symbols (void);
7297 static void xtensa_fix_a0_b_retw_frags (void);
7298 static void xtensa_fix_b_j_loop_end_frags (void);
7299 static void xtensa_fix_close_loop_end_frags (void);
7300 static void xtensa_fix_short_loop_frags (void);
7301 static void xtensa_sanity_check (void);
7302 static void xtensa_add_config_info (void);
7307 directive_balance ();
7308 xtensa_flush_pending_output ();
7310 past_xtensa_end
= TRUE
;
7312 xtensa_move_literals ();
7314 xtensa_reorder_segments ();
7315 xtensa_cleanup_align_frags ();
7316 xtensa_fix_target_frags ();
7317 if (workaround_a0_b_retw
&& has_a0_b_retw
)
7318 xtensa_fix_a0_b_retw_frags ();
7319 if (workaround_b_j_loop_end
)
7320 xtensa_fix_b_j_loop_end_frags ();
7322 /* "close_loop_end" should be processed BEFORE "short_loop". */
7323 if (workaround_close_loop_end
&& maybe_has_close_loop_end
)
7324 xtensa_fix_close_loop_end_frags ();
7326 if (workaround_short_loop
&& maybe_has_short_loop
)
7327 xtensa_fix_short_loop_frags ();
7329 xtensa_mark_narrow_branches ();
7330 xtensa_mark_zcl_first_insns ();
7332 xtensa_sanity_check ();
7334 xtensa_add_config_info ();
7336 xtensa_check_frag_count ();
7340 struct trampoline_frag
7342 struct trampoline_frag
*next
;
7343 bfd_boolean needs_jump_around
;
7348 struct trampoline_seg
7350 struct trampoline_seg
*next
;
7352 struct trampoline_frag trampoline_list
;
7355 static struct trampoline_seg trampoline_seg_list
;
7356 #define J_RANGE (128 * 1024)
7358 static int unreachable_count
= 0;
7362 xtensa_maybe_create_trampoline_frag (void)
7364 if (!use_trampolines
)
7367 /* We create an area for possible trampolines every 10 unreachable frags.
7368 These are preferred over the ones not preceded by an unreachable frag,
7369 because we don't have to jump around them. This function is called after
7370 each RELAX_UNREACHABLE frag is created. */
7372 if (++unreachable_count
> 10)
7374 xtensa_create_trampoline_frag (FALSE
);
7375 clear_frag_count ();
7376 unreachable_count
= 0;
7381 xtensa_check_frag_count (void)
7383 if (!use_trampolines
|| frag_now
->tc_frag_data
.is_no_transform
)
7386 /* We create an area for possible trampolines every 8000 frags or so. This
7387 is an estimate based on the max range of a "j" insn (+/-128K) divided
7388 by a typical frag byte count (16), minus a few for safety. This function
7389 is called after each source line is processed. */
7391 if (get_frag_count () > 8000)
7393 xtensa_create_trampoline_frag (TRUE
);
7394 clear_frag_count ();
7395 unreachable_count
= 0;
7398 /* We create an area for a possible literal pool every N (default 5000)
7400 xtensa_maybe_create_literal_pool_frag (TRUE
, TRUE
);
7403 static xtensa_insnbuf trampoline_buf
= NULL
;
7404 static xtensa_insnbuf trampoline_slotbuf
= NULL
;
7406 static xtensa_insnbuf litpool_buf
= NULL
;
7407 static xtensa_insnbuf litpool_slotbuf
= NULL
;
7409 #define TRAMPOLINE_FRAG_SIZE 3000
7412 xtensa_create_trampoline_frag (bfd_boolean needs_jump_around
)
7414 /* Emit a frag where we can place intermediate jump instructions,
7415 in case we need to jump farther than 128K bytes.
7416 Each jump instruction takes three bytes.
7417 We allocate enough for 1000 trampolines in each frag.
7418 If that's not enough, oh well. */
7420 struct trampoline_seg
*ts
= trampoline_seg_list
.next
;
7421 struct trampoline_frag
*tf
;
7424 int size
= TRAMPOLINE_FRAG_SIZE
;
7426 for ( ; ts
; ts
= ts
->next
)
7428 if (ts
->seg
== now_seg
)
7434 ts
= XCNEW(struct trampoline_seg
);
7435 ts
->next
= trampoline_seg_list
.next
;
7436 trampoline_seg_list
.next
= ts
;
7440 frag_wane (frag_now
);
7442 xtensa_set_frag_assembly_state (frag_now
);
7443 varP
= frag_var (rs_machine_dependent
, size
, size
, RELAX_TRAMPOLINE
, NULL
, 0, NULL
);
7444 fragP
= (fragS
*)(varP
- SIZEOF_STRUCT_FRAG
);
7445 if (trampoline_buf
== NULL
)
7447 trampoline_buf
= xtensa_insnbuf_alloc (xtensa_default_isa
);
7448 trampoline_slotbuf
= xtensa_insnbuf_alloc (xtensa_default_isa
);
7450 tf
= XNEW (struct trampoline_frag
);
7451 tf
->next
= ts
->trampoline_list
.next
;
7452 ts
->trampoline_list
.next
= tf
;
7453 tf
->needs_jump_around
= needs_jump_around
;
7459 static struct trampoline_seg
*
7460 find_trampoline_seg (asection
*seg
)
7462 struct trampoline_seg
*ts
= trampoline_seg_list
.next
;
7464 for ( ; ts
; ts
= ts
->next
)
7474 void dump_trampolines (void);
7477 dump_trampolines (void)
7479 struct trampoline_seg
*ts
= trampoline_seg_list
.next
;
7481 for ( ; ts
; ts
= ts
->next
)
7483 asection
*seg
= ts
->seg
;
7487 fprintf(stderr
, "SECTION %s\n", seg
->name
);
7488 struct trampoline_frag
*tf
= ts
->trampoline_list
.next
;
7489 for ( ; tf
; tf
= tf
->next
)
7491 if (tf
->fragP
== NULL
)
7493 fprintf(stderr
, " 0x%08x: fix=%d, jump_around=%s\n",
7494 (int)tf
->fragP
->fr_address
, (int)tf
->fragP
->fr_fix
,
7495 tf
->needs_jump_around
? "T" : "F");
7500 static void dump_litpools (void) __attribute__ ((unused
));
7503 dump_litpools (void)
7505 struct litpool_seg
*lps
= litpool_seg_list
.next
;
7506 struct litpool_frag
*lpf
;
7508 for ( ; lps
; lps
= lps
->next
)
7510 printf("litpool seg %s\n", lps
->seg
->name
);
7511 for ( lpf
= lps
->frag_list
.next
; lpf
->fragP
; lpf
= lpf
->next
)
7513 fragS
*litfrag
= lpf
->fragP
->fr_next
;
7515 while (litfrag
&& litfrag
->fr_subtype
!= RELAX_LITERAL_POOL_END
)
7517 if (litfrag
->fr_fix
== 4)
7519 litfrag
= litfrag
->fr_next
;
7521 printf(" %ld <%d:%d> (%d) [%d]: ",
7522 lpf
->addr
, lpf
->priority
, lpf
->original_priority
,
7523 lpf
->fragP
->fr_line
, count
);
7524 //dump_frag(lpf->fragP);
7530 xtensa_maybe_create_literal_pool_frag (bfd_boolean create
,
7531 bfd_boolean only_if_needed
)
7533 struct litpool_seg
*lps
= litpool_seg_list
.next
;
7535 struct litpool_frag
*lpf
;
7536 bfd_boolean needed
= FALSE
;
7538 if (use_literal_section
|| !auto_litpools
)
7541 for ( ; lps
; lps
= lps
->next
)
7543 if (lps
->seg
== now_seg
)
7549 lps
= XCNEW (struct litpool_seg
);
7550 lps
->next
= litpool_seg_list
.next
;
7551 litpool_seg_list
.next
= lps
;
7553 lps
->frag_list
.next
= &lps
->frag_list
;
7554 lps
->frag_list
.prev
= &lps
->frag_list
;
7563 if (past_xtensa_end
|| !use_transform() ||
7564 frag_now
->tc_frag_data
.is_no_transform
)
7568 if (auto_litpool_limit
<= 0)
7570 /* Don't create a litpool based only on frag count. */
7573 else if (lps
->frag_count
> auto_litpool_limit
)
7590 int size
= (only_if_needed
) ? 3 : 0; /* Space for a "j" insn. */
7591 /* Create a potential site for a literal pool. */
7592 frag_wane (frag_now
);
7594 xtensa_set_frag_assembly_state (frag_now
);
7596 fragP
->tc_frag_data
.lit_frchain
= frchain_now
;
7597 fragP
->tc_frag_data
.literal_frag
= fragP
;
7598 frag_var (rs_machine_dependent
, size
, size
,
7600 RELAX_LITERAL_POOL_CANDIDATE_BEGIN
:
7601 RELAX_LITERAL_POOL_BEGIN
,
7603 frag_now
->tc_frag_data
.lit_seg
= now_seg
;
7604 frag_variant (rs_machine_dependent
, 0, 0,
7605 RELAX_LITERAL_POOL_END
, NULL
, 0, NULL
);
7606 xtensa_set_frag_assembly_state (frag_now
);
7610 /* RELAX_LITERAL_POOL_BEGIN frag is being created;
7611 just record it here. */
7615 lpf
= XNEW (struct litpool_frag
);
7616 /* Insert at tail of circular list. */
7618 lps
->frag_list
.prev
->next
= lpf
;
7619 lpf
->next
= &lps
->frag_list
;
7620 lpf
->prev
= lps
->frag_list
.prev
;
7621 lps
->frag_list
.prev
= lpf
;
7623 lpf
->priority
= (needed
) ? (only_if_needed
) ? 3 : 2 : 1;
7624 lpf
->original_priority
= lpf
->priority
;
7626 lps
->frag_count
= 0;
7630 xtensa_cleanup_align_frags (void)
7635 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
7636 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
7639 /* Walk over all of the fragments in a subsection. */
7640 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
7642 if ((fragP
->fr_type
== rs_align
7643 || fragP
->fr_type
== rs_align_code
7644 || (fragP
->fr_type
== rs_machine_dependent
7645 && (fragP
->fr_subtype
== RELAX_DESIRE_ALIGN
7646 || fragP
->fr_subtype
== RELAX_DESIRE_ALIGN_IF_TARGET
)))
7647 && fragP
->fr_fix
== 0)
7649 fragS
*next
= fragP
->fr_next
;
7652 && next
->fr_fix
== 0
7653 && next
->fr_type
== rs_machine_dependent
7654 && next
->fr_subtype
== RELAX_DESIRE_ALIGN_IF_TARGET
)
7657 next
= next
->fr_next
;
7660 /* If we don't widen branch targets, then they
7661 will be easier to align. */
7662 if (fragP
->tc_frag_data
.is_branch_target
7663 && fragP
->fr_opcode
== fragP
->fr_literal
7664 && fragP
->fr_type
== rs_machine_dependent
7665 && fragP
->fr_subtype
== RELAX_SLOTS
7666 && fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_NARROW
)
7668 if (fragP
->fr_type
== rs_machine_dependent
7669 && fragP
->fr_subtype
== RELAX_UNREACHABLE
)
7670 fragP
->tc_frag_data
.is_unreachable
= TRUE
;
7676 /* Re-process all of the fragments looking to convert all of the
7677 RELAX_DESIRE_ALIGN_IF_TARGET fragments. If there is a branch
7678 target in the next fragment, convert this to RELAX_DESIRE_ALIGN.
7679 Otherwise, convert to a .fill 0. */
7682 xtensa_fix_target_frags (void)
7687 /* When this routine is called, all of the subsections are still intact
7688 so we walk over subsections instead of sections. */
7689 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
7690 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
7694 /* Walk over all of the fragments in a subsection. */
7695 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
7697 if (fragP
->fr_type
== rs_machine_dependent
7698 && fragP
->fr_subtype
== RELAX_DESIRE_ALIGN_IF_TARGET
)
7700 if (next_frag_is_branch_target (fragP
))
7701 fragP
->fr_subtype
= RELAX_DESIRE_ALIGN
;
7710 static bfd_boolean
is_narrow_branch_guaranteed_in_range (fragS
*, TInsn
*);
7713 xtensa_mark_narrow_branches (void)
7718 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
7719 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
7722 /* Walk over all of the fragments in a subsection. */
7723 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
7725 if (fragP
->fr_type
== rs_machine_dependent
7726 && fragP
->fr_subtype
== RELAX_SLOTS
7727 && fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_IMMED
)
7731 vinsn_from_chars (&vinsn
, fragP
->fr_opcode
);
7732 tinsn_immed_from_frag (&vinsn
.slots
[0], fragP
, 0);
7734 if (vinsn
.num_slots
== 1
7735 && xtensa_opcode_is_branch (xtensa_default_isa
,
7736 vinsn
.slots
[0].opcode
) == 1
7737 && xg_get_single_size (vinsn
.slots
[0].opcode
) == 2
7738 && is_narrow_branch_guaranteed_in_range (fragP
,
7741 fragP
->fr_subtype
= RELAX_SLOTS
;
7742 fragP
->tc_frag_data
.slot_subtypes
[0] = RELAX_NARROW
;
7743 fragP
->tc_frag_data
.is_aligning_branch
= 1;
7751 /* A branch is typically widened only when its target is out of
7752 range. However, we would like to widen them to align a subsequent
7753 branch target when possible.
7755 Because the branch relaxation code is so convoluted, the optimal solution
7756 (combining the two cases) is difficult to get right in all circumstances.
7757 We therefore go with an "almost as good" solution, where we only
7758 use for alignment narrow branches that definitely will not expand to a
7759 jump and a branch. These functions find and mark these cases. */
7761 /* The range in bytes of BNEZ.N and BEQZ.N. The target operand is encoded
7762 as PC + 4 + imm6, where imm6 is a 6-bit immediate ranging from 0 to 63.
7763 We start counting beginning with the frag after the 2-byte branch, so the
7764 maximum offset is (4 - 2) + 63 = 65. */
7765 #define MAX_IMMED6 65
7767 static offsetT
unrelaxed_frag_max_size (fragS
*);
7770 is_narrow_branch_guaranteed_in_range (fragS
*fragP
, TInsn
*tinsn
)
7772 const expressionS
*exp
= &tinsn
->tok
[1];
7773 symbolS
*symbolP
= exp
->X_add_symbol
;
7774 offsetT max_distance
= exp
->X_add_number
;
7777 if (exp
->X_op
!= O_symbol
)
7780 target_frag
= symbol_get_frag (symbolP
);
7782 max_distance
+= (S_GET_VALUE (symbolP
) - target_frag
->fr_address
);
7783 if (is_branch_jmp_to_next (tinsn
, fragP
))
7786 /* The branch doesn't branch over it's own frag,
7787 but over the subsequent ones. */
7788 fragP
= fragP
->fr_next
;
7789 while (fragP
!= NULL
&& fragP
!= target_frag
&& max_distance
<= MAX_IMMED6
)
7791 max_distance
+= unrelaxed_frag_max_size (fragP
);
7792 fragP
= fragP
->fr_next
;
7794 if (max_distance
<= MAX_IMMED6
&& fragP
== target_frag
)
7801 xtensa_mark_zcl_first_insns (void)
7806 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
7807 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
7810 /* Walk over all of the fragments in a subsection. */
7811 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
7813 if (fragP
->fr_type
== rs_machine_dependent
7814 && (fragP
->fr_subtype
== RELAX_ALIGN_NEXT_OPCODE
7815 || fragP
->fr_subtype
== RELAX_CHECK_ALIGN_NEXT_OPCODE
))
7817 /* Find the loop frag. */
7818 fragS
*loop_frag
= next_non_empty_frag (fragP
);
7819 /* Find the first insn frag. */
7820 fragS
*targ_frag
= next_non_empty_frag (loop_frag
);
7822 /* Handle a corner case that comes up in hardware
7823 diagnostics. The original assembly looks like this:
7826 <empty_frag>--not found by next_non_empty_frag
7829 Depending on the start address, the assembler may or
7830 may not change it to look something like this:
7833 nop--frag isn't empty anymore
7836 So set up to check the alignment of the nop if it
7838 while (loop_frag
!= targ_frag
)
7840 if (loop_frag
->fr_type
== rs_machine_dependent
7841 && (loop_frag
->fr_subtype
== RELAX_ALIGN_NEXT_OPCODE
7842 || loop_frag
->fr_subtype
7843 == RELAX_CHECK_ALIGN_NEXT_OPCODE
))
7844 targ_frag
= loop_frag
;
7846 loop_frag
= loop_frag
->fr_next
;
7849 /* Of course, sometimes (mostly for toy test cases) a
7850 zero-cost loop instruction is the last in a section. */
7853 targ_frag
->tc_frag_data
.is_first_loop_insn
= TRUE
;
7854 /* Do not widen a frag that is the first instruction of a
7855 zero-cost loop. It makes that loop harder to align. */
7856 if (targ_frag
->fr_type
== rs_machine_dependent
7857 && targ_frag
->fr_subtype
== RELAX_SLOTS
7858 && (targ_frag
->tc_frag_data
.slot_subtypes
[0]
7861 if (targ_frag
->tc_frag_data
.is_aligning_branch
)
7862 targ_frag
->tc_frag_data
.slot_subtypes
[0] = RELAX_IMMED
;
7865 frag_wane (targ_frag
);
7866 targ_frag
->tc_frag_data
.slot_subtypes
[0] = 0;
7870 if (fragP
->fr_subtype
== RELAX_CHECK_ALIGN_NEXT_OPCODE
)
7878 /* When a difference-of-symbols expression is encoded as a uleb128 or
7879 sleb128 value, the linker is unable to adjust that value to account for
7880 link-time relaxation. Mark all the code between such symbols so that
7881 its size cannot be changed by linker relaxation. */
7884 xtensa_mark_difference_of_two_symbols (void)
7888 for (expr_sym
= expr_symbols
; expr_sym
;
7889 expr_sym
= symbol_get_tc (expr_sym
)->next_expr_symbol
)
7891 expressionS
*exp
= symbol_get_value_expression (expr_sym
);
7893 if (exp
->X_op
== O_subtract
)
7895 symbolS
*left
= exp
->X_add_symbol
;
7896 symbolS
*right
= exp
->X_op_symbol
;
7898 /* Difference of two symbols not in the same section
7899 are handled with relocations in the linker. */
7900 if (S_GET_SEGMENT (left
) == S_GET_SEGMENT (right
))
7906 if (symbol_get_frag (left
)->fr_address
7907 <= symbol_get_frag (right
)->fr_address
)
7909 start
= symbol_get_frag (left
);
7910 end
= symbol_get_frag (right
);
7914 start
= symbol_get_frag (right
);
7915 end
= symbol_get_frag (left
);
7918 if (start
->tc_frag_data
.no_transform_end
!= NULL
)
7919 walk
= start
->tc_frag_data
.no_transform_end
;
7924 walk
->tc_frag_data
.is_no_transform
= 1;
7925 walk
= walk
->fr_next
;
7927 while (walk
&& walk
->fr_address
< end
->fr_address
);
7929 start
->tc_frag_data
.no_transform_end
= walk
;
7936 /* Re-process all of the fragments looking to convert all of the
7937 RELAX_ADD_NOP_IF_A0_B_RETW. If the next instruction is a
7938 conditional branch or a retw/retw.n, convert this frag to one that
7939 will generate a NOP. In any case close it off with a .fill 0. */
7941 static bfd_boolean
next_instrs_are_b_retw (fragS
*);
7944 xtensa_fix_a0_b_retw_frags (void)
7949 /* When this routine is called, all of the subsections are still intact
7950 so we walk over subsections instead of sections. */
7951 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
7952 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
7956 /* Walk over all of the fragments in a subsection. */
7957 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
7959 if (fragP
->fr_type
== rs_machine_dependent
7960 && fragP
->fr_subtype
== RELAX_ADD_NOP_IF_A0_B_RETW
)
7962 if (next_instrs_are_b_retw (fragP
))
7964 if (fragP
->tc_frag_data
.is_no_transform
)
7965 as_bad (_("instruction sequence (write a0, branch, retw) may trigger hardware errata"));
7967 relax_frag_add_nop (fragP
);
7977 next_instrs_are_b_retw (fragS
*fragP
)
7979 xtensa_opcode opcode
;
7981 const fragS
*next_fragP
= next_non_empty_frag (fragP
);
7982 static xtensa_insnbuf insnbuf
= NULL
;
7983 static xtensa_insnbuf slotbuf
= NULL
;
7984 xtensa_isa isa
= xtensa_default_isa
;
7987 bfd_boolean branch_seen
= FALSE
;
7991 insnbuf
= xtensa_insnbuf_alloc (isa
);
7992 slotbuf
= xtensa_insnbuf_alloc (isa
);
7995 if (next_fragP
== NULL
)
7998 /* Check for the conditional branch. */
7999 xtensa_insnbuf_from_chars
8000 (isa
, insnbuf
, (unsigned char *) &next_fragP
->fr_literal
[offset
], 0);
8001 fmt
= xtensa_format_decode (isa
, insnbuf
);
8002 if (fmt
== XTENSA_UNDEFINED
)
8005 for (slot
= 0; slot
< xtensa_format_num_slots (isa
, fmt
); slot
++)
8007 xtensa_format_get_slot (isa
, fmt
, slot
, insnbuf
, slotbuf
);
8008 opcode
= xtensa_opcode_decode (isa
, fmt
, slot
, slotbuf
);
8010 branch_seen
= (branch_seen
8011 || xtensa_opcode_is_branch (isa
, opcode
) == 1);
8017 offset
+= xtensa_format_length (isa
, fmt
);
8018 if (offset
== next_fragP
->fr_fix
)
8020 next_fragP
= next_non_empty_frag (next_fragP
);
8024 if (next_fragP
== NULL
)
8027 /* Check for the retw/retw.n. */
8028 xtensa_insnbuf_from_chars
8029 (isa
, insnbuf
, (unsigned char *) &next_fragP
->fr_literal
[offset
], 0);
8030 fmt
= xtensa_format_decode (isa
, insnbuf
);
8032 /* Because RETW[.N] is not bundleable, a VLIW bundle here means that we
8033 have no problems. */
8034 if (fmt
== XTENSA_UNDEFINED
8035 || xtensa_format_num_slots (isa
, fmt
) != 1)
8038 xtensa_format_get_slot (isa
, fmt
, 0, insnbuf
, slotbuf
);
8039 opcode
= xtensa_opcode_decode (isa
, fmt
, 0, slotbuf
);
8041 if (opcode
== xtensa_retw_opcode
|| opcode
== xtensa_retw_n_opcode
)
8048 /* Re-process all of the fragments looking to convert all of the
8049 RELAX_ADD_NOP_IF_PRE_LOOP_END. If there is one instruction and a
8050 loop end label, convert this frag to one that will generate a NOP.
8051 In any case close it off with a .fill 0. */
8053 static bfd_boolean
next_instr_is_loop_end (fragS
*);
8056 xtensa_fix_b_j_loop_end_frags (void)
8061 /* When this routine is called, all of the subsections are still intact
8062 so we walk over subsections instead of sections. */
8063 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
8064 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
8068 /* Walk over all of the fragments in a subsection. */
8069 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
8071 if (fragP
->fr_type
== rs_machine_dependent
8072 && fragP
->fr_subtype
== RELAX_ADD_NOP_IF_PRE_LOOP_END
)
8074 if (next_instr_is_loop_end (fragP
))
8076 if (fragP
->tc_frag_data
.is_no_transform
)
8077 as_bad (_("branching or jumping to a loop end may trigger hardware errata"));
8079 relax_frag_add_nop (fragP
);
8089 next_instr_is_loop_end (fragS
*fragP
)
8091 const fragS
*next_fragP
;
8093 if (next_frag_is_loop_target (fragP
))
8096 next_fragP
= next_non_empty_frag (fragP
);
8097 if (next_fragP
== NULL
)
8100 if (!next_frag_is_loop_target (next_fragP
))
8103 /* If the size is >= 3 then there is more than one instruction here.
8104 The hardware bug will not fire. */
8105 if (next_fragP
->fr_fix
> 3)
8112 /* Re-process all of the fragments looking to convert all of the
8113 RELAX_ADD_NOP_IF_CLOSE_LOOP_END. If there is an loop end that is
8114 not MY loop's loop end within 12 bytes, add enough nops here to
8115 make it at least 12 bytes away. In any case close it off with a
8118 static offsetT min_bytes_to_other_loop_end
8119 (fragS
*, fragS
*, offsetT
);
8122 xtensa_fix_close_loop_end_frags (void)
8127 /* When this routine is called, all of the subsections are still intact
8128 so we walk over subsections instead of sections. */
8129 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
8130 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
8134 fragS
*current_target
= NULL
;
8136 /* Walk over all of the fragments in a subsection. */
8137 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
8139 if (fragP
->fr_type
== rs_machine_dependent
8140 && ((fragP
->fr_subtype
== RELAX_ALIGN_NEXT_OPCODE
)
8141 || (fragP
->fr_subtype
== RELAX_CHECK_ALIGN_NEXT_OPCODE
)))
8142 current_target
= symbol_get_frag (fragP
->fr_symbol
);
8145 && fragP
->fr_type
== rs_machine_dependent
8146 && fragP
->fr_subtype
== RELAX_ADD_NOP_IF_CLOSE_LOOP_END
)
8149 int bytes_added
= 0;
8151 #define REQUIRED_LOOP_DIVIDING_BYTES 12
8152 /* Max out at 12. */
8153 min_bytes
= min_bytes_to_other_loop_end
8154 (fragP
->fr_next
, current_target
, REQUIRED_LOOP_DIVIDING_BYTES
);
8156 if (min_bytes
< REQUIRED_LOOP_DIVIDING_BYTES
)
8158 if (fragP
->tc_frag_data
.is_no_transform
)
8159 as_bad (_("loop end too close to another loop end may trigger hardware errata"));
8162 while (min_bytes
+ bytes_added
8163 < REQUIRED_LOOP_DIVIDING_BYTES
)
8167 if (fragP
->fr_var
< length
)
8168 as_fatal (_("fr_var %lu < length %d"),
8169 (long) fragP
->fr_var
, length
);
8172 assemble_nop (length
,
8173 fragP
->fr_literal
+ fragP
->fr_fix
);
8174 fragP
->fr_fix
+= length
;
8175 fragP
->fr_var
-= length
;
8177 bytes_added
+= length
;
8183 gas_assert (fragP
->fr_type
!= rs_machine_dependent
8184 || fragP
->fr_subtype
!= RELAX_ADD_NOP_IF_CLOSE_LOOP_END
);
8190 static offsetT
unrelaxed_frag_min_size (fragS
*);
8193 min_bytes_to_other_loop_end (fragS
*fragP
,
8194 fragS
*current_target
,
8198 fragS
*current_fragP
;
8200 for (current_fragP
= fragP
;
8202 current_fragP
= current_fragP
->fr_next
)
8204 if (current_fragP
->tc_frag_data
.is_loop_target
8205 && current_fragP
!= current_target
)
8208 offset
+= unrelaxed_frag_min_size (current_fragP
);
8210 if (offset
>= max_size
)
8218 unrelaxed_frag_min_size (fragS
*fragP
)
8220 offsetT size
= fragP
->fr_fix
;
8222 /* Add fill size. */
8223 if (fragP
->fr_type
== rs_fill
)
8224 size
+= fragP
->fr_offset
;
8231 unrelaxed_frag_max_size (fragS
*fragP
)
8233 offsetT size
= fragP
->fr_fix
;
8234 switch (fragP
->fr_type
)
8237 /* Empty frags created by the obstack allocation scheme
8238 end up with type 0. */
8243 size
+= fragP
->fr_offset
;
8251 /* No further adjustments needed. */
8253 case rs_machine_dependent
:
8254 if (fragP
->fr_subtype
!= RELAX_DESIRE_ALIGN
)
8255 size
+= fragP
->fr_var
;
8258 /* We had darn well better know how big it is. */
8267 /* Re-process all of the fragments looking to convert all
8268 of the RELAX_ADD_NOP_IF_SHORT_LOOP. If:
8271 1) the instruction size count to the loop end label
8272 is too short (<= 2 instructions),
8273 2) loop has a jump or branch in it
8276 1) workaround_all_short_loops is TRUE
8277 2) The generating loop was a 'loopgtz' or 'loopnez'
8278 3) the instruction size count to the loop end label is too short
8280 then convert this frag (and maybe the next one) to generate a NOP.
8281 In any case close it off with a .fill 0. */
8283 static int count_insns_to_loop_end (fragS
*, bfd_boolean
, int);
8284 static bfd_boolean
branch_before_loop_end (fragS
*);
8287 xtensa_fix_short_loop_frags (void)
8292 /* When this routine is called, all of the subsections are still intact
8293 so we walk over subsections instead of sections. */
8294 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
8295 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
8298 xtensa_opcode current_opcode
= XTENSA_UNDEFINED
;
8300 /* Walk over all of the fragments in a subsection. */
8301 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
8303 if (fragP
->fr_type
== rs_machine_dependent
8304 && ((fragP
->fr_subtype
== RELAX_ALIGN_NEXT_OPCODE
)
8305 || (fragP
->fr_subtype
== RELAX_CHECK_ALIGN_NEXT_OPCODE
)))
8308 fragS
*loop_frag
= next_non_empty_frag (fragP
);
8309 tinsn_from_chars (&t_insn
, loop_frag
->fr_opcode
, 0);
8310 current_opcode
= t_insn
.opcode
;
8311 gas_assert (xtensa_opcode_is_loop (xtensa_default_isa
,
8312 current_opcode
) == 1);
8315 if (fragP
->fr_type
== rs_machine_dependent
8316 && fragP
->fr_subtype
== RELAX_ADD_NOP_IF_SHORT_LOOP
)
8318 if (count_insns_to_loop_end (fragP
->fr_next
, TRUE
, 3) < 3
8319 && (branch_before_loop_end (fragP
->fr_next
)
8320 || (workaround_all_short_loops
8321 && current_opcode
!= XTENSA_UNDEFINED
8322 && current_opcode
!= xtensa_loop_opcode
)))
8324 if (fragP
->tc_frag_data
.is_no_transform
)
8325 as_bad (_("loop containing less than three instructions may trigger hardware errata"));
8327 relax_frag_add_nop (fragP
);
8336 static int unrelaxed_frag_min_insn_count (fragS
*);
8339 count_insns_to_loop_end (fragS
*base_fragP
,
8340 bfd_boolean count_relax_add
,
8343 fragS
*fragP
= NULL
;
8348 for (; fragP
&& !fragP
->tc_frag_data
.is_loop_target
; fragP
= fragP
->fr_next
)
8350 insn_count
+= unrelaxed_frag_min_insn_count (fragP
);
8351 if (insn_count
>= max_count
)
8354 if (count_relax_add
)
8356 if (fragP
->fr_type
== rs_machine_dependent
8357 && fragP
->fr_subtype
== RELAX_ADD_NOP_IF_SHORT_LOOP
)
8359 /* In order to add the appropriate number of
8360 NOPs, we count an instruction for downstream
8363 if (insn_count
>= max_count
)
8373 unrelaxed_frag_min_insn_count (fragS
*fragP
)
8375 xtensa_isa isa
= xtensa_default_isa
;
8376 static xtensa_insnbuf insnbuf
= NULL
;
8380 if (!fragP
->tc_frag_data
.is_insn
)
8384 insnbuf
= xtensa_insnbuf_alloc (isa
);
8386 /* Decode the fixed instructions. */
8387 while (offset
< fragP
->fr_fix
)
8391 xtensa_insnbuf_from_chars
8392 (isa
, insnbuf
, (unsigned char *) fragP
->fr_literal
+ offset
, 0);
8393 fmt
= xtensa_format_decode (isa
, insnbuf
);
8395 if (fmt
== XTENSA_UNDEFINED
)
8397 as_fatal (_("undecodable instruction in instruction frag"));
8400 offset
+= xtensa_format_length (isa
, fmt
);
8408 static bfd_boolean
unrelaxed_frag_has_b_j (fragS
*);
8411 branch_before_loop_end (fragS
*base_fragP
)
8415 for (fragP
= base_fragP
;
8416 fragP
&& !fragP
->tc_frag_data
.is_loop_target
;
8417 fragP
= fragP
->fr_next
)
8419 if (unrelaxed_frag_has_b_j (fragP
))
8427 unrelaxed_frag_has_b_j (fragS
*fragP
)
8429 static xtensa_insnbuf insnbuf
= NULL
;
8430 xtensa_isa isa
= xtensa_default_isa
;
8433 if (!fragP
->tc_frag_data
.is_insn
)
8437 insnbuf
= xtensa_insnbuf_alloc (isa
);
8439 /* Decode the fixed instructions. */
8440 while (offset
< fragP
->fr_fix
)
8445 xtensa_insnbuf_from_chars
8446 (isa
, insnbuf
, (unsigned char *) fragP
->fr_literal
+ offset
, 0);
8447 fmt
= xtensa_format_decode (isa
, insnbuf
);
8448 if (fmt
== XTENSA_UNDEFINED
)
8451 for (slot
= 0; slot
< xtensa_format_num_slots (isa
, fmt
); slot
++)
8453 xtensa_opcode opcode
=
8454 get_opcode_from_buf (fragP
->fr_literal
+ offset
, slot
);
8455 if (xtensa_opcode_is_branch (isa
, opcode
) == 1
8456 || xtensa_opcode_is_jump (isa
, opcode
) == 1)
8459 offset
+= xtensa_format_length (isa
, fmt
);
8465 /* Checks to be made after initial assembly but before relaxation. */
8467 static bfd_boolean
is_empty_loop (const TInsn
*, fragS
*);
8468 static bfd_boolean
is_local_forward_loop (const TInsn
*, fragS
*);
8471 xtensa_sanity_check (void)
8473 const char *file_name
;
8478 file_name
= as_where (&line
);
8479 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
8480 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
8484 /* Walk over all of the fragments in a subsection. */
8485 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
8487 if (fragP
->fr_type
== rs_machine_dependent
8488 && fragP
->fr_subtype
== RELAX_SLOTS
8489 && fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_IMMED
)
8491 static xtensa_insnbuf insnbuf
= NULL
;
8494 if (fragP
->fr_opcode
!= NULL
)
8497 insnbuf
= xtensa_insnbuf_alloc (xtensa_default_isa
);
8498 tinsn_from_chars (&t_insn
, fragP
->fr_opcode
, 0);
8499 tinsn_immed_from_frag (&t_insn
, fragP
, 0);
8501 if (xtensa_opcode_is_loop (xtensa_default_isa
,
8502 t_insn
.opcode
) == 1)
8504 if (is_empty_loop (&t_insn
, fragP
))
8506 new_logical_line (fragP
->fr_file
, fragP
->fr_line
);
8507 as_bad (_("invalid empty loop"));
8509 if (!is_local_forward_loop (&t_insn
, fragP
))
8511 new_logical_line (fragP
->fr_file
, fragP
->fr_line
);
8512 as_bad (_("loop target does not follow "
8513 "loop instruction in section"));
8520 new_logical_line (file_name
, line
);
8524 #define LOOP_IMMED_OPN 1
8526 /* Return TRUE if the loop target is the next non-zero fragment. */
8529 is_empty_loop (const TInsn
*insn
, fragS
*fragP
)
8531 const expressionS
*exp
;
8535 if (insn
->insn_type
!= ITYPE_INSN
)
8538 if (xtensa_opcode_is_loop (xtensa_default_isa
, insn
->opcode
) != 1)
8541 if (insn
->ntok
<= LOOP_IMMED_OPN
)
8544 exp
= &insn
->tok
[LOOP_IMMED_OPN
];
8546 if (exp
->X_op
!= O_symbol
)
8549 symbolP
= exp
->X_add_symbol
;
8553 if (symbol_get_frag (symbolP
) == NULL
)
8556 if (S_GET_VALUE (symbolP
) != 0)
8559 /* Walk through the zero-size fragments from this one. If we find
8560 the target fragment, then this is a zero-size loop. */
8562 for (next_fragP
= fragP
->fr_next
;
8564 next_fragP
= next_fragP
->fr_next
)
8566 if (next_fragP
== symbol_get_frag (symbolP
))
8568 if (next_fragP
->fr_fix
!= 0)
8576 is_local_forward_loop (const TInsn
*insn
, fragS
*fragP
)
8578 const expressionS
*exp
;
8582 if (insn
->insn_type
!= ITYPE_INSN
)
8585 if (xtensa_opcode_is_loop (xtensa_default_isa
, insn
->opcode
) != 1)
8588 if (insn
->ntok
<= LOOP_IMMED_OPN
)
8591 exp
= &insn
->tok
[LOOP_IMMED_OPN
];
8593 if (exp
->X_op
!= O_symbol
)
8596 symbolP
= exp
->X_add_symbol
;
8600 if (symbol_get_frag (symbolP
) == NULL
)
8603 /* Walk through fragments until we find the target.
8604 If we do not find the target, then this is an invalid loop. */
8606 for (next_fragP
= fragP
->fr_next
;
8608 next_fragP
= next_fragP
->fr_next
)
8610 if (next_fragP
== symbol_get_frag (symbolP
))
8618 #define XTINFO_NAME "Xtensa_Info"
8619 #define XTINFO_NAMESZ 12
8620 #define XTINFO_TYPE 1
8623 xtensa_add_config_info (void)
8629 info_sec
= subseg_new (".xtensa.info", 0);
8630 bfd_set_section_flags (stdoutput
, info_sec
, SEC_HAS_CONTENTS
| SEC_READONLY
);
8632 data
= XNEWVEC (char, 100);
8633 sprintf (data
, "USE_ABSOLUTE_LITERALS=%d\nABI=%d\n",
8634 XSHAL_USE_ABSOLUTE_LITERALS
, XSHAL_ABI
);
8635 sz
= strlen (data
) + 1;
8637 /* Add enough null terminators to pad to a word boundary. */
8640 while ((sz
& 3) != 0);
8642 /* Follow the standard note section layout:
8643 First write the length of the name string. */
8645 md_number_to_chars (p
, (valueT
) XTINFO_NAMESZ
, 4);
8647 /* Next comes the length of the "descriptor", i.e., the actual data. */
8649 md_number_to_chars (p
, (valueT
) sz
, 4);
8651 /* Write the note type. */
8653 md_number_to_chars (p
, (valueT
) XTINFO_TYPE
, 4);
8655 /* Write the name field. */
8656 p
= frag_more (XTINFO_NAMESZ
);
8657 memcpy (p
, XTINFO_NAME
, XTINFO_NAMESZ
);
8659 /* Finally, write the descriptor. */
8661 memcpy (p
, data
, sz
);
8667 /* Alignment Functions. */
8670 get_text_align_power (unsigned target_size
)
8672 if (target_size
<= 4)
8675 if (target_size
<= 8)
8678 if (target_size
<= 16)
8681 if (target_size
<= 32)
8684 if (target_size
<= 64)
8687 if (target_size
<= 128)
8690 if (target_size
<= 256)
8693 if (target_size
<= 512)
8696 if (target_size
<= 1024)
8705 get_text_align_max_fill_size (int align_pow
,
8706 bfd_boolean use_nops
,
8707 bfd_boolean use_no_density
)
8710 return (1 << align_pow
);
8712 return 3 * (1 << align_pow
);
8714 return 1 + (1 << align_pow
);
8718 /* Calculate the minimum bytes of fill needed at "address" to align a
8719 target instruction of size "target_size" so that it does not cross a
8720 power-of-two boundary specified by "align_pow". If "use_nops" is FALSE,
8721 the fill can be an arbitrary number of bytes. Otherwise, the space must
8722 be filled by NOP instructions. */
8725 get_text_align_fill_size (addressT address
,
8728 bfd_boolean use_nops
,
8729 bfd_boolean use_no_density
)
8731 addressT alignment
, fill
, fill_limit
, fill_step
;
8732 bfd_boolean skip_one
= FALSE
;
8734 alignment
= (1 << align_pow
);
8735 gas_assert (target_size
> 0 && alignment
>= (addressT
) target_size
);
8739 fill_limit
= alignment
;
8742 else if (!use_no_density
)
8744 /* Combine 2- and 3-byte NOPs to fill anything larger than one. */
8745 fill_limit
= alignment
* 2;
8751 /* Fill with 3-byte NOPs -- can only fill multiples of 3. */
8752 fill_limit
= alignment
* 3;
8756 /* Try all fill sizes until finding one that works. */
8757 for (fill
= 0; fill
< fill_limit
; fill
+= fill_step
)
8759 if (skip_one
&& fill
== 1)
8761 if ((address
+ fill
) >> align_pow
8762 == (address
+ fill
+ target_size
- 1) >> align_pow
)
8771 branch_align_power (segT sec
)
8773 /* If the Xtensa processor has a fetch width of X, and
8774 the section is aligned to at least that boundary, then a branch
8775 target need only fit within that aligned block of memory to avoid
8776 a stall. Otherwise, try to fit branch targets within 4-byte
8777 aligned blocks (which may be insufficient, e.g., if the section
8778 has no alignment, but it's good enough). */
8779 int fetch_align
= get_text_align_power(xtensa_fetch_width
);
8780 int sec_align
= get_recorded_alignment (sec
);
8782 if (sec_align
>= fetch_align
)
8789 /* This will assert if it is not possible. */
8792 get_text_align_nop_count (offsetT fill_size
, bfd_boolean use_no_density
)
8798 gas_assert (fill_size
% 3 == 0);
8799 return (fill_size
/ 3);
8802 gas_assert (fill_size
!= 1); /* Bad argument. */
8804 while (fill_size
> 1)
8807 if (fill_size
== 2 || fill_size
== 4)
8809 fill_size
-= insn_size
;
8812 gas_assert (fill_size
!= 1); /* Bad algorithm. */
8818 get_text_align_nth_nop_size (offsetT fill_size
,
8820 bfd_boolean use_no_density
)
8827 gas_assert (fill_size
!= 1); /* Bad argument. */
8829 while (fill_size
> 1)
8832 if (fill_size
== 2 || fill_size
== 4)
8834 fill_size
-= insn_size
;
8844 /* For the given fragment, find the appropriate address
8845 for it to begin at if we are using NOPs to align it. */
8848 get_noop_aligned_address (fragS
*fragP
, addressT address
)
8850 /* The rule is: get next fragment's FIRST instruction. Find
8851 the smallest number of bytes that need to be added to
8852 ensure that the next fragment's FIRST instruction will fit
8855 E.G., 2 bytes : 0, 1, 2 mod 4
8858 If the FIRST instruction MIGHT be relaxed,
8859 assume that it will become a 3-byte instruction.
8861 Note again here that LOOP instructions are not bundleable,
8862 and this relaxation only applies to LOOP opcodes. */
8865 int first_insn_size
;
8867 addressT pre_opcode_bytes
;
8870 xtensa_opcode opcode
;
8871 bfd_boolean is_loop
;
8873 gas_assert (fragP
->fr_type
== rs_machine_dependent
);
8874 gas_assert (fragP
->fr_subtype
== RELAX_ALIGN_NEXT_OPCODE
);
8876 /* Find the loop frag. */
8877 first_insn
= next_non_empty_frag (fragP
);
8878 /* Now find the first insn frag. */
8879 first_insn
= next_non_empty_frag (first_insn
);
8881 is_loop
= next_frag_opcode_is_loop (fragP
, &opcode
);
8882 gas_assert (is_loop
);
8883 loop_insn_size
= xg_get_single_size (opcode
);
8885 pre_opcode_bytes
= next_frag_pre_opcode_bytes (fragP
);
8886 pre_opcode_bytes
+= loop_insn_size
;
8888 /* For loops, the alignment depends on the size of the
8889 instruction following the loop, not the LOOP instruction. */
8891 if (first_insn
== NULL
)
8892 first_insn_size
= xtensa_fetch_width
;
8894 first_insn_size
= get_loop_align_size (frag_format_size (first_insn
));
8896 /* If it was 8, then we'll need a larger alignment for the section. */
8897 align_power
= get_text_align_power (first_insn_size
);
8898 record_alignment (now_seg
, align_power
);
8900 fill_size
= get_text_align_fill_size
8901 (address
+ pre_opcode_bytes
, align_power
, first_insn_size
, TRUE
,
8902 fragP
->tc_frag_data
.is_no_density
);
8904 return address
+ fill_size
;
8908 /* 3 mechanisms for relaxing an alignment:
8910 Align to a power of 2.
8911 Align so the next fragment's instruction does not cross a word boundary.
8912 Align the current instruction so that if the next instruction
8913 were 3 bytes, it would not cross a word boundary.
8917 zeros - This is easy; always insert zeros.
8918 nops - 3-byte and 2-byte instructions
8922 >=5 : 3-byte instruction + fn (n-3)
8923 widening - widen previous instructions. */
8926 get_aligned_diff (fragS
*fragP
, addressT address
, offsetT
*max_diff
)
8928 addressT target_address
, loop_insn_offset
;
8930 xtensa_opcode loop_opcode
;
8931 bfd_boolean is_loop
;
8934 offsetT branch_align
;
8937 gas_assert (fragP
->fr_type
== rs_machine_dependent
);
8938 switch (fragP
->fr_subtype
)
8940 case RELAX_DESIRE_ALIGN
:
8941 target_size
= next_frag_format_size (fragP
);
8942 if (target_size
== XTENSA_UNDEFINED
)
8944 align_power
= branch_align_power (now_seg
);
8945 branch_align
= 1 << align_power
;
8946 /* Don't count on the section alignment being as large as the target. */
8947 if (target_size
> branch_align
)
8948 target_size
= branch_align
;
8949 opt_diff
= get_text_align_fill_size (address
, align_power
,
8950 target_size
, FALSE
, FALSE
);
8952 *max_diff
= (opt_diff
+ branch_align
8953 - (target_size
+ ((address
+ opt_diff
) % branch_align
)));
8954 gas_assert (*max_diff
>= opt_diff
);
8957 case RELAX_ALIGN_NEXT_OPCODE
:
8958 /* The next non-empty frag after this one holds the LOOP instruction
8959 that needs to be aligned. The required alignment depends on the
8960 size of the next non-empty frag after the loop frag, i.e., the
8961 first instruction in the loop. */
8962 loop_frag
= next_non_empty_frag (fragP
);
8963 target_size
= get_loop_align_size (next_frag_format_size (loop_frag
));
8964 loop_insn_offset
= 0;
8965 is_loop
= next_frag_opcode_is_loop (fragP
, &loop_opcode
);
8966 gas_assert (is_loop
);
8968 /* If the loop has been expanded then the LOOP instruction
8969 could be at an offset from this fragment. */
8970 if (loop_frag
->tc_frag_data
.slot_subtypes
[0] != RELAX_IMMED
)
8971 loop_insn_offset
= get_expanded_loop_offset (loop_opcode
);
8973 /* In an ideal world, which is what we are shooting for here,
8974 we wouldn't need to use any NOPs immediately prior to the
8975 LOOP instruction. If this approach fails, relax_frag_loop_align
8976 will call get_noop_aligned_address. */
8978 address
+ loop_insn_offset
+ xg_get_single_size (loop_opcode
);
8979 align_power
= get_text_align_power (target_size
);
8980 opt_diff
= get_text_align_fill_size (target_address
, align_power
,
8981 target_size
, FALSE
, FALSE
);
8983 *max_diff
= xtensa_fetch_width
8984 - ((target_address
+ opt_diff
) % xtensa_fetch_width
)
8985 - target_size
+ opt_diff
;
8986 gas_assert (*max_diff
>= opt_diff
);
8997 /* md_relax_frag Hook and Helper Functions. */
8999 static long relax_frag_loop_align (fragS
*, long);
9000 static long relax_frag_for_align (fragS
*, long);
9001 static long relax_frag_immed
9002 (segT
, fragS
*, long, int, xtensa_format
, int, int *, bfd_boolean
);
9004 typedef struct cached_fixup cached_fixupS
;
9013 typedef struct fixup_cache fixup_cacheS
;
9016 cached_fixupS
*fixups
;
9024 static int fixup_order (const void *a
, const void *b
)
9026 const cached_fixupS
*pa
= a
;
9027 const cached_fixupS
*pb
= b
;
9029 if (pa
->addr
== pb
->addr
)
9031 if (pa
->target
== pb
->target
)
9033 if (pa
->fixP
->fx_r_type
== pb
->fixP
->fx_r_type
)
9035 return pa
->fixP
->fx_r_type
< pb
->fixP
->fx_r_type
? -1 : 1;
9037 return pa
->target
- pb
->target
;
9039 return pa
->addr
- pb
->addr
;
9042 static bfd_boolean
xtensa_make_cached_fixup (cached_fixupS
*o
, fixS
*fixP
)
9044 xtensa_isa isa
= xtensa_default_isa
;
9045 int addr
= fixP
->fx_frag
->fr_address
;
9048 symbolS
*s
= fixP
->fx_addsy
;
9051 xtensa_opcode opcode
;
9053 if (fixP
->fx_r_type
< BFD_RELOC_XTENSA_SLOT0_OP
||
9054 fixP
->fx_r_type
> BFD_RELOC_XTENSA_SLOT14_OP
)
9056 target
= S_GET_VALUE (s
);
9057 delta
= target
- addr
;
9059 if (abs(delta
) < J_RANGE
/ 2)
9062 xtensa_insnbuf_from_chars (isa
, trampoline_buf
,
9063 (unsigned char *) fixP
->fx_frag
->fr_literal
+
9065 fmt
= xtensa_format_decode (isa
, trampoline_buf
);
9066 gas_assert (fmt
!= XTENSA_UNDEFINED
);
9067 slot
= fixP
->tc_fix_data
.slot
;
9068 xtensa_format_get_slot (isa
, fmt
, slot
, trampoline_buf
, trampoline_slotbuf
);
9069 opcode
= xtensa_opcode_decode (isa
, fmt
, slot
, trampoline_slotbuf
);
9070 if (opcode
!= xtensa_j_opcode
)
9081 static void xtensa_realloc_fixup_cache (fixup_cacheS
*cache
, unsigned add
)
9083 if (cache
->n_fixups
+ add
> cache
->n_max
)
9085 cache
->n_max
= (cache
->n_fixups
+ add
) * 2;
9086 cache
->fixups
= XRESIZEVEC (cached_fixupS
, cache
->fixups
, cache
->n_max
);
9090 static void xtensa_cache_relaxable_fixups (fixup_cacheS
*cache
,
9091 segment_info_type
*seginfo
)
9095 cache
->n_fixups
= 0;
9097 for (fixP
= seginfo
->fix_root
; fixP
; fixP
= fixP
->fx_next
)
9099 xtensa_realloc_fixup_cache (cache
, 1);
9101 if (xtensa_make_cached_fixup (cache
->fixups
+ cache
->n_fixups
, fixP
))
9104 qsort (cache
->fixups
, cache
->n_fixups
, sizeof (*cache
->fixups
), fixup_order
);
9107 static unsigned xtensa_find_first_cached_fixup (const fixup_cacheS
*cache
,
9111 unsigned b
= cache
->n_fixups
;
9115 unsigned c
= (a
+ b
) / 2;
9117 if (cache
->fixups
[c
].addr
< addr
)
9125 static void xtensa_delete_cached_fixup (fixup_cacheS
*cache
, unsigned i
)
9127 memmove (cache
->fixups
+ i
, cache
->fixups
+ i
+ 1,
9128 (cache
->n_fixups
- i
- 1) * sizeof (*cache
->fixups
));
9132 static bfd_boolean
xtensa_add_cached_fixup (fixup_cacheS
*cache
, fixS
*fixP
)
9137 if (!xtensa_make_cached_fixup (&o
, fixP
))
9139 xtensa_realloc_fixup_cache (cache
, 1);
9140 i
= xtensa_find_first_cached_fixup (cache
, o
.addr
);
9141 if (i
< cache
->n_fixups
)
9144 memmove (cache
->fixups
+ i
+ 1, cache
->fixups
+ i
,
9145 (cache
->n_fixups
- i
) * sizeof (*cache
->fixups
));
9147 cache
->fixups
[i
] = o
;
9152 /* Return the number of bytes added to this fragment, given that the
9153 input has been stretched already by "stretch". */
9156 xtensa_relax_frag (fragS
*fragP
, long stretch
, int *stretched_p
)
9158 xtensa_isa isa
= xtensa_default_isa
;
9159 int unreported
= fragP
->tc_frag_data
.unreported_expansion
;
9160 long new_stretch
= 0;
9161 const char *file_name
;
9164 static xtensa_insnbuf vbuf
= NULL
;
9165 int slot
, num_slots
;
9168 file_name
= as_where (&line
);
9169 new_logical_line (fragP
->fr_file
, fragP
->fr_line
);
9171 fragP
->tc_frag_data
.unreported_expansion
= 0;
9173 switch (fragP
->fr_subtype
)
9175 case RELAX_ALIGN_NEXT_OPCODE
:
9176 /* Always convert. */
9177 if (fragP
->tc_frag_data
.relax_seen
)
9178 new_stretch
= relax_frag_loop_align (fragP
, stretch
);
9181 case RELAX_LOOP_END
:
9185 case RELAX_LOOP_END_ADD_NOP
:
9186 /* Add a NOP and switch to .fill 0. */
9187 new_stretch
= relax_frag_add_nop (fragP
);
9191 case RELAX_DESIRE_ALIGN
:
9192 /* Do nothing. The narrowing before this frag will either align
9197 case RELAX_LITERAL_FINAL
:
9200 case RELAX_LITERAL_NR
:
9202 fragP
->fr_subtype
= RELAX_LITERAL_FINAL
;
9203 gas_assert (unreported
== lit_size
);
9204 memset (&fragP
->fr_literal
[fragP
->fr_fix
], 0, 4);
9205 fragP
->fr_var
-= lit_size
;
9206 fragP
->fr_fix
+= lit_size
;
9212 vbuf
= xtensa_insnbuf_alloc (isa
);
9214 xtensa_insnbuf_from_chars
9215 (isa
, vbuf
, (unsigned char *) fragP
->fr_opcode
, 0);
9216 fmt
= xtensa_format_decode (isa
, vbuf
);
9217 num_slots
= xtensa_format_num_slots (isa
, fmt
);
9219 for (slot
= 0; slot
< num_slots
; slot
++)
9221 switch (fragP
->tc_frag_data
.slot_subtypes
[slot
])
9224 if (fragP
->tc_frag_data
.relax_seen
)
9225 new_stretch
+= relax_frag_for_align (fragP
, stretch
);
9229 case RELAX_IMMED_STEP1
:
9230 case RELAX_IMMED_STEP2
:
9231 case RELAX_IMMED_STEP3
:
9232 /* Place the immediate. */
9233 new_stretch
+= relax_frag_immed
9234 (now_seg
, fragP
, stretch
,
9235 fragP
->tc_frag_data
.slot_subtypes
[slot
] - RELAX_IMMED
,
9236 fmt
, slot
, stretched_p
, FALSE
);
9240 /* This is OK; see the note in xg_assemble_vliw_tokens. */
9246 case RELAX_LITERAL_POOL_BEGIN
:
9247 if (fragP
->fr_var
!= 0)
9249 /* We have a converted "candidate" literal pool;
9250 assemble a jump around it. */
9252 if (!litpool_slotbuf
)
9254 litpool_buf
= xtensa_insnbuf_alloc (isa
);
9255 litpool_slotbuf
= xtensa_insnbuf_alloc (isa
);
9258 fragP
->tc_frag_data
.relax_seen
= FALSE
; /* Need another pass. */
9259 fragP
->tc_frag_data
.is_insn
= TRUE
;
9261 insn
.insn_type
= ITYPE_INSN
;
9262 insn
.opcode
= xtensa_j_opcode
;
9264 set_expr_symbol_offset (&insn
.tok
[0], fragP
->fr_symbol
,
9266 fmt
= xg_get_single_format (xtensa_j_opcode
);
9267 tinsn_to_slotbuf (fmt
, 0, &insn
, litpool_slotbuf
);
9268 xtensa_format_set_slot (isa
, fmt
, 0, litpool_buf
, litpool_slotbuf
);
9269 xtensa_insnbuf_to_chars (isa
, litpool_buf
,
9270 (unsigned char *)fragP
->fr_literal
+
9275 fix_new (fragP
, 0, 3, fragP
->fr_symbol
, 0, TRUE
,
9276 BFD_RELOC_XTENSA_SLOT0_OP
);
9280 case RELAX_LITERAL_POOL_END
:
9281 case RELAX_LITERAL_POOL_CANDIDATE_BEGIN
:
9282 case RELAX_MAYBE_UNREACHABLE
:
9283 case RELAX_MAYBE_DESIRE_ALIGN
:
9284 /* No relaxation required. */
9287 case RELAX_FILL_NOP
:
9288 case RELAX_UNREACHABLE
:
9289 if (fragP
->tc_frag_data
.relax_seen
)
9290 new_stretch
+= relax_frag_for_align (fragP
, stretch
);
9293 case RELAX_TRAMPOLINE
:
9294 if (fragP
->tc_frag_data
.relax_seen
)
9296 static fixup_cacheS fixup_cache
;
9297 segment_info_type
*seginfo
= seg_info (now_seg
);
9298 int trampaddr
= fragP
->fr_address
+ fragP
->fr_fix
;
9299 int searchaddr
= trampaddr
< J_RANGE
? 0 : trampaddr
- J_RANGE
;
9302 if (now_seg
!= fixup_cache
.seg
||
9303 fragP
== fixup_cache
.first_frag
||
9304 fixup_cache
.first_frag
== NULL
)
9306 xtensa_cache_relaxable_fixups (&fixup_cache
, seginfo
);
9307 fixup_cache
.seg
= now_seg
;
9308 fixup_cache
.first_frag
= fragP
;
9311 /* Scan for jumps that will not reach. */
9312 for (i
= xtensa_find_first_cached_fixup (&fixup_cache
, searchaddr
);
9313 i
< fixup_cache
.n_fixups
; ++i
)
9316 fixS
*fixP
= fixup_cache
.fixups
[i
].fixP
;
9317 int target
= fixup_cache
.fixups
[i
].target
;
9318 int addr
= fixup_cache
.fixups
[i
].addr
;
9319 int delta
= fixup_cache
.fixups
[i
].delta
+ stretch
;
9321 trampaddr
= fragP
->fr_address
+ fragP
->fr_fix
;
9323 if (addr
+ J_RANGE
< trampaddr
)
9325 if (addr
> trampaddr
+ J_RANGE
)
9327 if (abs (delta
) < J_RANGE
)
9330 slot
= fixP
->tc_fix_data
.slot
;
9332 if (delta
> J_RANGE
|| delta
< -1 * J_RANGE
)
9333 { /* Found an out-of-range jump; scan the list of trampolines for the best match. */
9334 struct trampoline_seg
*ts
= find_trampoline_seg (now_seg
);
9335 struct trampoline_frag
*tf
= ts
->trampoline_list
.next
;
9336 struct trampoline_frag
*prev
= &ts
->trampoline_list
;
9337 int lower
= (target
< addr
) ? target
: addr
;
9338 int upper
= (target
> addr
) ? target
: addr
;
9339 int midpoint
= lower
+ (upper
- lower
) / 2;
9341 if ((upper
- lower
) > 2 * J_RANGE
)
9343 /* One trampoline won't suffice; we need multiple jumps.
9344 Jump to the trampoline that's farthest, but still in
9345 range relative to the original "j" instruction. */
9346 for ( ; tf
; prev
= tf
, tf
= tf
->next
)
9348 int this_addr
= tf
->fragP
->fr_address
+ tf
->fragP
->fr_fix
;
9349 int next_addr
= (tf
->next
) ? tf
->next
->fragP
->fr_address
+ tf
->next
->fragP
->fr_fix
: 0 ;
9354 if (this_addr
- addr
< J_RANGE
)
9359 /* Backward jump. */
9360 if (next_addr
== 0 || addr
- next_addr
> J_RANGE
)
9367 struct trampoline_frag
*best_tf
= NULL
;
9370 for ( ; tf
; prev
= tf
, tf
= tf
->next
)
9372 int this_addr
= tf
->fragP
->fr_address
+ tf
->fragP
->fr_fix
;
9373 int this_delta
= abs (this_addr
- midpoint
);
9375 if (!best_tf
|| this_delta
< best_delta
)
9378 best_delta
= this_delta
;
9383 if (tf
->fragP
== fragP
)
9385 if (abs (addr
- trampaddr
) < J_RANGE
)
9386 { /* The trampoline is in range of original; fix it! */
9391 fragS
*fP
; /* The out-of-range jump. */
9393 new_stretch
+= init_trampoline_frag (tf
);
9394 offset
= fragP
->fr_fix
; /* Where to assemble the j insn. */
9395 lsym
= fragP
->fr_symbol
;
9397 /* Assemble a jump to the target label here. */
9399 insn
.insn_type
= ITYPE_INSN
;
9400 insn
.opcode
= xtensa_j_opcode
;
9402 set_expr_symbol_offset (&insn
.tok
[0], lsym
, offset
);
9403 fmt
= xg_get_single_format (xtensa_j_opcode
);
9404 tinsn_to_slotbuf (fmt
, 0, &insn
, trampoline_slotbuf
);
9405 xtensa_format_set_slot (isa
, fmt
, 0, trampoline_buf
, trampoline_slotbuf
);
9406 xtensa_insnbuf_to_chars (isa
, trampoline_buf
, (unsigned char *)fragP
->fr_literal
+ offset
, 3);
9409 /* Add a fix-up for the original j insn. */
9410 newfixP
= fix_new (fP
, fixP
->fx_where
, fixP
->fx_size
, lsym
, fragP
->fr_fix
- 3, TRUE
, fixP
->fx_r_type
);
9411 newfixP
->fx_no_overflow
= 1;
9412 newfixP
->tc_fix_data
.X_add_symbol
= lsym
;
9413 newfixP
->tc_fix_data
.X_add_number
= offset
;
9414 newfixP
->tc_fix_data
.slot
= slot
;
9416 xtensa_delete_cached_fixup (&fixup_cache
, i
);
9417 xtensa_add_cached_fixup (&fixup_cache
, newfixP
);
9419 /* Move the fix-up from the original j insn to this one. */
9420 fixP
->fx_frag
= fragP
;
9421 fixP
->fx_where
= fragP
->fr_fix
- 3;
9422 fixP
->tc_fix_data
.slot
= 0;
9424 xtensa_add_cached_fixup (&fixup_cache
, fixP
);
9426 /* re-do current fixup */
9429 /* Adjust the jump around this trampoline (if present). */
9430 if (tf
->fixP
!= NULL
)
9432 tf
->fixP
->fx_offset
+= 3;
9435 fragP
->tc_frag_data
.relax_seen
= FALSE
; /* Need another pass. */
9436 /* Do we have room for more? */
9437 if (fragP
->fr_var
< 3)
9438 { /* No, convert to fill. */
9440 fragP
->fr_subtype
= 0;
9441 /* Remove from the trampoline_list. */
9442 prev
->next
= tf
->next
;
9443 if (fragP
== fixup_cache
.first_frag
)
9444 fixup_cache
.first_frag
= NULL
;
9455 as_bad (_("bad relaxation state"));
9458 /* Tell gas we need another relaxation pass. */
9459 if (! fragP
->tc_frag_data
.relax_seen
)
9461 fragP
->tc_frag_data
.relax_seen
= TRUE
;
9465 new_logical_line (file_name
, line
);
9471 relax_frag_loop_align (fragS
*fragP
, long stretch
)
9473 addressT old_address
, old_next_address
, old_size
;
9474 addressT new_address
, new_next_address
, new_size
;
9477 /* All the frags with relax_frag_for_alignment prior to this one in the
9478 section have been done, hopefully eliminating the need for a NOP here.
9479 But, this will put it in if necessary. */
9481 /* Calculate the old address of this fragment and the next fragment. */
9482 old_address
= fragP
->fr_address
- stretch
;
9483 old_next_address
= (fragP
->fr_address
- stretch
+ fragP
->fr_fix
+
9484 fragP
->tc_frag_data
.text_expansion
[0]);
9485 old_size
= old_next_address
- old_address
;
9487 /* Calculate the new address of this fragment and the next fragment. */
9488 new_address
= fragP
->fr_address
;
9490 get_noop_aligned_address (fragP
, fragP
->fr_address
+ fragP
->fr_fix
);
9491 new_size
= new_next_address
- new_address
;
9493 growth
= new_size
- old_size
;
9495 /* Fix up the text_expansion field and return the new growth. */
9496 fragP
->tc_frag_data
.text_expansion
[0] += growth
;
9501 /* Add a NOP instruction. */
9504 relax_frag_add_nop (fragS
*fragP
)
9506 char *nop_buf
= fragP
->fr_literal
+ fragP
->fr_fix
;
9507 int length
= fragP
->tc_frag_data
.is_no_density
? 3 : 2;
9508 assemble_nop (length
, nop_buf
);
9509 fragP
->tc_frag_data
.is_insn
= TRUE
;
9511 if (fragP
->fr_var
< length
)
9513 as_fatal (_("fr_var (%ld) < length (%d)"), (long) fragP
->fr_var
, length
);
9517 fragP
->fr_fix
+= length
;
9518 fragP
->fr_var
-= length
;
9523 static long future_alignment_required (fragS
*, long);
9526 relax_frag_for_align (fragS
*fragP
, long stretch
)
9528 /* Overview of the relaxation procedure for alignment:
9529 We can widen with NOPs or by widening instructions or by filling
9530 bytes after jump instructions. Find the opportune places and widen
9531 them if necessary. */
9536 gas_assert (fragP
->fr_subtype
== RELAX_FILL_NOP
9537 || fragP
->fr_subtype
== RELAX_UNREACHABLE
9538 || (fragP
->fr_subtype
== RELAX_SLOTS
9539 && fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_NARROW
));
9541 stretch_me
= future_alignment_required (fragP
, stretch
);
9542 diff
= stretch_me
- fragP
->tc_frag_data
.text_expansion
[0];
9548 /* We expanded on a previous pass. Can we shrink now? */
9549 long shrink
= fragP
->tc_frag_data
.text_expansion
[0] - stretch_me
;
9550 if (shrink
<= stretch
&& stretch
> 0)
9552 fragP
->tc_frag_data
.text_expansion
[0] = stretch_me
;
9558 /* Below here, diff > 0. */
9559 fragP
->tc_frag_data
.text_expansion
[0] = stretch_me
;
9565 /* Return the address of the next frag that should be aligned.
9567 By "address" we mean the address it _would_ be at if there
9568 is no action taken to align it between here and the target frag.
9569 In other words, if no narrows and no fill nops are used between
9570 here and the frag to align, _even_if_ some of the frags we use
9571 to align targets have already expanded on a previous relaxation
9574 Also, count each frag that may be used to help align the target.
9576 Return 0 if there are no frags left in the chain that need to be
9580 find_address_of_next_align_frag (fragS
**fragPP
,
9584 bfd_boolean
*paddable
)
9586 fragS
*fragP
= *fragPP
;
9587 addressT address
= fragP
->fr_address
;
9589 /* Do not reset the counts to 0. */
9593 /* Limit this to a small search. */
9594 if (*widens
>= (int) xtensa_fetch_width
)
9599 address
+= fragP
->fr_fix
;
9601 if (fragP
->fr_type
== rs_fill
)
9602 address
+= fragP
->fr_offset
* fragP
->fr_var
;
9603 else if (fragP
->fr_type
== rs_machine_dependent
)
9605 switch (fragP
->fr_subtype
)
9607 case RELAX_UNREACHABLE
:
9611 case RELAX_FILL_NOP
:
9613 if (!fragP
->tc_frag_data
.is_no_density
)
9618 if (fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_NARROW
)
9623 address
+= total_frag_text_expansion (fragP
);
9627 address
+= fragP
->tc_frag_data
.text_expansion
[0];
9630 case RELAX_ALIGN_NEXT_OPCODE
:
9631 case RELAX_DESIRE_ALIGN
:
9635 case RELAX_MAYBE_UNREACHABLE
:
9636 case RELAX_MAYBE_DESIRE_ALIGN
:
9641 /* Just punt if we don't know the type. */
9648 /* Just punt if we don't know the type. */
9652 fragP
= fragP
->fr_next
;
9660 static long bytes_to_stretch (fragS
*, int, int, int, int);
9663 future_alignment_required (fragS
*fragP
, long stretch ATTRIBUTE_UNUSED
)
9665 fragS
*this_frag
= fragP
;
9669 int narrow_nops
= 0;
9670 bfd_boolean paddable
= FALSE
;
9671 offsetT local_opt_diff
;
9674 int stretch_amount
= 0;
9675 int local_stretch_amount
;
9676 int global_stretch_amount
;
9678 address
= find_address_of_next_align_frag
9679 (&fragP
, &wide_nops
, &narrow_nops
, &num_widens
, &paddable
);
9683 if (this_frag
->tc_frag_data
.is_aligning_branch
)
9684 this_frag
->tc_frag_data
.slot_subtypes
[0] = RELAX_IMMED
;
9686 frag_wane (this_frag
);
9690 local_opt_diff
= get_aligned_diff (fragP
, address
, &max_diff
);
9691 opt_diff
= local_opt_diff
;
9692 gas_assert (opt_diff
>= 0);
9693 gas_assert (max_diff
>= opt_diff
);
9698 fragP
= fragP
->fr_next
;
9700 while (fragP
&& opt_diff
< max_diff
&& address
)
9702 /* We only use these to determine if we can exit early
9703 because there will be plenty of ways to align future
9705 int glob_widens
= 0;
9708 bfd_boolean glob_pad
= 0;
9709 address
= find_address_of_next_align_frag
9710 (&fragP
, &glob_widens
, &dnn
, &dw
, &glob_pad
);
9711 /* If there is a padable portion, then skip. */
9712 if (glob_pad
|| glob_widens
>= (1 << branch_align_power (now_seg
)))
9717 offsetT next_m_diff
;
9718 offsetT next_o_diff
;
9720 /* Downrange frags haven't had stretch added to them yet. */
9723 /* The address also includes any text expansion from this
9724 frag in a previous pass, but we don't want that. */
9725 address
-= this_frag
->tc_frag_data
.text_expansion
[0];
9727 /* Assume we are going to move at least opt_diff. In
9728 reality, we might not be able to, but assuming that
9729 we will helps catch cases where moving opt_diff pushes
9730 the next target from aligned to unaligned. */
9731 address
+= opt_diff
;
9733 next_o_diff
= get_aligned_diff (fragP
, address
, &next_m_diff
);
9735 /* Now cleanup for the adjustments to address. */
9736 next_o_diff
+= opt_diff
;
9737 next_m_diff
+= opt_diff
;
9738 if (next_o_diff
<= max_diff
&& next_o_diff
> opt_diff
)
9739 opt_diff
= next_o_diff
;
9740 if (next_m_diff
< max_diff
)
9741 max_diff
= next_m_diff
;
9742 fragP
= fragP
->fr_next
;
9746 /* If there are enough wideners in between, do it. */
9749 if (this_frag
->fr_subtype
== RELAX_UNREACHABLE
)
9751 gas_assert (opt_diff
<= (signed) xtensa_fetch_width
);
9756 local_stretch_amount
9757 = bytes_to_stretch (this_frag
, wide_nops
, narrow_nops
,
9758 num_widens
, local_opt_diff
);
9759 global_stretch_amount
9760 = bytes_to_stretch (this_frag
, wide_nops
, narrow_nops
,
9761 num_widens
, opt_diff
);
9762 /* If the condition below is true, then the frag couldn't
9763 stretch the correct amount for the global case, so we just
9764 optimize locally. We'll rely on the subsequent frags to get
9765 the correct alignment in the global case. */
9766 if (global_stretch_amount
< local_stretch_amount
)
9767 stretch_amount
= local_stretch_amount
;
9769 stretch_amount
= global_stretch_amount
;
9771 if (this_frag
->fr_subtype
== RELAX_SLOTS
9772 && this_frag
->tc_frag_data
.slot_subtypes
[0] == RELAX_NARROW
)
9773 gas_assert (stretch_amount
<= 1);
9774 else if (this_frag
->fr_subtype
== RELAX_FILL_NOP
)
9776 if (this_frag
->tc_frag_data
.is_no_density
)
9777 gas_assert (stretch_amount
== 3 || stretch_amount
== 0);
9779 gas_assert (stretch_amount
<= 3);
9782 return stretch_amount
;
9786 /* The idea: widen everything you can to get a target or loop aligned,
9787 then start using NOPs.
9789 wide_nops = the number of wide NOPs available for aligning
9790 narrow_nops = the number of narrow NOPs available for aligning
9791 (a subset of wide_nops)
9792 widens = the number of narrow instructions that should be widened
9797 bytes_to_stretch (fragS
*this_frag
,
9806 int bytes_short
= desired_diff
- num_widens
;
9808 gas_assert (desired_diff
>= 0
9809 && desired_diff
< (signed) xtensa_fetch_width
);
9810 if (desired_diff
== 0)
9813 gas_assert (wide_nops
> 0 || num_widens
> 0);
9815 /* Always prefer widening to NOP-filling. */
9816 if (bytes_short
< 0)
9818 /* There are enough RELAX_NARROW frags after this one
9819 to align the target without widening this frag in any way. */
9823 if (bytes_short
== 0)
9825 /* Widen every narrow between here and the align target
9826 and the align target will be properly aligned. */
9827 if (this_frag
->fr_subtype
== RELAX_FILL_NOP
)
9833 /* From here we will need at least one NOP to get an alignment.
9834 However, we may not be able to align at all, in which case,
9836 nops_needed
= desired_diff
/ 3;
9838 /* If there aren't enough nops, don't widen. */
9839 if (nops_needed
> wide_nops
)
9842 /* First try it with all wide nops. */
9843 nop_bytes
= nops_needed
* 3;
9844 extra_bytes
= desired_diff
- nop_bytes
;
9846 if (nop_bytes
+ num_widens
>= desired_diff
)
9848 if (this_frag
->fr_subtype
== RELAX_FILL_NOP
)
9850 else if (num_widens
== extra_bytes
)
9855 /* Add a narrow nop. */
9859 if (narrow_nops
== 0 || nops_needed
> wide_nops
)
9862 if (nop_bytes
+ num_widens
>= desired_diff
&& extra_bytes
>= 0)
9864 if (this_frag
->fr_subtype
== RELAX_FILL_NOP
)
9865 return !this_frag
->tc_frag_data
.is_no_density
? 2 : 3;
9866 else if (num_widens
== extra_bytes
)
9871 /* Replace a wide nop with a narrow nop--we can get here if
9872 extra_bytes was negative in the previous conditional. */
9873 if (narrow_nops
== 1)
9877 if (nop_bytes
+ num_widens
>= desired_diff
)
9879 if (this_frag
->fr_subtype
== RELAX_FILL_NOP
)
9880 return !this_frag
->tc_frag_data
.is_no_density
? 2 : 3;
9881 else if (num_widens
== extra_bytes
)
9886 /* If we can't satisfy any of the above cases, then we can't align
9887 using padding or fill nops. */
9892 static struct trampoline_frag
*
9893 search_trampolines (TInsn
*tinsn
, fragS
*fragP
, bfd_boolean unreachable_only
)
9895 struct trampoline_seg
*ts
= find_trampoline_seg (now_seg
);
9896 struct trampoline_frag
*tf
= (ts
) ? ts
->trampoline_list
.next
: NULL
;
9897 struct trampoline_frag
*best_tf
= NULL
;
9900 symbolS
*sym
= tinsn
->tok
[0].X_add_symbol
;
9901 offsetT target
= S_GET_VALUE (sym
) + tinsn
->tok
[0].X_add_number
;
9902 offsetT addr
= fragP
->fr_address
;
9903 offsetT lower
= (addr
< target
) ? addr
: target
;
9904 offsetT upper
= (addr
> target
) ? addr
: target
;
9905 int delta
= upper
- lower
;
9906 offsetT midpoint
= lower
+ delta
/ 2;
9907 int this_delta
= -1;
9910 if (delta
> 2 * J_RANGE
)
9912 /* One trampoline won't do; we need multiple.
9913 Choose the farthest trampoline that's still in range of the original
9914 and let a later pass finish the job. */
9915 for ( ; tf
; tf
= tf
->next
)
9917 int next_addr
= (tf
->next
) ? tf
->next
->fragP
->fr_address
+ tf
->next
->fragP
->fr_fix
: 0;
9919 this_addr
= tf
->fragP
->fr_address
+ tf
->fragP
->fr_fix
;
9923 if (this_addr
- addr
< J_RANGE
)
9928 /* Backward jump. */
9929 if (next_addr
== 0 || addr
- next_addr
> J_RANGE
)
9933 if (abs (addr
- this_addr
) < J_RANGE
)
9938 for ( ; tf
; tf
= tf
->next
)
9940 this_addr
= tf
->fragP
->fr_address
+ tf
->fragP
->fr_fix
;
9941 this_delta
= abs (this_addr
- midpoint
);
9942 if (unreachable_only
&& tf
->needs_jump_around
)
9944 if (!best_tf
|| this_delta
< best_delta
)
9947 best_delta
= this_delta
;
9948 best_addr
= this_addr
;
9953 best_delta
< J_RANGE
&&
9954 abs(best_addr
- lower
) < J_RANGE
&&
9955 abs(best_addr
- upper
) < J_RANGE
)
9958 return NULL
; /* No suitable trampoline found. */
9962 static struct trampoline_frag
*
9963 get_best_trampoline (TInsn
*tinsn
, fragS
*fragP
)
9965 struct trampoline_frag
*tf
= NULL
;
9967 tf
= search_trampolines (tinsn
, fragP
, TRUE
); /* Try unreachable first. */
9970 tf
= search_trampolines (tinsn
, fragP
, FALSE
); /* Try ones needing a jump-around, too. */
9977 check_and_update_trampolines (void)
9979 struct trampoline_seg
*ts
= find_trampoline_seg (now_seg
);
9980 struct trampoline_frag
*tf
= ts
->trampoline_list
.next
;
9981 struct trampoline_frag
*prev
= &ts
->trampoline_list
;
9983 for ( ; tf
; prev
= tf
, tf
= tf
->next
)
9985 if (tf
->fragP
->fr_var
< 3)
9987 frag_wane (tf
->fragP
);
9988 prev
->next
= tf
->next
;
9996 init_trampoline_frag (struct trampoline_frag
*trampP
)
9998 fragS
*fp
= trampP
->fragP
;
10001 if (fp
->fr_fix
== 0)
10004 char label
[10 + 2 * sizeof(fp
)];
10005 sprintf (label
, ".L0_TR_%p", fp
);
10007 lsym
= (symbolS
*)local_symbol_make (label
, now_seg
, 0, fp
);
10008 fp
->fr_symbol
= lsym
;
10009 if (trampP
->needs_jump_around
)
10011 /* Add a jump around this block of jumps, in case
10012 control flows into this block. */
10016 xtensa_isa isa
= xtensa_default_isa
;
10018 fp
->tc_frag_data
.is_insn
= 1;
10019 /* Assemble a jump insn. */
10020 tinsn_init (&insn
);
10021 insn
.insn_type
= ITYPE_INSN
;
10022 insn
.opcode
= xtensa_j_opcode
;
10024 set_expr_symbol_offset (&insn
.tok
[0], lsym
, 3);
10025 fmt
= xg_get_single_format (xtensa_j_opcode
);
10026 tinsn_to_slotbuf (fmt
, 0, &insn
, trampoline_slotbuf
);
10027 xtensa_format_set_slot (isa
, fmt
, 0, trampoline_buf
, trampoline_slotbuf
);
10028 xtensa_insnbuf_to_chars (isa
, trampoline_buf
, (unsigned char *)fp
->fr_literal
, 3);
10032 fixP
= fix_new (fp
, 0, 3, lsym
, 3, TRUE
, BFD_RELOC_XTENSA_SLOT0_OP
);
10033 trampP
->fixP
= fixP
;
10041 add_jump_to_trampoline (struct trampoline_frag
*trampP
, fragS
*origfrag
)
10043 fragS
*tramp
= trampP
->fragP
;
10045 int offset
= tramp
->fr_fix
; /* Where to assemble the j insn. */
10051 xtensa_isa isa
= xtensa_default_isa
;
10054 lsym
= tramp
->fr_symbol
;
10055 /* Assemble a jump to the target label in the trampoline frag. */
10056 tsym
= origfrag
->tc_frag_data
.slot_symbols
[0];
10057 toffset
= origfrag
-> tc_frag_data
.slot_offsets
[0];
10058 tinsn_init (&insn
);
10059 insn
.insn_type
= ITYPE_INSN
;
10060 insn
.opcode
= xtensa_j_opcode
;
10062 set_expr_symbol_offset (&insn
.tok
[0], tsym
, toffset
);
10063 fmt
= xg_get_single_format (xtensa_j_opcode
);
10064 tinsn_to_slotbuf (fmt
, 0, &insn
, trampoline_slotbuf
);
10065 xtensa_format_set_slot (isa
, fmt
, 0, trampoline_buf
, trampoline_slotbuf
);
10066 xtensa_insnbuf_to_chars (isa
, trampoline_buf
, (unsigned char *)tramp
->fr_literal
+ offset
, 3);
10067 tramp
->fr_fix
+= 3;
10068 tramp
->fr_var
-= 3;
10070 /* add a fix-up for the trampoline jump. */
10071 fixP
= fix_new (tramp
, tramp
->fr_fix
- 3, 3, tsym
, toffset
, TRUE
, BFD_RELOC_XTENSA_SLOT0_OP
);
10072 /* Modify the jump at the start of this trampoline to point past the newly-added jump. */
10073 fixP
= trampP
->fixP
;
10075 fixP
->fx_offset
+= 3;
10076 /* Modify the original j to point here. */
10077 origfrag
->tc_frag_data
.slot_symbols
[0] = lsym
;
10078 origfrag
->tc_frag_data
.slot_offsets
[0] = tramp
->fr_fix
- 3;
10079 /* If trampoline is full, remove it from the list. */
10080 check_and_update_trampolines ();
10087 relax_frag_immed (segT segP
,
10094 bfd_boolean estimate_only
)
10098 bfd_boolean negatable_branch
= FALSE
;
10099 bfd_boolean branch_jmp_to_next
= FALSE
;
10100 bfd_boolean from_wide_insn
= FALSE
;
10101 xtensa_isa isa
= xtensa_default_isa
;
10103 offsetT frag_offset
;
10105 int num_text_bytes
, num_literal_bytes
;
10106 int literal_diff
, total_text_diff
, this_text_diff
;
10108 gas_assert (fragP
->fr_opcode
!= NULL
);
10110 xg_clear_vinsn (&cur_vinsn
);
10111 vinsn_from_chars (&cur_vinsn
, fragP
->fr_opcode
);
10112 if (cur_vinsn
.num_slots
> 1)
10113 from_wide_insn
= TRUE
;
10115 tinsn
= cur_vinsn
.slots
[slot
];
10116 tinsn_immed_from_frag (&tinsn
, fragP
, slot
);
10118 if (estimate_only
&& xtensa_opcode_is_loop (isa
, tinsn
.opcode
) == 1)
10121 if (workaround_b_j_loop_end
&& ! fragP
->tc_frag_data
.is_no_transform
)
10122 branch_jmp_to_next
= is_branch_jmp_to_next (&tinsn
, fragP
);
10124 negatable_branch
= (xtensa_opcode_is_branch (isa
, tinsn
.opcode
) == 1);
10126 old_size
= xtensa_format_length (isa
, fmt
);
10128 /* Special case: replace a branch to the next instruction with a NOP.
10129 This is required to work around a hardware bug in T1040.0 and also
10130 serves as an optimization. */
10132 if (branch_jmp_to_next
10133 && ((old_size
== 2) || (old_size
== 3))
10134 && !next_frag_is_loop_target (fragP
))
10137 /* Here is the fun stuff: Get the immediate field from this
10138 instruction. If it fits, we are done. If not, find the next
10139 instruction sequence that fits. */
10141 frag_offset
= fragP
->fr_opcode
- fragP
->fr_literal
;
10142 istack_init (&istack
);
10143 num_steps
= xg_assembly_relax (&istack
, &tinsn
, segP
, fragP
, frag_offset
,
10144 min_steps
, stretch
);
10145 gas_assert (num_steps
>= min_steps
&& num_steps
<= RELAX_IMMED_MAXSTEPS
);
10147 fragP
->tc_frag_data
.slot_subtypes
[slot
] = (int) RELAX_IMMED
+ num_steps
;
10149 /* Figure out the number of bytes needed. */
10150 num_literal_bytes
= get_num_stack_literal_bytes (&istack
);
10152 = num_literal_bytes
- fragP
->tc_frag_data
.literal_expansion
[slot
];
10153 num_text_bytes
= get_num_stack_text_bytes (&istack
);
10155 if (from_wide_insn
)
10158 while (istack
.insn
[first
].opcode
== XTENSA_UNDEFINED
)
10161 num_text_bytes
+= old_size
;
10162 if (opcode_fits_format_slot (istack
.insn
[first
].opcode
, fmt
, slot
))
10163 num_text_bytes
-= xg_get_single_size (istack
.insn
[first
].opcode
);
10166 /* The first instruction in the relaxed sequence will go after
10167 the current wide instruction, and thus its symbolic immediates
10170 istack_init (&istack
);
10171 num_steps
= xg_assembly_relax (&istack
, &tinsn
, segP
, fragP
,
10172 frag_offset
+ old_size
,
10173 min_steps
, stretch
+ old_size
);
10174 gas_assert (num_steps
>= min_steps
&& num_steps
<= RELAX_IMMED_MAXSTEPS
);
10176 fragP
->tc_frag_data
.slot_subtypes
[slot
]
10177 = (int) RELAX_IMMED
+ num_steps
;
10179 num_literal_bytes
= get_num_stack_literal_bytes (&istack
);
10181 = num_literal_bytes
- fragP
->tc_frag_data
.literal_expansion
[slot
];
10183 num_text_bytes
= get_num_stack_text_bytes (&istack
) + old_size
;
10187 total_text_diff
= num_text_bytes
- old_size
;
10188 this_text_diff
= total_text_diff
- fragP
->tc_frag_data
.text_expansion
[slot
];
10190 /* It MUST get larger. If not, we could get an infinite loop. */
10191 gas_assert (num_text_bytes
>= 0);
10192 gas_assert (literal_diff
>= 0);
10193 gas_assert (total_text_diff
>= 0);
10195 fragP
->tc_frag_data
.text_expansion
[slot
] = total_text_diff
;
10196 fragP
->tc_frag_data
.literal_expansion
[slot
] = num_literal_bytes
;
10197 gas_assert (fragP
->tc_frag_data
.text_expansion
[slot
] >= 0);
10198 gas_assert (fragP
->tc_frag_data
.literal_expansion
[slot
] >= 0);
10200 /* Find the associated expandable literal for this. */
10201 if (literal_diff
!= 0)
10203 fragS
*lit_fragP
= fragP
->tc_frag_data
.literal_frags
[slot
];
10206 gas_assert (literal_diff
== 4);
10207 lit_fragP
->tc_frag_data
.unreported_expansion
+= literal_diff
;
10209 /* We expect that the literal section state has NOT been
10211 gas_assert (lit_fragP
->fr_type
== rs_machine_dependent
10212 && lit_fragP
->fr_subtype
== RELAX_LITERAL
);
10213 lit_fragP
->fr_subtype
= RELAX_LITERAL_NR
;
10215 /* We need to mark this section for another iteration
10221 if (negatable_branch
&& istack
.ninsn
> 1)
10222 update_next_frag_state (fragP
);
10224 /* If last insn is a jump, and it cannot reach its target, try to find a trampoline. */
10225 if (istack
.ninsn
> 2 &&
10226 istack
.insn
[istack
.ninsn
- 1].insn_type
== ITYPE_LABEL
&&
10227 istack
.insn
[istack
.ninsn
- 2].insn_type
== ITYPE_INSN
&&
10228 istack
.insn
[istack
.ninsn
- 2].opcode
== xtensa_j_opcode
)
10230 TInsn
*jinsn
= &istack
.insn
[istack
.ninsn
- 2];
10232 if (!xg_symbolic_immeds_fit (jinsn
, segP
, fragP
, fragP
->fr_offset
, total_text_diff
))
10234 struct trampoline_frag
*tf
= get_best_trampoline (jinsn
, fragP
);
10238 this_text_diff
+= init_trampoline_frag (tf
);
10239 this_text_diff
+= add_jump_to_trampoline (tf
, fragP
);
10243 /* If target symbol is undefined, assume it will reach once linked. */
10244 expressionS
*exp
= &istack
.insn
[istack
.ninsn
- 2].tok
[0];
10246 if (exp
->X_op
== O_symbol
&& S_IS_DEFINED (exp
->X_add_symbol
))
10248 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
10249 _("jump target out of range; no usable trampoline found"));
10255 return this_text_diff
;
10259 /* md_convert_frag Hook and Helper Functions. */
10261 static void convert_frag_align_next_opcode (fragS
*);
10262 static void convert_frag_narrow (segT
, fragS
*, xtensa_format
, int);
10263 static void convert_frag_fill_nop (fragS
*);
10264 static void convert_frag_immed (segT
, fragS
*, int, xtensa_format
, int);
10267 md_convert_frag (bfd
*abfd ATTRIBUTE_UNUSED
, segT sec
, fragS
*fragp
)
10269 static xtensa_insnbuf vbuf
= NULL
;
10270 xtensa_isa isa
= xtensa_default_isa
;
10274 const char *file_name
;
10277 file_name
= as_where (&line
);
10278 new_logical_line (fragp
->fr_file
, fragp
->fr_line
);
10280 switch (fragp
->fr_subtype
)
10282 case RELAX_ALIGN_NEXT_OPCODE
:
10283 /* Always convert. */
10284 convert_frag_align_next_opcode (fragp
);
10287 case RELAX_DESIRE_ALIGN
:
10288 /* Do nothing. If not aligned already, too bad. */
10291 case RELAX_LITERAL
:
10292 case RELAX_LITERAL_FINAL
:
10297 vbuf
= xtensa_insnbuf_alloc (isa
);
10299 xtensa_insnbuf_from_chars
10300 (isa
, vbuf
, (unsigned char *) fragp
->fr_opcode
, 0);
10301 fmt
= xtensa_format_decode (isa
, vbuf
);
10302 num_slots
= xtensa_format_num_slots (isa
, fmt
);
10304 for (slot
= 0; slot
< num_slots
; slot
++)
10306 switch (fragp
->tc_frag_data
.slot_subtypes
[slot
])
10309 convert_frag_narrow (sec
, fragp
, fmt
, slot
);
10313 case RELAX_IMMED_STEP1
:
10314 case RELAX_IMMED_STEP2
:
10315 case RELAX_IMMED_STEP3
:
10316 /* Place the immediate. */
10319 fragp
->tc_frag_data
.slot_subtypes
[slot
] - RELAX_IMMED
,
10324 /* This is OK because some slots could have
10325 relaxations and others have none. */
10331 case RELAX_UNREACHABLE
:
10332 memset (&fragp
->fr_literal
[fragp
->fr_fix
], 0, fragp
->fr_var
);
10333 fragp
->fr_fix
+= fragp
->tc_frag_data
.text_expansion
[0];
10334 fragp
->fr_var
-= fragp
->tc_frag_data
.text_expansion
[0];
10338 case RELAX_MAYBE_UNREACHABLE
:
10339 case RELAX_MAYBE_DESIRE_ALIGN
:
10343 case RELAX_FILL_NOP
:
10344 convert_frag_fill_nop (fragp
);
10347 case RELAX_LITERAL_NR
:
10348 if (use_literal_section
)
10350 /* This should have been handled during relaxation. When
10351 relaxing a code segment, literals sometimes need to be
10352 added to the corresponding literal segment. If that
10353 literal segment has already been relaxed, then we end up
10354 in this situation. Marking the literal segments as data
10355 would make this happen less often (since GAS always relaxes
10356 code before data), but we could still get into trouble if
10357 there are instructions in a segment that is not marked as
10358 containing code. Until we can implement a better solution,
10359 cheat and adjust the addresses of all the following frags.
10360 This could break subsequent alignments, but the linker's
10361 literal coalescing will do that anyway. */
10364 fragp
->fr_subtype
= RELAX_LITERAL_FINAL
;
10365 gas_assert (fragp
->tc_frag_data
.unreported_expansion
== 4);
10366 memset (&fragp
->fr_literal
[fragp
->fr_fix
], 0, 4);
10367 fragp
->fr_var
-= 4;
10368 fragp
->fr_fix
+= 4;
10369 for (f
= fragp
->fr_next
; f
; f
= f
->fr_next
)
10370 f
->fr_address
+= 4;
10373 as_bad (_("invalid relaxation fragment result"));
10376 case RELAX_TRAMPOLINE
:
10381 new_logical_line (file_name
, line
);
10386 convert_frag_align_next_opcode (fragS
*fragp
)
10388 char *nop_buf
; /* Location for Writing. */
10389 bfd_boolean use_no_density
= fragp
->tc_frag_data
.is_no_density
;
10390 addressT aligned_address
;
10392 int nop
, nop_count
;
10394 aligned_address
= get_noop_aligned_address (fragp
, fragp
->fr_address
+
10396 fill_size
= aligned_address
- (fragp
->fr_address
+ fragp
->fr_fix
);
10397 nop_count
= get_text_align_nop_count (fill_size
, use_no_density
);
10398 nop_buf
= fragp
->fr_literal
+ fragp
->fr_fix
;
10400 for (nop
= 0; nop
< nop_count
; nop
++)
10403 nop_size
= get_text_align_nth_nop_size (fill_size
, nop
, use_no_density
);
10405 assemble_nop (nop_size
, nop_buf
);
10406 nop_buf
+= nop_size
;
10409 fragp
->fr_fix
+= fill_size
;
10410 fragp
->fr_var
-= fill_size
;
10415 convert_frag_narrow (segT segP
, fragS
*fragP
, xtensa_format fmt
, int slot
)
10417 TInsn tinsn
, single_target
;
10418 int size
, old_size
, diff
;
10419 offsetT frag_offset
;
10421 gas_assert (slot
== 0);
10422 tinsn_from_chars (&tinsn
, fragP
->fr_opcode
, 0);
10424 if (fragP
->tc_frag_data
.is_aligning_branch
== 1)
10426 gas_assert (fragP
->tc_frag_data
.text_expansion
[0] == 1
10427 || fragP
->tc_frag_data
.text_expansion
[0] == 0);
10428 convert_frag_immed (segP
, fragP
, fragP
->tc_frag_data
.text_expansion
[0],
10433 if (fragP
->tc_frag_data
.text_expansion
[0] == 0)
10435 /* No conversion. */
10440 gas_assert (fragP
->fr_opcode
!= NULL
);
10442 /* Frags in this relaxation state should only contain
10443 single instruction bundles. */
10444 tinsn_immed_from_frag (&tinsn
, fragP
, 0);
10446 /* Just convert it to a wide form.... */
10448 old_size
= xg_get_single_size (tinsn
.opcode
);
10450 tinsn_init (&single_target
);
10451 frag_offset
= fragP
->fr_opcode
- fragP
->fr_literal
;
10453 if (! xg_is_single_relaxable_insn (&tinsn
, &single_target
, FALSE
))
10455 as_bad (_("unable to widen instruction"));
10459 size
= xg_get_single_size (single_target
.opcode
);
10460 xg_emit_insn_to_buf (&single_target
, fragP
->fr_opcode
, fragP
,
10461 frag_offset
, TRUE
);
10463 diff
= size
- old_size
;
10464 gas_assert (diff
>= 0);
10465 gas_assert (diff
<= fragP
->fr_var
);
10466 fragP
->fr_var
-= diff
;
10467 fragP
->fr_fix
+= diff
;
10475 convert_frag_fill_nop (fragS
*fragP
)
10477 char *loc
= &fragP
->fr_literal
[fragP
->fr_fix
];
10478 int size
= fragP
->tc_frag_data
.text_expansion
[0];
10479 gas_assert ((unsigned) size
== (fragP
->fr_next
->fr_address
10480 - fragP
->fr_address
- fragP
->fr_fix
));
10483 /* No conversion. */
10487 assemble_nop (size
, loc
);
10488 fragP
->tc_frag_data
.is_insn
= TRUE
;
10489 fragP
->fr_var
-= size
;
10490 fragP
->fr_fix
+= size
;
10495 static fixS
*fix_new_exp_in_seg
10496 (segT
, subsegT
, fragS
*, int, int, expressionS
*, int,
10497 bfd_reloc_code_real_type
);
10498 static void convert_frag_immed_finish_loop (segT
, fragS
*, TInsn
*);
10501 convert_frag_immed (segT segP
,
10507 char *immed_instr
= fragP
->fr_opcode
;
10509 bfd_boolean expanded
= FALSE
;
10510 bfd_boolean branch_jmp_to_next
= FALSE
;
10511 char *fr_opcode
= fragP
->fr_opcode
;
10512 xtensa_isa isa
= xtensa_default_isa
;
10513 bfd_boolean from_wide_insn
= FALSE
;
10515 bfd_boolean is_loop
;
10517 gas_assert (fr_opcode
!= NULL
);
10519 xg_clear_vinsn (&cur_vinsn
);
10521 vinsn_from_chars (&cur_vinsn
, fr_opcode
);
10522 if (cur_vinsn
.num_slots
> 1)
10523 from_wide_insn
= TRUE
;
10525 orig_tinsn
= cur_vinsn
.slots
[slot
];
10526 tinsn_immed_from_frag (&orig_tinsn
, fragP
, slot
);
10528 is_loop
= xtensa_opcode_is_loop (xtensa_default_isa
, orig_tinsn
.opcode
) == 1;
10530 if (workaround_b_j_loop_end
&& ! fragP
->tc_frag_data
.is_no_transform
)
10531 branch_jmp_to_next
= is_branch_jmp_to_next (&orig_tinsn
, fragP
);
10533 if (branch_jmp_to_next
&& !next_frag_is_loop_target (fragP
))
10535 /* Conversion just inserts a NOP and marks the fix as completed. */
10536 bytes
= xtensa_format_length (isa
, fmt
);
10539 cur_vinsn
.slots
[slot
].opcode
=
10540 xtensa_format_slot_nop_opcode (isa
, cur_vinsn
.format
, slot
);
10541 cur_vinsn
.slots
[slot
].ntok
= 0;
10545 bytes
+= fragP
->tc_frag_data
.text_expansion
[0];
10546 gas_assert (bytes
== 2 || bytes
== 3);
10547 build_nop (&cur_vinsn
.slots
[0], bytes
);
10548 fragP
->fr_fix
+= fragP
->tc_frag_data
.text_expansion
[0];
10550 vinsn_to_insnbuf (&cur_vinsn
, fr_opcode
, frag_now
, TRUE
);
10551 xtensa_insnbuf_to_chars
10552 (isa
, cur_vinsn
.insnbuf
, (unsigned char *) fr_opcode
, 0);
10557 /* Here is the fun stuff: Get the immediate field from this
10558 instruction. If it fits, we're done. If not, find the next
10559 instruction sequence that fits. */
10563 symbolS
*lit_sym
= NULL
;
10564 int total_size
= 0;
10565 int target_offset
= 0;
10568 symbolS
*gen_label
= NULL
;
10569 offsetT frag_offset
;
10570 bfd_boolean first
= TRUE
;
10572 /* It does not fit. Find something that does and
10573 convert immediately. */
10574 frag_offset
= fr_opcode
- fragP
->fr_literal
;
10575 istack_init (&istack
);
10576 xg_assembly_relax (&istack
, &orig_tinsn
,
10577 segP
, fragP
, frag_offset
, min_steps
, 0);
10579 old_size
= xtensa_format_length (isa
, fmt
);
10581 /* Assemble this right inline. */
10583 /* First, create the mapping from a label name to the REAL label. */
10585 for (i
= 0; i
< istack
.ninsn
; i
++)
10587 TInsn
*tinsn
= &istack
.insn
[i
];
10590 switch (tinsn
->insn_type
)
10592 case ITYPE_LITERAL
:
10593 if (lit_sym
!= NULL
)
10594 as_bad (_("multiple literals in expansion"));
10595 /* First find the appropriate space in the literal pool. */
10596 lit_frag
= fragP
->tc_frag_data
.literal_frags
[slot
];
10597 if (lit_frag
== NULL
)
10598 as_bad (_("no registered fragment for literal"));
10599 if (tinsn
->ntok
!= 1)
10600 as_bad (_("number of literal tokens != 1"));
10602 /* Set the literal symbol and add a fixup. */
10603 lit_sym
= lit_frag
->fr_symbol
;
10607 if (align_targets
&& !is_loop
)
10609 fragS
*unreach
= fragP
->fr_next
;
10610 while (!(unreach
->fr_type
== rs_machine_dependent
10611 && (unreach
->fr_subtype
== RELAX_MAYBE_UNREACHABLE
10612 || unreach
->fr_subtype
== RELAX_UNREACHABLE
)))
10614 unreach
= unreach
->fr_next
;
10617 gas_assert (unreach
->fr_type
== rs_machine_dependent
10618 && (unreach
->fr_subtype
== RELAX_MAYBE_UNREACHABLE
10619 || unreach
->fr_subtype
== RELAX_UNREACHABLE
));
10621 target_offset
+= unreach
->tc_frag_data
.text_expansion
[0];
10623 gas_assert (gen_label
== NULL
);
10624 gen_label
= symbol_new (FAKE_LABEL_NAME
, now_seg
,
10625 fr_opcode
- fragP
->fr_literal
10626 + target_offset
, fragP
);
10630 if (first
&& from_wide_insn
)
10632 target_offset
+= xtensa_format_length (isa
, fmt
);
10634 if (!opcode_fits_format_slot (tinsn
->opcode
, fmt
, slot
))
10635 target_offset
+= xg_get_single_size (tinsn
->opcode
);
10638 target_offset
+= xg_get_single_size (tinsn
->opcode
);
10645 for (i
= 0; i
< istack
.ninsn
; i
++)
10647 TInsn
*tinsn
= &istack
.insn
[i
];
10651 bfd_reloc_code_real_type reloc_type
;
10653 switch (tinsn
->insn_type
)
10655 case ITYPE_LITERAL
:
10656 lit_frag
= fragP
->tc_frag_data
.literal_frags
[slot
];
10657 /* Already checked. */
10658 gas_assert (lit_frag
!= NULL
);
10659 gas_assert (lit_sym
!= NULL
);
10660 gas_assert (tinsn
->ntok
== 1);
10662 target_seg
= S_GET_SEGMENT (lit_sym
);
10663 gas_assert (target_seg
);
10664 reloc_type
= map_operator_to_reloc (tinsn
->tok
[0].X_op
, TRUE
);
10665 fix_new_exp_in_seg (target_seg
, 0, lit_frag
, 0, 4,
10666 &tinsn
->tok
[0], FALSE
, reloc_type
);
10673 xg_resolve_labels (tinsn
, gen_label
);
10674 xg_resolve_literals (tinsn
, lit_sym
);
10675 if (from_wide_insn
&& first
)
10678 if (opcode_fits_format_slot (tinsn
->opcode
, fmt
, slot
))
10680 cur_vinsn
.slots
[slot
] = *tinsn
;
10684 cur_vinsn
.slots
[slot
].opcode
=
10685 xtensa_format_slot_nop_opcode (isa
, fmt
, slot
);
10686 cur_vinsn
.slots
[slot
].ntok
= 0;
10688 vinsn_to_insnbuf (&cur_vinsn
, immed_instr
, fragP
, TRUE
);
10689 xtensa_insnbuf_to_chars (isa
, cur_vinsn
.insnbuf
,
10690 (unsigned char *) immed_instr
, 0);
10691 fragP
->tc_frag_data
.is_insn
= TRUE
;
10692 size
= xtensa_format_length (isa
, fmt
);
10693 if (!opcode_fits_format_slot (tinsn
->opcode
, fmt
, slot
))
10695 xg_emit_insn_to_buf
10696 (tinsn
, immed_instr
+ size
, fragP
,
10697 immed_instr
- fragP
->fr_literal
+ size
, TRUE
);
10698 size
+= xg_get_single_size (tinsn
->opcode
);
10703 size
= xg_get_single_size (tinsn
->opcode
);
10704 xg_emit_insn_to_buf (tinsn
, immed_instr
, fragP
,
10705 immed_instr
- fragP
->fr_literal
, TRUE
);
10707 immed_instr
+= size
;
10708 total_size
+= size
;
10713 diff
= total_size
- old_size
;
10714 gas_assert (diff
>= 0);
10717 gas_assert (diff
<= fragP
->fr_var
);
10718 fragP
->fr_var
-= diff
;
10719 fragP
->fr_fix
+= diff
;
10722 /* Check for undefined immediates in LOOP instructions. */
10726 sym
= orig_tinsn
.tok
[1].X_add_symbol
;
10727 if (sym
!= NULL
&& !S_IS_DEFINED (sym
))
10729 as_bad (_("unresolved loop target symbol: %s"), S_GET_NAME (sym
));
10732 sym
= orig_tinsn
.tok
[1].X_op_symbol
;
10733 if (sym
!= NULL
&& !S_IS_DEFINED (sym
))
10735 as_bad (_("unresolved loop target symbol: %s"), S_GET_NAME (sym
));
10740 if (expanded
&& xtensa_opcode_is_loop (isa
, orig_tinsn
.opcode
) == 1)
10741 convert_frag_immed_finish_loop (segP
, fragP
, &orig_tinsn
);
10743 if (expanded
&& is_direct_call_opcode (orig_tinsn
.opcode
))
10745 /* Add an expansion note on the expanded instruction. */
10746 fix_new_exp_in_seg (now_seg
, 0, fragP
, fr_opcode
- fragP
->fr_literal
, 4,
10747 &orig_tinsn
.tok
[0], TRUE
,
10748 BFD_RELOC_XTENSA_ASM_EXPAND
);
10753 /* Add a new fix expression into the desired segment. We have to
10754 switch to that segment to do this. */
10757 fix_new_exp_in_seg (segT new_seg
,
10758 subsegT new_subseg
,
10764 bfd_reloc_code_real_type r_type
)
10767 segT seg
= now_seg
;
10768 subsegT subseg
= now_subseg
;
10770 gas_assert (new_seg
!= 0);
10771 subseg_set (new_seg
, new_subseg
);
10773 new_fix
= fix_new_exp (frag
, where
, size
, exp
, pcrel
, r_type
);
10774 subseg_set (seg
, subseg
);
10779 /* Relax a loop instruction so that it can span loop >256 bytes.
10785 addi as, as, lo8 (label-.L1)
10786 addmi as, as, mid8 (label-.L1)
10797 convert_frag_immed_finish_loop (segT segP
, fragS
*fragP
, TInsn
*tinsn
)
10802 unsigned long target
;
10803 static xtensa_insnbuf insnbuf
= NULL
;
10804 unsigned int loop_length
, loop_length_hi
, loop_length_lo
;
10805 xtensa_isa isa
= xtensa_default_isa
;
10806 addressT loop_offset
;
10807 addressT addi_offset
= 9;
10808 addressT addmi_offset
= 12;
10813 insnbuf
= xtensa_insnbuf_alloc (isa
);
10815 /* Get the loop offset. */
10816 loop_offset
= get_expanded_loop_offset (tinsn
->opcode
);
10818 /* Validate that there really is a LOOP at the loop_offset. Because
10819 loops are not bundleable, we can assume that the instruction will be
10821 tinsn_from_chars (&loop_insn
, fragP
->fr_opcode
+ loop_offset
, 0);
10822 tinsn_immed_from_frag (&loop_insn
, fragP
, 0);
10824 gas_assert (xtensa_opcode_is_loop (isa
, loop_insn
.opcode
) == 1);
10825 addi_offset
+= loop_offset
;
10826 addmi_offset
+= loop_offset
;
10828 gas_assert (tinsn
->ntok
== 2);
10829 if (tinsn
->tok
[1].X_op
== O_constant
)
10830 target
= tinsn
->tok
[1].X_add_number
;
10831 else if (tinsn
->tok
[1].X_op
== O_symbol
)
10833 /* Find the fragment. */
10834 symbolS
*sym
= tinsn
->tok
[1].X_add_symbol
;
10835 gas_assert (S_GET_SEGMENT (sym
) == segP
10836 || S_GET_SEGMENT (sym
) == absolute_section
);
10837 target
= (S_GET_VALUE (sym
) + tinsn
->tok
[1].X_add_number
);
10841 as_bad (_("invalid expression evaluation type %d"), tinsn
->tok
[1].X_op
);
10845 loop_length
= target
- (fragP
->fr_address
+ fragP
->fr_fix
);
10846 loop_length_hi
= loop_length
& ~0x0ff;
10847 loop_length_lo
= loop_length
& 0x0ff;
10848 if (loop_length_lo
>= 128)
10850 loop_length_lo
-= 256;
10851 loop_length_hi
+= 256;
10854 /* Because addmi sign-extends the immediate, 'loop_length_hi' can be at most
10855 32512. If the loop is larger than that, then we just fail. */
10856 if (loop_length_hi
> 32512)
10857 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
10858 _("loop too long for LOOP instruction"));
10860 tinsn_from_chars (&addi_insn
, fragP
->fr_opcode
+ addi_offset
, 0);
10861 gas_assert (addi_insn
.opcode
== xtensa_addi_opcode
);
10863 tinsn_from_chars (&addmi_insn
, fragP
->fr_opcode
+ addmi_offset
, 0);
10864 gas_assert (addmi_insn
.opcode
== xtensa_addmi_opcode
);
10866 set_expr_const (&addi_insn
.tok
[2], loop_length_lo
);
10867 tinsn_to_insnbuf (&addi_insn
, insnbuf
);
10869 fragP
->tc_frag_data
.is_insn
= TRUE
;
10870 xtensa_insnbuf_to_chars
10871 (isa
, insnbuf
, (unsigned char *) fragP
->fr_opcode
+ addi_offset
, 0);
10873 set_expr_const (&addmi_insn
.tok
[2], loop_length_hi
);
10874 tinsn_to_insnbuf (&addmi_insn
, insnbuf
);
10875 xtensa_insnbuf_to_chars
10876 (isa
, insnbuf
, (unsigned char *) fragP
->fr_opcode
+ addmi_offset
, 0);
10878 /* Walk through all of the frags from here to the loop end
10879 and mark them as no_transform to keep them from being modified
10880 by the linker. If we ever have a relocation for the
10881 addi/addmi of the difference of two symbols we can remove this. */
10884 for (next_fragP
= fragP
; next_fragP
!= NULL
;
10885 next_fragP
= next_fragP
->fr_next
)
10887 next_fragP
->tc_frag_data
.is_no_transform
= TRUE
;
10888 if (next_fragP
->tc_frag_data
.is_loop_target
)
10890 if (target_count
== 2)
10896 /* A map that keeps information on a per-subsegment basis. This is
10897 maintained during initial assembly, but is invalid once the
10898 subsegments are smashed together. I.E., it cannot be used during
10901 typedef struct subseg_map_struct
10909 float total_freq
; /* fall-through + branch target frequency */
10910 float target_freq
; /* branch target frequency alone */
10912 struct subseg_map_struct
*next
;
10916 static subseg_map
*sseg_map
= NULL
;
10918 static subseg_map
*
10919 get_subseg_info (segT seg
, subsegT subseg
)
10921 subseg_map
*subseg_e
;
10923 for (subseg_e
= sseg_map
; subseg_e
; subseg_e
= subseg_e
->next
)
10925 if (seg
== subseg_e
->seg
&& subseg
== subseg_e
->subseg
)
10932 static subseg_map
*
10933 add_subseg_info (segT seg
, subsegT subseg
)
10935 subseg_map
*subseg_e
= XNEW (subseg_map
);
10936 memset (subseg_e
, 0, sizeof (subseg_map
));
10937 subseg_e
->seg
= seg
;
10938 subseg_e
->subseg
= subseg
;
10939 subseg_e
->flags
= 0;
10940 /* Start off considering every branch target very important. */
10941 subseg_e
->target_freq
= 1.0;
10942 subseg_e
->total_freq
= 1.0;
10943 subseg_e
->next
= sseg_map
;
10944 sseg_map
= subseg_e
;
10950 get_last_insn_flags (segT seg
, subsegT subseg
)
10952 subseg_map
*subseg_e
= get_subseg_info (seg
, subseg
);
10954 return subseg_e
->flags
;
10960 set_last_insn_flags (segT seg
,
10965 subseg_map
*subseg_e
= get_subseg_info (seg
, subseg
);
10967 subseg_e
= add_subseg_info (seg
, subseg
);
10969 subseg_e
->flags
|= fl
;
10971 subseg_e
->flags
&= ~fl
;
10976 get_subseg_total_freq (segT seg
, subsegT subseg
)
10978 subseg_map
*subseg_e
= get_subseg_info (seg
, subseg
);
10980 return subseg_e
->total_freq
;
10986 get_subseg_target_freq (segT seg
, subsegT subseg
)
10988 subseg_map
*subseg_e
= get_subseg_info (seg
, subseg
);
10990 return subseg_e
->target_freq
;
10996 set_subseg_freq (segT seg
, subsegT subseg
, float total_f
, float target_f
)
10998 subseg_map
*subseg_e
= get_subseg_info (seg
, subseg
);
11000 subseg_e
= add_subseg_info (seg
, subseg
);
11001 subseg_e
->total_freq
= total_f
;
11002 subseg_e
->target_freq
= target_f
;
11006 /* Segment Lists and emit_state Stuff. */
11009 xtensa_move_seg_list_to_beginning (seg_list
*head
)
11014 segT literal_section
= head
->seg
;
11016 /* Move the literal section to the front of the section list. */
11017 gas_assert (literal_section
);
11018 if (literal_section
!= stdoutput
->sections
)
11020 bfd_section_list_remove (stdoutput
, literal_section
);
11021 bfd_section_list_prepend (stdoutput
, literal_section
);
11028 static void mark_literal_frags (seg_list
*);
11031 xtensa_move_literals (void)
11034 frchainS
*frchain_from
, *frchain_to
;
11035 fragS
*search_frag
, *next_frag
, *literal_pool
, *insert_after
;
11036 fragS
**frag_splice
;
11039 fixS
*fix
, *next_fix
, **fix_splice
;
11041 struct litpool_seg
*lps
;
11042 const char *init_name
= INIT_SECTION_NAME
;
11043 const char *fini_name
= FINI_SECTION_NAME
;
11044 int init_name_len
= strlen(init_name
);
11045 int fini_name_len
= strlen(fini_name
);
11047 mark_literal_frags (literal_head
->next
);
11049 if (use_literal_section
)
11052 /* Assign addresses (rough estimates) to the potential literal pool locations
11053 and create new ones if the gaps are too large. */
11055 for (lps
= litpool_seg_list
.next
; lps
; lps
= lps
->next
)
11057 frchainS
*frchP
= seg_info (lps
->seg
)->frchainP
;
11058 struct litpool_frag
*lpf
= lps
->frag_list
.next
;
11061 for ( ; frchP
; frchP
= frchP
->frch_next
)
11064 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
11066 if (lpf
&& fragP
== lpf
->fragP
)
11068 gas_assert(fragP
->fr_type
== rs_machine_dependent
&&
11069 (fragP
->fr_subtype
== RELAX_LITERAL_POOL_BEGIN
||
11070 fragP
->fr_subtype
== RELAX_LITERAL_POOL_CANDIDATE_BEGIN
));
11071 /* Found a litpool location. */
11075 if (fragP
->fr_type
== rs_machine_dependent
&&
11076 fragP
->fr_subtype
== RELAX_SLOTS
)
11079 for (slot
= 0; slot
< MAX_SLOTS
; slot
++)
11081 if (fragP
->tc_frag_data
.literal_frags
[slot
])
11083 /* L32R; point its literal to the nearest litpool
11084 preferring non-"candidate" positions to avoid
11085 the jump-around. */
11086 fragS
*litfrag
= fragP
->tc_frag_data
.literal_frags
[slot
];
11087 struct litpool_frag
*lp
= lpf
->prev
;
11092 while (lp
->fragP
->fr_subtype
==
11093 RELAX_LITERAL_POOL_CANDIDATE_BEGIN
)
11096 if (lp
->fragP
== NULL
)
11098 /* End of list; have to bite the bullet.
11099 Take the nearest. */
11103 /* Does it (conservatively) reach? */
11104 if (addr
- lp
->addr
<= 128 * 1024)
11106 if (lp
->fragP
->fr_subtype
== RELAX_LITERAL_POOL_BEGIN
)
11108 /* Found a good one. */
11111 else if (lp
->prev
->fragP
&&
11112 addr
- lp
->prev
->addr
> 128 * 1024)
11114 /* This is still a "candidate" but the next one
11115 will be too far away, so revert to the nearest
11116 one, convert it and add the jump around. */
11120 char label
[10 + 2 * sizeof (fragS
*)];
11122 poolbeg
= lp
->fragP
;
11124 poolbeg
->fr_subtype
= RELAX_LITERAL_POOL_BEGIN
;
11125 poolend
= poolbeg
->fr_next
;
11126 gas_assert (poolend
->fr_type
== rs_machine_dependent
&&
11127 poolend
->fr_subtype
== RELAX_LITERAL_POOL_END
);
11128 /* Create a local symbol pointing to the
11129 end of the pool. */
11130 sprintf (label
, ".L0_LT_%p", poolbeg
);
11131 lsym
= (symbolS
*)local_symbol_make (label
, lps
->seg
,
11133 poolbeg
->fr_symbol
= lsym
;
11134 /* Rest is done in xtensa_relax_frag. */
11138 if (! litfrag
->tc_frag_data
.literal_frag
)
11140 /* Take earliest use of this literal to avoid
11142 litfrag
->tc_frag_data
.literal_frag
= lp
->fragP
;
11147 addr
+= fragP
->fr_fix
;
11148 if (fragP
->fr_type
== rs_fill
)
11149 addr
+= fragP
->fr_offset
;
11154 for (segment
= literal_head
->next
; segment
; segment
= segment
->next
)
11156 const char *seg_name
= segment_name (segment
->seg
);
11158 /* Keep the literals for .init and .fini in separate sections. */
11159 if ((!memcmp (seg_name
, init_name
, init_name_len
) &&
11160 !strcmp (seg_name
+ init_name_len
, ".literal")) ||
11161 (!memcmp (seg_name
, fini_name
, fini_name_len
) &&
11162 !strcmp (seg_name
+ fini_name_len
, ".literal")))
11165 frchain_from
= seg_info (segment
->seg
)->frchainP
;
11166 search_frag
= frchain_from
->frch_root
;
11167 literal_pool
= NULL
;
11169 frag_splice
= &(frchain_from
->frch_root
);
11171 while (search_frag
&& !search_frag
->tc_frag_data
.literal_frag
)
11173 gas_assert (search_frag
->fr_fix
== 0
11174 || search_frag
->fr_type
== rs_align
);
11175 search_frag
= search_frag
->fr_next
;
11180 search_frag
= frchain_from
->frch_root
;
11181 as_bad_where (search_frag
->fr_file
, search_frag
->fr_line
,
11182 _("literal pool location required for text-section-literals; specify with .literal_position"));
11186 gas_assert (search_frag
->tc_frag_data
.literal_frag
->fr_subtype
11187 == RELAX_LITERAL_POOL_BEGIN
);
11188 xtensa_switch_section_emit_state (&state
, segment
->seg
, 0);
11190 /* Make sure that all the frags in this series are closed, and
11191 that there is at least one left over of zero-size. This
11192 prevents us from making a segment with an frchain without any
11194 frag_variant (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
11195 xtensa_set_frag_assembly_state (frag_now
);
11196 frag_variant (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
11197 xtensa_set_frag_assembly_state (frag_now
);
11199 while (search_frag
!= frag_now
)
11201 next_frag
= search_frag
->fr_next
;
11202 if (search_frag
->tc_frag_data
.literal_frag
)
11204 literal_pool
= search_frag
->tc_frag_data
.literal_frag
;
11205 gas_assert (literal_pool
->fr_subtype
== RELAX_LITERAL_POOL_BEGIN
);
11206 frchain_to
= literal_pool
->tc_frag_data
.lit_frchain
;
11207 gas_assert (frchain_to
);
11210 if (search_frag
->fr_type
== rs_fill
&& search_frag
->fr_fix
== 0)
11212 /* Skip empty fill frags. */
11213 *frag_splice
= next_frag
;
11214 search_frag
= next_frag
;
11218 if (search_frag
->fr_type
== rs_align
)
11220 /* Skip alignment frags, because the pool as a whole will be
11221 aligned if used, and we don't want to force alignment if the
11223 *frag_splice
= next_frag
;
11224 search_frag
= next_frag
;
11228 /* First, move the frag out of the literal section and
11229 to the appropriate place. */
11231 /* Insert an aligmnent frag at start of pool. */
11232 if (literal_pool
->fr_next
->fr_type
== rs_machine_dependent
&&
11233 literal_pool
->fr_next
->fr_subtype
== RELAX_LITERAL_POOL_END
)
11235 segT pool_seg
= literal_pool
->fr_next
->tc_frag_data
.lit_seg
;
11236 emit_state prev_state
;
11239 xtensa_switch_section_emit_state (&prev_state
, pool_seg
, 0);
11240 prev_frag
= frag_now
;
11241 frag_variant (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
11242 align_frag
= frag_now
;
11243 frag_align (2, 0, 0);
11244 /* Splice it into the right place. */
11245 prev_frag
->fr_next
= align_frag
->fr_next
;
11246 align_frag
->fr_next
= literal_pool
->fr_next
;
11247 literal_pool
->fr_next
= align_frag
;
11248 /* Insert after this one. */
11249 literal_pool
->tc_frag_data
.literal_frag
= align_frag
;
11250 xtensa_restore_emit_state (&prev_state
);
11252 insert_after
= literal_pool
->tc_frag_data
.literal_frag
;
11253 dest_seg
= insert_after
->fr_next
->tc_frag_data
.lit_seg
;
11254 /* Skip align frag. */
11255 if (insert_after
->fr_next
->fr_type
== rs_align
)
11257 insert_after
= insert_after
->fr_next
;
11260 *frag_splice
= next_frag
;
11261 search_frag
->fr_next
= insert_after
->fr_next
;
11262 insert_after
->fr_next
= search_frag
;
11263 search_frag
->tc_frag_data
.lit_seg
= dest_seg
;
11264 literal_pool
->tc_frag_data
.literal_frag
= search_frag
;
11266 /* Now move any fixups associated with this frag to the
11268 fix
= frchain_from
->fix_root
;
11269 fix_splice
= &(frchain_from
->fix_root
);
11272 next_fix
= fix
->fx_next
;
11273 if (fix
->fx_frag
== search_frag
)
11275 *fix_splice
= next_fix
;
11276 fix
->fx_next
= frchain_to
->fix_root
;
11277 frchain_to
->fix_root
= fix
;
11278 if (frchain_to
->fix_tail
== NULL
)
11279 frchain_to
->fix_tail
= fix
;
11282 fix_splice
= &(fix
->fx_next
);
11285 search_frag
= next_frag
;
11288 if (frchain_from
->fix_root
!= NULL
)
11290 frchain_from
= seg_info (segment
->seg
)->frchainP
;
11291 as_warn (_("fixes not all moved from %s"), segment
->seg
->name
);
11293 gas_assert (frchain_from
->fix_root
== NULL
);
11295 frchain_from
->fix_tail
= NULL
;
11296 xtensa_restore_emit_state (&state
);
11299 /* Now fix up the SEGMENT value for all the literal symbols. */
11300 for (lit
= literal_syms
; lit
; lit
= lit
->next
)
11302 symbolS
*lit_sym
= lit
->sym
;
11303 segT dseg
= symbol_get_frag (lit_sym
)->tc_frag_data
.lit_seg
;
11305 S_SET_SEGMENT (lit_sym
, dseg
);
11310 /* Walk over all the frags for segments in a list and mark them as
11311 containing literals. As clunky as this is, we can't rely on frag_var
11312 and frag_variant to get called in all situations. */
11315 mark_literal_frags (seg_list
*segment
)
11317 frchainS
*frchain_from
;
11318 fragS
*search_frag
;
11322 frchain_from
= seg_info (segment
->seg
)->frchainP
;
11323 search_frag
= frchain_from
->frch_root
;
11324 while (search_frag
)
11326 search_frag
->tc_frag_data
.is_literal
= TRUE
;
11327 search_frag
= search_frag
->fr_next
;
11329 segment
= segment
->next
;
11335 xtensa_reorder_seg_list (seg_list
*head
, segT after
)
11337 /* Move all of the sections in the section list to come
11338 after "after" in the gnu segment list. */
11343 segT literal_section
= head
->seg
;
11345 /* Move the literal section after "after". */
11346 gas_assert (literal_section
);
11347 if (literal_section
!= after
)
11349 bfd_section_list_remove (stdoutput
, literal_section
);
11350 bfd_section_list_insert_after (stdoutput
, after
, literal_section
);
11358 /* Push all the literal segments to the end of the gnu list. */
11361 xtensa_reorder_segments (void)
11368 for (sec
= stdoutput
->sections
; sec
!= NULL
; sec
= sec
->next
)
11374 /* Now that we have the last section, push all the literal
11375 sections to the end. */
11376 xtensa_reorder_seg_list (literal_head
, last_sec
);
11378 /* Now perform the final error check. */
11379 for (sec
= stdoutput
->sections
; sec
!= NULL
; sec
= sec
->next
)
11381 gas_assert (new_count
== old_count
);
11385 /* Change the emit state (seg, subseg, and frag related stuff) to the
11386 correct location. Return a emit_state which can be passed to
11387 xtensa_restore_emit_state to return to current fragment. */
11390 xtensa_switch_to_literal_fragment (emit_state
*result
)
11392 if (directive_state
[directive_absolute_literals
])
11394 segT lit4_seg
= cache_literal_section (TRUE
);
11395 xtensa_switch_section_emit_state (result
, lit4_seg
, 0);
11398 xtensa_switch_to_non_abs_literal_fragment (result
);
11400 /* Do a 4-byte align here. */
11401 frag_align (2, 0, 0);
11402 record_alignment (now_seg
, 2);
11407 xtensa_switch_to_non_abs_literal_fragment (emit_state
*result
)
11409 static bfd_boolean recursive
= FALSE
;
11410 fragS
*pool_location
= get_literal_pool_location (now_seg
);
11412 bfd_boolean is_init
=
11413 (now_seg
&& !strcmp (segment_name (now_seg
), INIT_SECTION_NAME
));
11414 bfd_boolean is_fini
=
11415 (now_seg
&& !strcmp (segment_name (now_seg
), FINI_SECTION_NAME
));
11417 if (pool_location
== NULL
11418 && !use_literal_section
11420 && !is_init
&& ! is_fini
)
11422 if (!auto_litpools
)
11424 as_bad (_("literal pool location required for text-section-literals; specify with .literal_position"));
11427 /* When we mark a literal pool location, we want to put a frag in
11428 the literal pool that points to it. But to do that, we want to
11429 switch_to_literal_fragment. But literal sections don't have
11430 literal pools, so their location is always null, so we would
11431 recurse forever. This is kind of hacky, but it works. */
11434 xtensa_mark_literal_pool_location ();
11438 lit_seg
= cache_literal_section (FALSE
);
11439 xtensa_switch_section_emit_state (result
, lit_seg
, 0);
11441 if (!use_literal_section
11442 && !is_init
&& !is_fini
11443 && get_literal_pool_location (now_seg
) != pool_location
)
11445 /* Close whatever frag is there. */
11446 frag_variant (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
11447 xtensa_set_frag_assembly_state (frag_now
);
11448 frag_now
->tc_frag_data
.literal_frag
= pool_location
;
11449 frag_variant (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
11450 xtensa_set_frag_assembly_state (frag_now
);
11455 /* Call this function before emitting data into the literal section.
11456 This is a helper function for xtensa_switch_to_literal_fragment.
11457 This is similar to a .section new_now_seg subseg. */
11460 xtensa_switch_section_emit_state (emit_state
*state
,
11462 subsegT new_now_subseg
)
11464 state
->name
= now_seg
->name
;
11465 state
->now_seg
= now_seg
;
11466 state
->now_subseg
= now_subseg
;
11467 state
->generating_literals
= generating_literals
;
11468 generating_literals
++;
11469 subseg_set (new_now_seg
, new_now_subseg
);
11473 /* Use to restore the emitting into the normal place. */
11476 xtensa_restore_emit_state (emit_state
*state
)
11478 generating_literals
= state
->generating_literals
;
11479 subseg_set (state
->now_seg
, state
->now_subseg
);
11483 /* Predicate function used to look up a section in a particular group. */
11486 match_section_group (bfd
*abfd ATTRIBUTE_UNUSED
, asection
*sec
, void *inf
)
11488 const char *gname
= inf
;
11489 const char *group_name
= elf_group_name (sec
);
11491 return (group_name
== gname
11492 || (group_name
!= NULL
11494 && strcmp (group_name
, gname
) == 0));
11498 /* Get the literal section to be used for the current text section.
11499 The result may be cached in the default_lit_sections structure. */
11502 cache_literal_section (bfd_boolean use_abs_literals
)
11504 const char *text_name
, *group_name
= 0;
11505 const char *base_name
, *suffix
;
11508 segT seg
, current_section
;
11509 int current_subsec
;
11510 bfd_boolean linkonce
= FALSE
;
11512 /* Save the current section/subsection. */
11513 current_section
= now_seg
;
11514 current_subsec
= now_subseg
;
11516 /* Clear the cached values if they are no longer valid. */
11517 if (now_seg
!= default_lit_sections
.current_text_seg
)
11519 default_lit_sections
.current_text_seg
= now_seg
;
11520 default_lit_sections
.lit_seg
= NULL
;
11521 default_lit_sections
.lit4_seg
= NULL
;
11524 /* Check if the literal section is already cached. */
11525 if (use_abs_literals
)
11526 pcached
= &default_lit_sections
.lit4_seg
;
11528 pcached
= &default_lit_sections
.lit_seg
;
11533 text_name
= default_lit_sections
.lit_prefix
;
11534 if (! text_name
|| ! *text_name
)
11536 text_name
= segment_name (current_section
);
11537 group_name
= elf_group_name (current_section
);
11538 linkonce
= (current_section
->flags
& SEC_LINK_ONCE
) != 0;
11541 base_name
= use_abs_literals
? ".lit4" : ".literal";
11544 name
= concat (base_name
, ".", group_name
, (char *) NULL
);
11546 else if (strncmp (text_name
, ".gnu.linkonce.", linkonce_len
) == 0)
11548 suffix
= strchr (text_name
+ linkonce_len
, '.');
11550 name
= concat (".gnu.linkonce", base_name
, suffix
? suffix
: "",
11556 /* If the section name begins or ends with ".text", then replace
11557 that portion instead of appending an additional suffix. */
11558 size_t len
= strlen (text_name
);
11560 && (strcmp (text_name
+ len
- 5, ".text") == 0
11561 || strncmp (text_name
, ".text", 5) == 0))
11564 name
= XNEWVEC (char, len
+ strlen (base_name
) + 1);
11565 if (strncmp (text_name
, ".text", 5) == 0)
11567 strcpy (name
, base_name
);
11568 strcat (name
, text_name
+ 5);
11572 strcpy (name
, text_name
);
11573 strcpy (name
+ len
, base_name
);
11577 /* Canonicalize section names to allow renaming literal sections.
11578 The group name, if any, came from the current text section and
11579 has already been canonicalized. */
11580 name
= tc_canonicalize_symbol_name (name
);
11582 seg
= bfd_get_section_by_name_if (stdoutput
, name
, match_section_group
,
11583 (void *) group_name
);
11588 seg
= subseg_force_new (name
, 0);
11590 if (! use_abs_literals
)
11592 /* Add the newly created literal segment to the list. */
11593 seg_list
*n
= XNEW (seg_list
);
11595 n
->next
= literal_head
->next
;
11596 literal_head
->next
= n
;
11599 flags
= (SEC_HAS_CONTENTS
| SEC_READONLY
| SEC_ALLOC
| SEC_LOAD
11600 | (linkonce
? (SEC_LINK_ONCE
| SEC_LINK_DUPLICATES_DISCARD
) : 0)
11601 | (use_abs_literals
? SEC_DATA
: SEC_CODE
));
11603 elf_group_name (seg
) = group_name
;
11605 bfd_set_section_flags (stdoutput
, seg
, flags
);
11606 bfd_set_section_alignment (stdoutput
, seg
, 2);
11610 subseg_set (current_section
, current_subsec
);
11615 /* Property Tables Stuff. */
11617 #define XTENSA_INSN_SEC_NAME ".xt.insn"
11618 #define XTENSA_LIT_SEC_NAME ".xt.lit"
11619 #define XTENSA_PROP_SEC_NAME ".xt.prop"
11621 typedef bfd_boolean (*frag_predicate
) (const fragS
*);
11622 typedef void (*frag_flags_fn
) (const fragS
*, frag_flags
*);
11624 static bfd_boolean
get_frag_is_literal (const fragS
*);
11625 static void xtensa_create_property_segments
11626 (frag_predicate
, frag_predicate
, const char *, xt_section_type
);
11627 static void xtensa_create_xproperty_segments
11628 (frag_flags_fn
, const char *, xt_section_type
);
11629 static bfd_boolean
exclude_section_from_property_tables (segT
);
11630 static bfd_boolean
section_has_property (segT
, frag_predicate
);
11631 static bfd_boolean
section_has_xproperty (segT
, frag_flags_fn
);
11632 static void add_xt_block_frags
11633 (segT
, xtensa_block_info
**, frag_predicate
, frag_predicate
);
11634 static bfd_boolean
xtensa_frag_flags_is_empty (const frag_flags
*);
11635 static void xtensa_frag_flags_init (frag_flags
*);
11636 static void get_frag_property_flags (const fragS
*, frag_flags
*);
11637 static flagword
frag_flags_to_number (const frag_flags
*);
11638 static void add_xt_prop_frags (segT
, xtensa_block_info
**, frag_flags_fn
);
11640 /* Set up property tables after relaxation. */
11643 xtensa_post_relax_hook (void)
11645 xtensa_move_seg_list_to_beginning (literal_head
);
11647 xtensa_find_unmarked_state_frags ();
11648 xtensa_mark_frags_for_org ();
11649 xtensa_mark_difference_of_two_symbols ();
11651 xtensa_create_property_segments (get_frag_is_literal
,
11653 XTENSA_LIT_SEC_NAME
,
11655 xtensa_create_xproperty_segments (get_frag_property_flags
,
11656 XTENSA_PROP_SEC_NAME
,
11659 if (warn_unaligned_branch_targets
)
11660 bfd_map_over_sections (stdoutput
, xtensa_find_unaligned_branch_targets
, 0);
11661 bfd_map_over_sections (stdoutput
, xtensa_find_unaligned_loops
, 0);
11665 /* This function is only meaningful after xtensa_move_literals. */
11668 get_frag_is_literal (const fragS
*fragP
)
11670 gas_assert (fragP
!= NULL
);
11671 return fragP
->tc_frag_data
.is_literal
;
11676 xtensa_create_property_segments (frag_predicate property_function
,
11677 frag_predicate end_property_function
,
11678 const char *section_name_base
,
11679 xt_section_type sec_type
)
11683 /* Walk over all of the current segments.
11684 Walk over each fragment
11685 For each non-empty fragment,
11686 Build a property record (append where possible). */
11688 for (seclist
= &stdoutput
->sections
;
11689 seclist
&& *seclist
;
11690 seclist
= &(*seclist
)->next
)
11692 segT sec
= *seclist
;
11694 if (exclude_section_from_property_tables (sec
))
11697 if (section_has_property (sec
, property_function
))
11699 segment_info_type
*xt_seg_info
;
11700 xtensa_block_info
**xt_blocks
;
11701 segT prop_sec
= xtensa_make_property_section (sec
, section_name_base
);
11703 prop_sec
->output_section
= prop_sec
;
11704 subseg_set (prop_sec
, 0);
11705 xt_seg_info
= seg_info (prop_sec
);
11706 xt_blocks
= &xt_seg_info
->tc_segment_info_data
.blocks
[sec_type
];
11708 /* Walk over all of the frchains here and add new sections. */
11709 add_xt_block_frags (sec
, xt_blocks
, property_function
,
11710 end_property_function
);
11714 /* Now we fill them out.... */
11716 for (seclist
= &stdoutput
->sections
;
11717 seclist
&& *seclist
;
11718 seclist
= &(*seclist
)->next
)
11720 segment_info_type
*seginfo
;
11721 xtensa_block_info
*block
;
11722 segT sec
= *seclist
;
11724 seginfo
= seg_info (sec
);
11725 block
= seginfo
->tc_segment_info_data
.blocks
[sec_type
];
11729 xtensa_block_info
*cur_block
;
11731 bfd_size_type rec_size
;
11733 for (cur_block
= block
; cur_block
; cur_block
= cur_block
->next
)
11736 rec_size
= num_recs
* 8;
11737 bfd_set_section_size (stdoutput
, sec
, rec_size
);
11744 subseg_set (sec
, 0);
11745 frag_data
= frag_more (rec_size
);
11747 for (i
= 0; i
< num_recs
; i
++)
11751 /* Write the fixup. */
11752 gas_assert (cur_block
);
11753 fix
= fix_new (frag_now
, i
* 8, 4,
11754 section_symbol (cur_block
->sec
),
11756 FALSE
, BFD_RELOC_32
);
11757 fix
->fx_file
= "<internal>";
11760 /* Write the length. */
11761 md_number_to_chars (&frag_data
[4 + i
* 8],
11762 cur_block
->size
, 4);
11763 cur_block
= cur_block
->next
;
11765 frag_wane (frag_now
);
11767 frag_wane (frag_now
);
11775 xtensa_create_xproperty_segments (frag_flags_fn flag_fn
,
11776 const char *section_name_base
,
11777 xt_section_type sec_type
)
11781 /* Walk over all of the current segments.
11782 Walk over each fragment.
11783 For each fragment that has instructions,
11784 build an instruction record (append where possible). */
11786 for (seclist
= &stdoutput
->sections
;
11787 seclist
&& *seclist
;
11788 seclist
= &(*seclist
)->next
)
11790 segT sec
= *seclist
;
11792 if (exclude_section_from_property_tables (sec
))
11795 if (section_has_xproperty (sec
, flag_fn
))
11797 segment_info_type
*xt_seg_info
;
11798 xtensa_block_info
**xt_blocks
;
11799 segT prop_sec
= xtensa_make_property_section (sec
, section_name_base
);
11801 prop_sec
->output_section
= prop_sec
;
11802 subseg_set (prop_sec
, 0);
11803 xt_seg_info
= seg_info (prop_sec
);
11804 xt_blocks
= &xt_seg_info
->tc_segment_info_data
.blocks
[sec_type
];
11806 /* Walk over all of the frchains here and add new sections. */
11807 add_xt_prop_frags (sec
, xt_blocks
, flag_fn
);
11811 /* Now we fill them out.... */
11813 for (seclist
= &stdoutput
->sections
;
11814 seclist
&& *seclist
;
11815 seclist
= &(*seclist
)->next
)
11817 segment_info_type
*seginfo
;
11818 xtensa_block_info
*block
;
11819 segT sec
= *seclist
;
11821 seginfo
= seg_info (sec
);
11822 block
= seginfo
->tc_segment_info_data
.blocks
[sec_type
];
11826 xtensa_block_info
*cur_block
;
11828 bfd_size_type rec_size
;
11830 for (cur_block
= block
; cur_block
; cur_block
= cur_block
->next
)
11833 rec_size
= num_recs
* (8 + 4);
11834 bfd_set_section_size (stdoutput
, sec
, rec_size
);
11835 /* elf_section_data (sec)->this_hdr.sh_entsize = 12; */
11842 subseg_set (sec
, 0);
11843 frag_data
= frag_more (rec_size
);
11845 for (i
= 0; i
< num_recs
; i
++)
11849 /* Write the fixup. */
11850 gas_assert (cur_block
);
11851 fix
= fix_new (frag_now
, i
* 12, 4,
11852 section_symbol (cur_block
->sec
),
11854 FALSE
, BFD_RELOC_32
);
11855 fix
->fx_file
= "<internal>";
11858 /* Write the length. */
11859 md_number_to_chars (&frag_data
[4 + i
* 12],
11860 cur_block
->size
, 4);
11861 md_number_to_chars (&frag_data
[8 + i
* 12],
11862 frag_flags_to_number (&cur_block
->flags
),
11863 sizeof (flagword
));
11864 cur_block
= cur_block
->next
;
11866 frag_wane (frag_now
);
11868 frag_wane (frag_now
);
11876 exclude_section_from_property_tables (segT sec
)
11878 flagword flags
= bfd_get_section_flags (stdoutput
, sec
);
11880 /* Sections that don't contribute to the memory footprint are excluded. */
11881 if ((flags
& SEC_DEBUGGING
)
11882 || !(flags
& SEC_ALLOC
)
11883 || (flags
& SEC_MERGE
))
11886 /* Linker cie and fde optimizations mess up property entries for
11887 eh_frame sections, but there is nothing inside them relevant to
11888 property tables anyway. */
11889 if (strcmp (sec
->name
, ".eh_frame") == 0)
11897 section_has_property (segT sec
, frag_predicate property_function
)
11899 segment_info_type
*seginfo
= seg_info (sec
);
11902 if (seginfo
&& seginfo
->frchainP
)
11904 for (fragP
= seginfo
->frchainP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
11906 if (property_function (fragP
)
11907 && (fragP
->fr_type
!= rs_fill
|| fragP
->fr_fix
!= 0))
11916 section_has_xproperty (segT sec
, frag_flags_fn property_function
)
11918 segment_info_type
*seginfo
= seg_info (sec
);
11921 if (seginfo
&& seginfo
->frchainP
)
11923 for (fragP
= seginfo
->frchainP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
11925 frag_flags prop_flags
;
11926 property_function (fragP
, &prop_flags
);
11927 if (!xtensa_frag_flags_is_empty (&prop_flags
))
11935 /* Two types of block sections exist right now: literal and insns. */
11938 add_xt_block_frags (segT sec
,
11939 xtensa_block_info
**xt_block
,
11940 frag_predicate property_function
,
11941 frag_predicate end_property_function
)
11945 /* Build it if needed. */
11946 while (*xt_block
!= NULL
)
11947 xt_block
= &(*xt_block
)->next
;
11948 /* We are either at NULL at the beginning or at the end. */
11950 /* Walk through the frags. */
11951 if (seg_info (sec
)->frchainP
)
11953 for (fragP
= seg_info (sec
)->frchainP
->frch_root
;
11955 fragP
= fragP
->fr_next
)
11957 if (property_function (fragP
)
11958 && (fragP
->fr_type
!= rs_fill
|| fragP
->fr_fix
!= 0))
11960 if (*xt_block
!= NULL
)
11962 if ((*xt_block
)->offset
+ (*xt_block
)->size
11963 == fragP
->fr_address
)
11964 (*xt_block
)->size
+= fragP
->fr_fix
;
11966 xt_block
= &((*xt_block
)->next
);
11968 if (*xt_block
== NULL
)
11970 xtensa_block_info
*new_block
= XNEW (xtensa_block_info
);
11971 new_block
->sec
= sec
;
11972 new_block
->offset
= fragP
->fr_address
;
11973 new_block
->size
= fragP
->fr_fix
;
11974 new_block
->next
= NULL
;
11975 xtensa_frag_flags_init (&new_block
->flags
);
11976 *xt_block
= new_block
;
11978 if (end_property_function
11979 && end_property_function (fragP
))
11981 xt_block
= &((*xt_block
)->next
);
11989 /* Break the encapsulation of add_xt_prop_frags here. */
11992 xtensa_frag_flags_is_empty (const frag_flags
*prop_flags
)
11994 if (prop_flags
->is_literal
11995 || prop_flags
->is_insn
11996 || prop_flags
->is_data
11997 || prop_flags
->is_unreachable
)
12004 xtensa_frag_flags_init (frag_flags
*prop_flags
)
12006 memset (prop_flags
, 0, sizeof (frag_flags
));
12011 get_frag_property_flags (const fragS
*fragP
, frag_flags
*prop_flags
)
12013 xtensa_frag_flags_init (prop_flags
);
12014 if (fragP
->tc_frag_data
.is_literal
)
12015 prop_flags
->is_literal
= TRUE
;
12016 if (fragP
->tc_frag_data
.is_specific_opcode
12017 || fragP
->tc_frag_data
.is_no_transform
)
12019 prop_flags
->is_no_transform
= TRUE
;
12020 if (xtensa_frag_flags_is_empty (prop_flags
))
12021 prop_flags
->is_data
= TRUE
;
12023 if (fragP
->tc_frag_data
.is_unreachable
)
12024 prop_flags
->is_unreachable
= TRUE
;
12025 else if (fragP
->tc_frag_data
.is_insn
)
12027 prop_flags
->is_insn
= TRUE
;
12028 if (fragP
->tc_frag_data
.is_loop_target
)
12029 prop_flags
->insn
.is_loop_target
= TRUE
;
12030 if (fragP
->tc_frag_data
.is_branch_target
)
12031 prop_flags
->insn
.is_branch_target
= TRUE
;
12032 if (fragP
->tc_frag_data
.is_no_density
)
12033 prop_flags
->insn
.is_no_density
= TRUE
;
12034 if (fragP
->tc_frag_data
.use_absolute_literals
)
12035 prop_flags
->insn
.is_abslit
= TRUE
;
12037 if (fragP
->tc_frag_data
.is_align
)
12039 prop_flags
->is_align
= TRUE
;
12040 prop_flags
->alignment
= fragP
->tc_frag_data
.alignment
;
12041 if (xtensa_frag_flags_is_empty (prop_flags
))
12042 prop_flags
->is_data
= TRUE
;
12048 frag_flags_to_number (const frag_flags
*prop_flags
)
12051 if (prop_flags
->is_literal
)
12052 num
|= XTENSA_PROP_LITERAL
;
12053 if (prop_flags
->is_insn
)
12054 num
|= XTENSA_PROP_INSN
;
12055 if (prop_flags
->is_data
)
12056 num
|= XTENSA_PROP_DATA
;
12057 if (prop_flags
->is_unreachable
)
12058 num
|= XTENSA_PROP_UNREACHABLE
;
12059 if (prop_flags
->insn
.is_loop_target
)
12060 num
|= XTENSA_PROP_INSN_LOOP_TARGET
;
12061 if (prop_flags
->insn
.is_branch_target
)
12063 num
|= XTENSA_PROP_INSN_BRANCH_TARGET
;
12064 num
= SET_XTENSA_PROP_BT_ALIGN (num
, prop_flags
->insn
.bt_align_priority
);
12067 if (prop_flags
->insn
.is_no_density
)
12068 num
|= XTENSA_PROP_INSN_NO_DENSITY
;
12069 if (prop_flags
->is_no_transform
)
12070 num
|= XTENSA_PROP_NO_TRANSFORM
;
12071 if (prop_flags
->insn
.is_no_reorder
)
12072 num
|= XTENSA_PROP_INSN_NO_REORDER
;
12073 if (prop_flags
->insn
.is_abslit
)
12074 num
|= XTENSA_PROP_INSN_ABSLIT
;
12076 if (prop_flags
->is_align
)
12078 num
|= XTENSA_PROP_ALIGN
;
12079 num
= SET_XTENSA_PROP_ALIGNMENT (num
, prop_flags
->alignment
);
12087 xtensa_frag_flags_combinable (const frag_flags
*prop_flags_1
,
12088 const frag_flags
*prop_flags_2
)
12090 /* Cannot combine with an end marker. */
12092 if (prop_flags_1
->is_literal
!= prop_flags_2
->is_literal
)
12094 if (prop_flags_1
->is_insn
!= prop_flags_2
->is_insn
)
12096 if (prop_flags_1
->is_data
!= prop_flags_2
->is_data
)
12099 if (prop_flags_1
->is_insn
)
12101 /* Properties of the beginning of the frag. */
12102 if (prop_flags_2
->insn
.is_loop_target
)
12104 if (prop_flags_2
->insn
.is_branch_target
)
12106 if (prop_flags_1
->insn
.is_no_density
!=
12107 prop_flags_2
->insn
.is_no_density
)
12109 if (prop_flags_1
->is_no_transform
!=
12110 prop_flags_2
->is_no_transform
)
12112 if (prop_flags_1
->insn
.is_no_reorder
!=
12113 prop_flags_2
->insn
.is_no_reorder
)
12115 if (prop_flags_1
->insn
.is_abslit
!=
12116 prop_flags_2
->insn
.is_abslit
)
12120 if (prop_flags_1
->is_align
)
12128 xt_block_aligned_size (const xtensa_block_info
*xt_block
)
12131 unsigned align_bits
;
12133 if (!xt_block
->flags
.is_align
)
12134 return xt_block
->size
;
12136 end_addr
= xt_block
->offset
+ xt_block
->size
;
12137 align_bits
= xt_block
->flags
.alignment
;
12138 end_addr
= ((end_addr
+ ((1 << align_bits
) -1)) >> align_bits
) << align_bits
;
12139 return end_addr
- xt_block
->offset
;
12144 xtensa_xt_block_combine (xtensa_block_info
*xt_block
,
12145 const xtensa_block_info
*xt_block_2
)
12147 if (xt_block
->sec
!= xt_block_2
->sec
)
12149 if (xt_block
->offset
+ xt_block_aligned_size (xt_block
)
12150 != xt_block_2
->offset
)
12153 if (xt_block_2
->size
== 0
12154 && (!xt_block_2
->flags
.is_unreachable
12155 || xt_block
->flags
.is_unreachable
))
12157 if (xt_block_2
->flags
.is_align
12158 && xt_block
->flags
.is_align
)
12160 /* Nothing needed. */
12161 if (xt_block
->flags
.alignment
>= xt_block_2
->flags
.alignment
)
12166 if (xt_block_2
->flags
.is_align
)
12168 /* Push alignment to previous entry. */
12169 xt_block
->flags
.is_align
= xt_block_2
->flags
.is_align
;
12170 xt_block
->flags
.alignment
= xt_block_2
->flags
.alignment
;
12175 if (!xtensa_frag_flags_combinable (&xt_block
->flags
,
12176 &xt_block_2
->flags
))
12179 xt_block
->size
+= xt_block_2
->size
;
12181 if (xt_block_2
->flags
.is_align
)
12183 xt_block
->flags
.is_align
= TRUE
;
12184 xt_block
->flags
.alignment
= xt_block_2
->flags
.alignment
;
12192 add_xt_prop_frags (segT sec
,
12193 xtensa_block_info
**xt_block
,
12194 frag_flags_fn property_function
)
12198 /* Build it if needed. */
12199 while (*xt_block
!= NULL
)
12201 xt_block
= &(*xt_block
)->next
;
12203 /* We are either at NULL at the beginning or at the end. */
12205 /* Walk through the frags. */
12206 if (seg_info (sec
)->frchainP
)
12208 for (fragP
= seg_info (sec
)->frchainP
->frch_root
; fragP
;
12209 fragP
= fragP
->fr_next
)
12211 xtensa_block_info tmp_block
;
12212 tmp_block
.sec
= sec
;
12213 tmp_block
.offset
= fragP
->fr_address
;
12214 tmp_block
.size
= fragP
->fr_fix
;
12215 tmp_block
.next
= NULL
;
12216 property_function (fragP
, &tmp_block
.flags
);
12218 if (!xtensa_frag_flags_is_empty (&tmp_block
.flags
))
12219 /* && fragP->fr_fix != 0) */
12221 if ((*xt_block
) == NULL
12222 || !xtensa_xt_block_combine (*xt_block
, &tmp_block
))
12224 xtensa_block_info
*new_block
;
12225 if ((*xt_block
) != NULL
)
12226 xt_block
= &(*xt_block
)->next
;
12227 new_block
= XNEW (xtensa_block_info
);
12228 *new_block
= tmp_block
;
12229 *xt_block
= new_block
;
12237 /* op_placement_info_table */
12239 /* op_placement_info makes it easier to determine which
12240 ops can go in which slots. */
12243 init_op_placement_info_table (void)
12245 xtensa_isa isa
= xtensa_default_isa
;
12246 xtensa_insnbuf ibuf
= xtensa_insnbuf_alloc (isa
);
12247 xtensa_opcode opcode
;
12250 int num_opcodes
= xtensa_isa_num_opcodes (isa
);
12252 op_placement_table
= XNEWVEC (op_placement_info
, num_opcodes
);
12253 gas_assert (xtensa_isa_num_formats (isa
) < MAX_FORMATS
);
12255 for (opcode
= 0; opcode
< num_opcodes
; opcode
++)
12257 op_placement_info
*opi
= &op_placement_table
[opcode
];
12258 /* FIXME: Make tinsn allocation dynamic. */
12259 if (xtensa_opcode_num_operands (isa
, opcode
) > MAX_INSN_ARGS
)
12260 as_fatal (_("too many operands in instruction"));
12261 opi
->narrowest
= XTENSA_UNDEFINED
;
12262 opi
->narrowest_size
= 0x7F;
12263 opi
->narrowest_slot
= 0;
12265 opi
->num_formats
= 0;
12267 for (fmt
= 0; fmt
< xtensa_isa_num_formats (isa
); fmt
++)
12269 opi
->slots
[fmt
] = 0;
12270 for (slot
= 0; slot
< xtensa_format_num_slots (isa
, fmt
); slot
++)
12272 if (xtensa_opcode_encode (isa
, fmt
, slot
, ibuf
, opcode
) == 0)
12274 int fmt_length
= xtensa_format_length (isa
, fmt
);
12276 set_bit (fmt
, opi
->formats
);
12277 set_bit (slot
, opi
->slots
[fmt
]);
12278 if (fmt_length
< opi
->narrowest_size
12279 || (fmt_length
== opi
->narrowest_size
12280 && (xtensa_format_num_slots (isa
, fmt
)
12281 < xtensa_format_num_slots (isa
,
12284 opi
->narrowest
= fmt
;
12285 opi
->narrowest_size
= fmt_length
;
12286 opi
->narrowest_slot
= slot
;
12291 opi
->num_formats
++;
12294 xtensa_insnbuf_free (isa
, ibuf
);
12299 opcode_fits_format_slot (xtensa_opcode opcode
, xtensa_format fmt
, int slot
)
12301 return bit_is_set (slot
, op_placement_table
[opcode
].slots
[fmt
]);
12305 /* If the opcode is available in a single slot format, return its size. */
12308 xg_get_single_size (xtensa_opcode opcode
)
12310 return op_placement_table
[opcode
].narrowest_size
;
12314 static xtensa_format
12315 xg_get_single_format (xtensa_opcode opcode
)
12317 return op_placement_table
[opcode
].narrowest
;
12322 xg_get_single_slot (xtensa_opcode opcode
)
12324 return op_placement_table
[opcode
].narrowest_slot
;
12328 /* Instruction Stack Functions (from "xtensa-istack.h"). */
12331 istack_init (IStack
*stack
)
12338 istack_empty (IStack
*stack
)
12340 return (stack
->ninsn
== 0);
12345 istack_full (IStack
*stack
)
12347 return (stack
->ninsn
== MAX_ISTACK
);
12351 /* Return a pointer to the top IStack entry.
12352 It is an error to call this if istack_empty () is TRUE. */
12355 istack_top (IStack
*stack
)
12357 int rec
= stack
->ninsn
- 1;
12358 gas_assert (!istack_empty (stack
));
12359 return &stack
->insn
[rec
];
12363 /* Add a new TInsn to an IStack.
12364 It is an error to call this if istack_full () is TRUE. */
12367 istack_push (IStack
*stack
, TInsn
*insn
)
12369 int rec
= stack
->ninsn
;
12370 gas_assert (!istack_full (stack
));
12371 stack
->insn
[rec
] = *insn
;
12376 /* Clear space for the next TInsn on the IStack and return a pointer
12377 to it. It is an error to call this if istack_full () is TRUE. */
12380 istack_push_space (IStack
*stack
)
12382 int rec
= stack
->ninsn
;
12384 gas_assert (!istack_full (stack
));
12385 insn
= &stack
->insn
[rec
];
12392 /* Remove the last pushed instruction. It is an error to call this if
12393 istack_empty () returns TRUE. */
12396 istack_pop (IStack
*stack
)
12398 int rec
= stack
->ninsn
- 1;
12399 gas_assert (!istack_empty (stack
));
12401 tinsn_init (&stack
->insn
[rec
]);
12405 /* TInsn functions. */
12408 tinsn_init (TInsn
*dst
)
12410 memset (dst
, 0, sizeof (TInsn
));
12414 /* Return TRUE if ANY of the operands in the insn are symbolic. */
12417 tinsn_has_symbolic_operands (const TInsn
*insn
)
12420 int n
= insn
->ntok
;
12422 gas_assert (insn
->insn_type
== ITYPE_INSN
);
12424 for (i
= 0; i
< n
; ++i
)
12426 switch (insn
->tok
[i
].X_op
)
12440 tinsn_has_invalid_symbolic_operands (const TInsn
*insn
)
12442 xtensa_isa isa
= xtensa_default_isa
;
12444 int n
= insn
->ntok
;
12446 gas_assert (insn
->insn_type
== ITYPE_INSN
);
12448 for (i
= 0; i
< n
; ++i
)
12450 switch (insn
->tok
[i
].X_op
)
12458 /* Errors for these types are caught later. */
12463 /* Symbolic immediates are only allowed on the last immediate
12464 operand. At this time, CONST16 is the only opcode where we
12465 support non-PC-relative relocations. */
12466 if (i
!= get_relaxable_immed (insn
->opcode
)
12467 || (xtensa_operand_is_PCrelative (isa
, insn
->opcode
, i
) != 1
12468 && insn
->opcode
!= xtensa_const16_opcode
))
12470 as_bad (_("invalid symbolic operand"));
12479 /* For assembly code with complex expressions (e.g. subtraction),
12480 we have to build them in the literal pool so that
12481 their results are calculated correctly after relaxation.
12482 The relaxation only handles expressions that
12483 boil down to SYMBOL + OFFSET. */
12486 tinsn_has_complex_operands (const TInsn
*insn
)
12489 int n
= insn
->ntok
;
12490 gas_assert (insn
->insn_type
== ITYPE_INSN
);
12491 for (i
= 0; i
< n
; ++i
)
12493 switch (insn
->tok
[i
].X_op
)
12509 /* Encode a TInsn opcode and its constant operands into slotbuf.
12510 Return TRUE if there is a symbol in the immediate field. This
12511 function assumes that:
12512 1) The number of operands are correct.
12513 2) The insn_type is ITYPE_INSN.
12514 3) The opcode can be encoded in the specified format and slot.
12515 4) Operands are either O_constant or O_symbol, and all constants fit. */
12518 tinsn_to_slotbuf (xtensa_format fmt
,
12521 xtensa_insnbuf slotbuf
)
12523 xtensa_isa isa
= xtensa_default_isa
;
12524 xtensa_opcode opcode
= tinsn
->opcode
;
12525 bfd_boolean has_fixup
= FALSE
;
12526 int noperands
= xtensa_opcode_num_operands (isa
, opcode
);
12529 gas_assert (tinsn
->insn_type
== ITYPE_INSN
);
12530 if (noperands
!= tinsn
->ntok
)
12531 as_fatal (_("operand number mismatch"));
12533 if (xtensa_opcode_encode (isa
, fmt
, slot
, slotbuf
, opcode
))
12535 as_bad (_("cannot encode opcode \"%s\" in the given format \"%s\""),
12536 xtensa_opcode_name (isa
, opcode
), xtensa_format_name (isa
, fmt
));
12540 for (i
= 0; i
< noperands
; i
++)
12542 expressionS
*exp
= &tinsn
->tok
[i
];
12545 const char *file_name
;
12551 if (xtensa_operand_is_visible (isa
, opcode
, i
) == 0)
12553 /* The register number has already been checked in
12554 expression_maybe_register, so we don't need to check here. */
12555 opnd_value
= exp
->X_add_number
;
12556 (void) xtensa_operand_encode (isa
, opcode
, i
, &opnd_value
);
12557 rc
= xtensa_operand_set_field (isa
, opcode
, i
, fmt
, slot
, slotbuf
,
12560 as_warn (_("xtensa-isa failure: %s"), xtensa_isa_error_msg (isa
));
12564 if (xtensa_operand_is_visible (isa
, opcode
, i
) == 0)
12566 file_name
= as_where (&line
);
12567 /* It is a constant and we called this function
12568 then we have to try to fit it. */
12569 xtensa_insnbuf_set_operand (slotbuf
, fmt
, slot
, opcode
, i
,
12570 exp
->X_add_number
, file_name
, line
);
12583 /* Encode a single TInsn into an insnbuf. If the opcode can only be encoded
12584 into a multi-slot instruction, fill the other slots with NOPs.
12585 Return TRUE if there is a symbol in the immediate field. See also the
12586 assumptions listed for tinsn_to_slotbuf. */
12589 tinsn_to_insnbuf (TInsn
*tinsn
, xtensa_insnbuf insnbuf
)
12591 static xtensa_insnbuf slotbuf
= 0;
12592 static vliw_insn vinsn
;
12593 xtensa_isa isa
= xtensa_default_isa
;
12594 bfd_boolean has_fixup
= FALSE
;
12599 slotbuf
= xtensa_insnbuf_alloc (isa
);
12600 xg_init_vinsn (&vinsn
);
12603 xg_clear_vinsn (&vinsn
);
12605 bundle_tinsn (tinsn
, &vinsn
);
12607 xtensa_format_encode (isa
, vinsn
.format
, insnbuf
);
12609 for (i
= 0; i
< vinsn
.num_slots
; i
++)
12611 /* Only one slot may have a fix-up because the rest contains NOPs. */
12613 tinsn_to_slotbuf (vinsn
.format
, i
, &vinsn
.slots
[i
], vinsn
.slotbuf
[i
]);
12614 xtensa_format_set_slot (isa
, vinsn
.format
, i
, insnbuf
, vinsn
.slotbuf
[i
]);
12621 /* Check the instruction arguments. Return TRUE on failure. */
12624 tinsn_check_arguments (const TInsn
*insn
)
12626 xtensa_isa isa
= xtensa_default_isa
;
12627 xtensa_opcode opcode
= insn
->opcode
;
12628 xtensa_regfile t1_regfile
, t2_regfile
;
12629 int t1_reg
, t2_reg
;
12630 int t1_base_reg
, t1_last_reg
;
12631 int t2_base_reg
, t2_last_reg
;
12632 char t1_inout
, t2_inout
;
12635 if (opcode
== XTENSA_UNDEFINED
)
12637 as_bad (_("invalid opcode"));
12641 if (xtensa_opcode_num_operands (isa
, opcode
) > insn
->ntok
)
12643 as_bad (_("too few operands"));
12647 if (xtensa_opcode_num_operands (isa
, opcode
) < insn
->ntok
)
12649 as_bad (_("too many operands"));
12653 /* Check registers. */
12654 for (j
= 0; j
< insn
->ntok
; j
++)
12656 if (xtensa_operand_is_register (isa
, insn
->opcode
, j
) != 1)
12659 t2_regfile
= xtensa_operand_regfile (isa
, insn
->opcode
, j
);
12660 t2_base_reg
= insn
->tok
[j
].X_add_number
;
12662 = t2_base_reg
+ xtensa_operand_num_regs (isa
, insn
->opcode
, j
);
12664 for (i
= 0; i
< insn
->ntok
; i
++)
12669 if (xtensa_operand_is_register (isa
, insn
->opcode
, i
) != 1)
12672 t1_regfile
= xtensa_operand_regfile (isa
, insn
->opcode
, i
);
12674 if (t1_regfile
!= t2_regfile
)
12677 t1_inout
= xtensa_operand_inout (isa
, insn
->opcode
, i
);
12678 t2_inout
= xtensa_operand_inout (isa
, insn
->opcode
, j
);
12680 t1_base_reg
= insn
->tok
[i
].X_add_number
;
12681 t1_last_reg
= (t1_base_reg
12682 + xtensa_operand_num_regs (isa
, insn
->opcode
, i
));
12684 for (t1_reg
= t1_base_reg
; t1_reg
< t1_last_reg
; t1_reg
++)
12686 for (t2_reg
= t2_base_reg
; t2_reg
< t2_last_reg
; t2_reg
++)
12688 if (t1_reg
!= t2_reg
)
12691 if (t1_inout
!= 'i' && t2_inout
!= 'i')
12693 as_bad (_("multiple writes to the same register"));
12704 /* Load an instruction from its encoded form. */
12707 tinsn_from_chars (TInsn
*tinsn
, char *f
, int slot
)
12711 xg_init_vinsn (&vinsn
);
12712 vinsn_from_chars (&vinsn
, f
);
12714 *tinsn
= vinsn
.slots
[slot
];
12715 xg_free_vinsn (&vinsn
);
12720 tinsn_from_insnbuf (TInsn
*tinsn
,
12721 xtensa_insnbuf slotbuf
,
12726 xtensa_isa isa
= xtensa_default_isa
;
12728 /* Find the immed. */
12729 tinsn_init (tinsn
);
12730 tinsn
->insn_type
= ITYPE_INSN
;
12731 tinsn
->is_specific_opcode
= FALSE
; /* must not be specific */
12732 tinsn
->opcode
= xtensa_opcode_decode (isa
, fmt
, slot
, slotbuf
);
12733 tinsn
->ntok
= xtensa_opcode_num_operands (isa
, tinsn
->opcode
);
12734 for (i
= 0; i
< tinsn
->ntok
; i
++)
12736 set_expr_const (&tinsn
->tok
[i
],
12737 xtensa_insnbuf_get_operand (slotbuf
, fmt
, slot
,
12738 tinsn
->opcode
, i
));
12743 /* Read the value of the relaxable immed from the fr_symbol and fr_offset. */
12746 tinsn_immed_from_frag (TInsn
*tinsn
, fragS
*fragP
, int slot
)
12748 xtensa_opcode opcode
= tinsn
->opcode
;
12751 if (fragP
->tc_frag_data
.slot_symbols
[slot
])
12753 opnum
= get_relaxable_immed (opcode
);
12754 gas_assert (opnum
>= 0);
12755 set_expr_symbol_offset (&tinsn
->tok
[opnum
],
12756 fragP
->tc_frag_data
.slot_symbols
[slot
],
12757 fragP
->tc_frag_data
.slot_offsets
[slot
]);
12759 tinsn
->extra_arg
= fragP
->tc_frag_data
.free_reg
[slot
];
12764 get_num_stack_text_bytes (IStack
*istack
)
12767 int text_bytes
= 0;
12769 for (i
= 0; i
< istack
->ninsn
; i
++)
12771 TInsn
*tinsn
= &istack
->insn
[i
];
12772 if (tinsn
->insn_type
== ITYPE_INSN
)
12773 text_bytes
+= xg_get_single_size (tinsn
->opcode
);
12780 get_num_stack_literal_bytes (IStack
*istack
)
12785 for (i
= 0; i
< istack
->ninsn
; i
++)
12787 TInsn
*tinsn
= &istack
->insn
[i
];
12788 if (tinsn
->insn_type
== ITYPE_LITERAL
&& tinsn
->ntok
== 1)
12795 /* vliw_insn functions. */
12798 xg_init_vinsn (vliw_insn
*v
)
12801 xtensa_isa isa
= xtensa_default_isa
;
12803 xg_clear_vinsn (v
);
12805 v
->insnbuf
= xtensa_insnbuf_alloc (isa
);
12806 if (v
->insnbuf
== NULL
)
12807 as_fatal (_("out of memory"));
12809 for (i
= 0; i
< config_max_slots
; i
++)
12811 v
->slotbuf
[i
] = xtensa_insnbuf_alloc (isa
);
12812 if (v
->slotbuf
[i
] == NULL
)
12813 as_fatal (_("out of memory"));
12819 xg_clear_vinsn (vliw_insn
*v
)
12823 memset (v
, 0, offsetof (vliw_insn
, slots
)
12824 + sizeof(TInsn
) * config_max_slots
);
12826 v
->format
= XTENSA_UNDEFINED
;
12828 v
->inside_bundle
= FALSE
;
12830 if (xt_saved_debug_type
!= DEBUG_NONE
)
12831 debug_type
= xt_saved_debug_type
;
12833 for (i
= 0; i
< config_max_slots
; i
++)
12834 v
->slots
[i
].opcode
= XTENSA_UNDEFINED
;
12839 xg_copy_vinsn (vliw_insn
*dst
, vliw_insn
*src
)
12842 offsetof(vliw_insn
, slots
) + src
->num_slots
* sizeof(TInsn
));
12843 dst
->insnbuf
= src
->insnbuf
;
12844 memcpy (dst
->slotbuf
, src
->slotbuf
, src
->num_slots
* sizeof(xtensa_insnbuf
));
12849 vinsn_has_specific_opcodes (vliw_insn
*v
)
12853 for (i
= 0; i
< v
->num_slots
; i
++)
12855 if (v
->slots
[i
].is_specific_opcode
)
12863 xg_free_vinsn (vliw_insn
*v
)
12866 xtensa_insnbuf_free (xtensa_default_isa
, v
->insnbuf
);
12867 for (i
= 0; i
< config_max_slots
; i
++)
12868 xtensa_insnbuf_free (xtensa_default_isa
, v
->slotbuf
[i
]);
12872 /* Encode a vliw_insn into an insnbuf. Return TRUE if there are any symbolic
12873 operands. See also the assumptions listed for tinsn_to_slotbuf. */
12876 vinsn_to_insnbuf (vliw_insn
*vinsn
,
12879 bfd_boolean record_fixup
)
12881 xtensa_isa isa
= xtensa_default_isa
;
12882 xtensa_format fmt
= vinsn
->format
;
12883 xtensa_insnbuf insnbuf
= vinsn
->insnbuf
;
12885 bfd_boolean has_fixup
= FALSE
;
12887 xtensa_format_encode (isa
, fmt
, insnbuf
);
12889 for (slot
= 0; slot
< vinsn
->num_slots
; slot
++)
12891 TInsn
*tinsn
= &vinsn
->slots
[slot
];
12892 expressionS
*extra_arg
= &tinsn
->extra_arg
;
12893 bfd_boolean tinsn_has_fixup
=
12894 tinsn_to_slotbuf (vinsn
->format
, slot
, tinsn
,
12895 vinsn
->slotbuf
[slot
]);
12897 xtensa_format_set_slot (isa
, fmt
, slot
,
12898 insnbuf
, vinsn
->slotbuf
[slot
]);
12899 if (extra_arg
->X_op
!= O_illegal
&& extra_arg
->X_op
!= O_register
)
12901 if (vinsn
->num_slots
!= 1)
12902 as_bad (_("TLS relocation not allowed in FLIX bundle"));
12903 else if (record_fixup
)
12904 /* Instructions that generate TLS relocations should always be
12905 relaxed in the front-end. If "record_fixup" is set, then this
12906 function is being called during back-end relaxation, so flag
12907 the unexpected behavior as an error. */
12908 as_bad (_("unexpected TLS relocation"));
12910 fix_new (fragP
, frag_offset
- fragP
->fr_literal
,
12911 xtensa_format_length (isa
, fmt
),
12912 extra_arg
->X_add_symbol
, extra_arg
->X_add_number
,
12913 FALSE
, map_operator_to_reloc (extra_arg
->X_op
, FALSE
));
12915 if (tinsn_has_fixup
)
12918 xtensa_opcode opcode
= tinsn
->opcode
;
12919 int noperands
= xtensa_opcode_num_operands (isa
, opcode
);
12922 for (i
= 0; i
< noperands
; i
++)
12924 expressionS
* exp
= &tinsn
->tok
[i
];
12930 if (get_relaxable_immed (opcode
) == i
)
12932 /* Add a fix record for the instruction, except if this
12933 function is being called prior to relaxation, i.e.,
12934 if record_fixup is false, and the instruction might
12935 be relaxed later. */
12937 || tinsn
->is_specific_opcode
12938 || !xg_is_relaxable_insn (tinsn
, 0))
12940 xg_add_opcode_fix (tinsn
, i
, fmt
, slot
, exp
, fragP
,
12941 frag_offset
- fragP
->fr_literal
);
12945 if (exp
->X_op
!= O_symbol
)
12946 as_bad (_("invalid operand"));
12947 tinsn
->symbol
= exp
->X_add_symbol
;
12948 tinsn
->offset
= exp
->X_add_number
;
12952 as_bad (_("symbolic operand not allowed"));
12960 as_bad (_("expression too complex"));
12972 vinsn_from_chars (vliw_insn
*vinsn
, char *f
)
12974 static xtensa_insnbuf insnbuf
= NULL
;
12975 static xtensa_insnbuf slotbuf
= NULL
;
12978 xtensa_isa isa
= xtensa_default_isa
;
12982 insnbuf
= xtensa_insnbuf_alloc (isa
);
12983 slotbuf
= xtensa_insnbuf_alloc (isa
);
12986 xtensa_insnbuf_from_chars (isa
, insnbuf
, (unsigned char *) f
, 0);
12987 fmt
= xtensa_format_decode (isa
, insnbuf
);
12988 if (fmt
== XTENSA_UNDEFINED
)
12989 as_fatal (_("cannot decode instruction format"));
12990 vinsn
->format
= fmt
;
12991 vinsn
->num_slots
= xtensa_format_num_slots (isa
, fmt
);
12993 for (i
= 0; i
< vinsn
->num_slots
; i
++)
12995 TInsn
*tinsn
= &vinsn
->slots
[i
];
12996 xtensa_format_get_slot (isa
, fmt
, i
, insnbuf
, slotbuf
);
12997 tinsn_from_insnbuf (tinsn
, slotbuf
, fmt
, i
);
13002 /* Expression utilities. */
13004 /* Return TRUE if the expression is an integer constant. */
13007 expr_is_const (const expressionS
*s
)
13009 return (s
->X_op
== O_constant
);
13013 /* Get the expression constant.
13014 Calling this is illegal if expr_is_const () returns TRUE. */
13017 get_expr_const (const expressionS
*s
)
13019 gas_assert (expr_is_const (s
));
13020 return s
->X_add_number
;
13024 /* Set the expression to a constant value. */
13027 set_expr_const (expressionS
*s
, offsetT val
)
13029 s
->X_op
= O_constant
;
13030 s
->X_add_number
= val
;
13031 s
->X_add_symbol
= NULL
;
13032 s
->X_op_symbol
= NULL
;
13037 expr_is_register (const expressionS
*s
)
13039 return (s
->X_op
== O_register
);
13043 /* Get the expression constant.
13044 Calling this is illegal if expr_is_const () returns TRUE. */
13047 get_expr_register (const expressionS
*s
)
13049 gas_assert (expr_is_register (s
));
13050 return s
->X_add_number
;
13054 /* Set the expression to a symbol + constant offset. */
13057 set_expr_symbol_offset (expressionS
*s
, symbolS
*sym
, offsetT offset
)
13059 s
->X_op
= O_symbol
;
13060 s
->X_add_symbol
= sym
;
13061 s
->X_op_symbol
= NULL
; /* unused */
13062 s
->X_add_number
= offset
;
13066 /* Return TRUE if the two expressions are equal. */
13069 expr_is_equal (expressionS
*s1
, expressionS
*s2
)
13071 if (s1
->X_op
!= s2
->X_op
)
13073 if (s1
->X_add_symbol
!= s2
->X_add_symbol
)
13075 if (s1
->X_op_symbol
!= s2
->X_op_symbol
)
13077 if (s1
->X_add_number
!= s2
->X_add_number
)
13084 copy_expr (expressionS
*dst
, const expressionS
*src
)
13086 memcpy (dst
, src
, sizeof (expressionS
));
13090 /* Support for the "--rename-section" option. */
13092 struct rename_section_struct
13094 const char *old_name
;
13096 struct rename_section_struct
*next
;
13099 static struct rename_section_struct
*section_rename
;
13102 /* Parse the string "oldname=new_name(:oldname2=new_name2)*" and add
13103 entries to the section_rename list. Note: Specifying multiple
13104 renamings separated by colons is not documented and is retained only
13105 for backward compatibility. */
13108 build_section_rename (const char *arg
)
13110 struct rename_section_struct
*r
;
13111 char *this_arg
= NULL
;
13112 char *next_arg
= NULL
;
13114 for (this_arg
= xstrdup (arg
); this_arg
!= NULL
; this_arg
= next_arg
)
13116 char *old_name
, *new_name
;
13120 next_arg
= strchr (this_arg
, ':');
13128 old_name
= this_arg
;
13129 new_name
= strchr (this_arg
, '=');
13131 if (*old_name
== '\0')
13133 as_warn (_("ignoring extra '-rename-section' delimiter ':'"));
13136 if (!new_name
|| new_name
[1] == '\0')
13138 as_warn (_("ignoring invalid '-rename-section' specification: '%s'"),
13145 /* Check for invalid section renaming. */
13146 for (r
= section_rename
; r
!= NULL
; r
= r
->next
)
13148 if (strcmp (r
->old_name
, old_name
) == 0)
13149 as_bad (_("section %s renamed multiple times"), old_name
);
13150 if (strcmp (r
->new_name
, new_name
) == 0)
13151 as_bad (_("multiple sections remapped to output section %s"),
13156 r
= XNEW (struct rename_section_struct
);
13157 r
->old_name
= xstrdup (old_name
);
13158 r
->new_name
= xstrdup (new_name
);
13159 r
->next
= section_rename
;
13160 section_rename
= r
;
13166 xtensa_section_rename (const char *name
)
13168 struct rename_section_struct
*r
= section_rename
;
13170 for (r
= section_rename
; r
!= NULL
; r
= r
->next
)
13172 if (strcmp (r
->old_name
, name
) == 0)
13173 return r
->new_name
;
13176 return (char *) name
;