1 /* tc-xtensa.c -- Assemble Xtensa instructions.
2 Copyright (C) 2003-2015 Free Software Foundation, Inc.
4 This file is part of GAS, the GNU Assembler.
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
24 #include "safe-ctype.h"
25 #include "tc-xtensa.h"
27 #include "xtensa-relax.h"
28 #include "dwarf2dbg.h"
29 #include "xtensa-istack.h"
30 #include "struc-symbol.h"
31 #include "xtensa-config.h"
33 /* Provide default values for new configuration settings. */
39 #define uint32 unsigned int
42 #define int32 signed int
47 Naming conventions (used somewhat inconsistently):
48 The xtensa_ functions are exported
49 The xg_ functions are internal
51 We also have a couple of different extensibility mechanisms.
52 1) The idiom replacement:
53 This is used when a line is first parsed to
54 replace an instruction pattern with another instruction
55 It is currently limited to replacements of instructions
56 with constant operands.
57 2) The xtensa-relax.c mechanism that has stronger instruction
58 replacement patterns. When an instruction's immediate field
59 does not fit the next instruction sequence is attempted.
60 In addition, "narrow" opcodes are supported this way. */
63 /* Define characters with special meanings to GAS. */
64 const char comment_chars
[] = "#";
65 const char line_comment_chars
[] = "#";
66 const char line_separator_chars
[] = ";";
67 const char EXP_CHARS
[] = "eE";
68 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
71 /* Flags to indicate whether the hardware supports the density and
72 absolute literals options. */
74 bfd_boolean density_supported
= XCHAL_HAVE_DENSITY
;
75 bfd_boolean absolute_literals_supported
= XSHAL_USE_ABSOLUTE_LITERALS
;
77 static vliw_insn cur_vinsn
;
79 unsigned xtensa_num_pipe_stages
;
80 unsigned xtensa_fetch_width
= XCHAL_INST_FETCH_WIDTH
;
82 static enum debug_info_type xt_saved_debug_type
= DEBUG_NONE
;
84 /* Some functions are only valid in the front end. This variable
85 allows us to assert that we haven't crossed over into the
87 static bfd_boolean past_xtensa_end
= FALSE
;
89 /* Flags for properties of the last instruction in a segment. */
90 #define FLAG_IS_A0_WRITER 0x1
91 #define FLAG_IS_BAD_LOOPEND 0x2
94 /* We define a special segment names ".literal" to place literals
95 into. The .fini and .init sections are special because they
96 contain code that is moved together by the linker. We give them
97 their own special .fini.literal and .init.literal sections. */
99 #define LITERAL_SECTION_NAME xtensa_section_rename (".literal")
100 #define LIT4_SECTION_NAME xtensa_section_rename (".lit4")
101 #define INIT_SECTION_NAME xtensa_section_rename (".init")
102 #define FINI_SECTION_NAME xtensa_section_rename (".fini")
105 /* This type is used for the directive_stack to keep track of the
106 state of the literal collection pools. If lit_prefix is set, it is
107 used to determine the literal section names; otherwise, the literal
108 sections are determined based on the current text section. The
109 lit_seg and lit4_seg fields cache these literal sections, with the
110 current_text_seg field used a tag to indicate whether the cached
113 typedef struct lit_state_struct
116 segT current_text_seg
;
121 static lit_state default_lit_sections
;
124 /* We keep a list of literal segments. The seg_list type is the node
125 for this list. The literal_head pointer is the head of the list,
126 with the literal_head_h dummy node at the start. */
128 typedef struct seg_list_struct
130 struct seg_list_struct
*next
;
134 static seg_list literal_head_h
;
135 static seg_list
*literal_head
= &literal_head_h
;
138 /* Lists of symbols. We keep a list of symbols that label the current
139 instruction, so that we can adjust the symbols when inserting alignment
140 for various instructions. We also keep a list of all the symbols on
141 literals, so that we can fix up those symbols when the literals are
142 later moved into the text sections. */
144 typedef struct sym_list_struct
146 struct sym_list_struct
*next
;
150 static sym_list
*insn_labels
= NULL
;
151 static sym_list
*free_insn_labels
= NULL
;
152 static sym_list
*saved_insn_labels
= NULL
;
154 static sym_list
*literal_syms
;
157 /* Flags to determine whether to prefer const16 or l32r
158 if both options are available. */
159 int prefer_const16
= 0;
162 /* Global flag to indicate when we are emitting literals. */
163 int generating_literals
= 0;
165 /* The following PROPERTY table definitions are copied from
166 <elf/xtensa.h> and must be kept in sync with the code there. */
168 /* Flags in the property tables to specify whether blocks of memory
169 are literals, instructions, data, or unreachable. For
170 instructions, blocks that begin loop targets and branch targets are
171 designated. Blocks that do not allow density, instruction
172 reordering or transformation are also specified. Finally, for
173 branch targets, branch target alignment priority is included.
174 Alignment of the next block is specified in the current block
175 and the size of the current block does not include any fill required
176 to align to the next block. */
178 #define XTENSA_PROP_LITERAL 0x00000001
179 #define XTENSA_PROP_INSN 0x00000002
180 #define XTENSA_PROP_DATA 0x00000004
181 #define XTENSA_PROP_UNREACHABLE 0x00000008
182 /* Instruction only properties at beginning of code. */
183 #define XTENSA_PROP_INSN_LOOP_TARGET 0x00000010
184 #define XTENSA_PROP_INSN_BRANCH_TARGET 0x00000020
185 /* Instruction only properties about code. */
186 #define XTENSA_PROP_INSN_NO_DENSITY 0x00000040
187 #define XTENSA_PROP_INSN_NO_REORDER 0x00000080
188 /* Historically, NO_TRANSFORM was a property of instructions,
189 but it should apply to literals under certain circumstances. */
190 #define XTENSA_PROP_NO_TRANSFORM 0x00000100
192 /* Branch target alignment information. This transmits information
193 to the linker optimization about the priority of aligning a
194 particular block for branch target alignment: None, low priority,
195 high priority, or required. These only need to be checked in
196 instruction blocks marked as XTENSA_PROP_INSN_BRANCH_TARGET.
199 switch (GET_XTENSA_PROP_BT_ALIGN (flags))
200 case XTENSA_PROP_BT_ALIGN_NONE:
201 case XTENSA_PROP_BT_ALIGN_LOW:
202 case XTENSA_PROP_BT_ALIGN_HIGH:
203 case XTENSA_PROP_BT_ALIGN_REQUIRE:
205 #define XTENSA_PROP_BT_ALIGN_MASK 0x00000600
207 /* No branch target alignment. */
208 #define XTENSA_PROP_BT_ALIGN_NONE 0x0
209 /* Low priority branch target alignment. */
210 #define XTENSA_PROP_BT_ALIGN_LOW 0x1
211 /* High priority branch target alignment. */
212 #define XTENSA_PROP_BT_ALIGN_HIGH 0x2
213 /* Required branch target alignment. */
214 #define XTENSA_PROP_BT_ALIGN_REQUIRE 0x3
216 #define GET_XTENSA_PROP_BT_ALIGN(flag) \
217 (((unsigned) ((flag) & (XTENSA_PROP_BT_ALIGN_MASK))) >> 9)
218 #define SET_XTENSA_PROP_BT_ALIGN(flag, align) \
219 (((flag) & (~XTENSA_PROP_BT_ALIGN_MASK)) | \
220 (((align) << 9) & XTENSA_PROP_BT_ALIGN_MASK))
223 /* Alignment is specified in the block BEFORE the one that needs
224 alignment. Up to 5 bits. Use GET_XTENSA_PROP_ALIGNMENT(flags) to
225 get the required alignment specified as a power of 2. Use
226 SET_XTENSA_PROP_ALIGNMENT(flags, pow2) to set the required
227 alignment. Be careful of side effects since the SET will evaluate
228 flags twice. Also, note that the SIZE of a block in the property
229 table does not include the alignment size, so the alignment fill
230 must be calculated to determine if two blocks are contiguous.
231 TEXT_ALIGN is not currently implemented but is a placeholder for a
232 possible future implementation. */
234 #define XTENSA_PROP_ALIGN 0x00000800
236 #define XTENSA_PROP_ALIGNMENT_MASK 0x0001f000
238 #define GET_XTENSA_PROP_ALIGNMENT(flag) \
239 (((unsigned) ((flag) & (XTENSA_PROP_ALIGNMENT_MASK))) >> 12)
240 #define SET_XTENSA_PROP_ALIGNMENT(flag, align) \
241 (((flag) & (~XTENSA_PROP_ALIGNMENT_MASK)) | \
242 (((align) << 12) & XTENSA_PROP_ALIGNMENT_MASK))
244 #define XTENSA_PROP_INSN_ABSLIT 0x00020000
247 /* Structure for saving instruction and alignment per-fragment data
248 that will be written to the object file. This structure is
249 equivalent to the actual data that will be written out to the file
250 but is easier to use. We provide a conversion to file flags
251 in frag_flags_to_number. */
253 typedef struct frag_flags_struct frag_flags
;
255 struct frag_flags_struct
257 /* is_literal should only be used after xtensa_move_literals.
258 If you need to check if you are generating a literal fragment,
259 then use the generating_literals global. */
261 unsigned is_literal
: 1;
262 unsigned is_insn
: 1;
263 unsigned is_data
: 1;
264 unsigned is_unreachable
: 1;
266 /* is_specific_opcode implies no_transform. */
267 unsigned is_no_transform
: 1;
271 unsigned is_loop_target
: 1;
272 unsigned is_branch_target
: 1; /* Branch targets have a priority. */
273 unsigned bt_align_priority
: 2;
275 unsigned is_no_density
: 1;
276 /* no_longcalls flag does not need to be placed in the object file. */
278 unsigned is_no_reorder
: 1;
280 /* Uses absolute literal addressing for l32r. */
281 unsigned is_abslit
: 1;
283 unsigned is_align
: 1;
284 unsigned alignment
: 5;
288 /* Structure for saving information about a block of property data
289 for frags that have the same flags. */
290 struct xtensa_block_info_struct
296 struct xtensa_block_info_struct
*next
;
300 /* Structure for saving the current state before emitting literals. */
301 typedef struct emit_state_struct
306 int generating_literals
;
310 /* Opcode placement information */
312 typedef unsigned long long bitfield
;
313 #define bit_is_set(bit, bf) ((bf) & (0x01ll << (bit)))
314 #define set_bit(bit, bf) ((bf) |= (0x01ll << (bit)))
315 #define clear_bit(bit, bf) ((bf) &= ~(0x01ll << (bit)))
317 #define MAX_FORMATS 32
319 typedef struct op_placement_info_struct
322 /* A number describing how restrictive the issue is for this
323 opcode. For example, an opcode that fits lots of different
324 formats has a high freedom, as does an opcode that fits
325 only one format but many slots in that format. The most
326 restrictive is the opcode that fits only one slot in one
329 xtensa_format narrowest
;
333 /* formats is a bitfield with the Nth bit set
334 if the opcode fits in the Nth xtensa_format. */
337 /* slots[N]'s Mth bit is set if the op fits in the
338 Mth slot of the Nth xtensa_format. */
339 bitfield slots
[MAX_FORMATS
];
341 /* A count of the number of slots in a given format
342 an op can fit (i.e., the bitcount of the slot field above). */
343 char slots_in_format
[MAX_FORMATS
];
345 } op_placement_info
, *op_placement_info_table
;
347 op_placement_info_table op_placement_table
;
350 /* Extra expression types. */
352 #define O_pltrel O_md1 /* like O_symbol but use a PLT reloc */
353 #define O_hi16 O_md2 /* use high 16 bits of symbolic value */
354 #define O_lo16 O_md3 /* use low 16 bits of symbolic value */
355 #define O_pcrel O_md4 /* value is a PC-relative offset */
356 #define O_tlsfunc O_md5 /* TLS_FUNC/TLSDESC_FN relocation */
357 #define O_tlsarg O_md6 /* TLS_ARG/TLSDESC_ARG relocation */
358 #define O_tlscall O_md7 /* TLS_CALL relocation */
359 #define O_tpoff O_md8 /* TPOFF relocation */
360 #define O_dtpoff O_md9 /* DTPOFF relocation */
362 struct suffix_reloc_map
366 bfd_reloc_code_real_type reloc
;
367 unsigned char operator;
370 #define SUFFIX_MAP(str, reloc, op) { str, sizeof (str) - 1, reloc, op }
372 static struct suffix_reloc_map suffix_relocs
[] =
374 SUFFIX_MAP ("l", BFD_RELOC_LO16
, O_lo16
),
375 SUFFIX_MAP ("h", BFD_RELOC_HI16
, O_hi16
),
376 SUFFIX_MAP ("plt", BFD_RELOC_XTENSA_PLT
, O_pltrel
),
377 SUFFIX_MAP ("pcrel", BFD_RELOC_32_PCREL
, O_pcrel
),
378 SUFFIX_MAP ("tlsfunc", BFD_RELOC_XTENSA_TLS_FUNC
, O_tlsfunc
),
379 SUFFIX_MAP ("tlsarg", BFD_RELOC_XTENSA_TLS_ARG
, O_tlsarg
),
380 SUFFIX_MAP ("tlscall", BFD_RELOC_XTENSA_TLS_CALL
, O_tlscall
),
381 SUFFIX_MAP ("tpoff", BFD_RELOC_XTENSA_TLS_TPOFF
, O_tpoff
),
382 SUFFIX_MAP ("dtpoff", BFD_RELOC_XTENSA_TLS_DTPOFF
, O_dtpoff
),
383 { (char *) 0, 0, BFD_RELOC_UNUSED
, 0 }
397 directive_literal_prefix
,
399 directive_absolute_literals
,
400 directive_last_directive
406 bfd_boolean can_be_negated
;
409 const directive_infoS directive_info
[] =
412 { "literal", FALSE
},
414 { "transform", TRUE
},
415 { "freeregs", FALSE
},
416 { "longcalls", TRUE
},
417 { "literal_prefix", FALSE
},
418 { "schedule", TRUE
},
419 { "absolute-literals", TRUE
}
422 bfd_boolean directive_state
[] =
426 #if !XCHAL_HAVE_DENSITY
431 TRUE
, /* transform */
432 FALSE
, /* freeregs */
433 FALSE
, /* longcalls */
434 FALSE
, /* literal_prefix */
435 FALSE
, /* schedule */
436 #if XSHAL_USE_ABSOLUTE_LITERALS
437 TRUE
/* absolute_literals */
439 FALSE
/* absolute_literals */
443 /* A circular list of all potential and actual literal pool locations
447 struct litpool_frag
*next
;
448 struct litpool_frag
*prev
;
451 short priority
; /* 1, 2, or 3 -- 1 is highest */
452 short original_priority
;
455 /* Map a segment to its litpool_frag list. */
458 struct litpool_seg
*next
;
460 struct litpool_frag frag_list
;
461 int frag_count
; /* since last litpool location */
464 static struct litpool_seg litpool_seg_list
;
467 /* Directive functions. */
469 static void xtensa_begin_directive (int);
470 static void xtensa_end_directive (int);
471 static void xtensa_literal_prefix (void);
472 static void xtensa_literal_position (int);
473 static void xtensa_literal_pseudo (int);
474 static void xtensa_frequency_pseudo (int);
475 static void xtensa_elf_cons (int);
476 static void xtensa_leb128 (int);
478 /* Parsing and Idiom Translation. */
480 static bfd_reloc_code_real_type
xtensa_elf_suffix (char **, expressionS
*);
482 /* Various Other Internal Functions. */
484 extern bfd_boolean
xg_is_single_relaxable_insn (TInsn
*, TInsn
*, bfd_boolean
);
485 static bfd_boolean
xg_build_to_insn (TInsn
*, TInsn
*, BuildInstr
*);
486 static void xtensa_mark_literal_pool_location (void);
487 static addressT
get_expanded_loop_offset (xtensa_opcode
);
488 static fragS
*get_literal_pool_location (segT
);
489 static void set_literal_pool_location (segT
, fragS
*);
490 static void xtensa_set_frag_assembly_state (fragS
*);
491 static void finish_vinsn (vliw_insn
*);
492 static bfd_boolean
emit_single_op (TInsn
*);
493 static int total_frag_text_expansion (fragS
*);
494 static bfd_boolean use_trampolines
= TRUE
;
495 static void xtensa_check_frag_count (void);
496 static void xtensa_create_trampoline_frag (bfd_boolean
);
497 static void xtensa_maybe_create_trampoline_frag (void);
498 struct trampoline_frag
;
499 static int init_trampoline_frag (struct trampoline_frag
*);
500 static void xtensa_maybe_create_literal_pool_frag (bfd_boolean
, bfd_boolean
);
501 static bfd_boolean auto_litpools
= FALSE
;
502 static int auto_litpool_limit
= 10000;
504 /* Alignment Functions. */
506 static int get_text_align_power (unsigned);
507 static int get_text_align_max_fill_size (int, bfd_boolean
, bfd_boolean
);
508 static int branch_align_power (segT
);
510 /* Helpers for xtensa_relax_frag(). */
512 static long relax_frag_add_nop (fragS
*);
514 /* Accessors for additional per-subsegment information. */
516 static unsigned get_last_insn_flags (segT
, subsegT
);
517 static void set_last_insn_flags (segT
, subsegT
, unsigned, bfd_boolean
);
518 static float get_subseg_total_freq (segT
, subsegT
);
519 static float get_subseg_target_freq (segT
, subsegT
);
520 static void set_subseg_freq (segT
, subsegT
, float, float);
522 /* Segment list functions. */
524 static void xtensa_move_literals (void);
525 static void xtensa_reorder_segments (void);
526 static void xtensa_switch_to_literal_fragment (emit_state
*);
527 static void xtensa_switch_to_non_abs_literal_fragment (emit_state
*);
528 static void xtensa_switch_section_emit_state (emit_state
*, segT
, subsegT
);
529 static void xtensa_restore_emit_state (emit_state
*);
530 static segT
cache_literal_section (bfd_boolean
);
532 /* Import from elf32-xtensa.c in BFD library. */
534 extern asection
*xtensa_make_property_section (asection
*, const char *);
536 /* op_placement_info functions. */
538 static void init_op_placement_info_table (void);
539 extern bfd_boolean
opcode_fits_format_slot (xtensa_opcode
, xtensa_format
, int);
540 static int xg_get_single_size (xtensa_opcode
);
541 static xtensa_format
xg_get_single_format (xtensa_opcode
);
542 static int xg_get_single_slot (xtensa_opcode
);
544 /* TInsn and IStack functions. */
546 static bfd_boolean
tinsn_has_symbolic_operands (const TInsn
*);
547 static bfd_boolean
tinsn_has_invalid_symbolic_operands (const TInsn
*);
548 static bfd_boolean
tinsn_has_complex_operands (const TInsn
*);
549 static bfd_boolean
tinsn_to_insnbuf (TInsn
*, xtensa_insnbuf
);
550 static bfd_boolean
tinsn_check_arguments (const TInsn
*);
551 static void tinsn_from_chars (TInsn
*, char *, int);
552 static void tinsn_immed_from_frag (TInsn
*, fragS
*, int);
553 static int get_num_stack_text_bytes (IStack
*);
554 static int get_num_stack_literal_bytes (IStack
*);
555 static bfd_boolean
tinsn_to_slotbuf (xtensa_format
, int, TInsn
*, xtensa_insnbuf
);
557 /* vliw_insn functions. */
559 static void xg_init_vinsn (vliw_insn
*);
560 static void xg_copy_vinsn (vliw_insn
*, vliw_insn
*);
561 static void xg_clear_vinsn (vliw_insn
*);
562 static bfd_boolean
vinsn_has_specific_opcodes (vliw_insn
*);
563 static void xg_free_vinsn (vliw_insn
*);
564 static bfd_boolean vinsn_to_insnbuf
565 (vliw_insn
*, char *, fragS
*, bfd_boolean
);
566 static void vinsn_from_chars (vliw_insn
*, char *);
568 /* Expression Utilities. */
570 bfd_boolean
expr_is_const (const expressionS
*);
571 offsetT
get_expr_const (const expressionS
*);
572 void set_expr_const (expressionS
*, offsetT
);
573 bfd_boolean
expr_is_register (const expressionS
*);
574 offsetT
get_expr_register (const expressionS
*);
575 void set_expr_symbol_offset (expressionS
*, symbolS
*, offsetT
);
576 bfd_boolean
expr_is_equal (expressionS
*, expressionS
*);
577 static void copy_expr (expressionS
*, const expressionS
*);
579 /* Section renaming. */
581 static void build_section_rename (const char *);
584 /* ISA imported from bfd. */
585 extern xtensa_isa xtensa_default_isa
;
587 extern int target_big_endian
;
589 static xtensa_opcode xtensa_addi_opcode
;
590 static xtensa_opcode xtensa_addmi_opcode
;
591 static xtensa_opcode xtensa_call0_opcode
;
592 static xtensa_opcode xtensa_call4_opcode
;
593 static xtensa_opcode xtensa_call8_opcode
;
594 static xtensa_opcode xtensa_call12_opcode
;
595 static xtensa_opcode xtensa_callx0_opcode
;
596 static xtensa_opcode xtensa_callx4_opcode
;
597 static xtensa_opcode xtensa_callx8_opcode
;
598 static xtensa_opcode xtensa_callx12_opcode
;
599 static xtensa_opcode xtensa_const16_opcode
;
600 static xtensa_opcode xtensa_entry_opcode
;
601 static xtensa_opcode xtensa_extui_opcode
;
602 static xtensa_opcode xtensa_movi_opcode
;
603 static xtensa_opcode xtensa_movi_n_opcode
;
604 static xtensa_opcode xtensa_isync_opcode
;
605 static xtensa_opcode xtensa_j_opcode
;
606 static xtensa_opcode xtensa_jx_opcode
;
607 static xtensa_opcode xtensa_l32r_opcode
;
608 static xtensa_opcode xtensa_loop_opcode
;
609 static xtensa_opcode xtensa_loopnez_opcode
;
610 static xtensa_opcode xtensa_loopgtz_opcode
;
611 static xtensa_opcode xtensa_nop_opcode
;
612 static xtensa_opcode xtensa_nop_n_opcode
;
613 static xtensa_opcode xtensa_or_opcode
;
614 static xtensa_opcode xtensa_ret_opcode
;
615 static xtensa_opcode xtensa_ret_n_opcode
;
616 static xtensa_opcode xtensa_retw_opcode
;
617 static xtensa_opcode xtensa_retw_n_opcode
;
618 static xtensa_opcode xtensa_rsr_lcount_opcode
;
619 static xtensa_opcode xtensa_waiti_opcode
;
620 static int config_max_slots
= 0;
623 /* Command-line Options. */
625 bfd_boolean use_literal_section
= TRUE
;
626 enum flix_level produce_flix
= FLIX_ALL
;
627 static bfd_boolean align_targets
= TRUE
;
628 static bfd_boolean warn_unaligned_branch_targets
= FALSE
;
629 static bfd_boolean has_a0_b_retw
= FALSE
;
630 static bfd_boolean workaround_a0_b_retw
= FALSE
;
631 static bfd_boolean workaround_b_j_loop_end
= FALSE
;
632 static bfd_boolean workaround_short_loop
= FALSE
;
633 static bfd_boolean maybe_has_short_loop
= FALSE
;
634 static bfd_boolean workaround_close_loop_end
= FALSE
;
635 static bfd_boolean maybe_has_close_loop_end
= FALSE
;
636 static bfd_boolean enforce_three_byte_loop_align
= FALSE
;
638 /* When workaround_short_loops is TRUE, all loops with early exits must
639 have at least 3 instructions. workaround_all_short_loops is a modifier
640 to the workaround_short_loop flag. In addition to the
641 workaround_short_loop actions, all straightline loopgtz and loopnez
642 must have at least 3 instructions. */
644 static bfd_boolean workaround_all_short_loops
= FALSE
;
648 xtensa_setup_hw_workarounds (int earliest
, int latest
)
650 if (earliest
> latest
)
651 as_fatal (_("illegal range of target hardware versions"));
653 /* Enable all workarounds for pre-T1050.0 hardware. */
654 if (earliest
< 105000 || latest
< 105000)
656 workaround_a0_b_retw
|= TRUE
;
657 workaround_b_j_loop_end
|= TRUE
;
658 workaround_short_loop
|= TRUE
;
659 workaround_close_loop_end
|= TRUE
;
660 workaround_all_short_loops
|= TRUE
;
661 enforce_three_byte_loop_align
= TRUE
;
668 option_density
= OPTION_MD_BASE
,
672 option_no_generate_flix
,
679 option_no_link_relax
,
687 option_text_section_literals
,
688 option_no_text_section_literals
,
690 option_absolute_literals
,
691 option_no_absolute_literals
,
693 option_align_targets
,
694 option_no_align_targets
,
696 option_warn_unaligned_targets
,
701 option_workaround_a0_b_retw
,
702 option_no_workaround_a0_b_retw
,
704 option_workaround_b_j_loop_end
,
705 option_no_workaround_b_j_loop_end
,
707 option_workaround_short_loop
,
708 option_no_workaround_short_loop
,
710 option_workaround_all_short_loops
,
711 option_no_workaround_all_short_loops
,
713 option_workaround_close_loop_end
,
714 option_no_workaround_close_loop_end
,
716 option_no_workarounds
,
718 option_rename_section_name
,
721 option_prefer_const16
,
723 option_target_hardware
,
726 option_no_trampolines
,
728 option_auto_litpools
,
729 option_no_auto_litpools
,
730 option_auto_litpool_limit
,
733 const char *md_shortopts
= "";
735 struct option md_longopts
[] =
737 { "density", no_argument
, NULL
, option_density
},
738 { "no-density", no_argument
, NULL
, option_no_density
},
740 { "flix", no_argument
, NULL
, option_flix
},
741 { "no-generate-flix", no_argument
, NULL
, option_no_generate_flix
},
742 { "no-allow-flix", no_argument
, NULL
, option_no_flix
},
744 /* Both "relax" and "generics" are deprecated and treated as equivalent
745 to the "transform" option. */
746 { "relax", no_argument
, NULL
, option_relax
},
747 { "no-relax", no_argument
, NULL
, option_no_relax
},
748 { "generics", no_argument
, NULL
, option_generics
},
749 { "no-generics", no_argument
, NULL
, option_no_generics
},
751 { "transform", no_argument
, NULL
, option_transform
},
752 { "no-transform", no_argument
, NULL
, option_no_transform
},
753 { "text-section-literals", no_argument
, NULL
, option_text_section_literals
},
754 { "no-text-section-literals", no_argument
, NULL
,
755 option_no_text_section_literals
},
756 { "absolute-literals", no_argument
, NULL
, option_absolute_literals
},
757 { "no-absolute-literals", no_argument
, NULL
, option_no_absolute_literals
},
758 /* This option was changed from -align-target to -target-align
759 because it conflicted with the "-al" option. */
760 { "target-align", no_argument
, NULL
, option_align_targets
},
761 { "no-target-align", no_argument
, NULL
, option_no_align_targets
},
762 { "warn-unaligned-targets", no_argument
, NULL
,
763 option_warn_unaligned_targets
},
764 { "longcalls", no_argument
, NULL
, option_longcalls
},
765 { "no-longcalls", no_argument
, NULL
, option_no_longcalls
},
767 { "no-workaround-a0-b-retw", no_argument
, NULL
,
768 option_no_workaround_a0_b_retw
},
769 { "workaround-a0-b-retw", no_argument
, NULL
, option_workaround_a0_b_retw
},
771 { "no-workaround-b-j-loop-end", no_argument
, NULL
,
772 option_no_workaround_b_j_loop_end
},
773 { "workaround-b-j-loop-end", no_argument
, NULL
,
774 option_workaround_b_j_loop_end
},
776 { "no-workaround-short-loops", no_argument
, NULL
,
777 option_no_workaround_short_loop
},
778 { "workaround-short-loops", no_argument
, NULL
,
779 option_workaround_short_loop
},
781 { "no-workaround-all-short-loops", no_argument
, NULL
,
782 option_no_workaround_all_short_loops
},
783 { "workaround-all-short-loop", no_argument
, NULL
,
784 option_workaround_all_short_loops
},
786 { "prefer-l32r", no_argument
, NULL
, option_prefer_l32r
},
787 { "prefer-const16", no_argument
, NULL
, option_prefer_const16
},
789 { "no-workarounds", no_argument
, NULL
, option_no_workarounds
},
791 { "no-workaround-close-loop-end", no_argument
, NULL
,
792 option_no_workaround_close_loop_end
},
793 { "workaround-close-loop-end", no_argument
, NULL
,
794 option_workaround_close_loop_end
},
796 { "rename-section", required_argument
, NULL
, option_rename_section_name
},
798 { "link-relax", no_argument
, NULL
, option_link_relax
},
799 { "no-link-relax", no_argument
, NULL
, option_no_link_relax
},
801 { "target-hardware", required_argument
, NULL
, option_target_hardware
},
803 { "trampolines", no_argument
, NULL
, option_trampolines
},
804 { "no-trampolines", no_argument
, NULL
, option_no_trampolines
},
806 { "auto-litpools", no_argument
, NULL
, option_auto_litpools
},
807 { "no-auto-litpools", no_argument
, NULL
, option_no_auto_litpools
},
808 { "auto-litpool-limit", required_argument
, NULL
, option_auto_litpool_limit
},
810 { NULL
, no_argument
, NULL
, 0 }
813 size_t md_longopts_size
= sizeof md_longopts
;
817 md_parse_option (int c
, char *arg
)
822 as_warn (_("--density option is ignored"));
824 case option_no_density
:
825 as_warn (_("--no-density option is ignored"));
827 case option_link_relax
:
830 case option_no_link_relax
:
834 produce_flix
= FLIX_ALL
;
836 case option_no_generate_flix
:
837 produce_flix
= FLIX_NO_GENERATE
;
840 produce_flix
= FLIX_NONE
;
842 case option_generics
:
843 as_warn (_("--generics is deprecated; use --transform instead"));
844 return md_parse_option (option_transform
, arg
);
845 case option_no_generics
:
846 as_warn (_("--no-generics is deprecated; use --no-transform instead"));
847 return md_parse_option (option_no_transform
, arg
);
849 as_warn (_("--relax is deprecated; use --transform instead"));
850 return md_parse_option (option_transform
, arg
);
851 case option_no_relax
:
852 as_warn (_("--no-relax is deprecated; use --no-transform instead"));
853 return md_parse_option (option_no_transform
, arg
);
854 case option_longcalls
:
855 directive_state
[directive_longcalls
] = TRUE
;
857 case option_no_longcalls
:
858 directive_state
[directive_longcalls
] = FALSE
;
860 case option_text_section_literals
:
861 use_literal_section
= FALSE
;
863 case option_no_text_section_literals
:
864 use_literal_section
= TRUE
;
866 case option_absolute_literals
:
867 if (!absolute_literals_supported
)
869 as_fatal (_("--absolute-literals option not supported in this Xtensa configuration"));
872 directive_state
[directive_absolute_literals
] = TRUE
;
874 case option_no_absolute_literals
:
875 directive_state
[directive_absolute_literals
] = FALSE
;
878 case option_workaround_a0_b_retw
:
879 workaround_a0_b_retw
= TRUE
;
881 case option_no_workaround_a0_b_retw
:
882 workaround_a0_b_retw
= FALSE
;
884 case option_workaround_b_j_loop_end
:
885 workaround_b_j_loop_end
= TRUE
;
887 case option_no_workaround_b_j_loop_end
:
888 workaround_b_j_loop_end
= FALSE
;
891 case option_workaround_short_loop
:
892 workaround_short_loop
= TRUE
;
894 case option_no_workaround_short_loop
:
895 workaround_short_loop
= FALSE
;
898 case option_workaround_all_short_loops
:
899 workaround_all_short_loops
= TRUE
;
901 case option_no_workaround_all_short_loops
:
902 workaround_all_short_loops
= FALSE
;
905 case option_workaround_close_loop_end
:
906 workaround_close_loop_end
= TRUE
;
908 case option_no_workaround_close_loop_end
:
909 workaround_close_loop_end
= FALSE
;
912 case option_no_workarounds
:
913 workaround_a0_b_retw
= FALSE
;
914 workaround_b_j_loop_end
= FALSE
;
915 workaround_short_loop
= FALSE
;
916 workaround_all_short_loops
= FALSE
;
917 workaround_close_loop_end
= FALSE
;
920 case option_align_targets
:
921 align_targets
= TRUE
;
923 case option_no_align_targets
:
924 align_targets
= FALSE
;
927 case option_warn_unaligned_targets
:
928 warn_unaligned_branch_targets
= TRUE
;
931 case option_rename_section_name
:
932 build_section_rename (arg
);
936 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
937 should be emitted or not. FIXME: Not implemented. */
940 case option_prefer_l32r
:
942 as_fatal (_("prefer-l32r conflicts with prefer-const16"));
946 case option_prefer_const16
:
948 as_fatal (_("prefer-const16 conflicts with prefer-l32r"));
952 case option_target_hardware
:
954 int earliest
, latest
= 0;
955 if (*arg
== 0 || *arg
== '-')
956 as_fatal (_("invalid target hardware version"));
958 earliest
= strtol (arg
, &arg
, 0);
962 else if (*arg
== '-')
965 as_fatal (_("invalid target hardware version"));
966 latest
= strtol (arg
, &arg
, 0);
969 as_fatal (_("invalid target hardware version"));
971 xtensa_setup_hw_workarounds (earliest
, latest
);
975 case option_transform
:
976 /* This option has no affect other than to use the defaults,
977 which are already set. */
980 case option_no_transform
:
981 /* This option turns off all transformations of any kind.
982 However, because we want to preserve the state of other
983 directives, we only change its own field. Thus, before
984 you perform any transformation, always check if transform
985 is available. If you use the functions we provide for this
986 purpose, you will be ok. */
987 directive_state
[directive_transform
] = FALSE
;
990 case option_trampolines
:
991 use_trampolines
= TRUE
;
994 case option_no_trampolines
:
995 use_trampolines
= FALSE
;
998 case option_auto_litpools
:
999 auto_litpools
= TRUE
;
1000 use_literal_section
= FALSE
;
1003 case option_no_auto_litpools
:
1004 auto_litpools
= FALSE
;
1005 auto_litpool_limit
= -1;
1008 case option_auto_litpool_limit
:
1011 if (auto_litpool_limit
< 0)
1012 as_fatal (_("no-auto-litpools is incompatible with auto-litpool-limit"));
1013 if (*arg
== 0 || *arg
== '-')
1014 as_fatal (_("invalid auto-litpool-limit argument"));
1015 value
= strtol (arg
, &arg
, 10);
1017 as_fatal (_("invalid auto-litpool-limit argument"));
1018 if (value
< 100 || value
> 10000)
1019 as_fatal (_("invalid auto-litpool-limit argument (range is 100-10000)"));
1020 auto_litpool_limit
= value
;
1021 auto_litpools
= TRUE
;
1022 use_literal_section
= FALSE
;
1033 md_show_usage (FILE *stream
)
1037 --[no-]text-section-literals\n\
1038 [Do not] put literals in the text section\n\
1039 --[no-]absolute-literals\n\
1040 [Do not] default to use non-PC-relative literals\n\
1041 --[no-]target-align [Do not] try to align branch targets\n\
1042 --[no-]longcalls [Do not] emit 32-bit call sequences\n\
1043 --[no-]transform [Do not] transform instructions\n\
1044 --flix both allow hand-written and generate flix bundles\n\
1045 --no-generate-flix allow hand-written but do not generate\n\
1047 --no-allow-flix neither allow hand-written nor generate\n\
1049 --rename-section old=new Rename section 'old' to 'new'\n\
1050 --[no-]trampolines [Do not] generate trampolines (jumps to jumps)\n\
1051 when jumps do not reach their targets\n\
1052 --[no-]auto-litpools [Do not] automatically create literal pools\n\
1053 --auto-litpool-limit=<value>\n\
1054 (range 100-10000) Maximum number of blocks of\n\
1055 instructions to emit between literal pool\n\
1056 locations; implies --auto-litpools flag\n", stream
);
1060 /* Functions related to the list of current label symbols. */
1063 xtensa_add_insn_label (symbolS
*sym
)
1067 if (!free_insn_labels
)
1068 l
= (sym_list
*) xmalloc (sizeof (sym_list
));
1071 l
= free_insn_labels
;
1072 free_insn_labels
= l
->next
;
1076 l
->next
= insn_labels
;
1082 xtensa_clear_insn_labels (void)
1086 for (pl
= &free_insn_labels
; *pl
!= NULL
; pl
= &(*pl
)->next
)
1094 xtensa_move_labels (fragS
*new_frag
, valueT new_offset
)
1098 for (lit
= insn_labels
; lit
; lit
= lit
->next
)
1100 symbolS
*lit_sym
= lit
->sym
;
1101 S_SET_VALUE (lit_sym
, new_offset
);
1102 symbol_set_frag (lit_sym
, new_frag
);
1107 /* Directive data and functions. */
1109 typedef struct state_stackS_struct
1111 directiveE directive
;
1112 bfd_boolean negated
;
1113 bfd_boolean old_state
;
1117 struct state_stackS_struct
*prev
;
1120 state_stackS
*directive_state_stack
;
1122 const pseudo_typeS md_pseudo_table
[] =
1124 { "align", s_align_bytes
, 0 }, /* Defaulting is invalid (0). */
1125 { "literal_position", xtensa_literal_position
, 0 },
1126 { "frame", s_ignore
, 0 }, /* Formerly used for STABS debugging. */
1127 { "long", xtensa_elf_cons
, 4 },
1128 { "word", xtensa_elf_cons
, 4 },
1129 { "4byte", xtensa_elf_cons
, 4 },
1130 { "short", xtensa_elf_cons
, 2 },
1131 { "2byte", xtensa_elf_cons
, 2 },
1132 { "sleb128", xtensa_leb128
, 1},
1133 { "uleb128", xtensa_leb128
, 0},
1134 { "begin", xtensa_begin_directive
, 0 },
1135 { "end", xtensa_end_directive
, 0 },
1136 { "literal", xtensa_literal_pseudo
, 0 },
1137 { "frequency", xtensa_frequency_pseudo
, 0 },
1143 use_transform (void)
1145 /* After md_end, you should be checking frag by frag, rather
1146 than state directives. */
1147 gas_assert (!past_xtensa_end
);
1148 return directive_state
[directive_transform
];
1153 do_align_targets (void)
1155 /* Do not use this function after md_end; just look at align_targets
1156 instead. There is no target-align directive, so alignment is either
1157 enabled for all frags or not done at all. */
1158 gas_assert (!past_xtensa_end
);
1159 return align_targets
&& use_transform ();
1164 directive_push (directiveE directive
, bfd_boolean negated
, const void *datum
)
1168 state_stackS
*stack
= (state_stackS
*) xmalloc (sizeof (state_stackS
));
1170 as_where (&file
, &line
);
1172 stack
->directive
= directive
;
1173 stack
->negated
= negated
;
1174 stack
->old_state
= directive_state
[directive
];
1177 stack
->datum
= datum
;
1178 stack
->prev
= directive_state_stack
;
1179 directive_state_stack
= stack
;
1181 directive_state
[directive
] = !negated
;
1186 directive_pop (directiveE
*directive
,
1187 bfd_boolean
*negated
,
1192 state_stackS
*top
= directive_state_stack
;
1194 if (!directive_state_stack
)
1196 as_bad (_("unmatched end directive"));
1197 *directive
= directive_none
;
1201 directive_state
[directive_state_stack
->directive
] = top
->old_state
;
1202 *directive
= top
->directive
;
1203 *negated
= top
->negated
;
1206 *datum
= top
->datum
;
1207 directive_state_stack
= top
->prev
;
1213 directive_balance (void)
1215 while (directive_state_stack
)
1217 directiveE directive
;
1218 bfd_boolean negated
;
1223 directive_pop (&directive
, &negated
, &file
, &line
, &datum
);
1224 as_warn_where ((char *) file
, line
,
1225 _(".begin directive with no matching .end directive"));
1231 inside_directive (directiveE dir
)
1233 state_stackS
*top
= directive_state_stack
;
1235 while (top
&& top
->directive
!= dir
)
1238 return (top
!= NULL
);
1243 get_directive (directiveE
*directive
, bfd_boolean
*negated
)
1247 char *directive_string
;
1249 if (strncmp (input_line_pointer
, "no-", 3) != 0)
1254 input_line_pointer
+= 3;
1257 len
= strspn (input_line_pointer
,
1258 "abcdefghijklmnopqrstuvwxyz_-/0123456789.");
1260 /* This code is a hack to make .begin [no-][generics|relax] exactly
1261 equivalent to .begin [no-]transform. We should remove it when
1262 we stop accepting those options. */
1264 if (strncmp (input_line_pointer
, "generics", strlen ("generics")) == 0)
1266 as_warn (_("[no-]generics is deprecated; use [no-]transform instead"));
1267 directive_string
= "transform";
1269 else if (strncmp (input_line_pointer
, "relax", strlen ("relax")) == 0)
1271 as_warn (_("[no-]relax is deprecated; use [no-]transform instead"));
1272 directive_string
= "transform";
1275 directive_string
= input_line_pointer
;
1277 for (i
= 0; i
< sizeof (directive_info
) / sizeof (*directive_info
); ++i
)
1279 if (strncmp (directive_string
, directive_info
[i
].name
, len
) == 0)
1281 input_line_pointer
+= len
;
1282 *directive
= (directiveE
) i
;
1283 if (*negated
&& !directive_info
[i
].can_be_negated
)
1284 as_bad (_("directive %s cannot be negated"),
1285 directive_info
[i
].name
);
1290 as_bad (_("unknown directive"));
1291 *directive
= (directiveE
) XTENSA_UNDEFINED
;
1296 xtensa_begin_directive (int ignore ATTRIBUTE_UNUSED
)
1298 directiveE directive
;
1299 bfd_boolean negated
;
1303 get_directive (&directive
, &negated
);
1304 if (directive
== (directiveE
) XTENSA_UNDEFINED
)
1306 discard_rest_of_line ();
1310 if (cur_vinsn
.inside_bundle
)
1311 as_bad (_("directives are not valid inside bundles"));
1315 case directive_literal
:
1316 if (!inside_directive (directive_literal
))
1318 /* Previous labels go with whatever follows this directive, not with
1319 the literal, so save them now. */
1320 saved_insn_labels
= insn_labels
;
1323 as_warn (_(".begin literal is deprecated; use .literal instead"));
1324 state
= (emit_state
*) xmalloc (sizeof (emit_state
));
1325 xtensa_switch_to_literal_fragment (state
);
1326 directive_push (directive_literal
, negated
, state
);
1329 case directive_literal_prefix
:
1330 /* Have to flush pending output because a movi relaxed to an l32r
1331 might produce a literal. */
1332 md_flush_pending_output ();
1333 /* Check to see if the current fragment is a literal
1334 fragment. If it is, then this operation is not allowed. */
1335 if (generating_literals
)
1337 as_bad (_("cannot set literal_prefix inside literal fragment"));
1341 /* Allocate the literal state for this section and push
1342 onto the directive stack. */
1343 ls
= xmalloc (sizeof (lit_state
));
1346 *ls
= default_lit_sections
;
1347 directive_push (directive_literal_prefix
, negated
, ls
);
1349 /* Process the new prefix. */
1350 xtensa_literal_prefix ();
1353 case directive_freeregs
:
1354 /* This information is currently unused, but we'll accept the statement
1355 and just discard the rest of the line. This won't check the syntax,
1356 but it will accept every correct freeregs directive. */
1357 input_line_pointer
+= strcspn (input_line_pointer
, "\n");
1358 directive_push (directive_freeregs
, negated
, 0);
1361 case directive_schedule
:
1362 md_flush_pending_output ();
1363 frag_var (rs_fill
, 0, 0, frag_now
->fr_subtype
,
1364 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
1365 directive_push (directive_schedule
, negated
, 0);
1366 xtensa_set_frag_assembly_state (frag_now
);
1369 case directive_density
:
1370 as_warn (_(".begin [no-]density is ignored"));
1373 case directive_absolute_literals
:
1374 md_flush_pending_output ();
1375 if (!absolute_literals_supported
&& !negated
)
1377 as_warn (_("Xtensa absolute literals option not supported; ignored"));
1380 xtensa_set_frag_assembly_state (frag_now
);
1381 directive_push (directive
, negated
, 0);
1385 md_flush_pending_output ();
1386 xtensa_set_frag_assembly_state (frag_now
);
1387 directive_push (directive
, negated
, 0);
1391 demand_empty_rest_of_line ();
1396 xtensa_end_directive (int ignore ATTRIBUTE_UNUSED
)
1398 directiveE begin_directive
, end_directive
;
1399 bfd_boolean begin_negated
, end_negated
;
1403 emit_state
**state_ptr
;
1406 if (cur_vinsn
.inside_bundle
)
1407 as_bad (_("directives are not valid inside bundles"));
1409 get_directive (&end_directive
, &end_negated
);
1411 md_flush_pending_output ();
1413 switch ((int) end_directive
)
1415 case XTENSA_UNDEFINED
:
1416 discard_rest_of_line ();
1419 case (int) directive_density
:
1420 as_warn (_(".end [no-]density is ignored"));
1421 demand_empty_rest_of_line ();
1424 case (int) directive_absolute_literals
:
1425 if (!absolute_literals_supported
&& !end_negated
)
1427 as_warn (_("Xtensa absolute literals option not supported; ignored"));
1428 demand_empty_rest_of_line ();
1437 state_ptr
= &state
; /* use state_ptr to avoid type-punning warning */
1438 directive_pop (&begin_directive
, &begin_negated
, &file
, &line
,
1439 (const void **) state_ptr
);
1441 if (begin_directive
!= directive_none
)
1443 if (begin_directive
!= end_directive
|| begin_negated
!= end_negated
)
1445 as_bad (_("does not match begin %s%s at %s:%d"),
1446 begin_negated
? "no-" : "",
1447 directive_info
[begin_directive
].name
, file
, line
);
1451 switch (end_directive
)
1453 case directive_literal
:
1454 frag_var (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
1455 xtensa_restore_emit_state (state
);
1456 xtensa_set_frag_assembly_state (frag_now
);
1458 if (!inside_directive (directive_literal
))
1460 /* Restore the list of current labels. */
1461 xtensa_clear_insn_labels ();
1462 insn_labels
= saved_insn_labels
;
1466 case directive_literal_prefix
:
1467 /* Restore the default collection sections from saved state. */
1468 s
= (lit_state
*) state
;
1470 default_lit_sections
= *s
;
1472 /* Free the state storage. */
1473 free (s
->lit_prefix
);
1477 case directive_schedule
:
1478 case directive_freeregs
:
1482 xtensa_set_frag_assembly_state (frag_now
);
1488 demand_empty_rest_of_line ();
1492 /* Place an aligned literal fragment at the current location. */
1495 xtensa_literal_position (int ignore ATTRIBUTE_UNUSED
)
1497 md_flush_pending_output ();
1499 if (inside_directive (directive_literal
))
1500 as_warn (_(".literal_position inside literal directive; ignoring"));
1501 xtensa_mark_literal_pool_location ();
1503 demand_empty_rest_of_line ();
1504 xtensa_clear_insn_labels ();
1508 /* Support .literal label, expr, ... */
1511 xtensa_literal_pseudo (int ignored ATTRIBUTE_UNUSED
)
1514 char *p
, *base_name
;
1518 if (inside_directive (directive_literal
))
1520 as_bad (_(".literal not allowed inside .begin literal region"));
1521 ignore_rest_of_line ();
1525 md_flush_pending_output ();
1527 /* Previous labels go with whatever follows this directive, not with
1528 the literal, so save them now. */
1529 saved_insn_labels
= insn_labels
;
1532 /* If we are using text-section literals, then this is the right value... */
1535 base_name
= input_line_pointer
;
1537 xtensa_switch_to_literal_fragment (&state
);
1539 /* ...but if we aren't using text-section-literals, then we
1540 need to put them in the section we just switched to. */
1541 if (use_literal_section
|| directive_state
[directive_absolute_literals
])
1544 /* FIXME, despite the previous comments, dest_seg is unused... */
1547 /* All literals are aligned to four-byte boundaries. */
1548 frag_align (2, 0, 0);
1549 record_alignment (now_seg
, 2);
1551 c
= get_symbol_name (&base_name
);
1552 /* Just after name is now '\0'. */
1553 p
= input_line_pointer
;
1555 SKIP_WHITESPACE_AFTER_NAME ();
1557 if (*input_line_pointer
!= ',' && *input_line_pointer
!= ':')
1559 as_bad (_("expected comma or colon after symbol name; "
1560 "rest of line ignored"));
1561 ignore_rest_of_line ();
1562 xtensa_restore_emit_state (&state
);
1570 input_line_pointer
++; /* skip ',' or ':' */
1572 xtensa_elf_cons (4);
1574 xtensa_restore_emit_state (&state
);
1576 /* Restore the list of current labels. */
1577 xtensa_clear_insn_labels ();
1578 insn_labels
= saved_insn_labels
;
1583 xtensa_literal_prefix (void)
1588 /* Parse the new prefix from the input_line_pointer. */
1590 len
= strspn (input_line_pointer
,
1591 "ABCDEFGHIJKLMNOPQRSTUVWXYZ"
1592 "abcdefghijklmnopqrstuvwxyz_/0123456789.$");
1594 /* Get a null-terminated copy of the name. */
1595 name
= xmalloc (len
+ 1);
1597 strncpy (name
, input_line_pointer
, len
);
1600 /* Skip the name in the input line. */
1601 input_line_pointer
+= len
;
1603 default_lit_sections
.lit_prefix
= name
;
1605 /* Clear cached literal sections, since the prefix has changed. */
1606 default_lit_sections
.lit_seg
= NULL
;
1607 default_lit_sections
.lit4_seg
= NULL
;
1611 /* Support ".frequency branch_target_frequency fall_through_frequency". */
1614 xtensa_frequency_pseudo (int ignored ATTRIBUTE_UNUSED
)
1616 float fall_through_f
, target_f
;
1618 fall_through_f
= (float) strtod (input_line_pointer
, &input_line_pointer
);
1619 if (fall_through_f
< 0)
1621 as_bad (_("fall through frequency must be greater than 0"));
1622 ignore_rest_of_line ();
1626 target_f
= (float) strtod (input_line_pointer
, &input_line_pointer
);
1629 as_bad (_("branch target frequency must be greater than 0"));
1630 ignore_rest_of_line ();
1634 set_subseg_freq (now_seg
, now_subseg
, target_f
+ fall_through_f
, target_f
);
1636 demand_empty_rest_of_line ();
1640 /* Like normal .long/.short/.word, except support @plt, etc.
1641 Clobbers input_line_pointer, checks end-of-line. */
1644 xtensa_elf_cons (int nbytes
)
1647 bfd_reloc_code_real_type reloc
;
1649 md_flush_pending_output ();
1651 if (cur_vinsn
.inside_bundle
)
1652 as_bad (_("directives are not valid inside bundles"));
1654 if (is_it_end_of_statement ())
1656 demand_empty_rest_of_line ();
1663 if (exp
.X_op
== O_symbol
1664 && *input_line_pointer
== '@'
1665 && ((reloc
= xtensa_elf_suffix (&input_line_pointer
, &exp
))
1668 reloc_howto_type
*reloc_howto
=
1669 bfd_reloc_type_lookup (stdoutput
, reloc
);
1671 if (reloc
== BFD_RELOC_UNUSED
|| !reloc_howto
)
1672 as_bad (_("unsupported relocation"));
1673 else if ((reloc
>= BFD_RELOC_XTENSA_SLOT0_OP
1674 && reloc
<= BFD_RELOC_XTENSA_SLOT14_OP
)
1675 || (reloc
>= BFD_RELOC_XTENSA_SLOT0_ALT
1676 && reloc
<= BFD_RELOC_XTENSA_SLOT14_ALT
))
1677 as_bad (_("opcode-specific %s relocation used outside "
1678 "an instruction"), reloc_howto
->name
);
1679 else if (nbytes
!= (int) bfd_get_reloc_size (reloc_howto
))
1680 as_bad (_("%s relocations do not fit in %d bytes"),
1681 reloc_howto
->name
, nbytes
);
1682 else if (reloc
== BFD_RELOC_XTENSA_TLS_FUNC
1683 || reloc
== BFD_RELOC_XTENSA_TLS_ARG
1684 || reloc
== BFD_RELOC_XTENSA_TLS_CALL
)
1685 as_bad (_("invalid use of %s relocation"), reloc_howto
->name
);
1688 char *p
= frag_more ((int) nbytes
);
1689 xtensa_set_frag_assembly_state (frag_now
);
1690 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
,
1691 nbytes
, &exp
, reloc_howto
->pc_relative
, reloc
);
1696 xtensa_set_frag_assembly_state (frag_now
);
1697 emit_expr (&exp
, (unsigned int) nbytes
);
1700 while (*input_line_pointer
++ == ',');
1702 input_line_pointer
--; /* Put terminator back into stream. */
1703 demand_empty_rest_of_line ();
1706 static bfd_boolean is_leb128_expr
;
1709 xtensa_leb128 (int sign
)
1711 is_leb128_expr
= TRUE
;
1713 is_leb128_expr
= FALSE
;
1717 /* Parsing and Idiom Translation. */
1719 /* Parse @plt, etc. and return the desired relocation. */
1720 static bfd_reloc_code_real_type
1721 xtensa_elf_suffix (char **str_p
, expressionS
*exp_p
)
1728 struct suffix_reloc_map
*ptr
;
1731 return BFD_RELOC_NONE
;
1733 for (ch
= *str
, str2
= ident
;
1734 (str2
< ident
+ sizeof (ident
) - 1
1735 && (ISALNUM (ch
) || ch
== '@'));
1738 *str2
++ = (ISLOWER (ch
)) ? ch
: TOLOWER (ch
);
1745 for (ptr
= &suffix_relocs
[0]; ptr
->length
> 0; ptr
++)
1746 if (ch
== ptr
->suffix
[0]
1747 && len
== ptr
->length
1748 && memcmp (ident
, ptr
->suffix
, ptr
->length
) == 0)
1750 /* Now check for "identifier@suffix+constant". */
1751 if (*str
== '-' || *str
== '+')
1753 char *orig_line
= input_line_pointer
;
1754 expressionS new_exp
;
1756 input_line_pointer
= str
;
1757 expression (&new_exp
);
1758 if (new_exp
.X_op
== O_constant
)
1760 exp_p
->X_add_number
+= new_exp
.X_add_number
;
1761 str
= input_line_pointer
;
1764 if (&input_line_pointer
!= str_p
)
1765 input_line_pointer
= orig_line
;
1772 return BFD_RELOC_UNUSED
;
1776 /* Find the matching operator type. */
1777 static unsigned char
1778 map_suffix_reloc_to_operator (bfd_reloc_code_real_type reloc
)
1780 struct suffix_reloc_map
*sfx
;
1781 unsigned char operator = (unsigned char) -1;
1783 for (sfx
= &suffix_relocs
[0]; sfx
->suffix
; sfx
++)
1785 if (sfx
->reloc
== reloc
)
1787 operator = sfx
->operator;
1791 gas_assert (operator != (unsigned char) -1);
1796 /* Find the matching reloc type. */
1797 static bfd_reloc_code_real_type
1798 map_operator_to_reloc (unsigned char operator, bfd_boolean is_literal
)
1800 struct suffix_reloc_map
*sfx
;
1801 bfd_reloc_code_real_type reloc
= BFD_RELOC_UNUSED
;
1803 for (sfx
= &suffix_relocs
[0]; sfx
->suffix
; sfx
++)
1805 if (sfx
->operator == operator)
1814 if (reloc
== BFD_RELOC_XTENSA_TLS_FUNC
)
1815 return BFD_RELOC_XTENSA_TLSDESC_FN
;
1816 else if (reloc
== BFD_RELOC_XTENSA_TLS_ARG
)
1817 return BFD_RELOC_XTENSA_TLSDESC_ARG
;
1820 if (reloc
== BFD_RELOC_UNUSED
)
1821 return BFD_RELOC_32
;
1828 expression_end (const char *name
)
1851 #define ERROR_REG_NUM ((unsigned) -1)
1854 tc_get_register (const char *prefix
)
1857 const char *next_expr
;
1858 const char *old_line_pointer
;
1861 old_line_pointer
= input_line_pointer
;
1863 if (*input_line_pointer
== '$')
1864 ++input_line_pointer
;
1866 /* Accept "sp" as a synonym for "a1". */
1867 if (input_line_pointer
[0] == 's' && input_line_pointer
[1] == 'p'
1868 && expression_end (input_line_pointer
+ 2))
1870 input_line_pointer
+= 2;
1871 return 1; /* AR[1] */
1874 while (*input_line_pointer
++ == *prefix
++)
1876 --input_line_pointer
;
1881 as_bad (_("bad register name: %s"), old_line_pointer
);
1882 return ERROR_REG_NUM
;
1885 if (!ISDIGIT ((unsigned char) *input_line_pointer
))
1887 as_bad (_("bad register number: %s"), input_line_pointer
);
1888 return ERROR_REG_NUM
;
1893 while (ISDIGIT ((int) *input_line_pointer
))
1894 reg
= reg
* 10 + *input_line_pointer
++ - '0';
1896 if (!(next_expr
= expression_end (input_line_pointer
)))
1898 as_bad (_("bad register name: %s"), old_line_pointer
);
1899 return ERROR_REG_NUM
;
1902 input_line_pointer
= (char *) next_expr
;
1909 expression_maybe_register (xtensa_opcode opc
, int opnd
, expressionS
*tok
)
1911 xtensa_isa isa
= xtensa_default_isa
;
1913 /* Check if this is an immediate operand. */
1914 if (xtensa_operand_is_register (isa
, opc
, opnd
) == 0)
1916 bfd_reloc_code_real_type reloc
;
1917 segT t
= expression (tok
);
1919 if (t
== absolute_section
1920 && xtensa_operand_is_PCrelative (isa
, opc
, opnd
) == 1)
1922 gas_assert (tok
->X_op
== O_constant
);
1923 tok
->X_op
= O_symbol
;
1924 tok
->X_add_symbol
= &abs_symbol
;
1927 if ((tok
->X_op
== O_constant
|| tok
->X_op
== O_symbol
)
1928 && ((reloc
= xtensa_elf_suffix (&input_line_pointer
, tok
))
1933 case BFD_RELOC_LO16
:
1934 if (tok
->X_op
== O_constant
)
1936 tok
->X_add_number
&= 0xffff;
1940 case BFD_RELOC_HI16
:
1941 if (tok
->X_op
== O_constant
)
1943 tok
->X_add_number
= ((unsigned) tok
->X_add_number
) >> 16;
1947 case BFD_RELOC_UNUSED
:
1948 as_bad (_("unsupported relocation"));
1950 case BFD_RELOC_32_PCREL
:
1951 as_bad (_("pcrel relocation not allowed in an instruction"));
1956 tok
->X_op
= map_suffix_reloc_to_operator (reloc
);
1961 xtensa_regfile opnd_rf
= xtensa_operand_regfile (isa
, opc
, opnd
);
1962 unsigned reg
= tc_get_register (xtensa_regfile_shortname (isa
, opnd_rf
));
1964 if (reg
!= ERROR_REG_NUM
) /* Already errored */
1967 if (xtensa_operand_encode (isa
, opc
, opnd
, &buf
))
1968 as_bad (_("register number out of range"));
1971 tok
->X_op
= O_register
;
1972 tok
->X_add_symbol
= 0;
1973 tok
->X_add_number
= reg
;
1978 /* Split up the arguments for an opcode or pseudo-op. */
1981 tokenize_arguments (char **args
, char *str
)
1983 char *old_input_line_pointer
;
1984 bfd_boolean saw_comma
= FALSE
;
1985 bfd_boolean saw_arg
= FALSE
;
1986 bfd_boolean saw_colon
= FALSE
;
1988 char *arg_end
, *arg
;
1991 /* Save and restore input_line_pointer around this function. */
1992 old_input_line_pointer
= input_line_pointer
;
1993 input_line_pointer
= str
;
1995 while (*input_line_pointer
)
1998 switch (*input_line_pointer
)
2005 input_line_pointer
++;
2006 if (saw_comma
|| saw_colon
|| !saw_arg
)
2012 input_line_pointer
++;
2013 if (saw_comma
|| saw_colon
|| !saw_arg
)
2019 if (!saw_comma
&& !saw_colon
&& saw_arg
)
2022 arg_end
= input_line_pointer
+ 1;
2023 while (!expression_end (arg_end
))
2026 arg_len
= arg_end
- input_line_pointer
;
2027 arg
= (char *) xmalloc ((saw_colon
? 1 : 0) + arg_len
+ 1);
2028 args
[num_args
] = arg
;
2032 strncpy (arg
, input_line_pointer
, arg_len
);
2033 arg
[arg_len
] = '\0';
2035 input_line_pointer
= arg_end
;
2045 if (saw_comma
|| saw_colon
)
2047 input_line_pointer
= old_input_line_pointer
;
2052 as_bad (_("extra comma"));
2054 as_bad (_("extra colon"));
2056 as_bad (_("missing argument"));
2058 as_bad (_("missing comma or colon"));
2059 input_line_pointer
= old_input_line_pointer
;
2064 /* Parse the arguments to an opcode. Return TRUE on error. */
2067 parse_arguments (TInsn
*insn
, int num_args
, char **arg_strings
)
2069 expressionS
*tok
, *last_tok
;
2070 xtensa_opcode opcode
= insn
->opcode
;
2071 bfd_boolean had_error
= TRUE
;
2072 xtensa_isa isa
= xtensa_default_isa
;
2073 int n
, num_regs
= 0;
2074 int opcode_operand_count
;
2075 int opnd_cnt
, last_opnd_cnt
;
2076 unsigned int next_reg
= 0;
2077 char *old_input_line_pointer
;
2079 if (insn
->insn_type
== ITYPE_LITERAL
)
2080 opcode_operand_count
= 1;
2082 opcode_operand_count
= xtensa_opcode_num_operands (isa
, opcode
);
2085 memset (tok
, 0, sizeof (*tok
) * MAX_INSN_ARGS
);
2087 /* Save and restore input_line_pointer around this function. */
2088 old_input_line_pointer
= input_line_pointer
;
2094 /* Skip invisible operands. */
2095 while (xtensa_operand_is_visible (isa
, opcode
, opnd_cnt
) == 0)
2101 for (n
= 0; n
< num_args
; n
++)
2103 input_line_pointer
= arg_strings
[n
];
2104 if (*input_line_pointer
== ':')
2106 xtensa_regfile opnd_rf
;
2107 input_line_pointer
++;
2110 gas_assert (opnd_cnt
> 0);
2112 opnd_rf
= xtensa_operand_regfile (isa
, opcode
, last_opnd_cnt
);
2114 != tc_get_register (xtensa_regfile_shortname (isa
, opnd_rf
)))
2115 as_warn (_("incorrect register number, ignoring"));
2120 if (opnd_cnt
>= opcode_operand_count
)
2122 as_warn (_("too many arguments"));
2125 gas_assert (opnd_cnt
< MAX_INSN_ARGS
);
2127 expression_maybe_register (opcode
, opnd_cnt
, tok
);
2128 next_reg
= tok
->X_add_number
+ 1;
2130 if (tok
->X_op
== O_illegal
|| tok
->X_op
== O_absent
)
2132 if (xtensa_operand_is_register (isa
, opcode
, opnd_cnt
) == 1)
2134 num_regs
= xtensa_operand_num_regs (isa
, opcode
, opnd_cnt
) - 1;
2135 /* minus 1 because we are seeing one right now */
2141 last_opnd_cnt
= opnd_cnt
;
2142 demand_empty_rest_of_line ();
2149 while (xtensa_operand_is_visible (isa
, opcode
, opnd_cnt
) == 0);
2153 if (num_regs
> 0 && ((int) next_reg
!= last_tok
->X_add_number
+ 1))
2156 insn
->ntok
= tok
- insn
->tok
;
2160 input_line_pointer
= old_input_line_pointer
;
2166 get_invisible_operands (TInsn
*insn
)
2168 xtensa_isa isa
= xtensa_default_isa
;
2169 static xtensa_insnbuf slotbuf
= NULL
;
2171 xtensa_opcode opc
= insn
->opcode
;
2172 int slot
, opnd
, fmt_found
;
2176 slotbuf
= xtensa_insnbuf_alloc (isa
);
2178 /* Find format/slot where this can be encoded. */
2181 for (fmt
= 0; fmt
< xtensa_isa_num_formats (isa
); fmt
++)
2183 for (slot
= 0; slot
< xtensa_format_num_slots (isa
, fmt
); slot
++)
2185 if (xtensa_opcode_encode (isa
, fmt
, slot
, slotbuf
, opc
) == 0)
2191 if (fmt_found
) break;
2196 as_bad (_("cannot encode opcode \"%s\""), xtensa_opcode_name (isa
, opc
));
2200 /* First encode all the visible operands
2201 (to deal with shared field operands). */
2202 for (opnd
= 0; opnd
< insn
->ntok
; opnd
++)
2204 if (xtensa_operand_is_visible (isa
, opc
, opnd
) == 1
2205 && (insn
->tok
[opnd
].X_op
== O_register
2206 || insn
->tok
[opnd
].X_op
== O_constant
))
2208 val
= insn
->tok
[opnd
].X_add_number
;
2209 xtensa_operand_encode (isa
, opc
, opnd
, &val
);
2210 xtensa_operand_set_field (isa
, opc
, opnd
, fmt
, slot
, slotbuf
, val
);
2214 /* Then pull out the values for the invisible ones. */
2215 for (opnd
= 0; opnd
< insn
->ntok
; opnd
++)
2217 if (xtensa_operand_is_visible (isa
, opc
, opnd
) == 0)
2219 xtensa_operand_get_field (isa
, opc
, opnd
, fmt
, slot
, slotbuf
, &val
);
2220 xtensa_operand_decode (isa
, opc
, opnd
, &val
);
2221 insn
->tok
[opnd
].X_add_number
= val
;
2222 if (xtensa_operand_is_register (isa
, opc
, opnd
) == 1)
2223 insn
->tok
[opnd
].X_op
= O_register
;
2225 insn
->tok
[opnd
].X_op
= O_constant
;
2234 xg_reverse_shift_count (char **cnt_argp
)
2236 char *cnt_arg
, *new_arg
;
2237 cnt_arg
= *cnt_argp
;
2239 /* replace the argument with "31-(argument)" */
2240 new_arg
= (char *) xmalloc (strlen (cnt_arg
) + 6);
2241 sprintf (new_arg
, "31-(%s)", cnt_arg
);
2244 *cnt_argp
= new_arg
;
2248 /* If "arg" is a constant expression, return non-zero with the value
2252 xg_arg_is_constant (char *arg
, offsetT
*valp
)
2255 char *save_ptr
= input_line_pointer
;
2257 input_line_pointer
= arg
;
2259 input_line_pointer
= save_ptr
;
2261 if (exp
.X_op
== O_constant
)
2263 *valp
= exp
.X_add_number
;
2272 xg_replace_opname (char **popname
, char *newop
)
2275 *popname
= (char *) xmalloc (strlen (newop
) + 1);
2276 strcpy (*popname
, newop
);
2281 xg_check_num_args (int *pnum_args
,
2286 int num_args
= *pnum_args
;
2288 if (num_args
< expected_num
)
2290 as_bad (_("not enough operands (%d) for '%s'; expected %d"),
2291 num_args
, opname
, expected_num
);
2295 if (num_args
> expected_num
)
2297 as_warn (_("too many operands (%d) for '%s'; expected %d"),
2298 num_args
, opname
, expected_num
);
2299 while (num_args
-- > expected_num
)
2301 free (arg_strings
[num_args
]);
2302 arg_strings
[num_args
] = 0;
2304 *pnum_args
= expected_num
;
2312 /* If the register is not specified as part of the opcode,
2313 then get it from the operand and move it to the opcode. */
2316 xg_translate_sysreg_op (char **popname
, int *pnum_args
, char **arg_strings
)
2318 xtensa_isa isa
= xtensa_default_isa
;
2320 char *opname
, *new_opname
;
2321 const char *sr_name
;
2322 int is_user
, is_write
;
2327 is_user
= (opname
[1] == 'u');
2328 is_write
= (opname
[0] == 'w');
2330 /* Opname == [rw]ur or [rwx]sr... */
2332 if (xg_check_num_args (pnum_args
, 2, opname
, arg_strings
))
2335 /* Check if the argument is a symbolic register name. */
2336 sr
= xtensa_sysreg_lookup_name (isa
, arg_strings
[1]);
2337 /* Handle WSR to "INTSET" as a special case. */
2338 if (sr
== XTENSA_UNDEFINED
&& is_write
&& !is_user
2339 && !strcasecmp (arg_strings
[1], "intset"))
2340 sr
= xtensa_sysreg_lookup_name (isa
, "interrupt");
2341 if (sr
== XTENSA_UNDEFINED
2342 || (xtensa_sysreg_is_user (isa
, sr
) == 1) != is_user
)
2344 /* Maybe it's a register number.... */
2346 if (!xg_arg_is_constant (arg_strings
[1], &val
))
2348 as_bad (_("invalid register '%s' for '%s' instruction"),
2349 arg_strings
[1], opname
);
2352 sr
= xtensa_sysreg_lookup (isa
, val
, is_user
);
2353 if (sr
== XTENSA_UNDEFINED
)
2355 as_bad (_("invalid register number (%ld) for '%s' instruction"),
2356 (long) val
, opname
);
2361 /* Remove the last argument, which is now part of the opcode. */
2362 free (arg_strings
[1]);
2366 /* Translate the opcode. */
2367 sr_name
= xtensa_sysreg_name (isa
, sr
);
2368 /* Another special case for "WSR.INTSET".... */
2369 if (is_write
&& !is_user
&& !strcasecmp ("interrupt", sr_name
))
2371 new_opname
= (char *) xmalloc (strlen (sr_name
) + 6);
2372 sprintf (new_opname
, "%s.%s", *popname
, sr_name
);
2374 *popname
= new_opname
;
2381 xtensa_translate_old_userreg_ops (char **popname
)
2383 xtensa_isa isa
= xtensa_default_isa
;
2385 char *opname
, *new_opname
;
2386 const char *sr_name
;
2387 bfd_boolean has_underbar
= FALSE
;
2390 if (opname
[0] == '_')
2392 has_underbar
= TRUE
;
2396 sr
= xtensa_sysreg_lookup_name (isa
, opname
+ 1);
2397 if (sr
!= XTENSA_UNDEFINED
)
2399 /* The new default name ("nnn") is different from the old default
2400 name ("URnnn"). The old default is handled below, and we don't
2401 want to recognize [RW]nnn, so do nothing if the name is the (new)
2403 static char namebuf
[10];
2404 sprintf (namebuf
, "%d", xtensa_sysreg_number (isa
, sr
));
2405 if (strcmp (namebuf
, opname
+ 1) == 0)
2413 /* Only continue if the reg name is "URnnn". */
2414 if (opname
[1] != 'u' || opname
[2] != 'r')
2416 val
= strtoul (opname
+ 3, &end
, 10);
2420 sr
= xtensa_sysreg_lookup (isa
, val
, 1);
2421 if (sr
== XTENSA_UNDEFINED
)
2423 as_bad (_("invalid register number (%ld) for '%s'"),
2424 (long) val
, opname
);
2429 /* Translate the opcode. */
2430 sr_name
= xtensa_sysreg_name (isa
, sr
);
2431 new_opname
= (char *) xmalloc (strlen (sr_name
) + 6);
2432 sprintf (new_opname
, "%s%cur.%s", (has_underbar
? "_" : ""),
2433 opname
[0], sr_name
);
2435 *popname
= new_opname
;
2442 xtensa_translate_zero_immed (char *old_op
,
2452 gas_assert (opname
[0] != '_');
2454 if (strcmp (opname
, old_op
) != 0)
2457 if (xg_check_num_args (pnum_args
, 3, opname
, arg_strings
))
2459 if (xg_arg_is_constant (arg_strings
[1], &val
) && val
== 0)
2461 xg_replace_opname (popname
, new_op
);
2462 free (arg_strings
[1]);
2463 arg_strings
[1] = arg_strings
[2];
2472 /* If the instruction is an idiom (i.e., a built-in macro), translate it.
2473 Returns non-zero if an error was found. */
2476 xg_translate_idioms (char **popname
, int *pnum_args
, char **arg_strings
)
2478 char *opname
= *popname
;
2479 bfd_boolean has_underbar
= FALSE
;
2483 has_underbar
= TRUE
;
2487 if (strcmp (opname
, "mov") == 0)
2489 if (use_transform () && !has_underbar
&& density_supported
)
2490 xg_replace_opname (popname
, "mov.n");
2493 if (xg_check_num_args (pnum_args
, 2, opname
, arg_strings
))
2495 xg_replace_opname (popname
, (has_underbar
? "_or" : "or"));
2496 arg_strings
[2] = (char *) xmalloc (strlen (arg_strings
[1]) + 1);
2497 strcpy (arg_strings
[2], arg_strings
[1]);
2503 if (strcmp (opname
, "bbsi.l") == 0)
2505 if (xg_check_num_args (pnum_args
, 3, opname
, arg_strings
))
2507 xg_replace_opname (popname
, (has_underbar
? "_bbsi" : "bbsi"));
2508 if (target_big_endian
)
2509 xg_reverse_shift_count (&arg_strings
[1]);
2513 if (strcmp (opname
, "bbci.l") == 0)
2515 if (xg_check_num_args (pnum_args
, 3, opname
, arg_strings
))
2517 xg_replace_opname (popname
, (has_underbar
? "_bbci" : "bbci"));
2518 if (target_big_endian
)
2519 xg_reverse_shift_count (&arg_strings
[1]);
2523 /* Don't do anything special with NOPs inside FLIX instructions. They
2524 are handled elsewhere. Real NOP instructions are always available
2525 in configurations with FLIX, so this should never be an issue but
2526 check for it anyway. */
2527 if (!cur_vinsn
.inside_bundle
&& xtensa_nop_opcode
== XTENSA_UNDEFINED
2528 && strcmp (opname
, "nop") == 0)
2530 if (use_transform () && !has_underbar
&& density_supported
)
2531 xg_replace_opname (popname
, "nop.n");
2534 if (xg_check_num_args (pnum_args
, 0, opname
, arg_strings
))
2536 xg_replace_opname (popname
, (has_underbar
? "_or" : "or"));
2537 arg_strings
[0] = (char *) xmalloc (3);
2538 arg_strings
[1] = (char *) xmalloc (3);
2539 arg_strings
[2] = (char *) xmalloc (3);
2540 strcpy (arg_strings
[0], "a1");
2541 strcpy (arg_strings
[1], "a1");
2542 strcpy (arg_strings
[2], "a1");
2548 /* Recognize [RW]UR and [RWX]SR. */
2549 if ((((opname
[0] == 'r' || opname
[0] == 'w')
2550 && (opname
[1] == 'u' || opname
[1] == 's'))
2551 || (opname
[0] == 'x' && opname
[1] == 's'))
2553 && opname
[3] == '\0')
2554 return xg_translate_sysreg_op (popname
, pnum_args
, arg_strings
);
2556 /* Backward compatibility for RUR and WUR: Recognize [RW]UR<nnn> and
2557 [RW]<name> if <name> is the non-default name of a user register. */
2558 if ((opname
[0] == 'r' || opname
[0] == 'w')
2559 && xtensa_opcode_lookup (xtensa_default_isa
, opname
) == XTENSA_UNDEFINED
)
2560 return xtensa_translate_old_userreg_ops (popname
);
2562 /* Relax branches that don't allow comparisons against an immediate value
2563 of zero to the corresponding branches with implicit zero immediates. */
2564 if (!has_underbar
&& use_transform ())
2566 if (xtensa_translate_zero_immed ("bnei", "bnez", popname
,
2567 pnum_args
, arg_strings
))
2570 if (xtensa_translate_zero_immed ("beqi", "beqz", popname
,
2571 pnum_args
, arg_strings
))
2574 if (xtensa_translate_zero_immed ("bgei", "bgez", popname
,
2575 pnum_args
, arg_strings
))
2578 if (xtensa_translate_zero_immed ("blti", "bltz", popname
,
2579 pnum_args
, arg_strings
))
2587 /* Functions for dealing with the Xtensa ISA. */
2589 /* Currently the assembler only allows us to use a single target per
2590 fragment. Because of this, only one operand for a given
2591 instruction may be symbolic. If there is a PC-relative operand,
2592 the last one is chosen. Otherwise, the result is the number of the
2593 last immediate operand, and if there are none of those, we fail and
2597 get_relaxable_immed (xtensa_opcode opcode
)
2599 int last_immed
= -1;
2602 if (opcode
== XTENSA_UNDEFINED
)
2605 noperands
= xtensa_opcode_num_operands (xtensa_default_isa
, opcode
);
2606 for (opi
= noperands
- 1; opi
>= 0; opi
--)
2608 if (xtensa_operand_is_visible (xtensa_default_isa
, opcode
, opi
) == 0)
2610 if (xtensa_operand_is_PCrelative (xtensa_default_isa
, opcode
, opi
) == 1)
2612 if (last_immed
== -1
2613 && xtensa_operand_is_register (xtensa_default_isa
, opcode
, opi
) == 0)
2620 static xtensa_opcode
2621 get_opcode_from_buf (const char *buf
, int slot
)
2623 static xtensa_insnbuf insnbuf
= NULL
;
2624 static xtensa_insnbuf slotbuf
= NULL
;
2625 xtensa_isa isa
= xtensa_default_isa
;
2630 insnbuf
= xtensa_insnbuf_alloc (isa
);
2631 slotbuf
= xtensa_insnbuf_alloc (isa
);
2634 xtensa_insnbuf_from_chars (isa
, insnbuf
, (const unsigned char *) buf
, 0);
2635 fmt
= xtensa_format_decode (isa
, insnbuf
);
2636 if (fmt
== XTENSA_UNDEFINED
)
2637 return XTENSA_UNDEFINED
;
2639 if (slot
>= xtensa_format_num_slots (isa
, fmt
))
2640 return XTENSA_UNDEFINED
;
2642 xtensa_format_get_slot (isa
, fmt
, slot
, insnbuf
, slotbuf
);
2643 return xtensa_opcode_decode (isa
, fmt
, slot
, slotbuf
);
2647 #ifdef TENSILICA_DEBUG
2649 /* For debugging, print out the mapping of opcode numbers to opcodes. */
2652 xtensa_print_insn_table (void)
2654 int num_opcodes
, num_operands
;
2655 xtensa_opcode opcode
;
2656 xtensa_isa isa
= xtensa_default_isa
;
2658 num_opcodes
= xtensa_isa_num_opcodes (xtensa_default_isa
);
2659 for (opcode
= 0; opcode
< num_opcodes
; opcode
++)
2662 fprintf (stderr
, "%d: %s: ", opcode
, xtensa_opcode_name (isa
, opcode
));
2663 num_operands
= xtensa_opcode_num_operands (isa
, opcode
);
2664 for (opn
= 0; opn
< num_operands
; opn
++)
2666 if (xtensa_operand_is_visible (isa
, opcode
, opn
) == 0)
2668 if (xtensa_operand_is_register (isa
, opcode
, opn
) == 1)
2670 xtensa_regfile opnd_rf
=
2671 xtensa_operand_regfile (isa
, opcode
, opn
);
2672 fprintf (stderr
, "%s ", xtensa_regfile_shortname (isa
, opnd_rf
));
2674 else if (xtensa_operand_is_PCrelative (isa
, opcode
, opn
) == 1)
2675 fputs ("[lLr] ", stderr
);
2677 fputs ("i ", stderr
);
2679 fprintf (stderr
, "\n");
2685 print_vliw_insn (xtensa_insnbuf vbuf
)
2687 xtensa_isa isa
= xtensa_default_isa
;
2688 xtensa_format f
= xtensa_format_decode (isa
, vbuf
);
2689 xtensa_insnbuf sbuf
= xtensa_insnbuf_alloc (isa
);
2692 fprintf (stderr
, "format = %d\n", f
);
2694 for (op
= 0; op
< xtensa_format_num_slots (isa
, f
); op
++)
2696 xtensa_opcode opcode
;
2700 xtensa_format_get_slot (isa
, f
, op
, vbuf
, sbuf
);
2701 opcode
= xtensa_opcode_decode (isa
, f
, op
, sbuf
);
2702 opname
= xtensa_opcode_name (isa
, opcode
);
2704 fprintf (stderr
, "op in slot %i is %s;\n", op
, opname
);
2705 fprintf (stderr
, " operands = ");
2707 operands
< xtensa_opcode_num_operands (isa
, opcode
);
2711 if (xtensa_operand_is_visible (isa
, opcode
, operands
) == 0)
2713 xtensa_operand_get_field (isa
, opcode
, operands
, f
, op
, sbuf
, &val
);
2714 xtensa_operand_decode (isa
, opcode
, operands
, &val
);
2715 fprintf (stderr
, "%d ", val
);
2717 fprintf (stderr
, "\n");
2719 xtensa_insnbuf_free (isa
, sbuf
);
2722 #endif /* TENSILICA_DEBUG */
2726 is_direct_call_opcode (xtensa_opcode opcode
)
2728 xtensa_isa isa
= xtensa_default_isa
;
2729 int n
, num_operands
;
2731 if (xtensa_opcode_is_call (isa
, opcode
) != 1)
2734 num_operands
= xtensa_opcode_num_operands (isa
, opcode
);
2735 for (n
= 0; n
< num_operands
; n
++)
2737 if (xtensa_operand_is_register (isa
, opcode
, n
) == 0
2738 && xtensa_operand_is_PCrelative (isa
, opcode
, n
) == 1)
2745 /* Convert from BFD relocation type code to slot and operand number.
2746 Returns non-zero on failure. */
2749 decode_reloc (bfd_reloc_code_real_type reloc
, int *slot
, bfd_boolean
*is_alt
)
2751 if (reloc
>= BFD_RELOC_XTENSA_SLOT0_OP
2752 && reloc
<= BFD_RELOC_XTENSA_SLOT14_OP
)
2754 *slot
= reloc
- BFD_RELOC_XTENSA_SLOT0_OP
;
2757 else if (reloc
>= BFD_RELOC_XTENSA_SLOT0_ALT
2758 && reloc
<= BFD_RELOC_XTENSA_SLOT14_ALT
)
2760 *slot
= reloc
- BFD_RELOC_XTENSA_SLOT0_ALT
;
2770 /* Convert from slot number to BFD relocation type code for the
2771 standard PC-relative relocations. Return BFD_RELOC_NONE on
2774 static bfd_reloc_code_real_type
2775 encode_reloc (int slot
)
2777 if (slot
< 0 || slot
> 14)
2778 return BFD_RELOC_NONE
;
2780 return BFD_RELOC_XTENSA_SLOT0_OP
+ slot
;
2784 /* Convert from slot numbers to BFD relocation type code for the
2785 "alternate" relocations. Return BFD_RELOC_NONE on failure. */
2787 static bfd_reloc_code_real_type
2788 encode_alt_reloc (int slot
)
2790 if (slot
< 0 || slot
> 14)
2791 return BFD_RELOC_NONE
;
2793 return BFD_RELOC_XTENSA_SLOT0_ALT
+ slot
;
2798 xtensa_insnbuf_set_operand (xtensa_insnbuf slotbuf
,
2801 xtensa_opcode opcode
,
2807 uint32 valbuf
= value
;
2809 if (xtensa_operand_encode (xtensa_default_isa
, opcode
, operand
, &valbuf
))
2811 if (xtensa_operand_is_PCrelative (xtensa_default_isa
, opcode
, operand
)
2813 as_bad_where ((char *) file
, line
,
2814 _("operand %d of '%s' has out of range value '%u'"),
2816 xtensa_opcode_name (xtensa_default_isa
, opcode
),
2819 as_bad_where ((char *) file
, line
,
2820 _("operand %d of '%s' has invalid value '%u'"),
2822 xtensa_opcode_name (xtensa_default_isa
, opcode
),
2827 xtensa_operand_set_field (xtensa_default_isa
, opcode
, operand
, fmt
, slot
,
2833 xtensa_insnbuf_get_operand (xtensa_insnbuf slotbuf
,
2836 xtensa_opcode opcode
,
2840 (void) xtensa_operand_get_field (xtensa_default_isa
, opcode
, opnum
,
2841 fmt
, slot
, slotbuf
, &val
);
2842 (void) xtensa_operand_decode (xtensa_default_isa
, opcode
, opnum
, &val
);
2847 /* Checks for rules from xtensa-relax tables. */
2849 /* The routine xg_instruction_matches_option_term must return TRUE
2850 when a given option term is true. The meaning of all of the option
2851 terms is given interpretation by this function. */
2854 xg_instruction_matches_option_term (TInsn
*insn
, const ReqOrOption
*option
)
2856 if (strcmp (option
->option_name
, "realnop") == 0
2857 || strncmp (option
->option_name
, "IsaUse", 6) == 0)
2859 /* These conditions were evaluated statically when building the
2860 relaxation table. There's no need to reevaluate them now. */
2863 else if (strcmp (option
->option_name
, "FREEREG") == 0)
2864 return insn
->extra_arg
.X_op
== O_register
;
2867 as_fatal (_("internal error: unknown option name '%s'"),
2868 option
->option_name
);
2874 xg_instruction_matches_or_options (TInsn
*insn
,
2875 const ReqOrOptionList
*or_option
)
2877 const ReqOrOption
*option
;
2878 /* Must match each of the AND terms. */
2879 for (option
= or_option
; option
!= NULL
; option
= option
->next
)
2881 if (xg_instruction_matches_option_term (insn
, option
))
2889 xg_instruction_matches_options (TInsn
*insn
, const ReqOptionList
*options
)
2891 const ReqOption
*req_options
;
2892 /* Must match each of the AND terms. */
2893 for (req_options
= options
;
2894 req_options
!= NULL
;
2895 req_options
= req_options
->next
)
2897 /* Must match one of the OR clauses. */
2898 if (!xg_instruction_matches_or_options (insn
,
2899 req_options
->or_option_terms
))
2906 /* Return the transition rule that matches or NULL if none matches. */
2909 xg_instruction_matches_rule (TInsn
*insn
, TransitionRule
*rule
)
2911 PreconditionList
*condition_l
;
2913 if (rule
->opcode
!= insn
->opcode
)
2916 for (condition_l
= rule
->conditions
;
2917 condition_l
!= NULL
;
2918 condition_l
= condition_l
->next
)
2922 Precondition
*cond
= condition_l
->precond
;
2927 /* The expression must be the constant. */
2928 gas_assert (cond
->op_num
< insn
->ntok
);
2929 exp1
= &insn
->tok
[cond
->op_num
];
2930 if (expr_is_const (exp1
))
2935 if (get_expr_const (exp1
) != cond
->op_data
)
2939 if (get_expr_const (exp1
) == cond
->op_data
)
2946 else if (expr_is_register (exp1
))
2951 if (get_expr_register (exp1
) != cond
->op_data
)
2955 if (get_expr_register (exp1
) == cond
->op_data
)
2967 gas_assert (cond
->op_num
< insn
->ntok
);
2968 gas_assert (cond
->op_data
< insn
->ntok
);
2969 exp1
= &insn
->tok
[cond
->op_num
];
2970 exp2
= &insn
->tok
[cond
->op_data
];
2975 if (!expr_is_equal (exp1
, exp2
))
2979 if (expr_is_equal (exp1
, exp2
))
2991 if (!xg_instruction_matches_options (insn
, rule
->options
))
2999 transition_rule_cmp (const TransitionRule
*a
, const TransitionRule
*b
)
3001 bfd_boolean a_greater
= FALSE
;
3002 bfd_boolean b_greater
= FALSE
;
3004 ReqOptionList
*l_a
= a
->options
;
3005 ReqOptionList
*l_b
= b
->options
;
3007 /* We only care if they both are the same except for
3008 a const16 vs. an l32r. */
3010 while (l_a
&& l_b
&& ((l_a
->next
== NULL
) == (l_b
->next
== NULL
)))
3012 ReqOrOptionList
*l_or_a
= l_a
->or_option_terms
;
3013 ReqOrOptionList
*l_or_b
= l_b
->or_option_terms
;
3014 while (l_or_a
&& l_or_b
&& ((l_a
->next
== NULL
) == (l_b
->next
== NULL
)))
3016 if (l_or_a
->is_true
!= l_or_b
->is_true
)
3018 if (strcmp (l_or_a
->option_name
, l_or_b
->option_name
) != 0)
3020 /* This is the case we care about. */
3021 if (strcmp (l_or_a
->option_name
, "IsaUseConst16") == 0
3022 && strcmp (l_or_b
->option_name
, "IsaUseL32R") == 0)
3029 else if (strcmp (l_or_a
->option_name
, "IsaUseL32R") == 0
3030 && strcmp (l_or_b
->option_name
, "IsaUseConst16") == 0)
3040 l_or_a
= l_or_a
->next
;
3041 l_or_b
= l_or_b
->next
;
3043 if (l_or_a
|| l_or_b
)
3052 /* Incomparable if the substitution was used differently in two cases. */
3053 if (a_greater
&& b_greater
)
3065 static TransitionRule
*
3066 xg_instruction_match (TInsn
*insn
)
3068 TransitionTable
*table
= xg_build_simplify_table (&transition_rule_cmp
);
3070 gas_assert (insn
->opcode
< table
->num_opcodes
);
3072 /* Walk through all of the possible transitions. */
3073 for (l
= table
->table
[insn
->opcode
]; l
!= NULL
; l
= l
->next
)
3075 TransitionRule
*rule
= l
->rule
;
3076 if (xg_instruction_matches_rule (insn
, rule
))
3083 /* Various Other Internal Functions. */
3086 is_unique_insn_expansion (TransitionRule
*r
)
3088 if (!r
->to_instr
|| r
->to_instr
->next
!= NULL
)
3090 if (r
->to_instr
->typ
!= INSTR_INSTR
)
3096 /* Check if there is exactly one relaxation for INSN that converts it to
3097 another instruction of equal or larger size. If so, and if TARG is
3098 non-null, go ahead and generate the relaxed instruction into TARG. If
3099 NARROW_ONLY is true, then only consider relaxations that widen a narrow
3100 instruction, i.e., ignore relaxations that convert to an instruction of
3101 equal size. In some contexts where this function is used, only
3102 a single widening is allowed and the NARROW_ONLY argument is used to
3103 exclude cases like ADDI being "widened" to an ADDMI, which may
3104 later be relaxed to an ADDMI/ADDI pair. */
3107 xg_is_single_relaxable_insn (TInsn
*insn
, TInsn
*targ
, bfd_boolean narrow_only
)
3109 TransitionTable
*table
= xg_build_widen_table (&transition_rule_cmp
);
3111 TransitionRule
*match
= 0;
3113 gas_assert (insn
->insn_type
== ITYPE_INSN
);
3114 gas_assert (insn
->opcode
< table
->num_opcodes
);
3116 for (l
= table
->table
[insn
->opcode
]; l
!= NULL
; l
= l
->next
)
3118 TransitionRule
*rule
= l
->rule
;
3120 if (xg_instruction_matches_rule (insn
, rule
)
3121 && is_unique_insn_expansion (rule
)
3122 && (xg_get_single_size (insn
->opcode
) + (narrow_only
? 1 : 0)
3123 <= xg_get_single_size (rule
->to_instr
->opcode
)))
3134 xg_build_to_insn (targ
, insn
, match
->to_instr
);
3139 /* Return the maximum number of bytes this opcode can expand to. */
3142 xg_get_max_insn_widen_size (xtensa_opcode opcode
)
3144 TransitionTable
*table
= xg_build_widen_table (&transition_rule_cmp
);
3146 int max_size
= xg_get_single_size (opcode
);
3148 gas_assert (opcode
< table
->num_opcodes
);
3150 for (l
= table
->table
[opcode
]; l
!= NULL
; l
= l
->next
)
3152 TransitionRule
*rule
= l
->rule
;
3153 BuildInstr
*build_list
;
3158 build_list
= rule
->to_instr
;
3159 if (is_unique_insn_expansion (rule
))
3161 gas_assert (build_list
->typ
== INSTR_INSTR
);
3162 this_size
= xg_get_max_insn_widen_size (build_list
->opcode
);
3165 for (; build_list
!= NULL
; build_list
= build_list
->next
)
3167 switch (build_list
->typ
)
3170 this_size
+= xg_get_single_size (build_list
->opcode
);
3172 case INSTR_LITERAL_DEF
:
3173 case INSTR_LABEL_DEF
:
3178 if (this_size
> max_size
)
3179 max_size
= this_size
;
3185 /* Return the maximum number of literal bytes this opcode can generate. */
3188 xg_get_max_insn_widen_literal_size (xtensa_opcode opcode
)
3190 TransitionTable
*table
= xg_build_widen_table (&transition_rule_cmp
);
3194 gas_assert (opcode
< table
->num_opcodes
);
3196 for (l
= table
->table
[opcode
]; l
!= NULL
; l
= l
->next
)
3198 TransitionRule
*rule
= l
->rule
;
3199 BuildInstr
*build_list
;
3204 build_list
= rule
->to_instr
;
3205 if (is_unique_insn_expansion (rule
))
3207 gas_assert (build_list
->typ
== INSTR_INSTR
);
3208 this_size
= xg_get_max_insn_widen_literal_size (build_list
->opcode
);
3211 for (; build_list
!= NULL
; build_list
= build_list
->next
)
3213 switch (build_list
->typ
)
3215 case INSTR_LITERAL_DEF
:
3216 /* Hard-coded 4-byte literal. */
3220 case INSTR_LABEL_DEF
:
3225 if (this_size
> max_size
)
3226 max_size
= this_size
;
3233 xg_is_relaxable_insn (TInsn
*insn
, int lateral_steps
)
3235 int steps_taken
= 0;
3236 TransitionTable
*table
= xg_build_widen_table (&transition_rule_cmp
);
3239 gas_assert (insn
->insn_type
== ITYPE_INSN
);
3240 gas_assert (insn
->opcode
< table
->num_opcodes
);
3242 for (l
= table
->table
[insn
->opcode
]; l
!= NULL
; l
= l
->next
)
3244 TransitionRule
*rule
= l
->rule
;
3246 if (xg_instruction_matches_rule (insn
, rule
))
3248 if (steps_taken
== lateral_steps
)
3258 get_special_literal_symbol (void)
3260 static symbolS
*sym
= NULL
;
3263 sym
= symbol_find_or_make ("SPECIAL_LITERAL0\001");
3269 get_special_label_symbol (void)
3271 static symbolS
*sym
= NULL
;
3274 sym
= symbol_find_or_make ("SPECIAL_LABEL0\001");
3280 xg_valid_literal_expression (const expressionS
*exp
)
3302 /* This will check to see if the value can be converted into the
3303 operand type. It will return TRUE if it does not fit. */
3306 xg_check_operand (int32 value
, xtensa_opcode opcode
, int operand
)
3308 uint32 valbuf
= value
;
3309 if (xtensa_operand_encode (xtensa_default_isa
, opcode
, operand
, &valbuf
))
3315 /* Assumes: All immeds are constants. Check that all constants fit
3316 into their immeds; return FALSE if not. */
3319 xg_immeds_fit (const TInsn
*insn
)
3321 xtensa_isa isa
= xtensa_default_isa
;
3325 gas_assert (insn
->insn_type
== ITYPE_INSN
);
3326 for (i
= 0; i
< n
; ++i
)
3328 const expressionS
*exp
= &insn
->tok
[i
];
3330 if (xtensa_operand_is_register (isa
, insn
->opcode
, i
) == 1)
3337 if (xg_check_operand (exp
->X_add_number
, insn
->opcode
, i
))
3342 /* The symbol should have a fixup associated with it. */
3351 /* This should only be called after we have an initial
3352 estimate of the addresses. */
3355 xg_symbolic_immeds_fit (const TInsn
*insn
,
3361 xtensa_isa isa
= xtensa_default_isa
;
3369 gas_assert (insn
->insn_type
== ITYPE_INSN
);
3371 for (i
= 0; i
< n
; ++i
)
3373 const expressionS
*exp
= &insn
->tok
[i
];
3375 if (xtensa_operand_is_register (isa
, insn
->opcode
, i
) == 1)
3382 if (xg_check_operand (exp
->X_add_number
, insn
->opcode
, i
))
3388 /* Check for the worst case. */
3389 if (xg_check_operand (0xffff, insn
->opcode
, i
))
3394 /* We only allow symbols for PC-relative references.
3395 If pc_frag == 0, then we don't have frag locations yet. */
3397 || xtensa_operand_is_PCrelative (isa
, insn
->opcode
, i
) == 0)
3400 /* If it is a weak symbol or a symbol in a different section,
3401 it cannot be known to fit at assembly time. */
3402 if (S_IS_WEAK (exp
->X_add_symbol
)
3403 || S_GET_SEGMENT (exp
->X_add_symbol
) != pc_seg
)
3405 /* For a direct call with --no-longcalls, be optimistic and
3406 assume it will be in range. If the symbol is weak and
3407 undefined, it may remain undefined at link-time, in which
3408 case it will have a zero value and almost certainly be out
3409 of range for a direct call; thus, relax for undefined weak
3410 symbols even if longcalls is not enabled. */
3411 if (is_direct_call_opcode (insn
->opcode
)
3412 && ! pc_frag
->tc_frag_data
.use_longcalls
3413 && (! S_IS_WEAK (exp
->X_add_symbol
)
3414 || S_IS_DEFINED (exp
->X_add_symbol
)))
3420 symbolP
= exp
->X_add_symbol
;
3421 sym_frag
= symbol_get_frag (symbolP
);
3422 target
= S_GET_VALUE (symbolP
) + exp
->X_add_number
;
3423 pc
= pc_frag
->fr_address
+ pc_offset
;
3425 /* If frag has yet to be reached on this pass, assume it
3426 will move by STRETCH just as we did. If this is not so,
3427 it will be because some frag between grows, and that will
3428 force another pass. Beware zero-length frags. There
3429 should be a faster way to do this. */
3432 && sym_frag
->relax_marker
!= pc_frag
->relax_marker
3433 && S_GET_SEGMENT (symbolP
) == pc_seg
)
3438 new_offset
= target
;
3439 xtensa_operand_do_reloc (isa
, insn
->opcode
, i
, &new_offset
, pc
);
3440 if (xg_check_operand (new_offset
, insn
->opcode
, i
))
3445 /* The symbol should have a fixup associated with it. */
3454 /* Return TRUE on success. */
3457 xg_build_to_insn (TInsn
*targ
, TInsn
*insn
, BuildInstr
*bi
)
3463 targ
->debug_line
= insn
->debug_line
;
3464 targ
->loc_directive_seen
= insn
->loc_directive_seen
;
3469 targ
->opcode
= bi
->opcode
;
3470 targ
->insn_type
= ITYPE_INSN
;
3471 targ
->is_specific_opcode
= FALSE
;
3473 for (; op
!= NULL
; op
= op
->next
)
3475 int op_num
= op
->op_num
;
3476 int op_data
= op
->op_data
;
3478 gas_assert (op
->op_num
< MAX_INSN_ARGS
);
3480 if (targ
->ntok
<= op_num
)
3481 targ
->ntok
= op_num
+ 1;
3486 set_expr_const (&targ
->tok
[op_num
], op_data
);
3489 gas_assert (op_data
< insn
->ntok
);
3490 copy_expr (&targ
->tok
[op_num
], &insn
->tok
[op_data
]);
3493 if (insn
->extra_arg
.X_op
!= O_register
)
3495 copy_expr (&targ
->tok
[op_num
], &insn
->extra_arg
);
3498 sym
= get_special_literal_symbol ();
3499 set_expr_symbol_offset (&targ
->tok
[op_num
], sym
, 0);
3500 if (insn
->tok
[op_data
].X_op
== O_tlsfunc
3501 || insn
->tok
[op_data
].X_op
== O_tlsarg
)
3502 copy_expr (&targ
->extra_arg
, &insn
->tok
[op_data
]);
3505 sym
= get_special_label_symbol ();
3506 set_expr_symbol_offset (&targ
->tok
[op_num
], sym
, 0);
3508 case OP_OPERAND_HI16U
:
3509 case OP_OPERAND_LOW16U
:
3510 gas_assert (op_data
< insn
->ntok
);
3511 if (expr_is_const (&insn
->tok
[op_data
]))
3514 copy_expr (&targ
->tok
[op_num
], &insn
->tok
[op_data
]);
3515 val
= xg_apply_userdef_op_fn (op
->typ
,
3518 targ
->tok
[op_num
].X_add_number
= val
;
3522 /* For const16 we can create relocations for these. */
3523 if (targ
->opcode
== XTENSA_UNDEFINED
3524 || (targ
->opcode
!= xtensa_const16_opcode
))
3526 gas_assert (op_data
< insn
->ntok
);
3527 /* Need to build a O_lo16 or O_hi16. */
3528 copy_expr (&targ
->tok
[op_num
], &insn
->tok
[op_data
]);
3529 if (targ
->tok
[op_num
].X_op
== O_symbol
)
3531 if (op
->typ
== OP_OPERAND_HI16U
)
3532 targ
->tok
[op_num
].X_op
= O_hi16
;
3533 else if (op
->typ
== OP_OPERAND_LOW16U
)
3534 targ
->tok
[op_num
].X_op
= O_lo16
;
3541 /* currently handles:
3544 OP_OPERAND_F32MINUS */
3545 if (xg_has_userdef_op_fn (op
->typ
))
3547 gas_assert (op_data
< insn
->ntok
);
3548 if (expr_is_const (&insn
->tok
[op_data
]))
3551 copy_expr (&targ
->tok
[op_num
], &insn
->tok
[op_data
]);
3552 val
= xg_apply_userdef_op_fn (op
->typ
,
3555 targ
->tok
[op_num
].X_add_number
= val
;
3558 return FALSE
; /* We cannot use a relocation for this. */
3567 case INSTR_LITERAL_DEF
:
3569 targ
->opcode
= XTENSA_UNDEFINED
;
3570 targ
->insn_type
= ITYPE_LITERAL
;
3571 targ
->is_specific_opcode
= FALSE
;
3572 for (; op
!= NULL
; op
= op
->next
)
3574 int op_num
= op
->op_num
;
3575 int op_data
= op
->op_data
;
3576 gas_assert (op
->op_num
< MAX_INSN_ARGS
);
3578 if (targ
->ntok
<= op_num
)
3579 targ
->ntok
= op_num
+ 1;
3584 gas_assert (op_data
< insn
->ntok
);
3585 /* We can only pass resolvable literals through. */
3586 if (!xg_valid_literal_expression (&insn
->tok
[op_data
]))
3588 copy_expr (&targ
->tok
[op_num
], &insn
->tok
[op_data
]);
3600 case INSTR_LABEL_DEF
:
3602 targ
->opcode
= XTENSA_UNDEFINED
;
3603 targ
->insn_type
= ITYPE_LABEL
;
3604 targ
->is_specific_opcode
= FALSE
;
3605 /* Literal with no ops is a label? */
3606 gas_assert (op
== NULL
);
3617 /* Return TRUE on success. */
3620 xg_build_to_stack (IStack
*istack
, TInsn
*insn
, BuildInstr
*bi
)
3622 for (; bi
!= NULL
; bi
= bi
->next
)
3624 TInsn
*next_insn
= istack_push_space (istack
);
3626 if (!xg_build_to_insn (next_insn
, insn
, bi
))
3633 /* Return TRUE on valid expansion. */
3636 xg_expand_to_stack (IStack
*istack
, TInsn
*insn
, int lateral_steps
)
3638 int stack_size
= istack
->ninsn
;
3639 int steps_taken
= 0;
3640 TransitionTable
*table
= xg_build_widen_table (&transition_rule_cmp
);
3643 gas_assert (insn
->insn_type
== ITYPE_INSN
);
3644 gas_assert (insn
->opcode
< table
->num_opcodes
);
3646 for (l
= table
->table
[insn
->opcode
]; l
!= NULL
; l
= l
->next
)
3648 TransitionRule
*rule
= l
->rule
;
3650 if (xg_instruction_matches_rule (insn
, rule
))
3652 if (lateral_steps
== steps_taken
)
3656 /* This is it. Expand the rule to the stack. */
3657 if (!xg_build_to_stack (istack
, insn
, rule
->to_instr
))
3660 /* Check to see if it fits. */
3661 for (i
= stack_size
; i
< istack
->ninsn
; i
++)
3663 TInsn
*tinsn
= &istack
->insn
[i
];
3665 if (tinsn
->insn_type
== ITYPE_INSN
3666 && !tinsn_has_symbolic_operands (tinsn
)
3667 && !xg_immeds_fit (tinsn
))
3669 istack
->ninsn
= stack_size
;
3682 /* Relax the assembly instruction at least "min_steps".
3683 Return the number of steps taken.
3685 For relaxation to correctly terminate, every relaxation chain must
3686 terminate in one of two ways:
3688 1. If the chain from one instruction to the next consists entirely of
3689 single instructions, then the chain *must* handle all possible
3690 immediates without failing. It must not ever fail because an
3691 immediate is out of range. The MOVI.N -> MOVI -> L32R relaxation
3692 chain is one example. L32R loads 32 bits, and there cannot be an
3693 immediate larger than 32 bits, so it satisfies this condition.
3694 Single instruction relaxation chains are as defined by
3695 xg_is_single_relaxable_instruction.
3697 2. Otherwise, the chain must end in a multi-instruction expansion: e.g.,
3698 BNEZ.N -> BNEZ -> BNEZ.W15 -> BENZ.N/J
3700 Strictly speaking, in most cases you can violate condition 1 and be OK
3701 -- in particular when the last two instructions have the same single
3702 size. But nevertheless, you should guarantee the above two conditions.
3704 We could fix this so that single-instruction expansions correctly
3705 terminate when they can't handle the range, but the error messages are
3706 worse, and it actually turns out that in every case but one (18-bit wide
3707 branches), you need a multi-instruction expansion to get the full range
3708 anyway. And because 18-bit branches are handled identically to 15-bit
3709 branches, there isn't any point in changing it. */
3712 xg_assembly_relax (IStack
*istack
,
3715 fragS
*pc_frag
, /* if pc_frag == 0, not pc-relative */
3716 offsetT pc_offset
, /* offset in fragment */
3717 int min_steps
, /* minimum conversion steps */
3718 long stretch
) /* number of bytes stretched so far */
3720 int steps_taken
= 0;
3722 /* Some of its immeds don't fit. Try to build a relaxed version.
3723 This may go through a couple of stages of single instruction
3724 transformations before we get there. */
3726 TInsn single_target
;
3728 int lateral_steps
= 0;
3729 int istack_size
= istack
->ninsn
;
3731 if (xg_symbolic_immeds_fit (insn
, pc_seg
, pc_frag
, pc_offset
, stretch
)
3732 && steps_taken
>= min_steps
)
3734 istack_push (istack
, insn
);
3737 current_insn
= *insn
;
3739 /* Walk through all of the single instruction expansions. */
3740 while (xg_is_single_relaxable_insn (¤t_insn
, &single_target
, FALSE
))
3743 if (xg_symbolic_immeds_fit (&single_target
, pc_seg
, pc_frag
, pc_offset
,
3746 if (steps_taken
>= min_steps
)
3748 istack_push (istack
, &single_target
);
3752 current_insn
= single_target
;
3755 /* Now check for a multi-instruction expansion. */
3756 while (xg_is_relaxable_insn (¤t_insn
, lateral_steps
))
3758 if (xg_symbolic_immeds_fit (¤t_insn
, pc_seg
, pc_frag
, pc_offset
,
3761 if (steps_taken
>= min_steps
)
3763 istack_push (istack
, ¤t_insn
);
3768 if (xg_expand_to_stack (istack
, ¤t_insn
, lateral_steps
))
3770 if (steps_taken
>= min_steps
)
3774 istack
->ninsn
= istack_size
;
3777 /* It's not going to work -- use the original. */
3778 istack_push (istack
, insn
);
3784 xg_finish_frag (char *last_insn
,
3785 enum xtensa_relax_statesE frag_state
,
3786 enum xtensa_relax_statesE slot0_state
,
3788 bfd_boolean is_insn
)
3790 /* Finish off this fragment so that it has at LEAST the desired
3791 max_growth. If it doesn't fit in this fragment, close this one
3792 and start a new one. In either case, return a pointer to the
3793 beginning of the growth area. */
3797 frag_grow (max_growth
);
3798 old_frag
= frag_now
;
3800 frag_now
->fr_opcode
= last_insn
;
3802 frag_now
->tc_frag_data
.is_insn
= TRUE
;
3804 frag_var (rs_machine_dependent
, max_growth
, max_growth
,
3805 frag_state
, frag_now
->fr_symbol
, frag_now
->fr_offset
, last_insn
);
3807 old_frag
->tc_frag_data
.slot_subtypes
[0] = slot0_state
;
3808 xtensa_set_frag_assembly_state (frag_now
);
3810 /* Just to make sure that we did not split it up. */
3811 gas_assert (old_frag
->fr_next
== frag_now
);
3815 /* Return TRUE if the target frag is one of the next non-empty frags. */
3818 is_next_frag_target (const fragS
*fragP
, const fragS
*target
)
3823 for (; fragP
; fragP
= fragP
->fr_next
)
3825 if (fragP
== target
)
3827 if (fragP
->fr_fix
!= 0)
3829 if (fragP
->fr_type
== rs_fill
&& fragP
->fr_offset
!= 0)
3831 if ((fragP
->fr_type
== rs_align
|| fragP
->fr_type
== rs_align_code
)
3832 && ((fragP
->fr_address
% (1 << fragP
->fr_offset
)) != 0))
3834 if (fragP
->fr_type
== rs_space
)
3842 is_branch_jmp_to_next (TInsn
*insn
, fragS
*fragP
)
3844 xtensa_isa isa
= xtensa_default_isa
;
3846 int num_ops
= xtensa_opcode_num_operands (isa
, insn
->opcode
);
3851 if (xtensa_opcode_is_branch (isa
, insn
->opcode
) != 1
3852 && xtensa_opcode_is_jump (isa
, insn
->opcode
) != 1)
3855 for (i
= 0; i
< num_ops
; i
++)
3857 if (xtensa_operand_is_PCrelative (isa
, insn
->opcode
, i
) == 1)
3863 if (target_op
== -1)
3866 if (insn
->ntok
<= target_op
)
3869 if (insn
->tok
[target_op
].X_op
!= O_symbol
)
3872 sym
= insn
->tok
[target_op
].X_add_symbol
;
3876 if (insn
->tok
[target_op
].X_add_number
!= 0)
3879 target_frag
= symbol_get_frag (sym
);
3880 if (target_frag
== NULL
)
3883 if (is_next_frag_target (fragP
->fr_next
, target_frag
)
3884 && S_GET_VALUE (sym
) == target_frag
->fr_address
)
3892 xg_add_branch_and_loop_targets (TInsn
*insn
)
3894 xtensa_isa isa
= xtensa_default_isa
;
3895 int num_ops
= xtensa_opcode_num_operands (isa
, insn
->opcode
);
3897 if (xtensa_opcode_is_loop (isa
, insn
->opcode
) == 1)
3900 if (xtensa_operand_is_PCrelative (isa
, insn
->opcode
, i
) == 1
3901 && insn
->tok
[i
].X_op
== O_symbol
)
3902 symbol_get_tc (insn
->tok
[i
].X_add_symbol
)->is_loop_target
= TRUE
;
3906 if (xtensa_opcode_is_branch (isa
, insn
->opcode
) == 1
3907 || xtensa_opcode_is_loop (isa
, insn
->opcode
) == 1)
3911 for (i
= 0; i
< insn
->ntok
&& i
< num_ops
; i
++)
3913 if (xtensa_operand_is_PCrelative (isa
, insn
->opcode
, i
) == 1
3914 && insn
->tok
[i
].X_op
== O_symbol
)
3916 symbolS
*sym
= insn
->tok
[i
].X_add_symbol
;
3917 symbol_get_tc (sym
)->is_branch_target
= TRUE
;
3918 if (S_IS_DEFINED (sym
))
3919 symbol_get_frag (sym
)->tc_frag_data
.is_branch_target
= TRUE
;
3926 /* Return FALSE if no error. */
3929 xg_build_token_insn (BuildInstr
*instr_spec
, TInsn
*old_insn
, TInsn
*new_insn
)
3934 switch (instr_spec
->typ
)
3937 new_insn
->insn_type
= ITYPE_INSN
;
3938 new_insn
->opcode
= instr_spec
->opcode
;
3940 case INSTR_LITERAL_DEF
:
3941 new_insn
->insn_type
= ITYPE_LITERAL
;
3942 new_insn
->opcode
= XTENSA_UNDEFINED
;
3944 case INSTR_LABEL_DEF
:
3947 new_insn
->is_specific_opcode
= FALSE
;
3948 new_insn
->debug_line
= old_insn
->debug_line
;
3949 new_insn
->loc_directive_seen
= old_insn
->loc_directive_seen
;
3951 for (b_op
= instr_spec
->ops
; b_op
!= NULL
; b_op
= b_op
->next
)
3954 const expressionS
*src_exp
;
3960 /* The expression must be the constant. */
3961 gas_assert (b_op
->op_num
< MAX_INSN_ARGS
);
3962 exp
= &new_insn
->tok
[b_op
->op_num
];
3963 set_expr_const (exp
, b_op
->op_data
);
3967 gas_assert (b_op
->op_num
< MAX_INSN_ARGS
);
3968 gas_assert (b_op
->op_data
< (unsigned) old_insn
->ntok
);
3969 src_exp
= &old_insn
->tok
[b_op
->op_data
];
3970 exp
= &new_insn
->tok
[b_op
->op_num
];
3971 copy_expr (exp
, src_exp
);
3976 as_bad (_("can't handle generation of literal/labels yet"));
3980 as_bad (_("can't handle undefined OP TYPE"));
3985 new_insn
->ntok
= num_ops
;
3990 /* Return TRUE if it was simplified. */
3993 xg_simplify_insn (TInsn
*old_insn
, TInsn
*new_insn
)
3995 TransitionRule
*rule
;
3996 BuildInstr
*insn_spec
;
3998 if (old_insn
->is_specific_opcode
|| !density_supported
)
4001 rule
= xg_instruction_match (old_insn
);
4005 insn_spec
= rule
->to_instr
;
4006 /* There should only be one. */
4007 gas_assert (insn_spec
!= NULL
);
4008 gas_assert (insn_spec
->next
== NULL
);
4009 if (insn_spec
->next
!= NULL
)
4012 xg_build_token_insn (insn_spec
, old_insn
, new_insn
);
4018 /* xg_expand_assembly_insn: (1) Simplify the instruction, i.e., l32i ->
4019 l32i.n. (2) Check the number of operands. (3) Place the instruction
4020 tokens into the stack or relax it and place multiple
4021 instructions/literals onto the stack. Return FALSE if no error. */
4024 xg_expand_assembly_insn (IStack
*istack
, TInsn
*orig_insn
)
4028 bfd_boolean do_expand
;
4030 tinsn_init (&new_insn
);
4032 /* Narrow it if we can. xg_simplify_insn now does all the
4033 appropriate checking (e.g., for the density option). */
4034 if (xg_simplify_insn (orig_insn
, &new_insn
))
4035 orig_insn
= &new_insn
;
4037 noperands
= xtensa_opcode_num_operands (xtensa_default_isa
,
4039 if (orig_insn
->ntok
< noperands
)
4041 as_bad (_("found %d operands for '%s': Expected %d"),
4043 xtensa_opcode_name (xtensa_default_isa
, orig_insn
->opcode
),
4047 if (orig_insn
->ntok
> noperands
)
4048 as_warn (_("found too many (%d) operands for '%s': Expected %d"),
4050 xtensa_opcode_name (xtensa_default_isa
, orig_insn
->opcode
),
4053 /* If there are not enough operands, we will assert above. If there
4054 are too many, just cut out the extras here. */
4055 orig_insn
->ntok
= noperands
;
4057 if (tinsn_has_invalid_symbolic_operands (orig_insn
))
4060 /* Special case for extui opcode which has constraints not handled
4061 by the ordinary operand encoding checks. The number of operands
4062 and related syntax issues have already been checked. */
4063 if (orig_insn
->opcode
== xtensa_extui_opcode
)
4065 int shiftimm
= orig_insn
->tok
[2].X_add_number
;
4066 int maskimm
= orig_insn
->tok
[3].X_add_number
;
4067 if (shiftimm
+ maskimm
> 32)
4069 as_bad (_("immediate operands sum to greater than 32"));
4074 /* If the instruction will definitely need to be relaxed, it is better
4075 to expand it now for better scheduling. Decide whether to expand
4077 do_expand
= (!orig_insn
->is_specific_opcode
&& use_transform ());
4079 /* Calls should be expanded to longcalls only in the backend relaxation
4080 so that the assembly scheduler will keep the L32R/CALLX instructions
4082 if (is_direct_call_opcode (orig_insn
->opcode
))
4085 if (tinsn_has_symbolic_operands (orig_insn
))
4087 /* The values of symbolic operands are not known yet, so only expand
4088 now if an operand is "complex" (e.g., difference of symbols) and
4089 will have to be stored as a literal regardless of the value. */
4090 if (!tinsn_has_complex_operands (orig_insn
))
4093 else if (xg_immeds_fit (orig_insn
))
4097 xg_assembly_relax (istack
, orig_insn
, 0, 0, 0, 0, 0);
4099 istack_push (istack
, orig_insn
);
4105 /* Return TRUE if the section flags are marked linkonce
4106 or the name is .gnu.linkonce.*. */
4108 static int linkonce_len
= sizeof (".gnu.linkonce.") - 1;
4111 get_is_linkonce_section (bfd
*abfd ATTRIBUTE_UNUSED
, segT sec
)
4113 flagword flags
, link_once_flags
;
4115 flags
= bfd_get_section_flags (abfd
, sec
);
4116 link_once_flags
= (flags
& SEC_LINK_ONCE
);
4118 /* Flags might not be set yet. */
4119 if (!link_once_flags
4120 && strncmp (segment_name (sec
), ".gnu.linkonce.", linkonce_len
) == 0)
4121 link_once_flags
= SEC_LINK_ONCE
;
4123 return (link_once_flags
!= 0);
4128 xtensa_add_literal_sym (symbolS
*sym
)
4132 l
= (sym_list
*) xmalloc (sizeof (sym_list
));
4134 l
->next
= literal_syms
;
4140 xtensa_create_literal_symbol (segT sec
, fragS
*frag
)
4142 static int lit_num
= 0;
4143 static char name
[256];
4146 sprintf (name
, ".L_lit_sym%d", lit_num
);
4148 /* Create a local symbol. If it is in a linkonce section, we have to
4149 be careful to make sure that if it is used in a relocation that the
4150 symbol will be in the output file. */
4151 if (get_is_linkonce_section (stdoutput
, sec
))
4153 symbolP
= symbol_new (name
, sec
, 0, frag
);
4154 S_CLEAR_EXTERNAL (symbolP
);
4155 /* symbolP->local = 1; */
4158 symbolP
= symbol_new (name
, sec
, 0, frag
);
4160 xtensa_add_literal_sym (symbolP
);
4167 /* Currently all literals that are generated here are 32-bit L32R targets. */
4170 xg_assemble_literal (/* const */ TInsn
*insn
)
4173 symbolS
*lit_sym
= NULL
;
4174 bfd_reloc_code_real_type reloc
;
4175 bfd_boolean pcrel
= FALSE
;
4178 /* size = 4 for L32R. It could easily be larger when we move to
4179 larger constants. Add a parameter later. */
4180 offsetT litsize
= 4;
4181 offsetT litalign
= 2; /* 2^2 = 4 */
4182 expressionS saved_loc
;
4183 expressionS
* emit_val
;
4185 set_expr_symbol_offset (&saved_loc
, frag_now
->fr_symbol
, frag_now_fix ());
4187 gas_assert (insn
->insn_type
== ITYPE_LITERAL
);
4188 gas_assert (insn
->ntok
== 1); /* must be only one token here */
4190 xtensa_switch_to_literal_fragment (&state
);
4192 emit_val
= &insn
->tok
[0];
4193 if (emit_val
->X_op
== O_big
)
4195 int size
= emit_val
->X_add_number
* CHARS_PER_LITTLENUM
;
4198 /* This happens when someone writes a "movi a2, big_number". */
4199 as_bad_where (frag_now
->fr_file
, frag_now
->fr_line
,
4200 _("invalid immediate"));
4201 xtensa_restore_emit_state (&state
);
4206 /* Force a 4-byte align here. Note that this opens a new frag, so all
4207 literals done with this function have a frag to themselves. That's
4208 important for the way text section literals work. */
4209 frag_align (litalign
, 0, 0);
4210 record_alignment (now_seg
, litalign
);
4212 switch (emit_val
->X_op
)
4222 p
= frag_more (litsize
);
4223 xtensa_set_frag_assembly_state (frag_now
);
4224 reloc
= map_operator_to_reloc (emit_val
->X_op
, TRUE
);
4225 if (emit_val
->X_add_symbol
)
4226 emit_val
->X_op
= O_symbol
;
4228 emit_val
->X_op
= O_constant
;
4229 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
,
4230 litsize
, emit_val
, pcrel
, reloc
);
4234 emit_expr (emit_val
, litsize
);
4238 gas_assert (frag_now
->tc_frag_data
.literal_frag
== NULL
);
4239 frag_now
->tc_frag_data
.literal_frag
= get_literal_pool_location (now_seg
);
4240 frag_now
->fr_symbol
= xtensa_create_literal_symbol (now_seg
, frag_now
);
4241 lit_sym
= frag_now
->fr_symbol
;
4244 xtensa_restore_emit_state (&state
);
4250 xg_assemble_literal_space (/* const */ int size
, int slot
)
4253 /* We might have to do something about this alignment. It only
4254 takes effect if something is placed here. */
4255 offsetT litalign
= 2; /* 2^2 = 4 */
4256 fragS
*lit_saved_frag
;
4258 gas_assert (size
% 4 == 0);
4260 xtensa_switch_to_literal_fragment (&state
);
4262 /* Force a 4-byte align here. */
4263 frag_align (litalign
, 0, 0);
4264 record_alignment (now_seg
, litalign
);
4268 lit_saved_frag
= frag_now
;
4269 frag_now
->tc_frag_data
.literal_frag
= get_literal_pool_location (now_seg
);
4270 frag_now
->fr_symbol
= xtensa_create_literal_symbol (now_seg
, frag_now
);
4271 xg_finish_frag (0, RELAX_LITERAL
, 0, size
, FALSE
);
4274 xtensa_restore_emit_state (&state
);
4275 frag_now
->tc_frag_data
.literal_frags
[slot
] = lit_saved_frag
;
4279 /* Put in a fixup record based on the opcode.
4280 Return TRUE on success. */
4283 xg_add_opcode_fix (TInsn
*tinsn
,
4291 xtensa_opcode opcode
= tinsn
->opcode
;
4292 bfd_reloc_code_real_type reloc
;
4293 reloc_howto_type
*howto
;
4297 reloc
= BFD_RELOC_NONE
;
4299 /* First try the special cases for "alternate" relocs. */
4300 if (opcode
== xtensa_l32r_opcode
)
4302 if (fragP
->tc_frag_data
.use_absolute_literals
)
4303 reloc
= encode_alt_reloc (slot
);
4305 else if (opcode
== xtensa_const16_opcode
)
4307 if (exp
->X_op
== O_lo16
)
4309 reloc
= encode_reloc (slot
);
4310 exp
->X_op
= O_symbol
;
4312 else if (exp
->X_op
== O_hi16
)
4314 reloc
= encode_alt_reloc (slot
);
4315 exp
->X_op
= O_symbol
;
4319 if (opnum
!= get_relaxable_immed (opcode
))
4321 as_bad (_("invalid relocation for operand %i of '%s'"),
4322 opnum
+ 1, xtensa_opcode_name (xtensa_default_isa
, opcode
));
4326 /* Handle erroneous "@h" and "@l" expressions here before they propagate
4327 into the symbol table where the generic portions of the assembler
4328 won't know what to do with them. */
4329 if (exp
->X_op
== O_lo16
|| exp
->X_op
== O_hi16
)
4331 as_bad (_("invalid expression for operand %i of '%s'"),
4332 opnum
+ 1, xtensa_opcode_name (xtensa_default_isa
, opcode
));
4336 /* Next try the generic relocs. */
4337 if (reloc
== BFD_RELOC_NONE
)
4338 reloc
= encode_reloc (slot
);
4339 if (reloc
== BFD_RELOC_NONE
)
4341 as_bad (_("invalid relocation in instruction slot %i"), slot
);
4345 howto
= bfd_reloc_type_lookup (stdoutput
, reloc
);
4348 as_bad (_("undefined symbol for opcode \"%s\""),
4349 xtensa_opcode_name (xtensa_default_isa
, opcode
));
4353 fmt_length
= xtensa_format_length (xtensa_default_isa
, fmt
);
4354 the_fix
= fix_new_exp (fragP
, offset
, fmt_length
, exp
,
4355 howto
->pc_relative
, reloc
);
4356 the_fix
->fx_no_overflow
= 1;
4357 the_fix
->tc_fix_data
.X_add_symbol
= exp
->X_add_symbol
;
4358 the_fix
->tc_fix_data
.X_add_number
= exp
->X_add_number
;
4359 the_fix
->tc_fix_data
.slot
= slot
;
4366 xg_emit_insn_to_buf (TInsn
*tinsn
,
4370 bfd_boolean build_fix
)
4372 static xtensa_insnbuf insnbuf
= NULL
;
4373 bfd_boolean has_symbolic_immed
= FALSE
;
4374 bfd_boolean ok
= TRUE
;
4377 insnbuf
= xtensa_insnbuf_alloc (xtensa_default_isa
);
4379 has_symbolic_immed
= tinsn_to_insnbuf (tinsn
, insnbuf
);
4380 if (has_symbolic_immed
&& build_fix
)
4383 xtensa_format fmt
= xg_get_single_format (tinsn
->opcode
);
4384 int slot
= xg_get_single_slot (tinsn
->opcode
);
4385 int opnum
= get_relaxable_immed (tinsn
->opcode
);
4386 expressionS
*exp
= &tinsn
->tok
[opnum
];
4388 if (!xg_add_opcode_fix (tinsn
, opnum
, fmt
, slot
, exp
, fragP
, offset
))
4391 fragP
->tc_frag_data
.is_insn
= TRUE
;
4392 xtensa_insnbuf_to_chars (xtensa_default_isa
, insnbuf
,
4393 (unsigned char *) buf
, 0);
4399 xg_resolve_literals (TInsn
*insn
, symbolS
*lit_sym
)
4401 symbolS
*sym
= get_special_literal_symbol ();
4405 gas_assert (insn
->insn_type
== ITYPE_INSN
);
4406 for (i
= 0; i
< insn
->ntok
; i
++)
4407 if (insn
->tok
[i
].X_add_symbol
== sym
)
4408 insn
->tok
[i
].X_add_symbol
= lit_sym
;
4414 xg_resolve_labels (TInsn
*insn
, symbolS
*label_sym
)
4416 symbolS
*sym
= get_special_label_symbol ();
4418 for (i
= 0; i
< insn
->ntok
; i
++)
4419 if (insn
->tok
[i
].X_add_symbol
== sym
)
4420 insn
->tok
[i
].X_add_symbol
= label_sym
;
4425 /* Return TRUE if the instruction can write to the specified
4426 integer register. */
4429 is_register_writer (const TInsn
*insn
, const char *regset
, int regnum
)
4433 xtensa_isa isa
= xtensa_default_isa
;
4435 num_ops
= xtensa_opcode_num_operands (isa
, insn
->opcode
);
4437 for (i
= 0; i
< num_ops
; i
++)
4440 inout
= xtensa_operand_inout (isa
, insn
->opcode
, i
);
4441 if ((inout
== 'o' || inout
== 'm')
4442 && xtensa_operand_is_register (isa
, insn
->opcode
, i
) == 1)
4444 xtensa_regfile opnd_rf
=
4445 xtensa_operand_regfile (isa
, insn
->opcode
, i
);
4446 if (!strcmp (xtensa_regfile_shortname (isa
, opnd_rf
), regset
))
4448 if ((insn
->tok
[i
].X_op
== O_register
)
4449 && (insn
->tok
[i
].X_add_number
== regnum
))
4459 is_bad_loopend_opcode (const TInsn
*tinsn
)
4461 xtensa_opcode opcode
= tinsn
->opcode
;
4463 if (opcode
== XTENSA_UNDEFINED
)
4466 if (opcode
== xtensa_call0_opcode
4467 || opcode
== xtensa_callx0_opcode
4468 || opcode
== xtensa_call4_opcode
4469 || opcode
== xtensa_callx4_opcode
4470 || opcode
== xtensa_call8_opcode
4471 || opcode
== xtensa_callx8_opcode
4472 || opcode
== xtensa_call12_opcode
4473 || opcode
== xtensa_callx12_opcode
4474 || opcode
== xtensa_isync_opcode
4475 || opcode
== xtensa_ret_opcode
4476 || opcode
== xtensa_ret_n_opcode
4477 || opcode
== xtensa_retw_opcode
4478 || opcode
== xtensa_retw_n_opcode
4479 || opcode
== xtensa_waiti_opcode
4480 || opcode
== xtensa_rsr_lcount_opcode
)
4487 /* Labels that begin with ".Ln" or ".LM" are unaligned.
4488 This allows the debugger to add unaligned labels.
4489 Also, the assembler generates stabs labels that need
4490 not be aligned: FAKE_LABEL_NAME . {"F", "L", "endfunc"}. */
4493 is_unaligned_label (symbolS
*sym
)
4495 const char *name
= S_GET_NAME (sym
);
4496 static size_t fake_size
= 0;
4500 && name
[1] == 'L' && (name
[2] == 'n' || name
[2] == 'M'))
4503 /* FAKE_LABEL_NAME followed by "F", "L" or "endfunc" */
4505 fake_size
= strlen (FAKE_LABEL_NAME
);
4508 && strncmp (FAKE_LABEL_NAME
, name
, fake_size
) == 0
4509 && (name
[fake_size
] == 'F'
4510 || name
[fake_size
] == 'L'
4511 || (name
[fake_size
] == 'e'
4512 && strncmp ("endfunc", name
+fake_size
, 7) == 0)))
4520 next_non_empty_frag (const fragS
*fragP
)
4522 fragS
*next_fragP
= fragP
->fr_next
;
4524 /* Sometimes an empty will end up here due storage allocation issues.
4525 So we have to skip until we find something legit. */
4526 while (next_fragP
&& next_fragP
->fr_fix
== 0)
4527 next_fragP
= next_fragP
->fr_next
;
4529 if (next_fragP
== NULL
|| next_fragP
->fr_fix
== 0)
4537 next_frag_opcode_is_loop (const fragS
*fragP
, xtensa_opcode
*opcode
)
4539 xtensa_opcode out_opcode
;
4540 const fragS
*next_fragP
= next_non_empty_frag (fragP
);
4542 if (next_fragP
== NULL
)
4545 out_opcode
= get_opcode_from_buf (next_fragP
->fr_literal
, 0);
4546 if (xtensa_opcode_is_loop (xtensa_default_isa
, out_opcode
) == 1)
4548 *opcode
= out_opcode
;
4556 frag_format_size (const fragS
*fragP
)
4558 static xtensa_insnbuf insnbuf
= NULL
;
4559 xtensa_isa isa
= xtensa_default_isa
;
4564 insnbuf
= xtensa_insnbuf_alloc (isa
);
4567 return XTENSA_UNDEFINED
;
4569 xtensa_insnbuf_from_chars (isa
, insnbuf
,
4570 (unsigned char *) fragP
->fr_literal
, 0);
4572 fmt
= xtensa_format_decode (isa
, insnbuf
);
4573 if (fmt
== XTENSA_UNDEFINED
)
4574 return XTENSA_UNDEFINED
;
4575 fmt_size
= xtensa_format_length (isa
, fmt
);
4577 /* If the next format won't be changing due to relaxation, just
4578 return the length of the first format. */
4579 if (fragP
->fr_opcode
!= fragP
->fr_literal
)
4582 /* If during relaxation we have to pull an instruction out of a
4583 multi-slot instruction, we will return the more conservative
4584 number. This works because alignment on bigger instructions
4585 is more restrictive than alignment on smaller instructions.
4586 This is more conservative than we would like, but it happens
4589 if (xtensa_format_num_slots (xtensa_default_isa
, fmt
) > 1)
4592 /* If we aren't doing one of our own relaxations or it isn't
4593 slot-based, then the insn size won't change. */
4594 if (fragP
->fr_type
!= rs_machine_dependent
)
4596 if (fragP
->fr_subtype
!= RELAX_SLOTS
)
4599 /* If an instruction is about to grow, return the longer size. */
4600 if (fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_IMMED_STEP1
4601 || fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_IMMED_STEP2
4602 || fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_IMMED_STEP3
)
4604 /* For most frags at RELAX_IMMED_STEPX, with X > 0, the first
4605 instruction in the relaxed version is of length 3. (The case
4606 where we have to pull the instruction out of a FLIX bundle
4607 is handled conservatively above.) However, frags with opcodes
4608 that are expanding to wide branches end up having formats that
4609 are not determinable by the RELAX_IMMED_STEPX enumeration, and
4610 we can't tell directly what format the relaxer picked. This
4611 is a wart in the design of the relaxer that should someday be
4612 fixed, but would require major changes, or at least should
4613 be accompanied by major changes to make use of that data.
4615 In any event, we can tell that we are expanding from a single-slot
4616 format to a wider one with the logic below. */
4619 int relaxed_size
= fmt_size
+ fragP
->tc_frag_data
.text_expansion
[0];
4621 for (i
= 0; i
< xtensa_isa_num_formats (isa
); i
++)
4623 if (relaxed_size
== xtensa_format_length (isa
, i
))
4624 return relaxed_size
;
4630 if (fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_NARROW
)
4631 return 2 + fragP
->tc_frag_data
.text_expansion
[0];
4638 next_frag_format_size (const fragS
*fragP
)
4640 const fragS
*next_fragP
= next_non_empty_frag (fragP
);
4641 return frag_format_size (next_fragP
);
4645 /* In early Xtensa Processors, for reasons that are unclear, the ISA
4646 required two-byte instructions to be treated as three-byte instructions
4647 for loop instruction alignment. This restriction was removed beginning
4648 with Xtensa LX. Now the only requirement on loop instruction alignment
4649 is that the first instruction of the loop must appear at an address that
4650 does not cross a fetch boundary. */
4653 get_loop_align_size (int insn_size
)
4655 if (insn_size
== XTENSA_UNDEFINED
)
4656 return xtensa_fetch_width
;
4658 if (enforce_three_byte_loop_align
&& insn_size
== 2)
4665 /* If the next legit fragment is an end-of-loop marker,
4666 switch its state so it will instantiate a NOP. */
4669 update_next_frag_state (fragS
*fragP
)
4671 fragS
*next_fragP
= fragP
->fr_next
;
4672 fragS
*new_target
= NULL
;
4676 /* We are guaranteed there will be one of these... */
4677 while (!(next_fragP
->fr_type
== rs_machine_dependent
4678 && (next_fragP
->fr_subtype
== RELAX_MAYBE_UNREACHABLE
4679 || next_fragP
->fr_subtype
== RELAX_UNREACHABLE
)))
4680 next_fragP
= next_fragP
->fr_next
;
4682 gas_assert (next_fragP
->fr_type
== rs_machine_dependent
4683 && (next_fragP
->fr_subtype
== RELAX_MAYBE_UNREACHABLE
4684 || next_fragP
->fr_subtype
== RELAX_UNREACHABLE
));
4686 /* ...and one of these. */
4687 new_target
= next_fragP
->fr_next
;
4688 while (!(new_target
->fr_type
== rs_machine_dependent
4689 && (new_target
->fr_subtype
== RELAX_MAYBE_DESIRE_ALIGN
4690 || new_target
->fr_subtype
== RELAX_DESIRE_ALIGN
)))
4691 new_target
= new_target
->fr_next
;
4693 gas_assert (new_target
->fr_type
== rs_machine_dependent
4694 && (new_target
->fr_subtype
== RELAX_MAYBE_DESIRE_ALIGN
4695 || new_target
->fr_subtype
== RELAX_DESIRE_ALIGN
));
4698 while (next_fragP
&& next_fragP
->fr_fix
== 0)
4700 if (next_fragP
->fr_type
== rs_machine_dependent
4701 && next_fragP
->fr_subtype
== RELAX_LOOP_END
)
4703 next_fragP
->fr_subtype
= RELAX_LOOP_END_ADD_NOP
;
4707 next_fragP
= next_fragP
->fr_next
;
4713 next_frag_is_branch_target (const fragS
*fragP
)
4715 /* Sometimes an empty will end up here due to storage allocation issues,
4716 so we have to skip until we find something legit. */
4717 for (fragP
= fragP
->fr_next
; fragP
; fragP
= fragP
->fr_next
)
4719 if (fragP
->tc_frag_data
.is_branch_target
)
4721 if (fragP
->fr_fix
!= 0)
4729 next_frag_is_loop_target (const fragS
*fragP
)
4731 /* Sometimes an empty will end up here due storage allocation issues.
4732 So we have to skip until we find something legit. */
4733 for (fragP
= fragP
->fr_next
; fragP
; fragP
= fragP
->fr_next
)
4735 if (fragP
->tc_frag_data
.is_loop_target
)
4737 if (fragP
->fr_fix
!= 0)
4744 /* As specified in the relaxation table, when a loop instruction is
4745 relaxed, there are 24 bytes between the loop instruction itself and
4746 the first instruction in the loop. */
4748 #define RELAXED_LOOP_INSN_BYTES 24
4751 next_frag_pre_opcode_bytes (const fragS
*fragp
)
4753 const fragS
*next_fragp
= fragp
->fr_next
;
4754 xtensa_opcode next_opcode
;
4756 if (!next_frag_opcode_is_loop (fragp
, &next_opcode
))
4759 /* Sometimes an empty will end up here due to storage allocation issues,
4760 so we have to skip until we find something legit. */
4761 while (next_fragp
->fr_fix
== 0)
4762 next_fragp
= next_fragp
->fr_next
;
4764 if (next_fragp
->fr_type
!= rs_machine_dependent
)
4767 /* There is some implicit knowledge encoded in here.
4768 The LOOP instructions that are NOT RELAX_IMMED have
4769 been relaxed. Note that we can assume that the LOOP
4770 instruction is in slot 0 because loops aren't bundleable. */
4771 if (next_fragp
->tc_frag_data
.slot_subtypes
[0] > RELAX_IMMED
)
4772 return get_expanded_loop_offset (next_opcode
) + RELAXED_LOOP_INSN_BYTES
;
4778 /* Mark a location where we can later insert literal frags. Update
4779 the section's literal_pool_loc, so subsequent literals can be
4780 placed nearest to their use. */
4783 xtensa_mark_literal_pool_location (void)
4785 /* Any labels pointing to the current location need
4786 to be adjusted to after the literal pool. */
4788 fragS
*pool_location
;
4790 if (use_literal_section
)
4793 /* We stash info in these frags so we can later move the literal's
4794 fixes into this frchain's fix list. */
4795 pool_location
= frag_now
;
4796 frag_now
->tc_frag_data
.lit_frchain
= frchain_now
;
4797 frag_now
->tc_frag_data
.literal_frag
= frag_now
;
4798 /* Just record this frag. */
4799 xtensa_maybe_create_literal_pool_frag (FALSE
, FALSE
);
4800 frag_variant (rs_machine_dependent
, 0, 0,
4801 RELAX_LITERAL_POOL_BEGIN
, NULL
, 0, NULL
);
4802 xtensa_set_frag_assembly_state (frag_now
);
4803 frag_now
->tc_frag_data
.lit_seg
= now_seg
;
4804 frag_variant (rs_machine_dependent
, 0, 0,
4805 RELAX_LITERAL_POOL_END
, NULL
, 0, NULL
);
4806 xtensa_set_frag_assembly_state (frag_now
);
4808 /* Now put a frag into the literal pool that points to this location. */
4809 set_literal_pool_location (now_seg
, pool_location
);
4810 xtensa_switch_to_non_abs_literal_fragment (&s
);
4811 frag_align (2, 0, 0);
4812 record_alignment (now_seg
, 2);
4814 /* Close whatever frag is there. */
4815 frag_variant (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
4816 xtensa_set_frag_assembly_state (frag_now
);
4817 frag_now
->tc_frag_data
.literal_frag
= pool_location
;
4818 frag_variant (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
4819 xtensa_restore_emit_state (&s
);
4820 xtensa_set_frag_assembly_state (frag_now
);
4824 /* Build a nop of the correct size into tinsn. */
4827 build_nop (TInsn
*tinsn
, int size
)
4833 tinsn
->opcode
= xtensa_nop_n_opcode
;
4835 if (tinsn
->opcode
== XTENSA_UNDEFINED
)
4836 as_fatal (_("opcode 'NOP.N' unavailable in this configuration"));
4840 if (xtensa_nop_opcode
== XTENSA_UNDEFINED
)
4842 tinsn
->opcode
= xtensa_or_opcode
;
4843 set_expr_const (&tinsn
->tok
[0], 1);
4844 set_expr_const (&tinsn
->tok
[1], 1);
4845 set_expr_const (&tinsn
->tok
[2], 1);
4849 tinsn
->opcode
= xtensa_nop_opcode
;
4851 gas_assert (tinsn
->opcode
!= XTENSA_UNDEFINED
);
4856 /* Assemble a NOP of the requested size in the buffer. User must have
4857 allocated "buf" with at least "size" bytes. */
4860 assemble_nop (int size
, char *buf
)
4862 static xtensa_insnbuf insnbuf
= NULL
;
4865 build_nop (&tinsn
, size
);
4868 insnbuf
= xtensa_insnbuf_alloc (xtensa_default_isa
);
4870 tinsn_to_insnbuf (&tinsn
, insnbuf
);
4871 xtensa_insnbuf_to_chars (xtensa_default_isa
, insnbuf
,
4872 (unsigned char *) buf
, 0);
4876 /* Return the number of bytes for the offset of the expanded loop
4877 instruction. This should be incorporated into the relaxation
4878 specification but is hard-coded here. This is used to auto-align
4879 the loop instruction. It is invalid to call this function if the
4880 configuration does not have loops or if the opcode is not a loop
4884 get_expanded_loop_offset (xtensa_opcode opcode
)
4886 /* This is the OFFSET of the loop instruction in the expanded loop.
4887 This MUST correspond directly to the specification of the loop
4888 expansion. It will be validated on fragment conversion. */
4889 gas_assert (opcode
!= XTENSA_UNDEFINED
);
4890 if (opcode
== xtensa_loop_opcode
)
4892 if (opcode
== xtensa_loopnez_opcode
)
4894 if (opcode
== xtensa_loopgtz_opcode
)
4896 as_fatal (_("get_expanded_loop_offset: invalid opcode"));
4902 get_literal_pool_location (segT seg
)
4904 struct litpool_seg
*lps
= litpool_seg_list
.next
;
4905 struct litpool_frag
*lpf
;
4906 for ( ; lps
&& lps
->seg
->id
!= seg
->id
; lps
= lps
->next
)
4910 for (lpf
= lps
->frag_list
.prev
; lpf
->fragP
; lpf
= lpf
->prev
)
4911 { /* Skip "candidates" for now. */
4912 if (lpf
->fragP
->fr_subtype
== RELAX_LITERAL_POOL_BEGIN
&&
4916 /* Must convert a lower-priority pool. */
4917 for (lpf
= lps
->frag_list
.prev
; lpf
->fragP
; lpf
= lpf
->prev
)
4919 if (lpf
->fragP
->fr_subtype
== RELAX_LITERAL_POOL_BEGIN
)
4922 /* Still no match -- try for a low priority pool. */
4923 for (lpf
= lps
->frag_list
.prev
; lpf
->fragP
; lpf
= lpf
->prev
)
4925 if (lpf
->fragP
->fr_subtype
== RELAX_LITERAL_POOL_CANDIDATE_BEGIN
)
4929 return seg_info (seg
)->tc_segment_info_data
.literal_pool_loc
;
4934 set_literal_pool_location (segT seg
, fragS
*literal_pool_loc
)
4936 seg_info (seg
)->tc_segment_info_data
.literal_pool_loc
= literal_pool_loc
;
4940 /* Set frag assembly state should be called when a new frag is
4941 opened and after a frag has been closed. */
4944 xtensa_set_frag_assembly_state (fragS
*fragP
)
4946 if (!density_supported
)
4947 fragP
->tc_frag_data
.is_no_density
= TRUE
;
4949 /* This function is called from subsegs_finish, which is called
4950 after xtensa_end, so we can't use "use_transform" or
4951 "use_schedule" here. */
4952 if (!directive_state
[directive_transform
])
4953 fragP
->tc_frag_data
.is_no_transform
= TRUE
;
4954 if (directive_state
[directive_longcalls
])
4955 fragP
->tc_frag_data
.use_longcalls
= TRUE
;
4956 fragP
->tc_frag_data
.use_absolute_literals
=
4957 directive_state
[directive_absolute_literals
];
4958 fragP
->tc_frag_data
.is_assembly_state_set
= TRUE
;
4963 relaxable_section (asection
*sec
)
4965 return ((sec
->flags
& SEC_DEBUGGING
) == 0
4966 && strcmp (sec
->name
, ".eh_frame") != 0);
4971 xtensa_mark_frags_for_org (void)
4975 /* Walk over each fragment of all of the current segments. If we find
4976 a .org frag in any of the segments, mark all frags prior to it as
4977 "no transform", which will prevent linker optimizations from messing
4978 up the .org distance. This should be done after
4979 xtensa_find_unmarked_state_frags, because we don't want to worry here
4980 about that function trashing the data we save here. */
4982 for (seclist
= &stdoutput
->sections
;
4983 seclist
&& *seclist
;
4984 seclist
= &(*seclist
)->next
)
4986 segT sec
= *seclist
;
4987 segment_info_type
*seginfo
;
4990 flags
= bfd_get_section_flags (stdoutput
, sec
);
4991 if (flags
& SEC_DEBUGGING
)
4993 if (!(flags
& SEC_ALLOC
))
4996 seginfo
= seg_info (sec
);
4997 if (seginfo
&& seginfo
->frchainP
)
4999 fragS
*last_fragP
= seginfo
->frchainP
->frch_root
;
5000 for (fragP
= seginfo
->frchainP
->frch_root
; fragP
;
5001 fragP
= fragP
->fr_next
)
5003 /* cvt_frag_to_fill has changed the fr_type of org frags to
5004 rs_fill, so use the value as cached in rs_subtype here. */
5005 if (fragP
->fr_subtype
== RELAX_ORG
)
5007 while (last_fragP
!= fragP
->fr_next
)
5009 last_fragP
->tc_frag_data
.is_no_transform
= TRUE
;
5010 last_fragP
= last_fragP
->fr_next
;
5020 xtensa_find_unmarked_state_frags (void)
5024 /* Walk over each fragment of all of the current segments. For each
5025 unmarked fragment, mark it with the same info as the previous
5027 for (seclist
= &stdoutput
->sections
;
5028 seclist
&& *seclist
;
5029 seclist
= &(*seclist
)->next
)
5031 segT sec
= *seclist
;
5032 segment_info_type
*seginfo
;
5035 flags
= bfd_get_section_flags (stdoutput
, sec
);
5036 if (flags
& SEC_DEBUGGING
)
5038 if (!(flags
& SEC_ALLOC
))
5041 seginfo
= seg_info (sec
);
5042 if (seginfo
&& seginfo
->frchainP
)
5044 fragS
*last_fragP
= 0;
5045 for (fragP
= seginfo
->frchainP
->frch_root
; fragP
;
5046 fragP
= fragP
->fr_next
)
5048 if (fragP
->fr_fix
!= 0
5049 && !fragP
->tc_frag_data
.is_assembly_state_set
)
5051 if (last_fragP
== 0)
5053 as_warn_where (fragP
->fr_file
, fragP
->fr_line
,
5054 _("assembly state not set for first frag in section %s"),
5059 fragP
->tc_frag_data
.is_assembly_state_set
= TRUE
;
5060 fragP
->tc_frag_data
.is_no_density
=
5061 last_fragP
->tc_frag_data
.is_no_density
;
5062 fragP
->tc_frag_data
.is_no_transform
=
5063 last_fragP
->tc_frag_data
.is_no_transform
;
5064 fragP
->tc_frag_data
.use_longcalls
=
5065 last_fragP
->tc_frag_data
.use_longcalls
;
5066 fragP
->tc_frag_data
.use_absolute_literals
=
5067 last_fragP
->tc_frag_data
.use_absolute_literals
;
5070 if (fragP
->tc_frag_data
.is_assembly_state_set
)
5079 xtensa_find_unaligned_branch_targets (bfd
*abfd ATTRIBUTE_UNUSED
,
5081 void *unused ATTRIBUTE_UNUSED
)
5083 flagword flags
= bfd_get_section_flags (abfd
, sec
);
5084 segment_info_type
*seginfo
= seg_info (sec
);
5085 fragS
*frag
= seginfo
->frchainP
->frch_root
;
5087 if (flags
& SEC_CODE
)
5089 xtensa_isa isa
= xtensa_default_isa
;
5090 xtensa_insnbuf insnbuf
= xtensa_insnbuf_alloc (isa
);
5091 while (frag
!= NULL
)
5093 if (frag
->tc_frag_data
.is_branch_target
)
5096 addressT branch_align
, frag_addr
;
5099 xtensa_insnbuf_from_chars
5100 (isa
, insnbuf
, (unsigned char *) frag
->fr_literal
, 0);
5101 fmt
= xtensa_format_decode (isa
, insnbuf
);
5102 op_size
= xtensa_format_length (isa
, fmt
);
5103 branch_align
= 1 << branch_align_power (sec
);
5104 frag_addr
= frag
->fr_address
% branch_align
;
5105 if (frag_addr
+ op_size
> branch_align
)
5106 as_warn_where (frag
->fr_file
, frag
->fr_line
,
5107 _("unaligned branch target: %d bytes at 0x%lx"),
5108 op_size
, (long) frag
->fr_address
);
5110 frag
= frag
->fr_next
;
5112 xtensa_insnbuf_free (isa
, insnbuf
);
5118 xtensa_find_unaligned_loops (bfd
*abfd ATTRIBUTE_UNUSED
,
5120 void *unused ATTRIBUTE_UNUSED
)
5122 flagword flags
= bfd_get_section_flags (abfd
, sec
);
5123 segment_info_type
*seginfo
= seg_info (sec
);
5124 fragS
*frag
= seginfo
->frchainP
->frch_root
;
5125 xtensa_isa isa
= xtensa_default_isa
;
5127 if (flags
& SEC_CODE
)
5129 xtensa_insnbuf insnbuf
= xtensa_insnbuf_alloc (isa
);
5130 while (frag
!= NULL
)
5132 if (frag
->tc_frag_data
.is_first_loop_insn
)
5138 if (frag
->fr_fix
== 0)
5139 frag
= next_non_empty_frag (frag
);
5143 xtensa_insnbuf_from_chars
5144 (isa
, insnbuf
, (unsigned char *) frag
->fr_literal
, 0);
5145 fmt
= xtensa_format_decode (isa
, insnbuf
);
5146 op_size
= xtensa_format_length (isa
, fmt
);
5147 frag_addr
= frag
->fr_address
% xtensa_fetch_width
;
5149 if (frag_addr
+ op_size
> xtensa_fetch_width
)
5150 as_warn_where (frag
->fr_file
, frag
->fr_line
,
5151 _("unaligned loop: %d bytes at 0x%lx"),
5152 op_size
, (long) frag
->fr_address
);
5155 frag
= frag
->fr_next
;
5157 xtensa_insnbuf_free (isa
, insnbuf
);
5163 xg_apply_fix_value (fixS
*fixP
, valueT val
)
5165 xtensa_isa isa
= xtensa_default_isa
;
5166 static xtensa_insnbuf insnbuf
= NULL
;
5167 static xtensa_insnbuf slotbuf
= NULL
;
5170 bfd_boolean alt_reloc
;
5171 xtensa_opcode opcode
;
5172 char *const fixpos
= fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
;
5174 if (decode_reloc (fixP
->fx_r_type
, &slot
, &alt_reloc
)
5176 as_fatal (_("unexpected fix"));
5180 insnbuf
= xtensa_insnbuf_alloc (isa
);
5181 slotbuf
= xtensa_insnbuf_alloc (isa
);
5184 xtensa_insnbuf_from_chars (isa
, insnbuf
, (unsigned char *) fixpos
, 0);
5185 fmt
= xtensa_format_decode (isa
, insnbuf
);
5186 if (fmt
== XTENSA_UNDEFINED
)
5187 as_fatal (_("undecodable fix"));
5188 xtensa_format_get_slot (isa
, fmt
, slot
, insnbuf
, slotbuf
);
5189 opcode
= xtensa_opcode_decode (isa
, fmt
, slot
, slotbuf
);
5190 if (opcode
== XTENSA_UNDEFINED
)
5191 as_fatal (_("undecodable fix"));
5193 /* CONST16 immediates are not PC-relative, despite the fact that we
5194 reuse the normal PC-relative operand relocations for the low part
5195 of a CONST16 operand. */
5196 if (opcode
== xtensa_const16_opcode
)
5199 xtensa_insnbuf_set_operand (slotbuf
, fmt
, slot
, opcode
,
5200 get_relaxable_immed (opcode
), val
,
5201 fixP
->fx_file
, fixP
->fx_line
);
5203 xtensa_format_set_slot (isa
, fmt
, slot
, insnbuf
, slotbuf
);
5204 xtensa_insnbuf_to_chars (isa
, insnbuf
, (unsigned char *) fixpos
, 0);
5210 /* External Functions and Other GAS Hooks. */
5213 xtensa_target_format (void)
5215 return (target_big_endian
? "elf32-xtensa-be" : "elf32-xtensa-le");
5220 xtensa_file_arch_init (bfd
*abfd
)
5222 bfd_set_private_flags (abfd
, 0x100 | 0x200);
5227 md_number_to_chars (char *buf
, valueT val
, int n
)
5229 if (target_big_endian
)
5230 number_to_chars_bigendian (buf
, val
, n
);
5232 number_to_chars_littleendian (buf
, val
, n
);
5236 /* This function is called once, at assembler startup time. It should
5237 set up all the tables, etc. that the MD part of the assembler will
5243 segT current_section
= now_seg
;
5244 int current_subsec
= now_subseg
;
5248 xtensa_default_isa
= xtensa_isa_init (0, 0);
5249 isa
= xtensa_default_isa
;
5253 /* Set up the literal sections. */
5254 memset (&default_lit_sections
, 0, sizeof (default_lit_sections
));
5256 subseg_set (current_section
, current_subsec
);
5258 xtensa_addi_opcode
= xtensa_opcode_lookup (isa
, "addi");
5259 xtensa_addmi_opcode
= xtensa_opcode_lookup (isa
, "addmi");
5260 xtensa_call0_opcode
= xtensa_opcode_lookup (isa
, "call0");
5261 xtensa_call4_opcode
= xtensa_opcode_lookup (isa
, "call4");
5262 xtensa_call8_opcode
= xtensa_opcode_lookup (isa
, "call8");
5263 xtensa_call12_opcode
= xtensa_opcode_lookup (isa
, "call12");
5264 xtensa_callx0_opcode
= xtensa_opcode_lookup (isa
, "callx0");
5265 xtensa_callx4_opcode
= xtensa_opcode_lookup (isa
, "callx4");
5266 xtensa_callx8_opcode
= xtensa_opcode_lookup (isa
, "callx8");
5267 xtensa_callx12_opcode
= xtensa_opcode_lookup (isa
, "callx12");
5268 xtensa_const16_opcode
= xtensa_opcode_lookup (isa
, "const16");
5269 xtensa_entry_opcode
= xtensa_opcode_lookup (isa
, "entry");
5270 xtensa_extui_opcode
= xtensa_opcode_lookup (isa
, "extui");
5271 xtensa_movi_opcode
= xtensa_opcode_lookup (isa
, "movi");
5272 xtensa_movi_n_opcode
= xtensa_opcode_lookup (isa
, "movi.n");
5273 xtensa_isync_opcode
= xtensa_opcode_lookup (isa
, "isync");
5274 xtensa_j_opcode
= xtensa_opcode_lookup (isa
, "j");
5275 xtensa_jx_opcode
= xtensa_opcode_lookup (isa
, "jx");
5276 xtensa_l32r_opcode
= xtensa_opcode_lookup (isa
, "l32r");
5277 xtensa_loop_opcode
= xtensa_opcode_lookup (isa
, "loop");
5278 xtensa_loopnez_opcode
= xtensa_opcode_lookup (isa
, "loopnez");
5279 xtensa_loopgtz_opcode
= xtensa_opcode_lookup (isa
, "loopgtz");
5280 xtensa_nop_opcode
= xtensa_opcode_lookup (isa
, "nop");
5281 xtensa_nop_n_opcode
= xtensa_opcode_lookup (isa
, "nop.n");
5282 xtensa_or_opcode
= xtensa_opcode_lookup (isa
, "or");
5283 xtensa_ret_opcode
= xtensa_opcode_lookup (isa
, "ret");
5284 xtensa_ret_n_opcode
= xtensa_opcode_lookup (isa
, "ret.n");
5285 xtensa_retw_opcode
= xtensa_opcode_lookup (isa
, "retw");
5286 xtensa_retw_n_opcode
= xtensa_opcode_lookup (isa
, "retw.n");
5287 xtensa_rsr_lcount_opcode
= xtensa_opcode_lookup (isa
, "rsr.lcount");
5288 xtensa_waiti_opcode
= xtensa_opcode_lookup (isa
, "waiti");
5290 for (i
= 0; i
< xtensa_isa_num_formats (isa
); i
++)
5292 int format_slots
= xtensa_format_num_slots (isa
, i
);
5293 if (format_slots
> config_max_slots
)
5294 config_max_slots
= format_slots
;
5297 xg_init_vinsn (&cur_vinsn
);
5299 xtensa_num_pipe_stages
= xtensa_isa_num_pipe_stages (isa
);
5301 init_op_placement_info_table ();
5303 /* Set up the assembly state. */
5304 if (!frag_now
->tc_frag_data
.is_assembly_state_set
)
5305 xtensa_set_frag_assembly_state (frag_now
);
5309 /* TC_INIT_FIX_DATA hook */
5312 xtensa_init_fix_data (fixS
*x
)
5314 x
->tc_fix_data
.slot
= 0;
5315 x
->tc_fix_data
.X_add_symbol
= NULL
;
5316 x
->tc_fix_data
.X_add_number
= 0;
5320 /* tc_frob_label hook */
5323 xtensa_frob_label (symbolS
*sym
)
5327 if (cur_vinsn
.inside_bundle
)
5329 as_bad (_("labels are not valid inside bundles"));
5333 freq
= get_subseg_target_freq (now_seg
, now_subseg
);
5335 /* Since the label was already attached to a frag associated with the
5336 previous basic block, it now needs to be reset to the current frag. */
5337 symbol_set_frag (sym
, frag_now
);
5338 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
5340 if (generating_literals
)
5341 xtensa_add_literal_sym (sym
);
5343 xtensa_add_insn_label (sym
);
5345 if (symbol_get_tc (sym
)->is_loop_target
)
5347 if ((get_last_insn_flags (now_seg
, now_subseg
)
5348 & FLAG_IS_BAD_LOOPEND
) != 0)
5349 as_bad (_("invalid last instruction for a zero-overhead loop"));
5351 xtensa_set_frag_assembly_state (frag_now
);
5352 frag_var (rs_machine_dependent
, 4, 4, RELAX_LOOP_END
,
5353 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
5355 xtensa_set_frag_assembly_state (frag_now
);
5356 xtensa_move_labels (frag_now
, 0);
5359 /* No target aligning in the absolute section. */
5360 if (now_seg
!= absolute_section
5361 && !is_unaligned_label (sym
)
5362 && !generating_literals
)
5364 xtensa_set_frag_assembly_state (frag_now
);
5366 if (do_align_targets ())
5367 frag_var (rs_machine_dependent
, 0, (int) freq
,
5368 RELAX_DESIRE_ALIGN_IF_TARGET
, frag_now
->fr_symbol
,
5369 frag_now
->fr_offset
, NULL
);
5371 frag_var (rs_fill
, 0, 0, frag_now
->fr_subtype
,
5372 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
5373 xtensa_set_frag_assembly_state (frag_now
);
5374 xtensa_move_labels (frag_now
, 0);
5377 /* We need to mark the following properties even if we aren't aligning. */
5379 /* If the label is already known to be a branch target, i.e., a
5380 forward branch, mark the frag accordingly. Backward branches
5381 are handled by xg_add_branch_and_loop_targets. */
5382 if (symbol_get_tc (sym
)->is_branch_target
)
5383 symbol_get_frag (sym
)->tc_frag_data
.is_branch_target
= TRUE
;
5385 /* Loops only go forward, so they can be identified here. */
5386 if (symbol_get_tc (sym
)->is_loop_target
)
5387 symbol_get_frag (sym
)->tc_frag_data
.is_loop_target
= TRUE
;
5389 dwarf2_emit_label (sym
);
5393 /* tc_unrecognized_line hook */
5396 xtensa_unrecognized_line (int ch
)
5401 if (cur_vinsn
.inside_bundle
== 0)
5403 /* PR8110: Cannot emit line number info inside a FLIX bundle
5404 when using --gstabs. Temporarily disable debug info. */
5405 generate_lineno_debug ();
5406 if (debug_type
== DEBUG_STABS
)
5408 xt_saved_debug_type
= debug_type
;
5409 debug_type
= DEBUG_NONE
;
5412 cur_vinsn
.inside_bundle
= 1;
5416 as_bad (_("extra opening brace"));
5422 if (cur_vinsn
.inside_bundle
)
5423 finish_vinsn (&cur_vinsn
);
5426 as_bad (_("extra closing brace"));
5431 as_bad (_("syntax error"));
5438 /* md_flush_pending_output hook */
5441 xtensa_flush_pending_output (void)
5443 /* This line fixes a bug where automatically generated gstabs info
5444 separates a function label from its entry instruction, ending up
5445 with the literal position between the function label and the entry
5446 instruction and crashing code. It only happens with --gstabs and
5447 --text-section-literals, and when several other obscure relaxation
5448 conditions are met. */
5449 if (outputting_stabs_line_debug
)
5452 if (cur_vinsn
.inside_bundle
)
5453 as_bad (_("missing closing brace"));
5455 /* If there is a non-zero instruction fragment, close it. */
5456 if (frag_now_fix () != 0 && frag_now
->tc_frag_data
.is_insn
)
5458 frag_wane (frag_now
);
5460 xtensa_set_frag_assembly_state (frag_now
);
5462 frag_now
->tc_frag_data
.is_insn
= FALSE
;
5464 xtensa_clear_insn_labels ();
5468 /* We had an error while parsing an instruction. The string might look
5469 like this: "insn arg1, arg2 }". If so, we need to see the closing
5470 brace and reset some fields. Otherwise, the vinsn never gets closed
5471 and the num_slots field will grow past the end of the array of slots,
5472 and bad things happen. */
5475 error_reset_cur_vinsn (void)
5477 if (cur_vinsn
.inside_bundle
)
5479 if (*input_line_pointer
== '}'
5480 || *(input_line_pointer
- 1) == '}'
5481 || *(input_line_pointer
- 2) == '}')
5482 xg_clear_vinsn (&cur_vinsn
);
5488 md_assemble (char *str
)
5490 xtensa_isa isa
= xtensa_default_isa
;
5493 bfd_boolean has_underbar
= FALSE
;
5494 char *arg_strings
[MAX_INSN_ARGS
];
5496 TInsn orig_insn
; /* Original instruction from the input. */
5498 tinsn_init (&orig_insn
);
5500 /* Split off the opcode. */
5501 opnamelen
= strspn (str
, "abcdefghijklmnopqrstuvwxyz_/0123456789.");
5502 opname
= xmalloc (opnamelen
+ 1);
5503 memcpy (opname
, str
, opnamelen
);
5504 opname
[opnamelen
] = '\0';
5506 num_args
= tokenize_arguments (arg_strings
, str
+ opnamelen
);
5509 as_bad (_("syntax error"));
5513 if (xg_translate_idioms (&opname
, &num_args
, arg_strings
))
5516 /* Check for an underbar prefix. */
5519 has_underbar
= TRUE
;
5523 orig_insn
.insn_type
= ITYPE_INSN
;
5525 orig_insn
.is_specific_opcode
= (has_underbar
|| !use_transform ());
5526 orig_insn
.opcode
= xtensa_opcode_lookup (isa
, opname
);
5528 /* Special case: Check for "CALLXn.TLS" psuedo op. If found, grab its
5529 extra argument and set the opcode to "CALLXn". */
5530 if (orig_insn
.opcode
== XTENSA_UNDEFINED
5531 && strncasecmp (opname
, "callx", 5) == 0)
5533 unsigned long window_size
;
5536 window_size
= strtoul (opname
+ 5, &suffix
, 10);
5537 if (suffix
!= opname
+ 5
5538 && (window_size
== 0
5541 || window_size
== 12)
5542 && strcasecmp (suffix
, ".tls") == 0)
5544 switch (window_size
)
5546 case 0: orig_insn
.opcode
= xtensa_callx0_opcode
; break;
5547 case 4: orig_insn
.opcode
= xtensa_callx4_opcode
; break;
5548 case 8: orig_insn
.opcode
= xtensa_callx8_opcode
; break;
5549 case 12: orig_insn
.opcode
= xtensa_callx12_opcode
; break;
5553 as_bad (_("wrong number of operands for '%s'"), opname
);
5556 bfd_reloc_code_real_type reloc
;
5557 char *old_input_line_pointer
;
5558 expressionS
*tok
= &orig_insn
.extra_arg
;
5560 old_input_line_pointer
= input_line_pointer
;
5561 input_line_pointer
= arg_strings
[num_args
- 1];
5564 if (tok
->X_op
== O_symbol
5565 && ((reloc
= xtensa_elf_suffix (&input_line_pointer
, tok
))
5566 == BFD_RELOC_XTENSA_TLS_CALL
))
5567 tok
->X_op
= map_suffix_reloc_to_operator (reloc
);
5569 as_bad (_("bad relocation expression for '%s'"), opname
);
5571 input_line_pointer
= old_input_line_pointer
;
5577 /* Special case: Check for "j.l" psuedo op. */
5578 if (orig_insn
.opcode
== XTENSA_UNDEFINED
5579 && strncasecmp (opname
, "j.l", 3) == 0)
5582 as_bad (_("wrong number of operands for '%s'"), opname
);
5585 char *old_input_line_pointer
;
5586 expressionS
*tok
= &orig_insn
.extra_arg
;
5588 old_input_line_pointer
= input_line_pointer
;
5589 input_line_pointer
= arg_strings
[num_args
- 1];
5591 expression_maybe_register (xtensa_jx_opcode
, 0, tok
);
5592 input_line_pointer
= old_input_line_pointer
;
5595 orig_insn
.opcode
= xtensa_j_opcode
;
5599 if (orig_insn
.opcode
== XTENSA_UNDEFINED
)
5601 xtensa_format fmt
= xtensa_format_lookup (isa
, opname
);
5602 if (fmt
== XTENSA_UNDEFINED
)
5604 as_bad (_("unknown opcode or format name '%s'"), opname
);
5605 error_reset_cur_vinsn ();
5608 if (!cur_vinsn
.inside_bundle
)
5610 as_bad (_("format names only valid inside bundles"));
5611 error_reset_cur_vinsn ();
5614 if (cur_vinsn
.format
!= XTENSA_UNDEFINED
)
5615 as_warn (_("multiple formats specified for one bundle; using '%s'"),
5617 cur_vinsn
.format
= fmt
;
5618 free (has_underbar
? opname
- 1 : opname
);
5619 error_reset_cur_vinsn ();
5623 /* Parse the arguments. */
5624 if (parse_arguments (&orig_insn
, num_args
, arg_strings
))
5626 as_bad (_("syntax error"));
5627 error_reset_cur_vinsn ();
5631 /* Free the opcode and argument strings, now that they've been parsed. */
5632 free (has_underbar
? opname
- 1 : opname
);
5634 while (num_args
-- > 0)
5635 free (arg_strings
[num_args
]);
5637 /* Get expressions for invisible operands. */
5638 if (get_invisible_operands (&orig_insn
))
5640 error_reset_cur_vinsn ();
5644 /* Check for the right number and type of arguments. */
5645 if (tinsn_check_arguments (&orig_insn
))
5647 error_reset_cur_vinsn ();
5651 /* Record the line number for each TInsn, because a FLIX bundle may be
5652 spread across multiple input lines and individual instructions may be
5653 moved around in some cases. */
5654 orig_insn
.loc_directive_seen
= dwarf2_loc_directive_seen
;
5655 dwarf2_where (&orig_insn
.debug_line
);
5656 dwarf2_consume_line_info ();
5658 xg_add_branch_and_loop_targets (&orig_insn
);
5660 /* Check that immediate value for ENTRY is >= 16. */
5661 if (orig_insn
.opcode
== xtensa_entry_opcode
&& orig_insn
.ntok
>= 3)
5663 expressionS
*exp
= &orig_insn
.tok
[2];
5664 if (exp
->X_op
== O_constant
&& exp
->X_add_number
< 16)
5665 as_warn (_("entry instruction with stack decrement < 16"));
5669 assemble_tokens (opcode, tok, ntok);
5670 expand the tokens from the orig_insn into the
5671 stack of instructions that will not expand
5672 unless required at relaxation time. */
5674 if (!cur_vinsn
.inside_bundle
)
5675 emit_single_op (&orig_insn
);
5676 else /* We are inside a bundle. */
5678 cur_vinsn
.slots
[cur_vinsn
.num_slots
] = orig_insn
;
5679 cur_vinsn
.num_slots
++;
5680 if (*input_line_pointer
== '}'
5681 || *(input_line_pointer
- 1) == '}'
5682 || *(input_line_pointer
- 2) == '}')
5683 finish_vinsn (&cur_vinsn
);
5686 /* We've just emitted a new instruction so clear the list of labels. */
5687 xtensa_clear_insn_labels ();
5689 xtensa_check_frag_count ();
5693 /* HANDLE_ALIGN hook */
5695 /* For a .align directive, we mark the previous block with the alignment
5696 information. This will be placed in the object file in the
5697 property section corresponding to this section. */
5700 xtensa_handle_align (fragS
*fragP
)
5703 && ! fragP
->tc_frag_data
.is_literal
5704 && (fragP
->fr_type
== rs_align
5705 || fragP
->fr_type
== rs_align_code
)
5706 && fragP
->fr_offset
> 0
5707 && now_seg
!= bss_section
)
5709 fragP
->tc_frag_data
.is_align
= TRUE
;
5710 fragP
->tc_frag_data
.alignment
= fragP
->fr_offset
;
5713 if (fragP
->fr_type
== rs_align_test
)
5716 count
= fragP
->fr_next
->fr_address
- fragP
->fr_address
- fragP
->fr_fix
;
5718 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
5719 _("unaligned entry instruction"));
5722 if (linkrelax
&& fragP
->fr_type
== rs_org
)
5723 fragP
->fr_subtype
= RELAX_ORG
;
5727 /* TC_FRAG_INIT hook */
5730 xtensa_frag_init (fragS
*frag
)
5732 xtensa_set_frag_assembly_state (frag
);
5737 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
5743 /* Round up a section size to the appropriate boundary. */
5746 md_section_align (segT segment ATTRIBUTE_UNUSED
, valueT size
)
5748 return size
; /* Byte alignment is fine. */
5753 md_pcrel_from (fixS
*fixP
)
5756 static xtensa_insnbuf insnbuf
= NULL
;
5757 static xtensa_insnbuf slotbuf
= NULL
;
5760 xtensa_opcode opcode
;
5763 xtensa_isa isa
= xtensa_default_isa
;
5764 valueT addr
= fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
5765 bfd_boolean alt_reloc
;
5767 if (fixP
->fx_r_type
== BFD_RELOC_XTENSA_ASM_EXPAND
)
5770 if (fixP
->fx_r_type
== BFD_RELOC_32_PCREL
)
5775 insnbuf
= xtensa_insnbuf_alloc (isa
);
5776 slotbuf
= xtensa_insnbuf_alloc (isa
);
5779 insn_p
= &fixP
->fx_frag
->fr_literal
[fixP
->fx_where
];
5780 xtensa_insnbuf_from_chars (isa
, insnbuf
, (unsigned char *) insn_p
, 0);
5781 fmt
= xtensa_format_decode (isa
, insnbuf
);
5783 if (fmt
== XTENSA_UNDEFINED
)
5784 as_fatal (_("bad instruction format"));
5786 if (decode_reloc (fixP
->fx_r_type
, &slot
, &alt_reloc
) != 0)
5787 as_fatal (_("invalid relocation"));
5789 xtensa_format_get_slot (isa
, fmt
, slot
, insnbuf
, slotbuf
);
5790 opcode
= xtensa_opcode_decode (isa
, fmt
, slot
, slotbuf
);
5792 /* Check for "alternate" relocations (operand not specified). None
5793 of the current uses for these are really PC-relative. */
5794 if (alt_reloc
|| opcode
== xtensa_const16_opcode
)
5796 if (opcode
!= xtensa_l32r_opcode
5797 && opcode
!= xtensa_const16_opcode
)
5798 as_fatal (_("invalid relocation for '%s' instruction"),
5799 xtensa_opcode_name (isa
, opcode
));
5803 opnum
= get_relaxable_immed (opcode
);
5805 if (xtensa_operand_is_PCrelative (isa
, opcode
, opnum
) != 1
5806 || xtensa_operand_do_reloc (isa
, opcode
, opnum
, &opnd_value
, addr
))
5808 as_bad_where (fixP
->fx_file
,
5810 _("invalid relocation for operand %d of '%s'"),
5811 opnum
, xtensa_opcode_name (isa
, opcode
));
5814 return 0 - opnd_value
;
5818 /* TC_FORCE_RELOCATION hook */
5821 xtensa_force_relocation (fixS
*fix
)
5823 switch (fix
->fx_r_type
)
5825 case BFD_RELOC_XTENSA_ASM_EXPAND
:
5826 case BFD_RELOC_XTENSA_SLOT0_ALT
:
5827 case BFD_RELOC_XTENSA_SLOT1_ALT
:
5828 case BFD_RELOC_XTENSA_SLOT2_ALT
:
5829 case BFD_RELOC_XTENSA_SLOT3_ALT
:
5830 case BFD_RELOC_XTENSA_SLOT4_ALT
:
5831 case BFD_RELOC_XTENSA_SLOT5_ALT
:
5832 case BFD_RELOC_XTENSA_SLOT6_ALT
:
5833 case BFD_RELOC_XTENSA_SLOT7_ALT
:
5834 case BFD_RELOC_XTENSA_SLOT8_ALT
:
5835 case BFD_RELOC_XTENSA_SLOT9_ALT
:
5836 case BFD_RELOC_XTENSA_SLOT10_ALT
:
5837 case BFD_RELOC_XTENSA_SLOT11_ALT
:
5838 case BFD_RELOC_XTENSA_SLOT12_ALT
:
5839 case BFD_RELOC_XTENSA_SLOT13_ALT
:
5840 case BFD_RELOC_XTENSA_SLOT14_ALT
:
5846 if (linkrelax
&& fix
->fx_addsy
5847 && relaxable_section (S_GET_SEGMENT (fix
->fx_addsy
)))
5850 return generic_force_reloc (fix
);
5854 /* TC_VALIDATE_FIX_SUB hook */
5857 xtensa_validate_fix_sub (fixS
*fix
)
5859 segT add_symbol_segment
, sub_symbol_segment
;
5861 /* The difference of two symbols should be resolved by the assembler when
5862 linkrelax is not set. If the linker may relax the section containing
5863 the symbols, then an Xtensa DIFF relocation must be generated so that
5864 the linker knows to adjust the difference value. */
5865 if (!linkrelax
|| fix
->fx_addsy
== NULL
)
5868 /* Make sure both symbols are in the same segment, and that segment is
5869 "normal" and relaxable. If the segment is not "normal", then the
5870 fix is not valid. If the segment is not "relaxable", then the fix
5871 should have been handled earlier. */
5872 add_symbol_segment
= S_GET_SEGMENT (fix
->fx_addsy
);
5873 if (! SEG_NORMAL (add_symbol_segment
) ||
5874 ! relaxable_section (add_symbol_segment
))
5876 sub_symbol_segment
= S_GET_SEGMENT (fix
->fx_subsy
);
5877 return (sub_symbol_segment
== add_symbol_segment
);
5881 /* NO_PSEUDO_DOT hook */
5883 /* This function has nothing to do with pseudo dots, but this is the
5884 nearest macro to where the check needs to take place. FIXME: This
5888 xtensa_check_inside_bundle (void)
5890 if (cur_vinsn
.inside_bundle
&& input_line_pointer
[-1] == '.')
5891 as_bad (_("directives are not valid inside bundles"));
5893 /* This function must always return FALSE because it is called via a
5894 macro that has nothing to do with bundling. */
5899 /* md_elf_section_change_hook */
5902 xtensa_elf_section_change_hook (void)
5904 /* Set up the assembly state. */
5905 if (!frag_now
->tc_frag_data
.is_assembly_state_set
)
5906 xtensa_set_frag_assembly_state (frag_now
);
5910 /* tc_fix_adjustable hook */
5913 xtensa_fix_adjustable (fixS
*fixP
)
5915 /* We need the symbol name for the VTABLE entries. */
5916 if (fixP
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
5917 || fixP
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
5924 /* tc_symbol_new_hook */
5926 symbolS
*expr_symbols
= NULL
;
5929 xtensa_symbol_new_hook (symbolS
*sym
)
5931 if (is_leb128_expr
&& S_GET_SEGMENT (sym
) == expr_section
)
5933 symbol_get_tc (sym
)->next_expr_symbol
= expr_symbols
;
5940 md_apply_fix (fixS
*fixP
, valueT
*valP
, segT seg
)
5942 char *const fixpos
= fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
;
5945 /* Subtracted symbols are only allowed for a few relocation types, and
5946 unless linkrelax is enabled, they should not make it to this point. */
5947 if (fixP
->fx_subsy
&& !(linkrelax
&& (fixP
->fx_r_type
== BFD_RELOC_32
5948 || fixP
->fx_r_type
== BFD_RELOC_16
5949 || fixP
->fx_r_type
== BFD_RELOC_8
)))
5950 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("expression too complex"));
5952 switch (fixP
->fx_r_type
)
5954 case BFD_RELOC_32_PCREL
:
5960 switch (fixP
->fx_r_type
)
5963 fixP
->fx_r_type
= BFD_RELOC_XTENSA_DIFF8
;
5964 fixP
->fx_signed
= 1;
5967 fixP
->fx_r_type
= BFD_RELOC_XTENSA_DIFF16
;
5968 fixP
->fx_signed
= 1;
5971 fixP
->fx_r_type
= BFD_RELOC_XTENSA_DIFF32
;
5972 fixP
->fx_signed
= 1;
5978 val
= (S_GET_VALUE (fixP
->fx_addsy
) + fixP
->fx_offset
5979 - S_GET_VALUE (fixP
->fx_subsy
));
5981 /* The difference value gets written out, and the DIFF reloc
5982 identifies the address of the subtracted symbol (i.e., the one
5983 with the lowest address). */
5985 fixP
->fx_offset
-= val
;
5986 fixP
->fx_subsy
= NULL
;
5988 else if (! fixP
->fx_addsy
)
5995 case BFD_RELOC_XTENSA_PLT
:
5996 md_number_to_chars (fixpos
, val
, fixP
->fx_size
);
5997 fixP
->fx_no_overflow
= 0; /* Use the standard overflow check. */
6000 case BFD_RELOC_XTENSA_TLSDESC_FN
:
6001 case BFD_RELOC_XTENSA_TLSDESC_ARG
:
6002 case BFD_RELOC_XTENSA_TLS_TPOFF
:
6003 case BFD_RELOC_XTENSA_TLS_DTPOFF
:
6004 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
6005 md_number_to_chars (fixpos
, 0, fixP
->fx_size
);
6006 fixP
->fx_no_overflow
= 0; /* Use the standard overflow check. */
6009 case BFD_RELOC_XTENSA_SLOT0_OP
:
6010 case BFD_RELOC_XTENSA_SLOT1_OP
:
6011 case BFD_RELOC_XTENSA_SLOT2_OP
:
6012 case BFD_RELOC_XTENSA_SLOT3_OP
:
6013 case BFD_RELOC_XTENSA_SLOT4_OP
:
6014 case BFD_RELOC_XTENSA_SLOT5_OP
:
6015 case BFD_RELOC_XTENSA_SLOT6_OP
:
6016 case BFD_RELOC_XTENSA_SLOT7_OP
:
6017 case BFD_RELOC_XTENSA_SLOT8_OP
:
6018 case BFD_RELOC_XTENSA_SLOT9_OP
:
6019 case BFD_RELOC_XTENSA_SLOT10_OP
:
6020 case BFD_RELOC_XTENSA_SLOT11_OP
:
6021 case BFD_RELOC_XTENSA_SLOT12_OP
:
6022 case BFD_RELOC_XTENSA_SLOT13_OP
:
6023 case BFD_RELOC_XTENSA_SLOT14_OP
:
6026 /* Write the tentative value of a PC-relative relocation to a
6027 local symbol into the instruction. The value will be ignored
6028 by the linker, and it makes the object file disassembly
6029 readable when all branch targets are encoded in relocations. */
6031 gas_assert (fixP
->fx_addsy
);
6032 if (S_GET_SEGMENT (fixP
->fx_addsy
) == seg
6033 && !S_FORCE_RELOC (fixP
->fx_addsy
, 1))
6035 val
= (S_GET_VALUE (fixP
->fx_addsy
) + fixP
->fx_offset
6036 - md_pcrel_from (fixP
));
6037 (void) xg_apply_fix_value (fixP
, val
);
6040 else if (! fixP
->fx_addsy
)
6043 if (xg_apply_fix_value (fixP
, val
))
6048 case BFD_RELOC_XTENSA_ASM_EXPAND
:
6049 case BFD_RELOC_XTENSA_TLS_FUNC
:
6050 case BFD_RELOC_XTENSA_TLS_ARG
:
6051 case BFD_RELOC_XTENSA_TLS_CALL
:
6052 case BFD_RELOC_XTENSA_SLOT0_ALT
:
6053 case BFD_RELOC_XTENSA_SLOT1_ALT
:
6054 case BFD_RELOC_XTENSA_SLOT2_ALT
:
6055 case BFD_RELOC_XTENSA_SLOT3_ALT
:
6056 case BFD_RELOC_XTENSA_SLOT4_ALT
:
6057 case BFD_RELOC_XTENSA_SLOT5_ALT
:
6058 case BFD_RELOC_XTENSA_SLOT6_ALT
:
6059 case BFD_RELOC_XTENSA_SLOT7_ALT
:
6060 case BFD_RELOC_XTENSA_SLOT8_ALT
:
6061 case BFD_RELOC_XTENSA_SLOT9_ALT
:
6062 case BFD_RELOC_XTENSA_SLOT10_ALT
:
6063 case BFD_RELOC_XTENSA_SLOT11_ALT
:
6064 case BFD_RELOC_XTENSA_SLOT12_ALT
:
6065 case BFD_RELOC_XTENSA_SLOT13_ALT
:
6066 case BFD_RELOC_XTENSA_SLOT14_ALT
:
6067 /* These all need to be resolved at link-time. Do nothing now. */
6070 case BFD_RELOC_VTABLE_INHERIT
:
6071 case BFD_RELOC_VTABLE_ENTRY
:
6076 as_bad (_("unhandled local relocation fix %s"),
6077 bfd_get_reloc_code_name (fixP
->fx_r_type
));
6083 md_atof (int type
, char *litP
, int *sizeP
)
6085 return ieee_md_atof (type
, litP
, sizeP
, target_big_endian
);
6090 md_estimate_size_before_relax (fragS
*fragP
, segT seg ATTRIBUTE_UNUSED
)
6092 return total_frag_text_expansion (fragP
);
6096 /* Translate internal representation of relocation info to BFD target
6100 tc_gen_reloc (asection
*section ATTRIBUTE_UNUSED
, fixS
*fixp
)
6104 reloc
= (arelent
*) xmalloc (sizeof (arelent
));
6105 reloc
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
6106 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
6107 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
6109 /* Make sure none of our internal relocations make it this far.
6110 They'd better have been fully resolved by this point. */
6111 gas_assert ((int) fixp
->fx_r_type
> 0);
6113 reloc
->addend
= fixp
->fx_offset
;
6115 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
6116 if (reloc
->howto
== NULL
)
6118 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
6119 _("cannot represent `%s' relocation in object file"),
6120 bfd_get_reloc_code_name (fixp
->fx_r_type
));
6121 free (reloc
->sym_ptr_ptr
);
6126 if (!fixp
->fx_pcrel
!= !reloc
->howto
->pc_relative
)
6127 as_fatal (_("internal error; cannot generate `%s' relocation"),
6128 bfd_get_reloc_code_name (fixp
->fx_r_type
));
6134 /* Checks for resource conflicts between instructions. */
6136 /* The func unit stuff could be implemented as bit-vectors rather
6137 than the iterative approach here. If it ends up being too
6138 slow, we will switch it. */
6141 new_resource_table (void *data
,
6144 unit_num_copies_func uncf
,
6145 opcode_num_units_func onuf
,
6146 opcode_funcUnit_use_unit_func ouuf
,
6147 opcode_funcUnit_use_stage_func ousf
)
6150 resource_table
*rt
= (resource_table
*) xmalloc (sizeof (resource_table
));
6152 rt
->cycles
= cycles
;
6153 rt
->allocated_cycles
= cycles
;
6155 rt
->unit_num_copies
= uncf
;
6156 rt
->opcode_num_units
= onuf
;
6157 rt
->opcode_unit_use
= ouuf
;
6158 rt
->opcode_unit_stage
= ousf
;
6160 rt
->units
= (unsigned char **) xcalloc (cycles
, sizeof (unsigned char *));
6161 for (i
= 0; i
< cycles
; i
++)
6162 rt
->units
[i
] = (unsigned char *) xcalloc (nu
, sizeof (unsigned char));
6169 clear_resource_table (resource_table
*rt
)
6172 for (i
= 0; i
< rt
->allocated_cycles
; i
++)
6173 for (j
= 0; j
< rt
->num_units
; j
++)
6174 rt
->units
[i
][j
] = 0;
6178 /* We never shrink it, just fake it into thinking so. */
6181 resize_resource_table (resource_table
*rt
, int cycles
)
6185 rt
->cycles
= cycles
;
6186 if (cycles
<= rt
->allocated_cycles
)
6189 old_cycles
= rt
->allocated_cycles
;
6190 rt
->allocated_cycles
= cycles
;
6192 rt
->units
= xrealloc (rt
->units
,
6193 rt
->allocated_cycles
* sizeof (unsigned char *));
6194 for (i
= 0; i
< old_cycles
; i
++)
6195 rt
->units
[i
] = xrealloc (rt
->units
[i
],
6196 rt
->num_units
* sizeof (unsigned char));
6197 for (i
= old_cycles
; i
< cycles
; i
++)
6198 rt
->units
[i
] = xcalloc (rt
->num_units
, sizeof (unsigned char));
6203 resources_available (resource_table
*rt
, xtensa_opcode opcode
, int cycle
)
6206 int uses
= (rt
->opcode_num_units
) (rt
->data
, opcode
);
6208 for (i
= 0; i
< uses
; i
++)
6210 xtensa_funcUnit unit
= (rt
->opcode_unit_use
) (rt
->data
, opcode
, i
);
6211 int stage
= (rt
->opcode_unit_stage
) (rt
->data
, opcode
, i
);
6212 int copies_in_use
= rt
->units
[stage
+ cycle
][unit
];
6213 int copies
= (rt
->unit_num_copies
) (rt
->data
, unit
);
6214 if (copies_in_use
>= copies
)
6222 reserve_resources (resource_table
*rt
, xtensa_opcode opcode
, int cycle
)
6225 int uses
= (rt
->opcode_num_units
) (rt
->data
, opcode
);
6227 for (i
= 0; i
< uses
; i
++)
6229 xtensa_funcUnit unit
= (rt
->opcode_unit_use
) (rt
->data
, opcode
, i
);
6230 int stage
= (rt
->opcode_unit_stage
) (rt
->data
, opcode
, i
);
6231 /* Note that this allows resources to be oversubscribed. That's
6232 essential to the way the optional scheduler works.
6233 resources_available reports when a resource is over-subscribed,
6234 so it's easy to tell. */
6235 rt
->units
[stage
+ cycle
][unit
]++;
6241 release_resources (resource_table
*rt
, xtensa_opcode opcode
, int cycle
)
6244 int uses
= (rt
->opcode_num_units
) (rt
->data
, opcode
);
6246 for (i
= 0; i
< uses
; i
++)
6248 xtensa_funcUnit unit
= (rt
->opcode_unit_use
) (rt
->data
, opcode
, i
);
6249 int stage
= (rt
->opcode_unit_stage
) (rt
->data
, opcode
, i
);
6250 gas_assert (rt
->units
[stage
+ cycle
][unit
] > 0);
6251 rt
->units
[stage
+ cycle
][unit
]--;
6256 /* Wrapper functions make parameterized resource reservation
6260 opcode_funcUnit_use_unit (void *data
, xtensa_opcode opcode
, int idx
)
6262 xtensa_funcUnit_use
*use
= xtensa_opcode_funcUnit_use (data
, opcode
, idx
);
6268 opcode_funcUnit_use_stage (void *data
, xtensa_opcode opcode
, int idx
)
6270 xtensa_funcUnit_use
*use
= xtensa_opcode_funcUnit_use (data
, opcode
, idx
);
6275 /* Note that this function does not check issue constraints, but
6276 solely whether the hardware is available to execute the given
6277 instructions together. It also doesn't check if the tinsns
6278 write the same state, or access the same tieports. That is
6279 checked by check_t1_t2_reads_and_writes. */
6282 resources_conflict (vliw_insn
*vinsn
)
6285 static resource_table
*rt
= NULL
;
6287 /* This is the most common case by far. Optimize it. */
6288 if (vinsn
->num_slots
== 1)
6293 xtensa_isa isa
= xtensa_default_isa
;
6294 rt
= new_resource_table
6295 (isa
, xtensa_num_pipe_stages
,
6296 xtensa_isa_num_funcUnits (isa
),
6297 (unit_num_copies_func
) xtensa_funcUnit_num_copies
,
6298 (opcode_num_units_func
) xtensa_opcode_num_funcUnit_uses
,
6299 opcode_funcUnit_use_unit
,
6300 opcode_funcUnit_use_stage
);
6303 clear_resource_table (rt
);
6305 for (i
= 0; i
< vinsn
->num_slots
; i
++)
6307 if (!resources_available (rt
, vinsn
->slots
[i
].opcode
, 0))
6309 reserve_resources (rt
, vinsn
->slots
[i
].opcode
, 0);
6316 /* finish_vinsn, emit_single_op and helper functions. */
6318 static bfd_boolean
find_vinsn_conflicts (vliw_insn
*);
6319 static xtensa_format
xg_find_narrowest_format (vliw_insn
*);
6320 static void xg_assemble_vliw_tokens (vliw_insn
*);
6323 /* We have reached the end of a bundle; emit into the frag. */
6326 finish_vinsn (vliw_insn
*vinsn
)
6333 if (find_vinsn_conflicts (vinsn
))
6335 xg_clear_vinsn (vinsn
);
6339 /* First, find a format that works. */
6340 if (vinsn
->format
== XTENSA_UNDEFINED
)
6341 vinsn
->format
= xg_find_narrowest_format (vinsn
);
6343 if (xtensa_format_num_slots (xtensa_default_isa
, vinsn
->format
) > 1
6344 && produce_flix
== FLIX_NONE
)
6346 as_bad (_("The option \"--no-allow-flix\" prohibits multi-slot flix."));
6347 xg_clear_vinsn (vinsn
);
6351 if (vinsn
->format
== XTENSA_UNDEFINED
)
6353 as_where (&file_name
, &line
);
6354 as_bad_where (file_name
, line
,
6355 _("couldn't find a valid instruction format"));
6356 fprintf (stderr
, _(" ops were: "));
6357 for (i
= 0; i
< vinsn
->num_slots
; i
++)
6358 fprintf (stderr
, _(" %s;"),
6359 xtensa_opcode_name (xtensa_default_isa
,
6360 vinsn
->slots
[i
].opcode
));
6361 fprintf (stderr
, _("\n"));
6362 xg_clear_vinsn (vinsn
);
6366 if (vinsn
->num_slots
6367 != xtensa_format_num_slots (xtensa_default_isa
, vinsn
->format
))
6369 as_bad (_("format '%s' allows %d slots, but there are %d opcodes"),
6370 xtensa_format_name (xtensa_default_isa
, vinsn
->format
),
6371 xtensa_format_num_slots (xtensa_default_isa
, vinsn
->format
),
6373 xg_clear_vinsn (vinsn
);
6377 if (resources_conflict (vinsn
))
6379 as_where (&file_name
, &line
);
6380 as_bad_where (file_name
, line
, _("illegal resource usage in bundle"));
6381 fprintf (stderr
, " ops were: ");
6382 for (i
= 0; i
< vinsn
->num_slots
; i
++)
6383 fprintf (stderr
, " %s;",
6384 xtensa_opcode_name (xtensa_default_isa
,
6385 vinsn
->slots
[i
].opcode
));
6386 fprintf (stderr
, "\n");
6387 xg_clear_vinsn (vinsn
);
6391 for (i
= 0; i
< vinsn
->num_slots
; i
++)
6393 if (vinsn
->slots
[i
].opcode
!= XTENSA_UNDEFINED
)
6395 symbolS
*lit_sym
= NULL
;
6397 bfd_boolean e
= FALSE
;
6398 bfd_boolean saved_density
= density_supported
;
6400 /* We don't want to narrow ops inside multi-slot bundles. */
6401 if (vinsn
->num_slots
> 1)
6402 density_supported
= FALSE
;
6404 istack_init (&slotstack
);
6405 if (vinsn
->slots
[i
].opcode
== xtensa_nop_opcode
)
6407 vinsn
->slots
[i
].opcode
=
6408 xtensa_format_slot_nop_opcode (xtensa_default_isa
,
6410 vinsn
->slots
[i
].ntok
= 0;
6413 if (xg_expand_assembly_insn (&slotstack
, &vinsn
->slots
[i
]))
6419 density_supported
= saved_density
;
6423 xg_clear_vinsn (vinsn
);
6427 for (j
= 0; j
< slotstack
.ninsn
; j
++)
6429 TInsn
*insn
= &slotstack
.insn
[j
];
6430 if (insn
->insn_type
== ITYPE_LITERAL
)
6432 gas_assert (lit_sym
== NULL
);
6433 lit_sym
= xg_assemble_literal (insn
);
6437 gas_assert (insn
->insn_type
== ITYPE_INSN
);
6439 xg_resolve_literals (insn
, lit_sym
);
6440 if (j
!= slotstack
.ninsn
- 1)
6441 emit_single_op (insn
);
6445 if (vinsn
->num_slots
> 1)
6447 if (opcode_fits_format_slot
6448 (slotstack
.insn
[slotstack
.ninsn
- 1].opcode
,
6451 vinsn
->slots
[i
] = slotstack
.insn
[slotstack
.ninsn
- 1];
6455 emit_single_op (&slotstack
.insn
[slotstack
.ninsn
- 1]);
6456 if (vinsn
->format
== XTENSA_UNDEFINED
)
6457 vinsn
->slots
[i
].opcode
= xtensa_nop_opcode
;
6459 vinsn
->slots
[i
].opcode
6460 = xtensa_format_slot_nop_opcode (xtensa_default_isa
,
6463 vinsn
->slots
[i
].ntok
= 0;
6468 vinsn
->slots
[0] = slotstack
.insn
[slotstack
.ninsn
- 1];
6469 vinsn
->format
= XTENSA_UNDEFINED
;
6474 /* Now check resource conflicts on the modified bundle. */
6475 if (resources_conflict (vinsn
))
6477 as_where (&file_name
, &line
);
6478 as_bad_where (file_name
, line
, _("illegal resource usage in bundle"));
6479 fprintf (stderr
, " ops were: ");
6480 for (i
= 0; i
< vinsn
->num_slots
; i
++)
6481 fprintf (stderr
, " %s;",
6482 xtensa_opcode_name (xtensa_default_isa
,
6483 vinsn
->slots
[i
].opcode
));
6484 fprintf (stderr
, "\n");
6485 xg_clear_vinsn (vinsn
);
6489 /* First, find a format that works. */
6490 if (vinsn
->format
== XTENSA_UNDEFINED
)
6491 vinsn
->format
= xg_find_narrowest_format (vinsn
);
6493 xg_assemble_vliw_tokens (vinsn
);
6495 xg_clear_vinsn (vinsn
);
6497 xtensa_check_frag_count ();
6501 /* Given an vliw instruction, what conflicts are there in register
6502 usage and in writes to states and queues?
6504 This function does two things:
6505 1. Reports an error when a vinsn contains illegal combinations
6506 of writes to registers states or queues.
6507 2. Marks individual tinsns as not relaxable if the combination
6508 contains antidependencies.
6510 Job 2 handles things like swap semantics in instructions that need
6511 to be relaxed. For example,
6515 normally would be relaxed to
6520 _but_, if the above instruction is bundled with an a0 reader, e.g.,
6522 { addi a0, a1, 10000 ; add a2, a0, a4 ; }
6524 then we can't relax it into
6527 { add a0, a1, a0 ; add a2, a0, a4 ; }
6529 because the value of a0 is trashed before the second add can read it. */
6531 static char check_t1_t2_reads_and_writes (TInsn
*, TInsn
*);
6534 find_vinsn_conflicts (vliw_insn
*vinsn
)
6538 xtensa_isa isa
= xtensa_default_isa
;
6540 gas_assert (!past_xtensa_end
);
6542 for (i
= 0 ; i
< vinsn
->num_slots
; i
++)
6544 TInsn
*op1
= &vinsn
->slots
[i
];
6545 if (op1
->is_specific_opcode
)
6546 op1
->keep_wide
= TRUE
;
6548 op1
->keep_wide
= FALSE
;
6551 for (i
= 0 ; i
< vinsn
->num_slots
; i
++)
6553 TInsn
*op1
= &vinsn
->slots
[i
];
6555 if (xtensa_opcode_is_branch (isa
, op1
->opcode
) == 1)
6558 for (j
= 0; j
< vinsn
->num_slots
; j
++)
6562 TInsn
*op2
= &vinsn
->slots
[j
];
6563 char conflict_type
= check_t1_t2_reads_and_writes (op1
, op2
);
6564 switch (conflict_type
)
6567 as_bad (_("opcodes '%s' (slot %d) and '%s' (slot %d) write the same register"),
6568 xtensa_opcode_name (isa
, op1
->opcode
), i
,
6569 xtensa_opcode_name (isa
, op2
->opcode
), j
);
6572 as_bad (_("opcodes '%s' (slot %d) and '%s' (slot %d) write the same state"),
6573 xtensa_opcode_name (isa
, op1
->opcode
), i
,
6574 xtensa_opcode_name (isa
, op2
->opcode
), j
);
6577 as_bad (_("opcodes '%s' (slot %d) and '%s' (slot %d) write the same port"),
6578 xtensa_opcode_name (isa
, op1
->opcode
), i
,
6579 xtensa_opcode_name (isa
, op2
->opcode
), j
);
6582 as_bad (_("opcodes '%s' (slot %d) and '%s' (slot %d) both have volatile port accesses"),
6583 xtensa_opcode_name (isa
, op1
->opcode
), i
,
6584 xtensa_opcode_name (isa
, op2
->opcode
), j
);
6587 /* Everything is OK. */
6590 op2
->is_specific_opcode
= (op2
->is_specific_opcode
6591 || conflict_type
== 'a');
6598 as_bad (_("multiple branches or jumps in the same bundle"));
6606 /* Check how the state used by t1 and t2 relate.
6609 case A: t1 reads a register t2 writes (an antidependency within a bundle)
6610 case B: no relationship between what is read and written (both could
6611 read the same reg though)
6612 case C: t1 writes a register t2 writes (a register conflict within a
6614 case D: t1 writes a state that t2 also writes
6615 case E: t1 writes a tie queue that t2 also writes
6616 case F: two volatile queue accesses
6620 check_t1_t2_reads_and_writes (TInsn
*t1
, TInsn
*t2
)
6622 xtensa_isa isa
= xtensa_default_isa
;
6623 xtensa_regfile t1_regfile
, t2_regfile
;
6625 int t1_base_reg
, t1_last_reg
;
6626 int t2_base_reg
, t2_last_reg
;
6627 char t1_inout
, t2_inout
;
6629 char conflict
= 'b';
6634 bfd_boolean t1_volatile
= FALSE
;
6635 bfd_boolean t2_volatile
= FALSE
;
6637 /* Check registers. */
6638 for (j
= 0; j
< t2
->ntok
; j
++)
6640 if (xtensa_operand_is_register (isa
, t2
->opcode
, j
) != 1)
6643 t2_regfile
= xtensa_operand_regfile (isa
, t2
->opcode
, j
);
6644 t2_base_reg
= t2
->tok
[j
].X_add_number
;
6645 t2_last_reg
= t2_base_reg
+ xtensa_operand_num_regs (isa
, t2
->opcode
, j
);
6647 for (i
= 0; i
< t1
->ntok
; i
++)
6649 if (xtensa_operand_is_register (isa
, t1
->opcode
, i
) != 1)
6652 t1_regfile
= xtensa_operand_regfile (isa
, t1
->opcode
, i
);
6654 if (t1_regfile
!= t2_regfile
)
6657 t1_inout
= xtensa_operand_inout (isa
, t1
->opcode
, i
);
6658 t2_inout
= xtensa_operand_inout (isa
, t2
->opcode
, j
);
6660 if (xtensa_operand_is_known_reg (isa
, t1
->opcode
, i
) == 0
6661 || xtensa_operand_is_known_reg (isa
, t2
->opcode
, j
) == 0)
6663 if (t1_inout
== 'm' || t1_inout
== 'o'
6664 || t2_inout
== 'm' || t2_inout
== 'o')
6671 t1_base_reg
= t1
->tok
[i
].X_add_number
;
6672 t1_last_reg
= (t1_base_reg
6673 + xtensa_operand_num_regs (isa
, t1
->opcode
, i
));
6675 for (t1_reg
= t1_base_reg
; t1_reg
< t1_last_reg
; t1_reg
++)
6677 for (t2_reg
= t2_base_reg
; t2_reg
< t2_last_reg
; t2_reg
++)
6679 if (t1_reg
!= t2_reg
)
6682 if (t2_inout
== 'i' && (t1_inout
== 'm' || t1_inout
== 'o'))
6688 if (t1_inout
== 'i' && (t2_inout
== 'm' || t2_inout
== 'o'))
6694 if (t1_inout
!= 'i' && t2_inout
!= 'i')
6702 t1_states
= xtensa_opcode_num_stateOperands (isa
, t1
->opcode
);
6703 t2_states
= xtensa_opcode_num_stateOperands (isa
, t2
->opcode
);
6704 for (j
= 0; j
< t2_states
; j
++)
6706 xtensa_state t2_so
= xtensa_stateOperand_state (isa
, t2
->opcode
, j
);
6707 t2_inout
= xtensa_stateOperand_inout (isa
, t2
->opcode
, j
);
6708 for (i
= 0; i
< t1_states
; i
++)
6710 xtensa_state t1_so
= xtensa_stateOperand_state (isa
, t1
->opcode
, i
);
6711 t1_inout
= xtensa_stateOperand_inout (isa
, t1
->opcode
, i
);
6712 if (t1_so
!= t2_so
|| xtensa_state_is_shared_or (isa
, t1_so
) == 1)
6715 if (t2_inout
== 'i' && (t1_inout
== 'm' || t1_inout
== 'o'))
6721 if (t1_inout
== 'i' && (t2_inout
== 'm' || t2_inout
== 'o'))
6727 if (t1_inout
!= 'i' && t2_inout
!= 'i')
6732 /* Check tieports. */
6733 t1_interfaces
= xtensa_opcode_num_interfaceOperands (isa
, t1
->opcode
);
6734 t2_interfaces
= xtensa_opcode_num_interfaceOperands (isa
, t2
->opcode
);
6735 for (j
= 0; j
< t2_interfaces
; j
++)
6737 xtensa_interface t2_int
6738 = xtensa_interfaceOperand_interface (isa
, t2
->opcode
, j
);
6739 int t2_class
= xtensa_interface_class_id (isa
, t2_int
);
6741 t2_inout
= xtensa_interface_inout (isa
, t2_int
);
6742 if (xtensa_interface_has_side_effect (isa
, t2_int
) == 1)
6745 for (i
= 0; i
< t1_interfaces
; i
++)
6747 xtensa_interface t1_int
6748 = xtensa_interfaceOperand_interface (isa
, t1
->opcode
, j
);
6749 int t1_class
= xtensa_interface_class_id (isa
, t1_int
);
6751 t1_inout
= xtensa_interface_inout (isa
, t1_int
);
6752 if (xtensa_interface_has_side_effect (isa
, t1_int
) == 1)
6755 if (t1_volatile
&& t2_volatile
&& (t1_class
== t2_class
))
6758 if (t1_int
!= t2_int
)
6761 if (t2_inout
== 'i' && t1_inout
== 'o')
6767 if (t1_inout
== 'i' && t2_inout
== 'o')
6773 if (t1_inout
!= 'i' && t2_inout
!= 'i')
6782 static xtensa_format
6783 xg_find_narrowest_format (vliw_insn
*vinsn
)
6785 /* Right now we assume that the ops within the vinsn are properly
6786 ordered for the slots that the programmer wanted them in. In
6787 other words, we don't rearrange the ops in hopes of finding a
6788 better format. The scheduler handles that. */
6790 xtensa_isa isa
= xtensa_default_isa
;
6791 xtensa_format format
;
6792 xtensa_opcode nop_opcode
= xtensa_nop_opcode
;
6794 if (vinsn
->num_slots
== 1)
6795 return xg_get_single_format (vinsn
->slots
[0].opcode
);
6797 for (format
= 0; format
< xtensa_isa_num_formats (isa
); format
++)
6800 xg_copy_vinsn (&v_copy
, vinsn
);
6801 if (xtensa_format_num_slots (isa
, format
) == v_copy
.num_slots
)
6805 for (slot
= 0; slot
< v_copy
.num_slots
; slot
++)
6807 if (v_copy
.slots
[slot
].opcode
== nop_opcode
)
6809 v_copy
.slots
[slot
].opcode
=
6810 xtensa_format_slot_nop_opcode (isa
, format
, slot
);
6811 v_copy
.slots
[slot
].ntok
= 0;
6814 if (opcode_fits_format_slot (v_copy
.slots
[slot
].opcode
,
6817 else if (v_copy
.num_slots
> 1)
6820 /* Try the widened version. */
6821 if (!v_copy
.slots
[slot
].keep_wide
6822 && !v_copy
.slots
[slot
].is_specific_opcode
6823 && xg_is_single_relaxable_insn (&v_copy
.slots
[slot
],
6825 && opcode_fits_format_slot (widened
.opcode
,
6828 v_copy
.slots
[slot
] = widened
;
6833 if (fit
== v_copy
.num_slots
)
6835 xg_copy_vinsn (vinsn
, &v_copy
);
6836 xtensa_format_encode (isa
, format
, vinsn
->insnbuf
);
6837 vinsn
->format
= format
;
6843 if (format
== xtensa_isa_num_formats (isa
))
6844 return XTENSA_UNDEFINED
;
6850 /* Return the additional space needed in a frag
6851 for possible relaxations of any ops in a VLIW insn.
6852 Also fill out the relaxations that might be required of
6853 each tinsn in the vinsn. */
6856 relaxation_requirements (vliw_insn
*vinsn
, bfd_boolean
*pfinish_frag
)
6858 bfd_boolean finish_frag
= FALSE
;
6859 int extra_space
= 0;
6862 for (slot
= 0; slot
< vinsn
->num_slots
; slot
++)
6864 TInsn
*tinsn
= &vinsn
->slots
[slot
];
6865 if (!tinsn_has_symbolic_operands (tinsn
))
6867 /* A narrow instruction could be widened later to help
6868 alignment issues. */
6869 if (xg_is_single_relaxable_insn (tinsn
, 0, TRUE
)
6870 && !tinsn
->is_specific_opcode
6871 && vinsn
->num_slots
== 1)
6873 /* Difference in bytes between narrow and wide insns... */
6875 tinsn
->subtype
= RELAX_NARROW
;
6880 if (workaround_b_j_loop_end
6881 && tinsn
->opcode
== xtensa_jx_opcode
6882 && use_transform ())
6884 /* Add 2 of these. */
6885 extra_space
+= 3; /* for the nop size */
6886 tinsn
->subtype
= RELAX_ADD_NOP_IF_PRE_LOOP_END
;
6889 /* Need to assemble it with space for the relocation. */
6890 if (xg_is_relaxable_insn (tinsn
, 0)
6891 && !tinsn
->is_specific_opcode
)
6893 int max_size
= xg_get_max_insn_widen_size (tinsn
->opcode
);
6894 int max_literal_size
=
6895 xg_get_max_insn_widen_literal_size (tinsn
->opcode
);
6897 tinsn
->literal_space
= max_literal_size
;
6899 tinsn
->subtype
= RELAX_IMMED
;
6900 extra_space
+= max_size
;
6904 /* A fix record will be added for this instruction prior
6905 to relaxation, so make it end the frag. */
6910 *pfinish_frag
= finish_frag
;
6916 bundle_tinsn (TInsn
*tinsn
, vliw_insn
*vinsn
)
6918 xtensa_isa isa
= xtensa_default_isa
;
6919 int slot
, chosen_slot
;
6921 vinsn
->format
= xg_get_single_format (tinsn
->opcode
);
6922 gas_assert (vinsn
->format
!= XTENSA_UNDEFINED
);
6923 vinsn
->num_slots
= xtensa_format_num_slots (isa
, vinsn
->format
);
6925 chosen_slot
= xg_get_single_slot (tinsn
->opcode
);
6926 for (slot
= 0; slot
< vinsn
->num_slots
; slot
++)
6928 if (slot
== chosen_slot
)
6929 vinsn
->slots
[slot
] = *tinsn
;
6932 vinsn
->slots
[slot
].opcode
=
6933 xtensa_format_slot_nop_opcode (isa
, vinsn
->format
, slot
);
6934 vinsn
->slots
[slot
].ntok
= 0;
6935 vinsn
->slots
[slot
].insn_type
= ITYPE_INSN
;
6942 emit_single_op (TInsn
*orig_insn
)
6945 IStack istack
; /* put instructions into here */
6946 symbolS
*lit_sym
= NULL
;
6947 symbolS
*label_sym
= NULL
;
6949 istack_init (&istack
);
6951 /* Special-case for "movi aX, foo" which is guaranteed to need relaxing.
6952 Because the scheduling and bundling characteristics of movi and
6953 l32r or const16 are so different, we can do much better if we relax
6954 it prior to scheduling and bundling, rather than after. */
6955 if ((orig_insn
->opcode
== xtensa_movi_opcode
6956 || orig_insn
->opcode
== xtensa_movi_n_opcode
)
6957 && !cur_vinsn
.inside_bundle
6958 && (orig_insn
->tok
[1].X_op
== O_symbol
6959 || orig_insn
->tok
[1].X_op
== O_pltrel
6960 || orig_insn
->tok
[1].X_op
== O_tlsfunc
6961 || orig_insn
->tok
[1].X_op
== O_tlsarg
6962 || orig_insn
->tok
[1].X_op
== O_tpoff
6963 || orig_insn
->tok
[1].X_op
== O_dtpoff
)
6964 && !orig_insn
->is_specific_opcode
&& use_transform ())
6965 xg_assembly_relax (&istack
, orig_insn
, now_seg
, frag_now
, 0, 1, 0);
6967 if (xg_expand_assembly_insn (&istack
, orig_insn
))
6970 for (i
= 0; i
< istack
.ninsn
; i
++)
6972 TInsn
*insn
= &istack
.insn
[i
];
6973 switch (insn
->insn_type
)
6976 gas_assert (lit_sym
== NULL
);
6977 lit_sym
= xg_assemble_literal (insn
);
6981 static int relaxed_sym_idx
= 0;
6982 char *label
= xmalloc (strlen (FAKE_LABEL_NAME
) + 12);
6983 sprintf (label
, "%s_rl_%x", FAKE_LABEL_NAME
, relaxed_sym_idx
++);
6985 gas_assert (label_sym
== NULL
);
6986 label_sym
= symbol_find_or_make (label
);
6987 gas_assert (label_sym
);
6995 xg_resolve_literals (insn
, lit_sym
);
6997 xg_resolve_labels (insn
, label_sym
);
6999 bundle_tinsn (insn
, &v
);
7014 total_frag_text_expansion (fragS
*fragP
)
7017 int total_expansion
= 0;
7019 for (slot
= 0; slot
< config_max_slots
; slot
++)
7020 total_expansion
+= fragP
->tc_frag_data
.text_expansion
[slot
];
7022 return total_expansion
;
7026 /* Emit a vliw instruction to the current fragment. */
7029 xg_assemble_vliw_tokens (vliw_insn
*vinsn
)
7031 bfd_boolean finish_frag
;
7032 bfd_boolean is_jump
= FALSE
;
7033 bfd_boolean is_branch
= FALSE
;
7034 xtensa_isa isa
= xtensa_default_isa
;
7039 struct dwarf2_line_info debug_line
;
7040 bfd_boolean loc_directive_seen
= FALSE
;
7043 memset (&debug_line
, 0, sizeof (struct dwarf2_line_info
));
7045 if (generating_literals
)
7047 static int reported
= 0;
7049 as_bad_where (frag_now
->fr_file
, frag_now
->fr_line
,
7050 _("cannot assemble into a literal fragment"));
7057 if (frag_now_fix () != 0
7058 && (! frag_now
->tc_frag_data
.is_insn
7059 || (vinsn_has_specific_opcodes (vinsn
) && use_transform ())
7060 || (!use_transform ()) != frag_now
->tc_frag_data
.is_no_transform
7061 || (directive_state
[directive_longcalls
]
7062 != frag_now
->tc_frag_data
.use_longcalls
)
7063 || (directive_state
[directive_absolute_literals
]
7064 != frag_now
->tc_frag_data
.use_absolute_literals
)))
7066 frag_wane (frag_now
);
7068 xtensa_set_frag_assembly_state (frag_now
);
7071 if (workaround_a0_b_retw
7072 && vinsn
->num_slots
== 1
7073 && (get_last_insn_flags (now_seg
, now_subseg
) & FLAG_IS_A0_WRITER
) != 0
7074 && xtensa_opcode_is_branch (isa
, vinsn
->slots
[0].opcode
) == 1
7075 && use_transform ())
7077 has_a0_b_retw
= TRUE
;
7079 /* Mark this fragment with the special RELAX_ADD_NOP_IF_A0_B_RETW.
7080 After the first assembly pass we will check all of them and
7081 add a nop if needed. */
7082 frag_now
->tc_frag_data
.is_insn
= TRUE
;
7083 frag_var (rs_machine_dependent
, 4, 4,
7084 RELAX_ADD_NOP_IF_A0_B_RETW
,
7085 frag_now
->fr_symbol
,
7086 frag_now
->fr_offset
,
7088 xtensa_set_frag_assembly_state (frag_now
);
7089 frag_now
->tc_frag_data
.is_insn
= TRUE
;
7090 frag_var (rs_machine_dependent
, 4, 4,
7091 RELAX_ADD_NOP_IF_A0_B_RETW
,
7092 frag_now
->fr_symbol
,
7093 frag_now
->fr_offset
,
7095 xtensa_set_frag_assembly_state (frag_now
);
7098 for (slot
= 0; slot
< vinsn
->num_slots
; slot
++)
7100 tinsn
= &vinsn
->slots
[slot
];
7102 /* See if the instruction implies an aligned section. */
7103 if (xtensa_opcode_is_loop (isa
, tinsn
->opcode
) == 1)
7104 record_alignment (now_seg
, 2);
7106 /* Determine the best line number for debug info. */
7107 if ((tinsn
->loc_directive_seen
|| !loc_directive_seen
)
7108 && (tinsn
->debug_line
.filenum
!= debug_line
.filenum
7109 || tinsn
->debug_line
.line
< debug_line
.line
7110 || tinsn
->debug_line
.column
< debug_line
.column
))
7111 debug_line
= tinsn
->debug_line
;
7112 if (tinsn
->loc_directive_seen
)
7113 loc_directive_seen
= TRUE
;
7116 /* Special cases for instructions that force an alignment... */
7117 /* None of these opcodes are bundle-able. */
7118 if (xtensa_opcode_is_loop (isa
, vinsn
->slots
[0].opcode
) == 1)
7122 /* Remember the symbol that marks the end of the loop in the frag
7123 that marks the start of the loop. This way we can easily find
7124 the end of the loop at the beginning, without adding special code
7125 to mark the loop instructions themselves. */
7126 symbolS
*target_sym
= NULL
;
7127 if (vinsn
->slots
[0].tok
[1].X_op
== O_symbol
)
7128 target_sym
= vinsn
->slots
[0].tok
[1].X_add_symbol
;
7130 xtensa_set_frag_assembly_state (frag_now
);
7131 frag_now
->tc_frag_data
.is_insn
= TRUE
;
7133 max_fill
= get_text_align_max_fill_size
7134 (get_text_align_power (xtensa_fetch_width
),
7135 TRUE
, frag_now
->tc_frag_data
.is_no_density
);
7137 if (use_transform ())
7138 frag_var (rs_machine_dependent
, max_fill
, max_fill
,
7139 RELAX_ALIGN_NEXT_OPCODE
, target_sym
, 0, NULL
);
7141 frag_var (rs_machine_dependent
, 0, 0,
7142 RELAX_CHECK_ALIGN_NEXT_OPCODE
, target_sym
, 0, NULL
);
7143 xtensa_set_frag_assembly_state (frag_now
);
7146 if (vinsn
->slots
[0].opcode
== xtensa_entry_opcode
7147 && !vinsn
->slots
[0].is_specific_opcode
)
7149 xtensa_mark_literal_pool_location ();
7150 xtensa_move_labels (frag_now
, 0);
7151 frag_var (rs_align_test
, 1, 1, 0, NULL
, 2, NULL
);
7154 if (vinsn
->num_slots
== 1)
7156 if (workaround_a0_b_retw
&& use_transform ())
7157 set_last_insn_flags (now_seg
, now_subseg
, FLAG_IS_A0_WRITER
,
7158 is_register_writer (&vinsn
->slots
[0], "a", 0));
7160 set_last_insn_flags (now_seg
, now_subseg
, FLAG_IS_BAD_LOOPEND
,
7161 is_bad_loopend_opcode (&vinsn
->slots
[0]));
7164 set_last_insn_flags (now_seg
, now_subseg
, FLAG_IS_BAD_LOOPEND
, FALSE
);
7166 insn_size
= xtensa_format_length (isa
, vinsn
->format
);
7168 extra_space
= relaxation_requirements (vinsn
, &finish_frag
);
7170 /* vinsn_to_insnbuf will produce the error. */
7171 if (vinsn
->format
!= XTENSA_UNDEFINED
)
7173 f
= frag_more (insn_size
+ extra_space
);
7174 xtensa_set_frag_assembly_state (frag_now
);
7175 frag_now
->tc_frag_data
.is_insn
= TRUE
;
7178 vinsn_to_insnbuf (vinsn
, f
, frag_now
, FALSE
);
7179 if (vinsn
->format
== XTENSA_UNDEFINED
)
7182 xtensa_insnbuf_to_chars (isa
, vinsn
->insnbuf
, (unsigned char *) f
, 0);
7184 if (debug_type
== DEBUG_DWARF2
|| loc_directive_seen
)
7185 dwarf2_gen_line_info (frag_now_fix () - (insn_size
+ extra_space
),
7188 for (slot
= 0; slot
< vinsn
->num_slots
; slot
++)
7190 tinsn
= &vinsn
->slots
[slot
];
7191 frag_now
->tc_frag_data
.slot_subtypes
[slot
] = tinsn
->subtype
;
7192 frag_now
->tc_frag_data
.slot_symbols
[slot
] = tinsn
->symbol
;
7193 frag_now
->tc_frag_data
.slot_offsets
[slot
] = tinsn
->offset
;
7194 frag_now
->tc_frag_data
.literal_frags
[slot
] = tinsn
->literal_frag
;
7195 if (tinsn
->opcode
== xtensa_l32r_opcode
)
7197 frag_now
->tc_frag_data
.literal_frags
[slot
] =
7198 tinsn
->tok
[1].X_add_symbol
->sy_frag
;
7200 if (tinsn
->literal_space
!= 0)
7201 xg_assemble_literal_space (tinsn
->literal_space
, slot
);
7202 frag_now
->tc_frag_data
.free_reg
[slot
] = tinsn
->extra_arg
;
7204 if (tinsn
->subtype
== RELAX_NARROW
)
7205 gas_assert (vinsn
->num_slots
== 1);
7206 if (xtensa_opcode_is_jump (isa
, tinsn
->opcode
) == 1)
7208 if (xtensa_opcode_is_branch (isa
, tinsn
->opcode
) == 1)
7211 if (tinsn
->subtype
|| tinsn
->symbol
|| tinsn
->offset
7212 || tinsn
->literal_frag
|| is_jump
|| is_branch
)
7216 if (vinsn_has_specific_opcodes (vinsn
) && use_transform ())
7217 frag_now
->tc_frag_data
.is_specific_opcode
= TRUE
;
7221 frag_variant (rs_machine_dependent
,
7222 extra_space
, extra_space
, RELAX_SLOTS
,
7223 frag_now
->fr_symbol
, frag_now
->fr_offset
, f
);
7224 xtensa_set_frag_assembly_state (frag_now
);
7227 /* Special cases for loops:
7228 close_loop_end should be inserted AFTER short_loop.
7229 Make sure that CLOSE loops are processed BEFORE short_loops
7230 when converting them. */
7232 /* "short_loop": Add a NOP if the loop is < 4 bytes. */
7233 if (xtensa_opcode_is_loop (isa
, vinsn
->slots
[0].opcode
) == 1
7234 && !vinsn
->slots
[0].is_specific_opcode
)
7236 if (workaround_short_loop
&& use_transform ())
7238 maybe_has_short_loop
= TRUE
;
7239 frag_now
->tc_frag_data
.is_insn
= TRUE
;
7240 frag_var (rs_machine_dependent
, 4, 4,
7241 RELAX_ADD_NOP_IF_SHORT_LOOP
,
7242 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
7243 frag_now
->tc_frag_data
.is_insn
= TRUE
;
7244 frag_var (rs_machine_dependent
, 4, 4,
7245 RELAX_ADD_NOP_IF_SHORT_LOOP
,
7246 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
7249 /* "close_loop_end": Add up to 12 bytes of NOPs to keep a
7250 loop at least 12 bytes away from another loop's end. */
7251 if (workaround_close_loop_end
&& use_transform ())
7253 maybe_has_close_loop_end
= TRUE
;
7254 frag_now
->tc_frag_data
.is_insn
= TRUE
;
7255 frag_var (rs_machine_dependent
, 12, 12,
7256 RELAX_ADD_NOP_IF_CLOSE_LOOP_END
,
7257 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
7261 if (use_transform ())
7265 gas_assert (finish_frag
);
7266 frag_var (rs_machine_dependent
,
7267 xtensa_fetch_width
, xtensa_fetch_width
,
7269 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
7270 xtensa_set_frag_assembly_state (frag_now
);
7271 xtensa_maybe_create_trampoline_frag ();
7272 /* Always create one here. */
7273 xtensa_maybe_create_literal_pool_frag (TRUE
, FALSE
);
7275 else if (is_branch
&& do_align_targets ())
7277 gas_assert (finish_frag
);
7278 frag_var (rs_machine_dependent
,
7279 xtensa_fetch_width
, xtensa_fetch_width
,
7280 RELAX_MAYBE_UNREACHABLE
,
7281 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
7282 xtensa_set_frag_assembly_state (frag_now
);
7283 frag_var (rs_machine_dependent
,
7285 RELAX_MAYBE_DESIRE_ALIGN
,
7286 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
7287 xtensa_set_frag_assembly_state (frag_now
);
7291 /* Now, if the original opcode was a call... */
7292 if (do_align_targets ()
7293 && xtensa_opcode_is_call (isa
, vinsn
->slots
[0].opcode
) == 1)
7295 float freq
= get_subseg_total_freq (now_seg
, now_subseg
);
7296 frag_now
->tc_frag_data
.is_insn
= TRUE
;
7297 frag_var (rs_machine_dependent
, 4, (int) freq
, RELAX_DESIRE_ALIGN
,
7298 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
7299 xtensa_set_frag_assembly_state (frag_now
);
7302 if (vinsn_has_specific_opcodes (vinsn
) && use_transform ())
7304 frag_wane (frag_now
);
7306 xtensa_set_frag_assembly_state (frag_now
);
7311 /* xtensa_end and helper functions. */
7313 static void xtensa_cleanup_align_frags (void);
7314 static void xtensa_fix_target_frags (void);
7315 static void xtensa_mark_narrow_branches (void);
7316 static void xtensa_mark_zcl_first_insns (void);
7317 static void xtensa_mark_difference_of_two_symbols (void);
7318 static void xtensa_fix_a0_b_retw_frags (void);
7319 static void xtensa_fix_b_j_loop_end_frags (void);
7320 static void xtensa_fix_close_loop_end_frags (void);
7321 static void xtensa_fix_short_loop_frags (void);
7322 static void xtensa_sanity_check (void);
7323 static void xtensa_add_config_info (void);
7328 directive_balance ();
7329 xtensa_flush_pending_output ();
7331 past_xtensa_end
= TRUE
;
7333 xtensa_move_literals ();
7335 xtensa_reorder_segments ();
7336 xtensa_cleanup_align_frags ();
7337 xtensa_fix_target_frags ();
7338 if (workaround_a0_b_retw
&& has_a0_b_retw
)
7339 xtensa_fix_a0_b_retw_frags ();
7340 if (workaround_b_j_loop_end
)
7341 xtensa_fix_b_j_loop_end_frags ();
7343 /* "close_loop_end" should be processed BEFORE "short_loop". */
7344 if (workaround_close_loop_end
&& maybe_has_close_loop_end
)
7345 xtensa_fix_close_loop_end_frags ();
7347 if (workaround_short_loop
&& maybe_has_short_loop
)
7348 xtensa_fix_short_loop_frags ();
7350 xtensa_mark_narrow_branches ();
7351 xtensa_mark_zcl_first_insns ();
7353 xtensa_sanity_check ();
7355 xtensa_add_config_info ();
7357 xtensa_check_frag_count ();
7361 struct trampoline_frag
7363 struct trampoline_frag
*next
;
7364 bfd_boolean needs_jump_around
;
7369 struct trampoline_seg
7371 struct trampoline_seg
*next
;
7373 struct trampoline_frag trampoline_list
;
7376 static struct trampoline_seg trampoline_seg_list
;
7377 #define J_RANGE (128 * 1024)
7379 static int unreachable_count
= 0;
7383 xtensa_maybe_create_trampoline_frag (void)
7385 if (!use_trampolines
)
7388 /* We create an area for possible trampolines every 10 unreachable frags.
7389 These are preferred over the ones not preceded by an unreachable frag,
7390 because we don't have to jump around them. This function is called after
7391 each RELAX_UNREACHABLE frag is created. */
7393 if (++unreachable_count
> 10)
7395 xtensa_create_trampoline_frag (FALSE
);
7396 clear_frag_count ();
7397 unreachable_count
= 0;
7402 xtensa_check_frag_count (void)
7404 if (!use_trampolines
|| frag_now
->tc_frag_data
.is_no_transform
)
7407 /* We create an area for possible trampolines every 8000 frags or so. This
7408 is an estimate based on the max range of a "j" insn (+/-128K) divided
7409 by a typical frag byte count (16), minus a few for safety. This function
7410 is called after each source line is processed. */
7412 if (get_frag_count () > 8000)
7414 xtensa_create_trampoline_frag (TRUE
);
7415 clear_frag_count ();
7416 unreachable_count
= 0;
7419 /* We create an area for a possible literal pool every N (default 5000)
7421 xtensa_maybe_create_literal_pool_frag (TRUE
, TRUE
);
7424 static xtensa_insnbuf trampoline_buf
= NULL
;
7425 static xtensa_insnbuf trampoline_slotbuf
= NULL
;
7427 static xtensa_insnbuf litpool_buf
= NULL
;
7428 static xtensa_insnbuf litpool_slotbuf
= NULL
;
7430 #define TRAMPOLINE_FRAG_SIZE 3000
7433 xtensa_create_trampoline_frag (bfd_boolean needs_jump_around
)
7435 /* Emit a frag where we can place intermediate jump instructions,
7436 in case we need to jump farther than 128K bytes.
7437 Each jump instruction takes three bytes.
7438 We allocate enough for 1000 trampolines in each frag.
7439 If that's not enough, oh well. */
7441 struct trampoline_seg
*ts
= trampoline_seg_list
.next
;
7442 struct trampoline_frag
*tf
;
7445 int size
= TRAMPOLINE_FRAG_SIZE
;
7447 for ( ; ts
; ts
= ts
->next
)
7449 if (ts
->seg
== now_seg
)
7455 ts
= (struct trampoline_seg
*)xcalloc(sizeof (struct trampoline_seg
), 1);
7456 ts
->next
= trampoline_seg_list
.next
;
7457 trampoline_seg_list
.next
= ts
;
7461 frag_wane (frag_now
);
7463 xtensa_set_frag_assembly_state (frag_now
);
7464 varP
= frag_var (rs_machine_dependent
, size
, size
, RELAX_TRAMPOLINE
, NULL
, 0, NULL
);
7465 fragP
= (fragS
*)(varP
- SIZEOF_STRUCT_FRAG
);
7466 if (trampoline_buf
== NULL
)
7468 trampoline_buf
= xtensa_insnbuf_alloc (xtensa_default_isa
);
7469 trampoline_slotbuf
= xtensa_insnbuf_alloc (xtensa_default_isa
);
7471 tf
= (struct trampoline_frag
*)xmalloc(sizeof (struct trampoline_frag
));
7472 tf
->next
= ts
->trampoline_list
.next
;
7473 ts
->trampoline_list
.next
= tf
;
7474 tf
->needs_jump_around
= needs_jump_around
;
7480 static struct trampoline_seg
*
7481 find_trampoline_seg (asection
*seg
)
7483 struct trampoline_seg
*ts
= trampoline_seg_list
.next
;
7485 for ( ; ts
; ts
= ts
->next
)
7495 void dump_trampolines (void);
7498 dump_trampolines (void)
7500 struct trampoline_seg
*ts
= trampoline_seg_list
.next
;
7502 for ( ; ts
; ts
= ts
->next
)
7504 asection
*seg
= ts
->seg
;
7508 fprintf(stderr
, "SECTION %s\n", seg
->name
);
7509 struct trampoline_frag
*tf
= ts
->trampoline_list
.next
;
7510 for ( ; tf
; tf
= tf
->next
)
7512 if (tf
->fragP
== NULL
)
7514 fprintf(stderr
, " 0x%08x: fix=%d, jump_around=%s\n",
7515 (int)tf
->fragP
->fr_address
, (int)tf
->fragP
->fr_fix
,
7516 tf
->needs_jump_around
? "T" : "F");
7521 static void dump_litpools (void) __attribute__ ((unused
));
7524 dump_litpools (void)
7526 struct litpool_seg
*lps
= litpool_seg_list
.next
;
7527 struct litpool_frag
*lpf
;
7529 for ( ; lps
; lps
= lps
->next
)
7531 printf("litpool seg %s\n", lps
->seg
->name
);
7532 for ( lpf
= lps
->frag_list
.next
; lpf
->fragP
; lpf
= lpf
->next
)
7534 fragS
*litfrag
= lpf
->fragP
->fr_next
;
7536 while (litfrag
&& litfrag
->fr_subtype
!= RELAX_LITERAL_POOL_END
)
7538 if (litfrag
->fr_fix
== 4)
7540 litfrag
= litfrag
->fr_next
;
7542 printf(" %ld <%d:%d> (%d) [%d]: ",
7543 lpf
->addr
, lpf
->priority
, lpf
->original_priority
,
7544 lpf
->fragP
->fr_line
, count
);
7545 //dump_frag(lpf->fragP);
7551 xtensa_maybe_create_literal_pool_frag (bfd_boolean create
,
7552 bfd_boolean only_if_needed
)
7554 struct litpool_seg
*lps
= litpool_seg_list
.next
;
7556 struct litpool_frag
*lpf
;
7557 bfd_boolean needed
= FALSE
;
7559 if (use_literal_section
|| !auto_litpools
)
7562 for ( ; lps
; lps
= lps
->next
)
7564 if (lps
->seg
== now_seg
)
7570 lps
= (struct litpool_seg
*)xcalloc (sizeof (struct litpool_seg
), 1);
7571 lps
->next
= litpool_seg_list
.next
;
7572 litpool_seg_list
.next
= lps
;
7574 lps
->frag_list
.next
= &lps
->frag_list
;
7575 lps
->frag_list
.prev
= &lps
->frag_list
;
7584 if (past_xtensa_end
|| !use_transform() ||
7585 frag_now
->tc_frag_data
.is_no_transform
)
7589 if (auto_litpool_limit
<= 0)
7591 /* Don't create a litpool based only on frag count. */
7594 else if (lps
->frag_count
> auto_litpool_limit
)
7611 int size
= (only_if_needed
) ? 3 : 0; /* Space for a "j" insn. */
7612 /* Create a potential site for a literal pool. */
7613 frag_wane (frag_now
);
7615 xtensa_set_frag_assembly_state (frag_now
);
7617 fragP
->tc_frag_data
.lit_frchain
= frchain_now
;
7618 fragP
->tc_frag_data
.literal_frag
= fragP
;
7619 frag_var (rs_machine_dependent
, size
, size
,
7621 RELAX_LITERAL_POOL_CANDIDATE_BEGIN
:
7622 RELAX_LITERAL_POOL_BEGIN
,
7624 frag_now
->tc_frag_data
.lit_seg
= now_seg
;
7625 frag_variant (rs_machine_dependent
, 0, 0,
7626 RELAX_LITERAL_POOL_END
, NULL
, 0, NULL
);
7627 xtensa_set_frag_assembly_state (frag_now
);
7631 /* RELAX_LITERAL_POOL_BEGIN frag is being created;
7632 just record it here. */
7636 lpf
= (struct litpool_frag
*)xmalloc(sizeof (struct litpool_frag
));
7637 /* Insert at tail of circular list. */
7639 lps
->frag_list
.prev
->next
= lpf
;
7640 lpf
->next
= &lps
->frag_list
;
7641 lpf
->prev
= lps
->frag_list
.prev
;
7642 lps
->frag_list
.prev
= lpf
;
7644 lpf
->priority
= (needed
) ? (only_if_needed
) ? 3 : 2 : 1;
7645 lpf
->original_priority
= lpf
->priority
;
7647 lps
->frag_count
= 0;
7651 xtensa_cleanup_align_frags (void)
7656 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
7657 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
7660 /* Walk over all of the fragments in a subsection. */
7661 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
7663 if ((fragP
->fr_type
== rs_align
7664 || fragP
->fr_type
== rs_align_code
7665 || (fragP
->fr_type
== rs_machine_dependent
7666 && (fragP
->fr_subtype
== RELAX_DESIRE_ALIGN
7667 || fragP
->fr_subtype
== RELAX_DESIRE_ALIGN_IF_TARGET
)))
7668 && fragP
->fr_fix
== 0)
7670 fragS
*next
= fragP
->fr_next
;
7673 && next
->fr_fix
== 0
7674 && next
->fr_type
== rs_machine_dependent
7675 && next
->fr_subtype
== RELAX_DESIRE_ALIGN_IF_TARGET
)
7678 next
= next
->fr_next
;
7681 /* If we don't widen branch targets, then they
7682 will be easier to align. */
7683 if (fragP
->tc_frag_data
.is_branch_target
7684 && fragP
->fr_opcode
== fragP
->fr_literal
7685 && fragP
->fr_type
== rs_machine_dependent
7686 && fragP
->fr_subtype
== RELAX_SLOTS
7687 && fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_NARROW
)
7689 if (fragP
->fr_type
== rs_machine_dependent
7690 && fragP
->fr_subtype
== RELAX_UNREACHABLE
)
7691 fragP
->tc_frag_data
.is_unreachable
= TRUE
;
7697 /* Re-process all of the fragments looking to convert all of the
7698 RELAX_DESIRE_ALIGN_IF_TARGET fragments. If there is a branch
7699 target in the next fragment, convert this to RELAX_DESIRE_ALIGN.
7700 Otherwise, convert to a .fill 0. */
7703 xtensa_fix_target_frags (void)
7708 /* When this routine is called, all of the subsections are still intact
7709 so we walk over subsections instead of sections. */
7710 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
7711 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
7715 /* Walk over all of the fragments in a subsection. */
7716 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
7718 if (fragP
->fr_type
== rs_machine_dependent
7719 && fragP
->fr_subtype
== RELAX_DESIRE_ALIGN_IF_TARGET
)
7721 if (next_frag_is_branch_target (fragP
))
7722 fragP
->fr_subtype
= RELAX_DESIRE_ALIGN
;
7731 static bfd_boolean
is_narrow_branch_guaranteed_in_range (fragS
*, TInsn
*);
7734 xtensa_mark_narrow_branches (void)
7739 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
7740 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
7743 /* Walk over all of the fragments in a subsection. */
7744 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
7746 if (fragP
->fr_type
== rs_machine_dependent
7747 && fragP
->fr_subtype
== RELAX_SLOTS
7748 && fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_IMMED
)
7752 vinsn_from_chars (&vinsn
, fragP
->fr_opcode
);
7753 tinsn_immed_from_frag (&vinsn
.slots
[0], fragP
, 0);
7755 if (vinsn
.num_slots
== 1
7756 && xtensa_opcode_is_branch (xtensa_default_isa
,
7757 vinsn
.slots
[0].opcode
) == 1
7758 && xg_get_single_size (vinsn
.slots
[0].opcode
) == 2
7759 && is_narrow_branch_guaranteed_in_range (fragP
,
7762 fragP
->fr_subtype
= RELAX_SLOTS
;
7763 fragP
->tc_frag_data
.slot_subtypes
[0] = RELAX_NARROW
;
7764 fragP
->tc_frag_data
.is_aligning_branch
= 1;
7772 /* A branch is typically widened only when its target is out of
7773 range. However, we would like to widen them to align a subsequent
7774 branch target when possible.
7776 Because the branch relaxation code is so convoluted, the optimal solution
7777 (combining the two cases) is difficult to get right in all circumstances.
7778 We therefore go with an "almost as good" solution, where we only
7779 use for alignment narrow branches that definitely will not expand to a
7780 jump and a branch. These functions find and mark these cases. */
7782 /* The range in bytes of BNEZ.N and BEQZ.N. The target operand is encoded
7783 as PC + 4 + imm6, where imm6 is a 6-bit immediate ranging from 0 to 63.
7784 We start counting beginning with the frag after the 2-byte branch, so the
7785 maximum offset is (4 - 2) + 63 = 65. */
7786 #define MAX_IMMED6 65
7788 static offsetT
unrelaxed_frag_max_size (fragS
*);
7791 is_narrow_branch_guaranteed_in_range (fragS
*fragP
, TInsn
*tinsn
)
7793 const expressionS
*exp
= &tinsn
->tok
[1];
7794 symbolS
*symbolP
= exp
->X_add_symbol
;
7795 offsetT max_distance
= exp
->X_add_number
;
7798 if (exp
->X_op
!= O_symbol
)
7801 target_frag
= symbol_get_frag (symbolP
);
7803 max_distance
+= (S_GET_VALUE (symbolP
) - target_frag
->fr_address
);
7804 if (is_branch_jmp_to_next (tinsn
, fragP
))
7807 /* The branch doesn't branch over it's own frag,
7808 but over the subsequent ones. */
7809 fragP
= fragP
->fr_next
;
7810 while (fragP
!= NULL
&& fragP
!= target_frag
&& max_distance
<= MAX_IMMED6
)
7812 max_distance
+= unrelaxed_frag_max_size (fragP
);
7813 fragP
= fragP
->fr_next
;
7815 if (max_distance
<= MAX_IMMED6
&& fragP
== target_frag
)
7822 xtensa_mark_zcl_first_insns (void)
7827 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
7828 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
7831 /* Walk over all of the fragments in a subsection. */
7832 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
7834 if (fragP
->fr_type
== rs_machine_dependent
7835 && (fragP
->fr_subtype
== RELAX_ALIGN_NEXT_OPCODE
7836 || fragP
->fr_subtype
== RELAX_CHECK_ALIGN_NEXT_OPCODE
))
7838 /* Find the loop frag. */
7839 fragS
*loop_frag
= next_non_empty_frag (fragP
);
7840 /* Find the first insn frag. */
7841 fragS
*targ_frag
= next_non_empty_frag (loop_frag
);
7843 /* Handle a corner case that comes up in hardware
7844 diagnostics. The original assembly looks like this:
7847 <empty_frag>--not found by next_non_empty_frag
7850 Depending on the start address, the assembler may or
7851 may not change it to look something like this:
7854 nop--frag isn't empty anymore
7857 So set up to check the alignment of the nop if it
7859 while (loop_frag
!= targ_frag
)
7861 if (loop_frag
->fr_type
== rs_machine_dependent
7862 && (loop_frag
->fr_subtype
== RELAX_ALIGN_NEXT_OPCODE
7863 || loop_frag
->fr_subtype
7864 == RELAX_CHECK_ALIGN_NEXT_OPCODE
))
7865 targ_frag
= loop_frag
;
7867 loop_frag
= loop_frag
->fr_next
;
7870 /* Of course, sometimes (mostly for toy test cases) a
7871 zero-cost loop instruction is the last in a section. */
7874 targ_frag
->tc_frag_data
.is_first_loop_insn
= TRUE
;
7875 /* Do not widen a frag that is the first instruction of a
7876 zero-cost loop. It makes that loop harder to align. */
7877 if (targ_frag
->fr_type
== rs_machine_dependent
7878 && targ_frag
->fr_subtype
== RELAX_SLOTS
7879 && (targ_frag
->tc_frag_data
.slot_subtypes
[0]
7882 if (targ_frag
->tc_frag_data
.is_aligning_branch
)
7883 targ_frag
->tc_frag_data
.slot_subtypes
[0] = RELAX_IMMED
;
7886 frag_wane (targ_frag
);
7887 targ_frag
->tc_frag_data
.slot_subtypes
[0] = 0;
7891 if (fragP
->fr_subtype
== RELAX_CHECK_ALIGN_NEXT_OPCODE
)
7899 /* When a difference-of-symbols expression is encoded as a uleb128 or
7900 sleb128 value, the linker is unable to adjust that value to account for
7901 link-time relaxation. Mark all the code between such symbols so that
7902 its size cannot be changed by linker relaxation. */
7905 xtensa_mark_difference_of_two_symbols (void)
7909 for (expr_sym
= expr_symbols
; expr_sym
;
7910 expr_sym
= symbol_get_tc (expr_sym
)->next_expr_symbol
)
7912 expressionS
*exp
= symbol_get_value_expression (expr_sym
);
7914 if (exp
->X_op
== O_subtract
)
7916 symbolS
*left
= exp
->X_add_symbol
;
7917 symbolS
*right
= exp
->X_op_symbol
;
7919 /* Difference of two symbols not in the same section
7920 are handled with relocations in the linker. */
7921 if (S_GET_SEGMENT (left
) == S_GET_SEGMENT (right
))
7927 if (symbol_get_frag (left
)->fr_address
7928 <= symbol_get_frag (right
)->fr_address
)
7930 start
= symbol_get_frag (left
);
7931 end
= symbol_get_frag (right
);
7935 start
= symbol_get_frag (right
);
7936 end
= symbol_get_frag (left
);
7939 if (start
->tc_frag_data
.no_transform_end
!= NULL
)
7940 walk
= start
->tc_frag_data
.no_transform_end
;
7945 walk
->tc_frag_data
.is_no_transform
= 1;
7946 walk
= walk
->fr_next
;
7948 while (walk
&& walk
->fr_address
< end
->fr_address
);
7950 start
->tc_frag_data
.no_transform_end
= walk
;
7957 /* Re-process all of the fragments looking to convert all of the
7958 RELAX_ADD_NOP_IF_A0_B_RETW. If the next instruction is a
7959 conditional branch or a retw/retw.n, convert this frag to one that
7960 will generate a NOP. In any case close it off with a .fill 0. */
7962 static bfd_boolean
next_instrs_are_b_retw (fragS
*);
7965 xtensa_fix_a0_b_retw_frags (void)
7970 /* When this routine is called, all of the subsections are still intact
7971 so we walk over subsections instead of sections. */
7972 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
7973 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
7977 /* Walk over all of the fragments in a subsection. */
7978 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
7980 if (fragP
->fr_type
== rs_machine_dependent
7981 && fragP
->fr_subtype
== RELAX_ADD_NOP_IF_A0_B_RETW
)
7983 if (next_instrs_are_b_retw (fragP
))
7985 if (fragP
->tc_frag_data
.is_no_transform
)
7986 as_bad (_("instruction sequence (write a0, branch, retw) may trigger hardware errata"));
7988 relax_frag_add_nop (fragP
);
7998 next_instrs_are_b_retw (fragS
*fragP
)
8000 xtensa_opcode opcode
;
8002 const fragS
*next_fragP
= next_non_empty_frag (fragP
);
8003 static xtensa_insnbuf insnbuf
= NULL
;
8004 static xtensa_insnbuf slotbuf
= NULL
;
8005 xtensa_isa isa
= xtensa_default_isa
;
8008 bfd_boolean branch_seen
= FALSE
;
8012 insnbuf
= xtensa_insnbuf_alloc (isa
);
8013 slotbuf
= xtensa_insnbuf_alloc (isa
);
8016 if (next_fragP
== NULL
)
8019 /* Check for the conditional branch. */
8020 xtensa_insnbuf_from_chars
8021 (isa
, insnbuf
, (unsigned char *) &next_fragP
->fr_literal
[offset
], 0);
8022 fmt
= xtensa_format_decode (isa
, insnbuf
);
8023 if (fmt
== XTENSA_UNDEFINED
)
8026 for (slot
= 0; slot
< xtensa_format_num_slots (isa
, fmt
); slot
++)
8028 xtensa_format_get_slot (isa
, fmt
, slot
, insnbuf
, slotbuf
);
8029 opcode
= xtensa_opcode_decode (isa
, fmt
, slot
, slotbuf
);
8031 branch_seen
= (branch_seen
8032 || xtensa_opcode_is_branch (isa
, opcode
) == 1);
8038 offset
+= xtensa_format_length (isa
, fmt
);
8039 if (offset
== next_fragP
->fr_fix
)
8041 next_fragP
= next_non_empty_frag (next_fragP
);
8045 if (next_fragP
== NULL
)
8048 /* Check for the retw/retw.n. */
8049 xtensa_insnbuf_from_chars
8050 (isa
, insnbuf
, (unsigned char *) &next_fragP
->fr_literal
[offset
], 0);
8051 fmt
= xtensa_format_decode (isa
, insnbuf
);
8053 /* Because RETW[.N] is not bundleable, a VLIW bundle here means that we
8054 have no problems. */
8055 if (fmt
== XTENSA_UNDEFINED
8056 || xtensa_format_num_slots (isa
, fmt
) != 1)
8059 xtensa_format_get_slot (isa
, fmt
, 0, insnbuf
, slotbuf
);
8060 opcode
= xtensa_opcode_decode (isa
, fmt
, 0, slotbuf
);
8062 if (opcode
== xtensa_retw_opcode
|| opcode
== xtensa_retw_n_opcode
)
8069 /* Re-process all of the fragments looking to convert all of the
8070 RELAX_ADD_NOP_IF_PRE_LOOP_END. If there is one instruction and a
8071 loop end label, convert this frag to one that will generate a NOP.
8072 In any case close it off with a .fill 0. */
8074 static bfd_boolean
next_instr_is_loop_end (fragS
*);
8077 xtensa_fix_b_j_loop_end_frags (void)
8082 /* When this routine is called, all of the subsections are still intact
8083 so we walk over subsections instead of sections. */
8084 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
8085 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
8089 /* Walk over all of the fragments in a subsection. */
8090 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
8092 if (fragP
->fr_type
== rs_machine_dependent
8093 && fragP
->fr_subtype
== RELAX_ADD_NOP_IF_PRE_LOOP_END
)
8095 if (next_instr_is_loop_end (fragP
))
8097 if (fragP
->tc_frag_data
.is_no_transform
)
8098 as_bad (_("branching or jumping to a loop end may trigger hardware errata"));
8100 relax_frag_add_nop (fragP
);
8110 next_instr_is_loop_end (fragS
*fragP
)
8112 const fragS
*next_fragP
;
8114 if (next_frag_is_loop_target (fragP
))
8117 next_fragP
= next_non_empty_frag (fragP
);
8118 if (next_fragP
== NULL
)
8121 if (!next_frag_is_loop_target (next_fragP
))
8124 /* If the size is >= 3 then there is more than one instruction here.
8125 The hardware bug will not fire. */
8126 if (next_fragP
->fr_fix
> 3)
8133 /* Re-process all of the fragments looking to convert all of the
8134 RELAX_ADD_NOP_IF_CLOSE_LOOP_END. If there is an loop end that is
8135 not MY loop's loop end within 12 bytes, add enough nops here to
8136 make it at least 12 bytes away. In any case close it off with a
8139 static offsetT min_bytes_to_other_loop_end
8140 (fragS
*, fragS
*, offsetT
);
8143 xtensa_fix_close_loop_end_frags (void)
8148 /* When this routine is called, all of the subsections are still intact
8149 so we walk over subsections instead of sections. */
8150 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
8151 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
8155 fragS
*current_target
= NULL
;
8157 /* Walk over all of the fragments in a subsection. */
8158 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
8160 if (fragP
->fr_type
== rs_machine_dependent
8161 && ((fragP
->fr_subtype
== RELAX_ALIGN_NEXT_OPCODE
)
8162 || (fragP
->fr_subtype
== RELAX_CHECK_ALIGN_NEXT_OPCODE
)))
8163 current_target
= symbol_get_frag (fragP
->fr_symbol
);
8166 && fragP
->fr_type
== rs_machine_dependent
8167 && fragP
->fr_subtype
== RELAX_ADD_NOP_IF_CLOSE_LOOP_END
)
8170 int bytes_added
= 0;
8172 #define REQUIRED_LOOP_DIVIDING_BYTES 12
8173 /* Max out at 12. */
8174 min_bytes
= min_bytes_to_other_loop_end
8175 (fragP
->fr_next
, current_target
, REQUIRED_LOOP_DIVIDING_BYTES
);
8177 if (min_bytes
< REQUIRED_LOOP_DIVIDING_BYTES
)
8179 if (fragP
->tc_frag_data
.is_no_transform
)
8180 as_bad (_("loop end too close to another loop end may trigger hardware errata"));
8183 while (min_bytes
+ bytes_added
8184 < REQUIRED_LOOP_DIVIDING_BYTES
)
8188 if (fragP
->fr_var
< length
)
8189 as_fatal (_("fr_var %lu < length %d"),
8190 (long) fragP
->fr_var
, length
);
8193 assemble_nop (length
,
8194 fragP
->fr_literal
+ fragP
->fr_fix
);
8195 fragP
->fr_fix
+= length
;
8196 fragP
->fr_var
-= length
;
8198 bytes_added
+= length
;
8204 gas_assert (fragP
->fr_type
!= rs_machine_dependent
8205 || fragP
->fr_subtype
!= RELAX_ADD_NOP_IF_CLOSE_LOOP_END
);
8211 static offsetT
unrelaxed_frag_min_size (fragS
*);
8214 min_bytes_to_other_loop_end (fragS
*fragP
,
8215 fragS
*current_target
,
8219 fragS
*current_fragP
;
8221 for (current_fragP
= fragP
;
8223 current_fragP
= current_fragP
->fr_next
)
8225 if (current_fragP
->tc_frag_data
.is_loop_target
8226 && current_fragP
!= current_target
)
8229 offset
+= unrelaxed_frag_min_size (current_fragP
);
8231 if (offset
>= max_size
)
8239 unrelaxed_frag_min_size (fragS
*fragP
)
8241 offsetT size
= fragP
->fr_fix
;
8243 /* Add fill size. */
8244 if (fragP
->fr_type
== rs_fill
)
8245 size
+= fragP
->fr_offset
;
8252 unrelaxed_frag_max_size (fragS
*fragP
)
8254 offsetT size
= fragP
->fr_fix
;
8255 switch (fragP
->fr_type
)
8258 /* Empty frags created by the obstack allocation scheme
8259 end up with type 0. */
8264 size
+= fragP
->fr_offset
;
8272 /* No further adjustments needed. */
8274 case rs_machine_dependent
:
8275 if (fragP
->fr_subtype
!= RELAX_DESIRE_ALIGN
)
8276 size
+= fragP
->fr_var
;
8279 /* We had darn well better know how big it is. */
8288 /* Re-process all of the fragments looking to convert all
8289 of the RELAX_ADD_NOP_IF_SHORT_LOOP. If:
8292 1) the instruction size count to the loop end label
8293 is too short (<= 2 instructions),
8294 2) loop has a jump or branch in it
8297 1) workaround_all_short_loops is TRUE
8298 2) The generating loop was a 'loopgtz' or 'loopnez'
8299 3) the instruction size count to the loop end label is too short
8301 then convert this frag (and maybe the next one) to generate a NOP.
8302 In any case close it off with a .fill 0. */
8304 static int count_insns_to_loop_end (fragS
*, bfd_boolean
, int);
8305 static bfd_boolean
branch_before_loop_end (fragS
*);
8308 xtensa_fix_short_loop_frags (void)
8313 /* When this routine is called, all of the subsections are still intact
8314 so we walk over subsections instead of sections. */
8315 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
8316 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
8319 xtensa_opcode current_opcode
= XTENSA_UNDEFINED
;
8321 /* Walk over all of the fragments in a subsection. */
8322 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
8324 if (fragP
->fr_type
== rs_machine_dependent
8325 && ((fragP
->fr_subtype
== RELAX_ALIGN_NEXT_OPCODE
)
8326 || (fragP
->fr_subtype
== RELAX_CHECK_ALIGN_NEXT_OPCODE
)))
8329 fragS
*loop_frag
= next_non_empty_frag (fragP
);
8330 tinsn_from_chars (&t_insn
, loop_frag
->fr_opcode
, 0);
8331 current_opcode
= t_insn
.opcode
;
8332 gas_assert (xtensa_opcode_is_loop (xtensa_default_isa
,
8333 current_opcode
) == 1);
8336 if (fragP
->fr_type
== rs_machine_dependent
8337 && fragP
->fr_subtype
== RELAX_ADD_NOP_IF_SHORT_LOOP
)
8339 if (count_insns_to_loop_end (fragP
->fr_next
, TRUE
, 3) < 3
8340 && (branch_before_loop_end (fragP
->fr_next
)
8341 || (workaround_all_short_loops
8342 && current_opcode
!= XTENSA_UNDEFINED
8343 && current_opcode
!= xtensa_loop_opcode
)))
8345 if (fragP
->tc_frag_data
.is_no_transform
)
8346 as_bad (_("loop containing less than three instructions may trigger hardware errata"));
8348 relax_frag_add_nop (fragP
);
8357 static int unrelaxed_frag_min_insn_count (fragS
*);
8360 count_insns_to_loop_end (fragS
*base_fragP
,
8361 bfd_boolean count_relax_add
,
8364 fragS
*fragP
= NULL
;
8369 for (; fragP
&& !fragP
->tc_frag_data
.is_loop_target
; fragP
= fragP
->fr_next
)
8371 insn_count
+= unrelaxed_frag_min_insn_count (fragP
);
8372 if (insn_count
>= max_count
)
8375 if (count_relax_add
)
8377 if (fragP
->fr_type
== rs_machine_dependent
8378 && fragP
->fr_subtype
== RELAX_ADD_NOP_IF_SHORT_LOOP
)
8380 /* In order to add the appropriate number of
8381 NOPs, we count an instruction for downstream
8384 if (insn_count
>= max_count
)
8394 unrelaxed_frag_min_insn_count (fragS
*fragP
)
8396 xtensa_isa isa
= xtensa_default_isa
;
8397 static xtensa_insnbuf insnbuf
= NULL
;
8401 if (!fragP
->tc_frag_data
.is_insn
)
8405 insnbuf
= xtensa_insnbuf_alloc (isa
);
8407 /* Decode the fixed instructions. */
8408 while (offset
< fragP
->fr_fix
)
8412 xtensa_insnbuf_from_chars
8413 (isa
, insnbuf
, (unsigned char *) fragP
->fr_literal
+ offset
, 0);
8414 fmt
= xtensa_format_decode (isa
, insnbuf
);
8416 if (fmt
== XTENSA_UNDEFINED
)
8418 as_fatal (_("undecodable instruction in instruction frag"));
8421 offset
+= xtensa_format_length (isa
, fmt
);
8429 static bfd_boolean
unrelaxed_frag_has_b_j (fragS
*);
8432 branch_before_loop_end (fragS
*base_fragP
)
8436 for (fragP
= base_fragP
;
8437 fragP
&& !fragP
->tc_frag_data
.is_loop_target
;
8438 fragP
= fragP
->fr_next
)
8440 if (unrelaxed_frag_has_b_j (fragP
))
8448 unrelaxed_frag_has_b_j (fragS
*fragP
)
8450 static xtensa_insnbuf insnbuf
= NULL
;
8451 xtensa_isa isa
= xtensa_default_isa
;
8454 if (!fragP
->tc_frag_data
.is_insn
)
8458 insnbuf
= xtensa_insnbuf_alloc (isa
);
8460 /* Decode the fixed instructions. */
8461 while (offset
< fragP
->fr_fix
)
8466 xtensa_insnbuf_from_chars
8467 (isa
, insnbuf
, (unsigned char *) fragP
->fr_literal
+ offset
, 0);
8468 fmt
= xtensa_format_decode (isa
, insnbuf
);
8469 if (fmt
== XTENSA_UNDEFINED
)
8472 for (slot
= 0; slot
< xtensa_format_num_slots (isa
, fmt
); slot
++)
8474 xtensa_opcode opcode
=
8475 get_opcode_from_buf (fragP
->fr_literal
+ offset
, slot
);
8476 if (xtensa_opcode_is_branch (isa
, opcode
) == 1
8477 || xtensa_opcode_is_jump (isa
, opcode
) == 1)
8480 offset
+= xtensa_format_length (isa
, fmt
);
8486 /* Checks to be made after initial assembly but before relaxation. */
8488 static bfd_boolean
is_empty_loop (const TInsn
*, fragS
*);
8489 static bfd_boolean
is_local_forward_loop (const TInsn
*, fragS
*);
8492 xtensa_sanity_check (void)
8499 as_where (&file_name
, &line
);
8500 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
8501 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
8505 /* Walk over all of the fragments in a subsection. */
8506 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
8508 if (fragP
->fr_type
== rs_machine_dependent
8509 && fragP
->fr_subtype
== RELAX_SLOTS
8510 && fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_IMMED
)
8512 static xtensa_insnbuf insnbuf
= NULL
;
8515 if (fragP
->fr_opcode
!= NULL
)
8518 insnbuf
= xtensa_insnbuf_alloc (xtensa_default_isa
);
8519 tinsn_from_chars (&t_insn
, fragP
->fr_opcode
, 0);
8520 tinsn_immed_from_frag (&t_insn
, fragP
, 0);
8522 if (xtensa_opcode_is_loop (xtensa_default_isa
,
8523 t_insn
.opcode
) == 1)
8525 if (is_empty_loop (&t_insn
, fragP
))
8527 new_logical_line (fragP
->fr_file
, fragP
->fr_line
);
8528 as_bad (_("invalid empty loop"));
8530 if (!is_local_forward_loop (&t_insn
, fragP
))
8532 new_logical_line (fragP
->fr_file
, fragP
->fr_line
);
8533 as_bad (_("loop target does not follow "
8534 "loop instruction in section"));
8541 new_logical_line (file_name
, line
);
8545 #define LOOP_IMMED_OPN 1
8547 /* Return TRUE if the loop target is the next non-zero fragment. */
8550 is_empty_loop (const TInsn
*insn
, fragS
*fragP
)
8552 const expressionS
*exp
;
8556 if (insn
->insn_type
!= ITYPE_INSN
)
8559 if (xtensa_opcode_is_loop (xtensa_default_isa
, insn
->opcode
) != 1)
8562 if (insn
->ntok
<= LOOP_IMMED_OPN
)
8565 exp
= &insn
->tok
[LOOP_IMMED_OPN
];
8567 if (exp
->X_op
!= O_symbol
)
8570 symbolP
= exp
->X_add_symbol
;
8574 if (symbol_get_frag (symbolP
) == NULL
)
8577 if (S_GET_VALUE (symbolP
) != 0)
8580 /* Walk through the zero-size fragments from this one. If we find
8581 the target fragment, then this is a zero-size loop. */
8583 for (next_fragP
= fragP
->fr_next
;
8585 next_fragP
= next_fragP
->fr_next
)
8587 if (next_fragP
== symbol_get_frag (symbolP
))
8589 if (next_fragP
->fr_fix
!= 0)
8597 is_local_forward_loop (const TInsn
*insn
, fragS
*fragP
)
8599 const expressionS
*exp
;
8603 if (insn
->insn_type
!= ITYPE_INSN
)
8606 if (xtensa_opcode_is_loop (xtensa_default_isa
, insn
->opcode
) != 1)
8609 if (insn
->ntok
<= LOOP_IMMED_OPN
)
8612 exp
= &insn
->tok
[LOOP_IMMED_OPN
];
8614 if (exp
->X_op
!= O_symbol
)
8617 symbolP
= exp
->X_add_symbol
;
8621 if (symbol_get_frag (symbolP
) == NULL
)
8624 /* Walk through fragments until we find the target.
8625 If we do not find the target, then this is an invalid loop. */
8627 for (next_fragP
= fragP
->fr_next
;
8629 next_fragP
= next_fragP
->fr_next
)
8631 if (next_fragP
== symbol_get_frag (symbolP
))
8639 #define XTINFO_NAME "Xtensa_Info"
8640 #define XTINFO_NAMESZ 12
8641 #define XTINFO_TYPE 1
8644 xtensa_add_config_info (void)
8650 info_sec
= subseg_new (".xtensa.info", 0);
8651 bfd_set_section_flags (stdoutput
, info_sec
, SEC_HAS_CONTENTS
| SEC_READONLY
);
8653 data
= xmalloc (100);
8654 sprintf (data
, "USE_ABSOLUTE_LITERALS=%d\nABI=%d\n",
8655 XSHAL_USE_ABSOLUTE_LITERALS
, XSHAL_ABI
);
8656 sz
= strlen (data
) + 1;
8658 /* Add enough null terminators to pad to a word boundary. */
8661 while ((sz
& 3) != 0);
8663 /* Follow the standard note section layout:
8664 First write the length of the name string. */
8666 md_number_to_chars (p
, (valueT
) XTINFO_NAMESZ
, 4);
8668 /* Next comes the length of the "descriptor", i.e., the actual data. */
8670 md_number_to_chars (p
, (valueT
) sz
, 4);
8672 /* Write the note type. */
8674 md_number_to_chars (p
, (valueT
) XTINFO_TYPE
, 4);
8676 /* Write the name field. */
8677 p
= frag_more (XTINFO_NAMESZ
);
8678 memcpy (p
, XTINFO_NAME
, XTINFO_NAMESZ
);
8680 /* Finally, write the descriptor. */
8682 memcpy (p
, data
, sz
);
8688 /* Alignment Functions. */
8691 get_text_align_power (unsigned target_size
)
8693 if (target_size
<= 4)
8696 if (target_size
<= 8)
8699 if (target_size
<= 16)
8702 if (target_size
<= 32)
8705 if (target_size
<= 64)
8708 if (target_size
<= 128)
8711 if (target_size
<= 256)
8714 if (target_size
<= 512)
8717 if (target_size
<= 1024)
8726 get_text_align_max_fill_size (int align_pow
,
8727 bfd_boolean use_nops
,
8728 bfd_boolean use_no_density
)
8731 return (1 << align_pow
);
8733 return 3 * (1 << align_pow
);
8735 return 1 + (1 << align_pow
);
8739 /* Calculate the minimum bytes of fill needed at "address" to align a
8740 target instruction of size "target_size" so that it does not cross a
8741 power-of-two boundary specified by "align_pow". If "use_nops" is FALSE,
8742 the fill can be an arbitrary number of bytes. Otherwise, the space must
8743 be filled by NOP instructions. */
8746 get_text_align_fill_size (addressT address
,
8749 bfd_boolean use_nops
,
8750 bfd_boolean use_no_density
)
8752 addressT alignment
, fill
, fill_limit
, fill_step
;
8753 bfd_boolean skip_one
= FALSE
;
8755 alignment
= (1 << align_pow
);
8756 gas_assert (target_size
> 0 && alignment
>= (addressT
) target_size
);
8760 fill_limit
= alignment
;
8763 else if (!use_no_density
)
8765 /* Combine 2- and 3-byte NOPs to fill anything larger than one. */
8766 fill_limit
= alignment
* 2;
8772 /* Fill with 3-byte NOPs -- can only fill multiples of 3. */
8773 fill_limit
= alignment
* 3;
8777 /* Try all fill sizes until finding one that works. */
8778 for (fill
= 0; fill
< fill_limit
; fill
+= fill_step
)
8780 if (skip_one
&& fill
== 1)
8782 if ((address
+ fill
) >> align_pow
8783 == (address
+ fill
+ target_size
- 1) >> align_pow
)
8792 branch_align_power (segT sec
)
8794 /* If the Xtensa processor has a fetch width of X, and
8795 the section is aligned to at least that boundary, then a branch
8796 target need only fit within that aligned block of memory to avoid
8797 a stall. Otherwise, try to fit branch targets within 4-byte
8798 aligned blocks (which may be insufficient, e.g., if the section
8799 has no alignment, but it's good enough). */
8800 int fetch_align
= get_text_align_power(xtensa_fetch_width
);
8801 int sec_align
= get_recorded_alignment (sec
);
8803 if (sec_align
>= fetch_align
)
8810 /* This will assert if it is not possible. */
8813 get_text_align_nop_count (offsetT fill_size
, bfd_boolean use_no_density
)
8819 gas_assert (fill_size
% 3 == 0);
8820 return (fill_size
/ 3);
8823 gas_assert (fill_size
!= 1); /* Bad argument. */
8825 while (fill_size
> 1)
8828 if (fill_size
== 2 || fill_size
== 4)
8830 fill_size
-= insn_size
;
8833 gas_assert (fill_size
!= 1); /* Bad algorithm. */
8839 get_text_align_nth_nop_size (offsetT fill_size
,
8841 bfd_boolean use_no_density
)
8848 gas_assert (fill_size
!= 1); /* Bad argument. */
8850 while (fill_size
> 1)
8853 if (fill_size
== 2 || fill_size
== 4)
8855 fill_size
-= insn_size
;
8865 /* For the given fragment, find the appropriate address
8866 for it to begin at if we are using NOPs to align it. */
8869 get_noop_aligned_address (fragS
*fragP
, addressT address
)
8871 /* The rule is: get next fragment's FIRST instruction. Find
8872 the smallest number of bytes that need to be added to
8873 ensure that the next fragment's FIRST instruction will fit
8876 E.G., 2 bytes : 0, 1, 2 mod 4
8879 If the FIRST instruction MIGHT be relaxed,
8880 assume that it will become a 3-byte instruction.
8882 Note again here that LOOP instructions are not bundleable,
8883 and this relaxation only applies to LOOP opcodes. */
8886 int first_insn_size
;
8888 addressT pre_opcode_bytes
;
8891 xtensa_opcode opcode
;
8892 bfd_boolean is_loop
;
8894 gas_assert (fragP
->fr_type
== rs_machine_dependent
);
8895 gas_assert (fragP
->fr_subtype
== RELAX_ALIGN_NEXT_OPCODE
);
8897 /* Find the loop frag. */
8898 first_insn
= next_non_empty_frag (fragP
);
8899 /* Now find the first insn frag. */
8900 first_insn
= next_non_empty_frag (first_insn
);
8902 is_loop
= next_frag_opcode_is_loop (fragP
, &opcode
);
8903 gas_assert (is_loop
);
8904 loop_insn_size
= xg_get_single_size (opcode
);
8906 pre_opcode_bytes
= next_frag_pre_opcode_bytes (fragP
);
8907 pre_opcode_bytes
+= loop_insn_size
;
8909 /* For loops, the alignment depends on the size of the
8910 instruction following the loop, not the LOOP instruction. */
8912 if (first_insn
== NULL
)
8913 first_insn_size
= xtensa_fetch_width
;
8915 first_insn_size
= get_loop_align_size (frag_format_size (first_insn
));
8917 /* If it was 8, then we'll need a larger alignment for the section. */
8918 align_power
= get_text_align_power (first_insn_size
);
8919 record_alignment (now_seg
, align_power
);
8921 fill_size
= get_text_align_fill_size
8922 (address
+ pre_opcode_bytes
, align_power
, first_insn_size
, TRUE
,
8923 fragP
->tc_frag_data
.is_no_density
);
8925 return address
+ fill_size
;
8929 /* 3 mechanisms for relaxing an alignment:
8931 Align to a power of 2.
8932 Align so the next fragment's instruction does not cross a word boundary.
8933 Align the current instruction so that if the next instruction
8934 were 3 bytes, it would not cross a word boundary.
8938 zeros - This is easy; always insert zeros.
8939 nops - 3-byte and 2-byte instructions
8943 >=5 : 3-byte instruction + fn (n-3)
8944 widening - widen previous instructions. */
8947 get_aligned_diff (fragS
*fragP
, addressT address
, offsetT
*max_diff
)
8949 addressT target_address
, loop_insn_offset
;
8951 xtensa_opcode loop_opcode
;
8952 bfd_boolean is_loop
;
8955 offsetT branch_align
;
8958 gas_assert (fragP
->fr_type
== rs_machine_dependent
);
8959 switch (fragP
->fr_subtype
)
8961 case RELAX_DESIRE_ALIGN
:
8962 target_size
= next_frag_format_size (fragP
);
8963 if (target_size
== XTENSA_UNDEFINED
)
8965 align_power
= branch_align_power (now_seg
);
8966 branch_align
= 1 << align_power
;
8967 /* Don't count on the section alignment being as large as the target. */
8968 if (target_size
> branch_align
)
8969 target_size
= branch_align
;
8970 opt_diff
= get_text_align_fill_size (address
, align_power
,
8971 target_size
, FALSE
, FALSE
);
8973 *max_diff
= (opt_diff
+ branch_align
8974 - (target_size
+ ((address
+ opt_diff
) % branch_align
)));
8975 gas_assert (*max_diff
>= opt_diff
);
8978 case RELAX_ALIGN_NEXT_OPCODE
:
8979 /* The next non-empty frag after this one holds the LOOP instruction
8980 that needs to be aligned. The required alignment depends on the
8981 size of the next non-empty frag after the loop frag, i.e., the
8982 first instruction in the loop. */
8983 loop_frag
= next_non_empty_frag (fragP
);
8984 target_size
= get_loop_align_size (next_frag_format_size (loop_frag
));
8985 loop_insn_offset
= 0;
8986 is_loop
= next_frag_opcode_is_loop (fragP
, &loop_opcode
);
8987 gas_assert (is_loop
);
8989 /* If the loop has been expanded then the LOOP instruction
8990 could be at an offset from this fragment. */
8991 if (loop_frag
->tc_frag_data
.slot_subtypes
[0] != RELAX_IMMED
)
8992 loop_insn_offset
= get_expanded_loop_offset (loop_opcode
);
8994 /* In an ideal world, which is what we are shooting for here,
8995 we wouldn't need to use any NOPs immediately prior to the
8996 LOOP instruction. If this approach fails, relax_frag_loop_align
8997 will call get_noop_aligned_address. */
8999 address
+ loop_insn_offset
+ xg_get_single_size (loop_opcode
);
9000 align_power
= get_text_align_power (target_size
);
9001 opt_diff
= get_text_align_fill_size (target_address
, align_power
,
9002 target_size
, FALSE
, FALSE
);
9004 *max_diff
= xtensa_fetch_width
9005 - ((target_address
+ opt_diff
) % xtensa_fetch_width
)
9006 - target_size
+ opt_diff
;
9007 gas_assert (*max_diff
>= opt_diff
);
9018 /* md_relax_frag Hook and Helper Functions. */
9020 static long relax_frag_loop_align (fragS
*, long);
9021 static long relax_frag_for_align (fragS
*, long);
9022 static long relax_frag_immed
9023 (segT
, fragS
*, long, int, xtensa_format
, int, int *, bfd_boolean
);
9025 typedef struct cached_fixup cached_fixupS
;
9034 typedef struct fixup_cache fixup_cacheS
;
9037 cached_fixupS
*fixups
;
9045 static int fixup_order (const void *a
, const void *b
)
9047 const cached_fixupS
*pa
= a
;
9048 const cached_fixupS
*pb
= b
;
9050 if (pa
->addr
== pb
->addr
)
9052 if (pa
->target
== pb
->target
)
9054 if (pa
->fixP
->fx_r_type
== pb
->fixP
->fx_r_type
)
9056 return pa
->fixP
->fx_r_type
< pb
->fixP
->fx_r_type
? -1 : 1;
9058 return pa
->target
- pb
->target
;
9060 return pa
->addr
- pb
->addr
;
9063 static bfd_boolean
xtensa_make_cached_fixup (cached_fixupS
*o
, fixS
*fixP
)
9065 xtensa_isa isa
= xtensa_default_isa
;
9066 int addr
= fixP
->fx_frag
->fr_address
;
9069 symbolS
*s
= fixP
->fx_addsy
;
9072 xtensa_opcode opcode
;
9074 if (fixP
->fx_r_type
< BFD_RELOC_XTENSA_SLOT0_OP
||
9075 fixP
->fx_r_type
> BFD_RELOC_XTENSA_SLOT14_OP
)
9077 target
= S_GET_VALUE (s
);
9078 delta
= target
- addr
;
9080 if (abs(delta
) < J_RANGE
/ 2)
9083 xtensa_insnbuf_from_chars (isa
, trampoline_buf
,
9084 (unsigned char *) fixP
->fx_frag
->fr_literal
+
9086 fmt
= xtensa_format_decode (isa
, trampoline_buf
);
9087 gas_assert (fmt
!= XTENSA_UNDEFINED
);
9088 slot
= fixP
->tc_fix_data
.slot
;
9089 xtensa_format_get_slot (isa
, fmt
, slot
, trampoline_buf
, trampoline_slotbuf
);
9090 opcode
= xtensa_opcode_decode (isa
, fmt
, slot
, trampoline_slotbuf
);
9091 if (opcode
!= xtensa_j_opcode
)
9102 static void xtensa_realloc_fixup_cache (fixup_cacheS
*cache
, unsigned add
)
9104 if (cache
->n_fixups
+ add
> cache
->n_max
)
9106 cache
->n_max
= (cache
->n_fixups
+ add
) * 2;
9107 cache
->fixups
= xrealloc (cache
->fixups
,
9108 sizeof (*cache
->fixups
) * cache
->n_max
);
9112 static void xtensa_cache_relaxable_fixups (fixup_cacheS
*cache
,
9113 segment_info_type
*seginfo
)
9117 cache
->n_fixups
= 0;
9119 for (fixP
= seginfo
->fix_root
; fixP
; fixP
= fixP
->fx_next
)
9121 xtensa_realloc_fixup_cache (cache
, 1);
9123 if (xtensa_make_cached_fixup (cache
->fixups
+ cache
->n_fixups
, fixP
))
9126 qsort (cache
->fixups
, cache
->n_fixups
, sizeof (*cache
->fixups
), fixup_order
);
9129 static unsigned xtensa_find_first_cached_fixup (const fixup_cacheS
*cache
,
9133 unsigned b
= cache
->n_fixups
;
9137 unsigned c
= (a
+ b
) / 2;
9139 if (cache
->fixups
[c
].addr
< addr
)
9147 static void xtensa_delete_cached_fixup (fixup_cacheS
*cache
, unsigned i
)
9149 memmove (cache
->fixups
+ i
, cache
->fixups
+ i
+ 1,
9150 (cache
->n_fixups
- i
- 1) * sizeof (*cache
->fixups
));
9154 static bfd_boolean
xtensa_add_cached_fixup (fixup_cacheS
*cache
, fixS
*fixP
)
9159 if (!xtensa_make_cached_fixup (&o
, fixP
))
9161 xtensa_realloc_fixup_cache (cache
, 1);
9162 i
= xtensa_find_first_cached_fixup (cache
, o
.addr
);
9163 if (i
< cache
->n_fixups
)
9166 memmove (cache
->fixups
+ i
+ 1, cache
->fixups
+ i
,
9167 (cache
->n_fixups
- i
) * sizeof (*cache
->fixups
));
9169 cache
->fixups
[i
] = o
;
9174 /* Return the number of bytes added to this fragment, given that the
9175 input has been stretched already by "stretch". */
9178 xtensa_relax_frag (fragS
*fragP
, long stretch
, int *stretched_p
)
9180 xtensa_isa isa
= xtensa_default_isa
;
9181 int unreported
= fragP
->tc_frag_data
.unreported_expansion
;
9182 long new_stretch
= 0;
9186 static xtensa_insnbuf vbuf
= NULL
;
9187 int slot
, num_slots
;
9190 as_where (&file_name
, &line
);
9191 new_logical_line (fragP
->fr_file
, fragP
->fr_line
);
9193 fragP
->tc_frag_data
.unreported_expansion
= 0;
9195 switch (fragP
->fr_subtype
)
9197 case RELAX_ALIGN_NEXT_OPCODE
:
9198 /* Always convert. */
9199 if (fragP
->tc_frag_data
.relax_seen
)
9200 new_stretch
= relax_frag_loop_align (fragP
, stretch
);
9203 case RELAX_LOOP_END
:
9207 case RELAX_LOOP_END_ADD_NOP
:
9208 /* Add a NOP and switch to .fill 0. */
9209 new_stretch
= relax_frag_add_nop (fragP
);
9213 case RELAX_DESIRE_ALIGN
:
9214 /* Do nothing. The narrowing before this frag will either align
9219 case RELAX_LITERAL_FINAL
:
9222 case RELAX_LITERAL_NR
:
9224 fragP
->fr_subtype
= RELAX_LITERAL_FINAL
;
9225 gas_assert (unreported
== lit_size
);
9226 memset (&fragP
->fr_literal
[fragP
->fr_fix
], 0, 4);
9227 fragP
->fr_var
-= lit_size
;
9228 fragP
->fr_fix
+= lit_size
;
9234 vbuf
= xtensa_insnbuf_alloc (isa
);
9236 xtensa_insnbuf_from_chars
9237 (isa
, vbuf
, (unsigned char *) fragP
->fr_opcode
, 0);
9238 fmt
= xtensa_format_decode (isa
, vbuf
);
9239 num_slots
= xtensa_format_num_slots (isa
, fmt
);
9241 for (slot
= 0; slot
< num_slots
; slot
++)
9243 switch (fragP
->tc_frag_data
.slot_subtypes
[slot
])
9246 if (fragP
->tc_frag_data
.relax_seen
)
9247 new_stretch
+= relax_frag_for_align (fragP
, stretch
);
9251 case RELAX_IMMED_STEP1
:
9252 case RELAX_IMMED_STEP2
:
9253 case RELAX_IMMED_STEP3
:
9254 /* Place the immediate. */
9255 new_stretch
+= relax_frag_immed
9256 (now_seg
, fragP
, stretch
,
9257 fragP
->tc_frag_data
.slot_subtypes
[slot
] - RELAX_IMMED
,
9258 fmt
, slot
, stretched_p
, FALSE
);
9262 /* This is OK; see the note in xg_assemble_vliw_tokens. */
9268 case RELAX_LITERAL_POOL_BEGIN
:
9269 if (fragP
->fr_var
!= 0)
9271 /* We have a converted "candidate" literal pool;
9272 assemble a jump around it. */
9274 if (!litpool_slotbuf
)
9276 litpool_buf
= xtensa_insnbuf_alloc (isa
);
9277 litpool_slotbuf
= xtensa_insnbuf_alloc (isa
);
9280 fragP
->tc_frag_data
.relax_seen
= FALSE
; /* Need another pass. */
9281 fragP
->tc_frag_data
.is_insn
= TRUE
;
9283 insn
.insn_type
= ITYPE_INSN
;
9284 insn
.opcode
= xtensa_j_opcode
;
9286 set_expr_symbol_offset (&insn
.tok
[0], fragP
->fr_symbol
,
9288 fmt
= xg_get_single_format (xtensa_j_opcode
);
9289 tinsn_to_slotbuf (fmt
, 0, &insn
, litpool_slotbuf
);
9290 xtensa_format_set_slot (isa
, fmt
, 0, litpool_buf
, litpool_slotbuf
);
9291 xtensa_insnbuf_to_chars (isa
, litpool_buf
,
9292 (unsigned char *)fragP
->fr_literal
+
9297 fix_new (fragP
, 0, 3, fragP
->fr_symbol
, 0, TRUE
,
9298 BFD_RELOC_XTENSA_SLOT0_OP
);
9302 case RELAX_LITERAL_POOL_END
:
9303 case RELAX_LITERAL_POOL_CANDIDATE_BEGIN
:
9304 case RELAX_MAYBE_UNREACHABLE
:
9305 case RELAX_MAYBE_DESIRE_ALIGN
:
9306 /* No relaxation required. */
9309 case RELAX_FILL_NOP
:
9310 case RELAX_UNREACHABLE
:
9311 if (fragP
->tc_frag_data
.relax_seen
)
9312 new_stretch
+= relax_frag_for_align (fragP
, stretch
);
9315 case RELAX_TRAMPOLINE
:
9316 if (fragP
->tc_frag_data
.relax_seen
)
9318 static fixup_cacheS fixup_cache
;
9319 segment_info_type
*seginfo
= seg_info (now_seg
);
9320 int trampaddr
= fragP
->fr_address
+ fragP
->fr_fix
;
9321 int searchaddr
= trampaddr
< J_RANGE
? 0 : trampaddr
- J_RANGE
;
9324 if (now_seg
!= fixup_cache
.seg
||
9325 fragP
== fixup_cache
.first_frag
||
9326 fixup_cache
.first_frag
== NULL
)
9328 xtensa_cache_relaxable_fixups (&fixup_cache
, seginfo
);
9329 fixup_cache
.seg
= now_seg
;
9330 fixup_cache
.first_frag
= fragP
;
9333 /* Scan for jumps that will not reach. */
9334 for (i
= xtensa_find_first_cached_fixup (&fixup_cache
, searchaddr
);
9335 i
< fixup_cache
.n_fixups
; ++i
)
9338 fixS
*fixP
= fixup_cache
.fixups
[i
].fixP
;
9339 int target
= fixup_cache
.fixups
[i
].target
;
9340 int addr
= fixup_cache
.fixups
[i
].addr
;
9341 int delta
= fixup_cache
.fixups
[i
].delta
+ stretch
;
9343 trampaddr
= fragP
->fr_address
+ fragP
->fr_fix
;
9345 if (addr
+ J_RANGE
< trampaddr
)
9347 if (addr
> trampaddr
+ J_RANGE
)
9349 if (abs (delta
) < J_RANGE
)
9352 slot
= fixP
->tc_fix_data
.slot
;
9354 if (delta
> J_RANGE
|| delta
< -1 * J_RANGE
)
9355 { /* Found an out-of-range jump; scan the list of trampolines for the best match. */
9356 struct trampoline_seg
*ts
= find_trampoline_seg (now_seg
);
9357 struct trampoline_frag
*tf
= ts
->trampoline_list
.next
;
9358 struct trampoline_frag
*prev
= &ts
->trampoline_list
;
9359 int lower
= (target
< addr
) ? target
: addr
;
9360 int upper
= (target
> addr
) ? target
: addr
;
9361 int midpoint
= lower
+ (upper
- lower
) / 2;
9363 if ((upper
- lower
) > 2 * J_RANGE
)
9365 /* One trampoline won't suffice; we need multiple jumps.
9366 Jump to the trampoline that's farthest, but still in
9367 range relative to the original "j" instruction. */
9368 for ( ; tf
; prev
= tf
, tf
= tf
->next
)
9370 int this_addr
= tf
->fragP
->fr_address
+ tf
->fragP
->fr_fix
;
9371 int next_addr
= (tf
->next
) ? tf
->next
->fragP
->fr_address
+ tf
->next
->fragP
->fr_fix
: 0 ;
9376 if (this_addr
- addr
< J_RANGE
)
9381 /* Backward jump. */
9382 if (next_addr
== 0 || addr
- next_addr
> J_RANGE
)
9389 struct trampoline_frag
*best_tf
= NULL
;
9392 for ( ; tf
; prev
= tf
, tf
= tf
->next
)
9394 int this_addr
= tf
->fragP
->fr_address
+ tf
->fragP
->fr_fix
;
9395 int this_delta
= abs (this_addr
- midpoint
);
9397 if (!best_tf
|| this_delta
< best_delta
)
9400 best_delta
= this_delta
;
9405 if (tf
->fragP
== fragP
)
9407 if (abs (addr
- trampaddr
) < J_RANGE
)
9408 { /* The trampoline is in range of original; fix it! */
9413 fragS
*fP
; /* The out-of-range jump. */
9415 new_stretch
+= init_trampoline_frag (tf
);
9416 offset
= fragP
->fr_fix
; /* Where to assemble the j insn. */
9417 lsym
= fragP
->fr_symbol
;
9419 /* Assemble a jump to the target label here. */
9421 insn
.insn_type
= ITYPE_INSN
;
9422 insn
.opcode
= xtensa_j_opcode
;
9424 set_expr_symbol_offset (&insn
.tok
[0], lsym
, offset
);
9425 fmt
= xg_get_single_format (xtensa_j_opcode
);
9426 tinsn_to_slotbuf (fmt
, 0, &insn
, trampoline_slotbuf
);
9427 xtensa_format_set_slot (isa
, fmt
, 0, trampoline_buf
, trampoline_slotbuf
);
9428 xtensa_insnbuf_to_chars (isa
, trampoline_buf
, (unsigned char *)fragP
->fr_literal
+ offset
, 3);
9431 /* Add a fix-up for the original j insn. */
9432 newfixP
= fix_new (fP
, fixP
->fx_where
, fixP
->fx_size
, lsym
, fragP
->fr_fix
- 3, TRUE
, fixP
->fx_r_type
);
9433 newfixP
->fx_no_overflow
= 1;
9434 newfixP
->tc_fix_data
.X_add_symbol
= lsym
;
9435 newfixP
->tc_fix_data
.X_add_number
= offset
;
9436 newfixP
->tc_fix_data
.slot
= slot
;
9438 xtensa_delete_cached_fixup (&fixup_cache
, i
);
9439 xtensa_add_cached_fixup (&fixup_cache
, newfixP
);
9441 /* Move the fix-up from the original j insn to this one. */
9442 fixP
->fx_frag
= fragP
;
9443 fixP
->fx_where
= fragP
->fr_fix
- 3;
9444 fixP
->tc_fix_data
.slot
= 0;
9446 xtensa_add_cached_fixup (&fixup_cache
, fixP
);
9448 /* re-do current fixup */
9451 /* Adjust the jump around this trampoline (if present). */
9452 if (tf
->fixP
!= NULL
)
9454 tf
->fixP
->fx_offset
+= 3;
9457 fragP
->tc_frag_data
.relax_seen
= FALSE
; /* Need another pass. */
9458 /* Do we have room for more? */
9459 if (fragP
->fr_var
< 3)
9460 { /* No, convert to fill. */
9462 fragP
->fr_subtype
= 0;
9463 /* Remove from the trampoline_list. */
9464 prev
->next
= tf
->next
;
9465 if (fragP
== fixup_cache
.first_frag
)
9466 fixup_cache
.first_frag
= NULL
;
9477 as_bad (_("bad relaxation state"));
9480 /* Tell gas we need another relaxation pass. */
9481 if (! fragP
->tc_frag_data
.relax_seen
)
9483 fragP
->tc_frag_data
.relax_seen
= TRUE
;
9487 new_logical_line (file_name
, line
);
9493 relax_frag_loop_align (fragS
*fragP
, long stretch
)
9495 addressT old_address
, old_next_address
, old_size
;
9496 addressT new_address
, new_next_address
, new_size
;
9499 /* All the frags with relax_frag_for_alignment prior to this one in the
9500 section have been done, hopefully eliminating the need for a NOP here.
9501 But, this will put it in if necessary. */
9503 /* Calculate the old address of this fragment and the next fragment. */
9504 old_address
= fragP
->fr_address
- stretch
;
9505 old_next_address
= (fragP
->fr_address
- stretch
+ fragP
->fr_fix
+
9506 fragP
->tc_frag_data
.text_expansion
[0]);
9507 old_size
= old_next_address
- old_address
;
9509 /* Calculate the new address of this fragment and the next fragment. */
9510 new_address
= fragP
->fr_address
;
9512 get_noop_aligned_address (fragP
, fragP
->fr_address
+ fragP
->fr_fix
);
9513 new_size
= new_next_address
- new_address
;
9515 growth
= new_size
- old_size
;
9517 /* Fix up the text_expansion field and return the new growth. */
9518 fragP
->tc_frag_data
.text_expansion
[0] += growth
;
9523 /* Add a NOP instruction. */
9526 relax_frag_add_nop (fragS
*fragP
)
9528 char *nop_buf
= fragP
->fr_literal
+ fragP
->fr_fix
;
9529 int length
= fragP
->tc_frag_data
.is_no_density
? 3 : 2;
9530 assemble_nop (length
, nop_buf
);
9531 fragP
->tc_frag_data
.is_insn
= TRUE
;
9533 if (fragP
->fr_var
< length
)
9535 as_fatal (_("fr_var (%ld) < length (%d)"), (long) fragP
->fr_var
, length
);
9539 fragP
->fr_fix
+= length
;
9540 fragP
->fr_var
-= length
;
9545 static long future_alignment_required (fragS
*, long);
9548 relax_frag_for_align (fragS
*fragP
, long stretch
)
9550 /* Overview of the relaxation procedure for alignment:
9551 We can widen with NOPs or by widening instructions or by filling
9552 bytes after jump instructions. Find the opportune places and widen
9553 them if necessary. */
9558 gas_assert (fragP
->fr_subtype
== RELAX_FILL_NOP
9559 || fragP
->fr_subtype
== RELAX_UNREACHABLE
9560 || (fragP
->fr_subtype
== RELAX_SLOTS
9561 && fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_NARROW
));
9563 stretch_me
= future_alignment_required (fragP
, stretch
);
9564 diff
= stretch_me
- fragP
->tc_frag_data
.text_expansion
[0];
9570 /* We expanded on a previous pass. Can we shrink now? */
9571 long shrink
= fragP
->tc_frag_data
.text_expansion
[0] - stretch_me
;
9572 if (shrink
<= stretch
&& stretch
> 0)
9574 fragP
->tc_frag_data
.text_expansion
[0] = stretch_me
;
9580 /* Below here, diff > 0. */
9581 fragP
->tc_frag_data
.text_expansion
[0] = stretch_me
;
9587 /* Return the address of the next frag that should be aligned.
9589 By "address" we mean the address it _would_ be at if there
9590 is no action taken to align it between here and the target frag.
9591 In other words, if no narrows and no fill nops are used between
9592 here and the frag to align, _even_if_ some of the frags we use
9593 to align targets have already expanded on a previous relaxation
9596 Also, count each frag that may be used to help align the target.
9598 Return 0 if there are no frags left in the chain that need to be
9602 find_address_of_next_align_frag (fragS
**fragPP
,
9606 bfd_boolean
*paddable
)
9608 fragS
*fragP
= *fragPP
;
9609 addressT address
= fragP
->fr_address
;
9611 /* Do not reset the counts to 0. */
9615 /* Limit this to a small search. */
9616 if (*widens
>= (int) xtensa_fetch_width
)
9621 address
+= fragP
->fr_fix
;
9623 if (fragP
->fr_type
== rs_fill
)
9624 address
+= fragP
->fr_offset
* fragP
->fr_var
;
9625 else if (fragP
->fr_type
== rs_machine_dependent
)
9627 switch (fragP
->fr_subtype
)
9629 case RELAX_UNREACHABLE
:
9633 case RELAX_FILL_NOP
:
9635 if (!fragP
->tc_frag_data
.is_no_density
)
9640 if (fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_NARROW
)
9645 address
+= total_frag_text_expansion (fragP
);
9649 address
+= fragP
->tc_frag_data
.text_expansion
[0];
9652 case RELAX_ALIGN_NEXT_OPCODE
:
9653 case RELAX_DESIRE_ALIGN
:
9657 case RELAX_MAYBE_UNREACHABLE
:
9658 case RELAX_MAYBE_DESIRE_ALIGN
:
9663 /* Just punt if we don't know the type. */
9670 /* Just punt if we don't know the type. */
9674 fragP
= fragP
->fr_next
;
9682 static long bytes_to_stretch (fragS
*, int, int, int, int);
9685 future_alignment_required (fragS
*fragP
, long stretch ATTRIBUTE_UNUSED
)
9687 fragS
*this_frag
= fragP
;
9691 int narrow_nops
= 0;
9692 bfd_boolean paddable
= FALSE
;
9693 offsetT local_opt_diff
;
9696 int stretch_amount
= 0;
9697 int local_stretch_amount
;
9698 int global_stretch_amount
;
9700 address
= find_address_of_next_align_frag
9701 (&fragP
, &wide_nops
, &narrow_nops
, &num_widens
, &paddable
);
9705 if (this_frag
->tc_frag_data
.is_aligning_branch
)
9706 this_frag
->tc_frag_data
.slot_subtypes
[0] = RELAX_IMMED
;
9708 frag_wane (this_frag
);
9712 local_opt_diff
= get_aligned_diff (fragP
, address
, &max_diff
);
9713 opt_diff
= local_opt_diff
;
9714 gas_assert (opt_diff
>= 0);
9715 gas_assert (max_diff
>= opt_diff
);
9720 fragP
= fragP
->fr_next
;
9722 while (fragP
&& opt_diff
< max_diff
&& address
)
9724 /* We only use these to determine if we can exit early
9725 because there will be plenty of ways to align future
9727 int glob_widens
= 0;
9730 bfd_boolean glob_pad
= 0;
9731 address
= find_address_of_next_align_frag
9732 (&fragP
, &glob_widens
, &dnn
, &dw
, &glob_pad
);
9733 /* If there is a padable portion, then skip. */
9734 if (glob_pad
|| glob_widens
>= (1 << branch_align_power (now_seg
)))
9739 offsetT next_m_diff
;
9740 offsetT next_o_diff
;
9742 /* Downrange frags haven't had stretch added to them yet. */
9745 /* The address also includes any text expansion from this
9746 frag in a previous pass, but we don't want that. */
9747 address
-= this_frag
->tc_frag_data
.text_expansion
[0];
9749 /* Assume we are going to move at least opt_diff. In
9750 reality, we might not be able to, but assuming that
9751 we will helps catch cases where moving opt_diff pushes
9752 the next target from aligned to unaligned. */
9753 address
+= opt_diff
;
9755 next_o_diff
= get_aligned_diff (fragP
, address
, &next_m_diff
);
9757 /* Now cleanup for the adjustments to address. */
9758 next_o_diff
+= opt_diff
;
9759 next_m_diff
+= opt_diff
;
9760 if (next_o_diff
<= max_diff
&& next_o_diff
> opt_diff
)
9761 opt_diff
= next_o_diff
;
9762 if (next_m_diff
< max_diff
)
9763 max_diff
= next_m_diff
;
9764 fragP
= fragP
->fr_next
;
9768 /* If there are enough wideners in between, do it. */
9771 if (this_frag
->fr_subtype
== RELAX_UNREACHABLE
)
9773 gas_assert (opt_diff
<= (signed) xtensa_fetch_width
);
9778 local_stretch_amount
9779 = bytes_to_stretch (this_frag
, wide_nops
, narrow_nops
,
9780 num_widens
, local_opt_diff
);
9781 global_stretch_amount
9782 = bytes_to_stretch (this_frag
, wide_nops
, narrow_nops
,
9783 num_widens
, opt_diff
);
9784 /* If the condition below is true, then the frag couldn't
9785 stretch the correct amount for the global case, so we just
9786 optimize locally. We'll rely on the subsequent frags to get
9787 the correct alignment in the global case. */
9788 if (global_stretch_amount
< local_stretch_amount
)
9789 stretch_amount
= local_stretch_amount
;
9791 stretch_amount
= global_stretch_amount
;
9793 if (this_frag
->fr_subtype
== RELAX_SLOTS
9794 && this_frag
->tc_frag_data
.slot_subtypes
[0] == RELAX_NARROW
)
9795 gas_assert (stretch_amount
<= 1);
9796 else if (this_frag
->fr_subtype
== RELAX_FILL_NOP
)
9798 if (this_frag
->tc_frag_data
.is_no_density
)
9799 gas_assert (stretch_amount
== 3 || stretch_amount
== 0);
9801 gas_assert (stretch_amount
<= 3);
9804 return stretch_amount
;
9808 /* The idea: widen everything you can to get a target or loop aligned,
9809 then start using NOPs.
9811 wide_nops = the number of wide NOPs available for aligning
9812 narrow_nops = the number of narrow NOPs available for aligning
9813 (a subset of wide_nops)
9814 widens = the number of narrow instructions that should be widened
9819 bytes_to_stretch (fragS
*this_frag
,
9828 int bytes_short
= desired_diff
- num_widens
;
9830 gas_assert (desired_diff
>= 0
9831 && desired_diff
< (signed) xtensa_fetch_width
);
9832 if (desired_diff
== 0)
9835 gas_assert (wide_nops
> 0 || num_widens
> 0);
9837 /* Always prefer widening to NOP-filling. */
9838 if (bytes_short
< 0)
9840 /* There are enough RELAX_NARROW frags after this one
9841 to align the target without widening this frag in any way. */
9845 if (bytes_short
== 0)
9847 /* Widen every narrow between here and the align target
9848 and the align target will be properly aligned. */
9849 if (this_frag
->fr_subtype
== RELAX_FILL_NOP
)
9855 /* From here we will need at least one NOP to get an alignment.
9856 However, we may not be able to align at all, in which case,
9858 nops_needed
= desired_diff
/ 3;
9860 /* If there aren't enough nops, don't widen. */
9861 if (nops_needed
> wide_nops
)
9864 /* First try it with all wide nops. */
9865 nop_bytes
= nops_needed
* 3;
9866 extra_bytes
= desired_diff
- nop_bytes
;
9868 if (nop_bytes
+ num_widens
>= desired_diff
)
9870 if (this_frag
->fr_subtype
== RELAX_FILL_NOP
)
9872 else if (num_widens
== extra_bytes
)
9877 /* Add a narrow nop. */
9881 if (narrow_nops
== 0 || nops_needed
> wide_nops
)
9884 if (nop_bytes
+ num_widens
>= desired_diff
&& extra_bytes
>= 0)
9886 if (this_frag
->fr_subtype
== RELAX_FILL_NOP
)
9887 return !this_frag
->tc_frag_data
.is_no_density
? 2 : 3;
9888 else if (num_widens
== extra_bytes
)
9893 /* Replace a wide nop with a narrow nop--we can get here if
9894 extra_bytes was negative in the previous conditional. */
9895 if (narrow_nops
== 1)
9899 if (nop_bytes
+ num_widens
>= desired_diff
)
9901 if (this_frag
->fr_subtype
== RELAX_FILL_NOP
)
9902 return !this_frag
->tc_frag_data
.is_no_density
? 2 : 3;
9903 else if (num_widens
== extra_bytes
)
9908 /* If we can't satisfy any of the above cases, then we can't align
9909 using padding or fill nops. */
9914 static struct trampoline_frag
*
9915 search_trampolines (TInsn
*tinsn
, fragS
*fragP
, bfd_boolean unreachable_only
)
9917 struct trampoline_seg
*ts
= find_trampoline_seg (now_seg
);
9918 struct trampoline_frag
*tf
= (ts
) ? ts
->trampoline_list
.next
: NULL
;
9919 struct trampoline_frag
*best_tf
= NULL
;
9922 symbolS
*sym
= tinsn
->tok
[0].X_add_symbol
;
9923 offsetT target
= S_GET_VALUE (sym
) + tinsn
->tok
[0].X_add_number
;
9924 offsetT addr
= fragP
->fr_address
;
9925 offsetT lower
= (addr
< target
) ? addr
: target
;
9926 offsetT upper
= (addr
> target
) ? addr
: target
;
9927 int delta
= upper
- lower
;
9928 offsetT midpoint
= lower
+ delta
/ 2;
9929 int this_delta
= -1;
9932 if (delta
> 2 * J_RANGE
)
9934 /* One trampoline won't do; we need multiple.
9935 Choose the farthest trampoline that's still in range of the original
9936 and let a later pass finish the job. */
9937 for ( ; tf
; tf
= tf
->next
)
9939 int next_addr
= (tf
->next
) ? tf
->next
->fragP
->fr_address
+ tf
->next
->fragP
->fr_fix
: 0;
9941 this_addr
= tf
->fragP
->fr_address
+ tf
->fragP
->fr_fix
;
9945 if (this_addr
- addr
< J_RANGE
)
9950 /* Backward jump. */
9951 if (next_addr
== 0 || addr
- next_addr
> J_RANGE
)
9955 if (abs (addr
- this_addr
) < J_RANGE
)
9960 for ( ; tf
; tf
= tf
->next
)
9962 this_addr
= tf
->fragP
->fr_address
+ tf
->fragP
->fr_fix
;
9963 this_delta
= abs (this_addr
- midpoint
);
9964 if (unreachable_only
&& tf
->needs_jump_around
)
9966 if (!best_tf
|| this_delta
< best_delta
)
9969 best_delta
= this_delta
;
9970 best_addr
= this_addr
;
9975 best_delta
< J_RANGE
&&
9976 abs(best_addr
- lower
) < J_RANGE
&&
9977 abs(best_addr
- upper
) < J_RANGE
)
9980 return NULL
; /* No suitable trampoline found. */
9984 static struct trampoline_frag
*
9985 get_best_trampoline (TInsn
*tinsn
, fragS
*fragP
)
9987 struct trampoline_frag
*tf
= NULL
;
9989 tf
= search_trampolines (tinsn
, fragP
, TRUE
); /* Try unreachable first. */
9992 tf
= search_trampolines (tinsn
, fragP
, FALSE
); /* Try ones needing a jump-around, too. */
9999 check_and_update_trampolines (void)
10001 struct trampoline_seg
*ts
= find_trampoline_seg (now_seg
);
10002 struct trampoline_frag
*tf
= ts
->trampoline_list
.next
;
10003 struct trampoline_frag
*prev
= &ts
->trampoline_list
;
10005 for ( ; tf
; prev
= tf
, tf
= tf
->next
)
10007 if (tf
->fragP
->fr_var
< 3)
10009 frag_wane (tf
->fragP
);
10010 prev
->next
= tf
->next
;
10018 init_trampoline_frag (struct trampoline_frag
*trampP
)
10020 fragS
*fp
= trampP
->fragP
;
10023 if (fp
->fr_fix
== 0)
10026 char label
[10 + 2 * sizeof(fp
)];
10027 sprintf (label
, ".L0_TR_%p", fp
);
10029 lsym
= (symbolS
*)local_symbol_make (label
, now_seg
, 0, fp
);
10030 fp
->fr_symbol
= lsym
;
10031 if (trampP
->needs_jump_around
)
10033 /* Add a jump around this block of jumps, in case
10034 control flows into this block. */
10038 xtensa_isa isa
= xtensa_default_isa
;
10040 fp
->tc_frag_data
.is_insn
= 1;
10041 /* Assemble a jump insn. */
10042 tinsn_init (&insn
);
10043 insn
.insn_type
= ITYPE_INSN
;
10044 insn
.opcode
= xtensa_j_opcode
;
10046 set_expr_symbol_offset (&insn
.tok
[0], lsym
, 3);
10047 fmt
= xg_get_single_format (xtensa_j_opcode
);
10048 tinsn_to_slotbuf (fmt
, 0, &insn
, trampoline_slotbuf
);
10049 xtensa_format_set_slot (isa
, fmt
, 0, trampoline_buf
, trampoline_slotbuf
);
10050 xtensa_insnbuf_to_chars (isa
, trampoline_buf
, (unsigned char *)fp
->fr_literal
, 3);
10054 fixP
= fix_new (fp
, 0, 3, lsym
, 3, TRUE
, BFD_RELOC_XTENSA_SLOT0_OP
);
10055 trampP
->fixP
= fixP
;
10063 add_jump_to_trampoline (struct trampoline_frag
*trampP
, fragS
*origfrag
)
10065 fragS
*tramp
= trampP
->fragP
;
10067 int offset
= tramp
->fr_fix
; /* Where to assemble the j insn. */
10073 xtensa_isa isa
= xtensa_default_isa
;
10076 lsym
= tramp
->fr_symbol
;
10077 /* Assemble a jump to the target label in the trampoline frag. */
10078 tsym
= origfrag
->tc_frag_data
.slot_symbols
[0];
10079 toffset
= origfrag
-> tc_frag_data
.slot_offsets
[0];
10080 tinsn_init (&insn
);
10081 insn
.insn_type
= ITYPE_INSN
;
10082 insn
.opcode
= xtensa_j_opcode
;
10084 set_expr_symbol_offset (&insn
.tok
[0], tsym
, toffset
);
10085 fmt
= xg_get_single_format (xtensa_j_opcode
);
10086 tinsn_to_slotbuf (fmt
, 0, &insn
, trampoline_slotbuf
);
10087 xtensa_format_set_slot (isa
, fmt
, 0, trampoline_buf
, trampoline_slotbuf
);
10088 xtensa_insnbuf_to_chars (isa
, trampoline_buf
, (unsigned char *)tramp
->fr_literal
+ offset
, 3);
10089 tramp
->fr_fix
+= 3;
10090 tramp
->fr_var
-= 3;
10092 /* add a fix-up for the trampoline jump. */
10093 fixP
= fix_new (tramp
, tramp
->fr_fix
- 3, 3, tsym
, toffset
, TRUE
, BFD_RELOC_XTENSA_SLOT0_OP
);
10094 /* Modify the jump at the start of this trampoline to point past the newly-added jump. */
10095 fixP
= trampP
->fixP
;
10097 fixP
->fx_offset
+= 3;
10098 /* Modify the original j to point here. */
10099 origfrag
->tc_frag_data
.slot_symbols
[0] = lsym
;
10100 origfrag
->tc_frag_data
.slot_offsets
[0] = tramp
->fr_fix
- 3;
10101 /* If trampoline is full, remove it from the list. */
10102 check_and_update_trampolines ();
10109 relax_frag_immed (segT segP
,
10116 bfd_boolean estimate_only
)
10120 bfd_boolean negatable_branch
= FALSE
;
10121 bfd_boolean branch_jmp_to_next
= FALSE
;
10122 bfd_boolean from_wide_insn
= FALSE
;
10123 xtensa_isa isa
= xtensa_default_isa
;
10125 offsetT frag_offset
;
10127 int num_text_bytes
, num_literal_bytes
;
10128 int literal_diff
, total_text_diff
, this_text_diff
;
10130 gas_assert (fragP
->fr_opcode
!= NULL
);
10132 xg_clear_vinsn (&cur_vinsn
);
10133 vinsn_from_chars (&cur_vinsn
, fragP
->fr_opcode
);
10134 if (cur_vinsn
.num_slots
> 1)
10135 from_wide_insn
= TRUE
;
10137 tinsn
= cur_vinsn
.slots
[slot
];
10138 tinsn_immed_from_frag (&tinsn
, fragP
, slot
);
10140 if (estimate_only
&& xtensa_opcode_is_loop (isa
, tinsn
.opcode
) == 1)
10143 if (workaround_b_j_loop_end
&& ! fragP
->tc_frag_data
.is_no_transform
)
10144 branch_jmp_to_next
= is_branch_jmp_to_next (&tinsn
, fragP
);
10146 negatable_branch
= (xtensa_opcode_is_branch (isa
, tinsn
.opcode
) == 1);
10148 old_size
= xtensa_format_length (isa
, fmt
);
10150 /* Special case: replace a branch to the next instruction with a NOP.
10151 This is required to work around a hardware bug in T1040.0 and also
10152 serves as an optimization. */
10154 if (branch_jmp_to_next
10155 && ((old_size
== 2) || (old_size
== 3))
10156 && !next_frag_is_loop_target (fragP
))
10159 /* Here is the fun stuff: Get the immediate field from this
10160 instruction. If it fits, we are done. If not, find the next
10161 instruction sequence that fits. */
10163 frag_offset
= fragP
->fr_opcode
- fragP
->fr_literal
;
10164 istack_init (&istack
);
10165 num_steps
= xg_assembly_relax (&istack
, &tinsn
, segP
, fragP
, frag_offset
,
10166 min_steps
, stretch
);
10167 gas_assert (num_steps
>= min_steps
&& num_steps
<= RELAX_IMMED_MAXSTEPS
);
10169 fragP
->tc_frag_data
.slot_subtypes
[slot
] = (int) RELAX_IMMED
+ num_steps
;
10171 /* Figure out the number of bytes needed. */
10172 num_literal_bytes
= get_num_stack_literal_bytes (&istack
);
10174 = num_literal_bytes
- fragP
->tc_frag_data
.literal_expansion
[slot
];
10175 num_text_bytes
= get_num_stack_text_bytes (&istack
);
10177 if (from_wide_insn
)
10180 while (istack
.insn
[first
].opcode
== XTENSA_UNDEFINED
)
10183 num_text_bytes
+= old_size
;
10184 if (opcode_fits_format_slot (istack
.insn
[first
].opcode
, fmt
, slot
))
10185 num_text_bytes
-= xg_get_single_size (istack
.insn
[first
].opcode
);
10188 /* The first instruction in the relaxed sequence will go after
10189 the current wide instruction, and thus its symbolic immediates
10192 istack_init (&istack
);
10193 num_steps
= xg_assembly_relax (&istack
, &tinsn
, segP
, fragP
,
10194 frag_offset
+ old_size
,
10195 min_steps
, stretch
+ old_size
);
10196 gas_assert (num_steps
>= min_steps
&& num_steps
<= RELAX_IMMED_MAXSTEPS
);
10198 fragP
->tc_frag_data
.slot_subtypes
[slot
]
10199 = (int) RELAX_IMMED
+ num_steps
;
10201 num_literal_bytes
= get_num_stack_literal_bytes (&istack
);
10203 = num_literal_bytes
- fragP
->tc_frag_data
.literal_expansion
[slot
];
10205 num_text_bytes
= get_num_stack_text_bytes (&istack
) + old_size
;
10209 total_text_diff
= num_text_bytes
- old_size
;
10210 this_text_diff
= total_text_diff
- fragP
->tc_frag_data
.text_expansion
[slot
];
10212 /* It MUST get larger. If not, we could get an infinite loop. */
10213 gas_assert (num_text_bytes
>= 0);
10214 gas_assert (literal_diff
>= 0);
10215 gas_assert (total_text_diff
>= 0);
10217 fragP
->tc_frag_data
.text_expansion
[slot
] = total_text_diff
;
10218 fragP
->tc_frag_data
.literal_expansion
[slot
] = num_literal_bytes
;
10219 gas_assert (fragP
->tc_frag_data
.text_expansion
[slot
] >= 0);
10220 gas_assert (fragP
->tc_frag_data
.literal_expansion
[slot
] >= 0);
10222 /* Find the associated expandable literal for this. */
10223 if (literal_diff
!= 0)
10225 fragS
*lit_fragP
= fragP
->tc_frag_data
.literal_frags
[slot
];
10228 gas_assert (literal_diff
== 4);
10229 lit_fragP
->tc_frag_data
.unreported_expansion
+= literal_diff
;
10231 /* We expect that the literal section state has NOT been
10233 gas_assert (lit_fragP
->fr_type
== rs_machine_dependent
10234 && lit_fragP
->fr_subtype
== RELAX_LITERAL
);
10235 lit_fragP
->fr_subtype
= RELAX_LITERAL_NR
;
10237 /* We need to mark this section for another iteration
10243 if (negatable_branch
&& istack
.ninsn
> 1)
10244 update_next_frag_state (fragP
);
10246 /* If last insn is a jump, and it cannot reach its target, try to find a trampoline. */
10247 if (istack
.ninsn
> 2 &&
10248 istack
.insn
[istack
.ninsn
- 1].insn_type
== ITYPE_LABEL
&&
10249 istack
.insn
[istack
.ninsn
- 2].insn_type
== ITYPE_INSN
&&
10250 istack
.insn
[istack
.ninsn
- 2].opcode
== xtensa_j_opcode
)
10252 TInsn
*jinsn
= &istack
.insn
[istack
.ninsn
- 2];
10254 if (!xg_symbolic_immeds_fit (jinsn
, segP
, fragP
, fragP
->fr_offset
, total_text_diff
))
10256 struct trampoline_frag
*tf
= get_best_trampoline (jinsn
, fragP
);
10260 this_text_diff
+= init_trampoline_frag (tf
);
10261 this_text_diff
+= add_jump_to_trampoline (tf
, fragP
);
10265 /* If target symbol is undefined, assume it will reach once linked. */
10266 expressionS
*exp
= &istack
.insn
[istack
.ninsn
- 2].tok
[0];
10268 if (exp
->X_op
== O_symbol
&& S_IS_DEFINED (exp
->X_add_symbol
))
10270 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
10271 _("jump target out of range; no usable trampoline found"));
10277 return this_text_diff
;
10281 /* md_convert_frag Hook and Helper Functions. */
10283 static void convert_frag_align_next_opcode (fragS
*);
10284 static void convert_frag_narrow (segT
, fragS
*, xtensa_format
, int);
10285 static void convert_frag_fill_nop (fragS
*);
10286 static void convert_frag_immed (segT
, fragS
*, int, xtensa_format
, int);
10289 md_convert_frag (bfd
*abfd ATTRIBUTE_UNUSED
, segT sec
, fragS
*fragp
)
10291 static xtensa_insnbuf vbuf
= NULL
;
10292 xtensa_isa isa
= xtensa_default_isa
;
10299 as_where (&file_name
, &line
);
10300 new_logical_line (fragp
->fr_file
, fragp
->fr_line
);
10302 switch (fragp
->fr_subtype
)
10304 case RELAX_ALIGN_NEXT_OPCODE
:
10305 /* Always convert. */
10306 convert_frag_align_next_opcode (fragp
);
10309 case RELAX_DESIRE_ALIGN
:
10310 /* Do nothing. If not aligned already, too bad. */
10313 case RELAX_LITERAL
:
10314 case RELAX_LITERAL_FINAL
:
10319 vbuf
= xtensa_insnbuf_alloc (isa
);
10321 xtensa_insnbuf_from_chars
10322 (isa
, vbuf
, (unsigned char *) fragp
->fr_opcode
, 0);
10323 fmt
= xtensa_format_decode (isa
, vbuf
);
10324 num_slots
= xtensa_format_num_slots (isa
, fmt
);
10326 for (slot
= 0; slot
< num_slots
; slot
++)
10328 switch (fragp
->tc_frag_data
.slot_subtypes
[slot
])
10331 convert_frag_narrow (sec
, fragp
, fmt
, slot
);
10335 case RELAX_IMMED_STEP1
:
10336 case RELAX_IMMED_STEP2
:
10337 case RELAX_IMMED_STEP3
:
10338 /* Place the immediate. */
10341 fragp
->tc_frag_data
.slot_subtypes
[slot
] - RELAX_IMMED
,
10346 /* This is OK because some slots could have
10347 relaxations and others have none. */
10353 case RELAX_UNREACHABLE
:
10354 memset (&fragp
->fr_literal
[fragp
->fr_fix
], 0, fragp
->fr_var
);
10355 fragp
->fr_fix
+= fragp
->tc_frag_data
.text_expansion
[0];
10356 fragp
->fr_var
-= fragp
->tc_frag_data
.text_expansion
[0];
10360 case RELAX_MAYBE_UNREACHABLE
:
10361 case RELAX_MAYBE_DESIRE_ALIGN
:
10365 case RELAX_FILL_NOP
:
10366 convert_frag_fill_nop (fragp
);
10369 case RELAX_LITERAL_NR
:
10370 if (use_literal_section
)
10372 /* This should have been handled during relaxation. When
10373 relaxing a code segment, literals sometimes need to be
10374 added to the corresponding literal segment. If that
10375 literal segment has already been relaxed, then we end up
10376 in this situation. Marking the literal segments as data
10377 would make this happen less often (since GAS always relaxes
10378 code before data), but we could still get into trouble if
10379 there are instructions in a segment that is not marked as
10380 containing code. Until we can implement a better solution,
10381 cheat and adjust the addresses of all the following frags.
10382 This could break subsequent alignments, but the linker's
10383 literal coalescing will do that anyway. */
10386 fragp
->fr_subtype
= RELAX_LITERAL_FINAL
;
10387 gas_assert (fragp
->tc_frag_data
.unreported_expansion
== 4);
10388 memset (&fragp
->fr_literal
[fragp
->fr_fix
], 0, 4);
10389 fragp
->fr_var
-= 4;
10390 fragp
->fr_fix
+= 4;
10391 for (f
= fragp
->fr_next
; f
; f
= f
->fr_next
)
10392 f
->fr_address
+= 4;
10395 as_bad (_("invalid relaxation fragment result"));
10398 case RELAX_TRAMPOLINE
:
10403 new_logical_line (file_name
, line
);
10408 convert_frag_align_next_opcode (fragS
*fragp
)
10410 char *nop_buf
; /* Location for Writing. */
10411 bfd_boolean use_no_density
= fragp
->tc_frag_data
.is_no_density
;
10412 addressT aligned_address
;
10414 int nop
, nop_count
;
10416 aligned_address
= get_noop_aligned_address (fragp
, fragp
->fr_address
+
10418 fill_size
= aligned_address
- (fragp
->fr_address
+ fragp
->fr_fix
);
10419 nop_count
= get_text_align_nop_count (fill_size
, use_no_density
);
10420 nop_buf
= fragp
->fr_literal
+ fragp
->fr_fix
;
10422 for (nop
= 0; nop
< nop_count
; nop
++)
10425 nop_size
= get_text_align_nth_nop_size (fill_size
, nop
, use_no_density
);
10427 assemble_nop (nop_size
, nop_buf
);
10428 nop_buf
+= nop_size
;
10431 fragp
->fr_fix
+= fill_size
;
10432 fragp
->fr_var
-= fill_size
;
10437 convert_frag_narrow (segT segP
, fragS
*fragP
, xtensa_format fmt
, int slot
)
10439 TInsn tinsn
, single_target
;
10440 int size
, old_size
, diff
;
10441 offsetT frag_offset
;
10443 gas_assert (slot
== 0);
10444 tinsn_from_chars (&tinsn
, fragP
->fr_opcode
, 0);
10446 if (fragP
->tc_frag_data
.is_aligning_branch
== 1)
10448 gas_assert (fragP
->tc_frag_data
.text_expansion
[0] == 1
10449 || fragP
->tc_frag_data
.text_expansion
[0] == 0);
10450 convert_frag_immed (segP
, fragP
, fragP
->tc_frag_data
.text_expansion
[0],
10455 if (fragP
->tc_frag_data
.text_expansion
[0] == 0)
10457 /* No conversion. */
10462 gas_assert (fragP
->fr_opcode
!= NULL
);
10464 /* Frags in this relaxation state should only contain
10465 single instruction bundles. */
10466 tinsn_immed_from_frag (&tinsn
, fragP
, 0);
10468 /* Just convert it to a wide form.... */
10470 old_size
= xg_get_single_size (tinsn
.opcode
);
10472 tinsn_init (&single_target
);
10473 frag_offset
= fragP
->fr_opcode
- fragP
->fr_literal
;
10475 if (! xg_is_single_relaxable_insn (&tinsn
, &single_target
, FALSE
))
10477 as_bad (_("unable to widen instruction"));
10481 size
= xg_get_single_size (single_target
.opcode
);
10482 xg_emit_insn_to_buf (&single_target
, fragP
->fr_opcode
, fragP
,
10483 frag_offset
, TRUE
);
10485 diff
= size
- old_size
;
10486 gas_assert (diff
>= 0);
10487 gas_assert (diff
<= fragP
->fr_var
);
10488 fragP
->fr_var
-= diff
;
10489 fragP
->fr_fix
+= diff
;
10497 convert_frag_fill_nop (fragS
*fragP
)
10499 char *loc
= &fragP
->fr_literal
[fragP
->fr_fix
];
10500 int size
= fragP
->tc_frag_data
.text_expansion
[0];
10501 gas_assert ((unsigned) size
== (fragP
->fr_next
->fr_address
10502 - fragP
->fr_address
- fragP
->fr_fix
));
10505 /* No conversion. */
10509 assemble_nop (size
, loc
);
10510 fragP
->tc_frag_data
.is_insn
= TRUE
;
10511 fragP
->fr_var
-= size
;
10512 fragP
->fr_fix
+= size
;
10517 static fixS
*fix_new_exp_in_seg
10518 (segT
, subsegT
, fragS
*, int, int, expressionS
*, int,
10519 bfd_reloc_code_real_type
);
10520 static void convert_frag_immed_finish_loop (segT
, fragS
*, TInsn
*);
10523 convert_frag_immed (segT segP
,
10529 char *immed_instr
= fragP
->fr_opcode
;
10531 bfd_boolean expanded
= FALSE
;
10532 bfd_boolean branch_jmp_to_next
= FALSE
;
10533 char *fr_opcode
= fragP
->fr_opcode
;
10534 xtensa_isa isa
= xtensa_default_isa
;
10535 bfd_boolean from_wide_insn
= FALSE
;
10537 bfd_boolean is_loop
;
10539 gas_assert (fr_opcode
!= NULL
);
10541 xg_clear_vinsn (&cur_vinsn
);
10543 vinsn_from_chars (&cur_vinsn
, fr_opcode
);
10544 if (cur_vinsn
.num_slots
> 1)
10545 from_wide_insn
= TRUE
;
10547 orig_tinsn
= cur_vinsn
.slots
[slot
];
10548 tinsn_immed_from_frag (&orig_tinsn
, fragP
, slot
);
10550 is_loop
= xtensa_opcode_is_loop (xtensa_default_isa
, orig_tinsn
.opcode
) == 1;
10552 if (workaround_b_j_loop_end
&& ! fragP
->tc_frag_data
.is_no_transform
)
10553 branch_jmp_to_next
= is_branch_jmp_to_next (&orig_tinsn
, fragP
);
10555 if (branch_jmp_to_next
&& !next_frag_is_loop_target (fragP
))
10557 /* Conversion just inserts a NOP and marks the fix as completed. */
10558 bytes
= xtensa_format_length (isa
, fmt
);
10561 cur_vinsn
.slots
[slot
].opcode
=
10562 xtensa_format_slot_nop_opcode (isa
, cur_vinsn
.format
, slot
);
10563 cur_vinsn
.slots
[slot
].ntok
= 0;
10567 bytes
+= fragP
->tc_frag_data
.text_expansion
[0];
10568 gas_assert (bytes
== 2 || bytes
== 3);
10569 build_nop (&cur_vinsn
.slots
[0], bytes
);
10570 fragP
->fr_fix
+= fragP
->tc_frag_data
.text_expansion
[0];
10572 vinsn_to_insnbuf (&cur_vinsn
, fr_opcode
, frag_now
, TRUE
);
10573 xtensa_insnbuf_to_chars
10574 (isa
, cur_vinsn
.insnbuf
, (unsigned char *) fr_opcode
, 0);
10579 /* Here is the fun stuff: Get the immediate field from this
10580 instruction. If it fits, we're done. If not, find the next
10581 instruction sequence that fits. */
10585 symbolS
*lit_sym
= NULL
;
10586 int total_size
= 0;
10587 int target_offset
= 0;
10590 symbolS
*gen_label
= NULL
;
10591 offsetT frag_offset
;
10592 bfd_boolean first
= TRUE
;
10594 /* It does not fit. Find something that does and
10595 convert immediately. */
10596 frag_offset
= fr_opcode
- fragP
->fr_literal
;
10597 istack_init (&istack
);
10598 xg_assembly_relax (&istack
, &orig_tinsn
,
10599 segP
, fragP
, frag_offset
, min_steps
, 0);
10601 old_size
= xtensa_format_length (isa
, fmt
);
10603 /* Assemble this right inline. */
10605 /* First, create the mapping from a label name to the REAL label. */
10607 for (i
= 0; i
< istack
.ninsn
; i
++)
10609 TInsn
*tinsn
= &istack
.insn
[i
];
10612 switch (tinsn
->insn_type
)
10614 case ITYPE_LITERAL
:
10615 if (lit_sym
!= NULL
)
10616 as_bad (_("multiple literals in expansion"));
10617 /* First find the appropriate space in the literal pool. */
10618 lit_frag
= fragP
->tc_frag_data
.literal_frags
[slot
];
10619 if (lit_frag
== NULL
)
10620 as_bad (_("no registered fragment for literal"));
10621 if (tinsn
->ntok
!= 1)
10622 as_bad (_("number of literal tokens != 1"));
10624 /* Set the literal symbol and add a fixup. */
10625 lit_sym
= lit_frag
->fr_symbol
;
10629 if (align_targets
&& !is_loop
)
10631 fragS
*unreach
= fragP
->fr_next
;
10632 while (!(unreach
->fr_type
== rs_machine_dependent
10633 && (unreach
->fr_subtype
== RELAX_MAYBE_UNREACHABLE
10634 || unreach
->fr_subtype
== RELAX_UNREACHABLE
)))
10636 unreach
= unreach
->fr_next
;
10639 gas_assert (unreach
->fr_type
== rs_machine_dependent
10640 && (unreach
->fr_subtype
== RELAX_MAYBE_UNREACHABLE
10641 || unreach
->fr_subtype
== RELAX_UNREACHABLE
));
10643 target_offset
+= unreach
->tc_frag_data
.text_expansion
[0];
10645 gas_assert (gen_label
== NULL
);
10646 gen_label
= symbol_new (FAKE_LABEL_NAME
, now_seg
,
10647 fr_opcode
- fragP
->fr_literal
10648 + target_offset
, fragP
);
10652 if (first
&& from_wide_insn
)
10654 target_offset
+= xtensa_format_length (isa
, fmt
);
10656 if (!opcode_fits_format_slot (tinsn
->opcode
, fmt
, slot
))
10657 target_offset
+= xg_get_single_size (tinsn
->opcode
);
10660 target_offset
+= xg_get_single_size (tinsn
->opcode
);
10667 for (i
= 0; i
< istack
.ninsn
; i
++)
10669 TInsn
*tinsn
= &istack
.insn
[i
];
10673 bfd_reloc_code_real_type reloc_type
;
10675 switch (tinsn
->insn_type
)
10677 case ITYPE_LITERAL
:
10678 lit_frag
= fragP
->tc_frag_data
.literal_frags
[slot
];
10679 /* Already checked. */
10680 gas_assert (lit_frag
!= NULL
);
10681 gas_assert (lit_sym
!= NULL
);
10682 gas_assert (tinsn
->ntok
== 1);
10684 target_seg
= S_GET_SEGMENT (lit_sym
);
10685 gas_assert (target_seg
);
10686 reloc_type
= map_operator_to_reloc (tinsn
->tok
[0].X_op
, TRUE
);
10687 fix_new_exp_in_seg (target_seg
, 0, lit_frag
, 0, 4,
10688 &tinsn
->tok
[0], FALSE
, reloc_type
);
10695 xg_resolve_labels (tinsn
, gen_label
);
10696 xg_resolve_literals (tinsn
, lit_sym
);
10697 if (from_wide_insn
&& first
)
10700 if (opcode_fits_format_slot (tinsn
->opcode
, fmt
, slot
))
10702 cur_vinsn
.slots
[slot
] = *tinsn
;
10706 cur_vinsn
.slots
[slot
].opcode
=
10707 xtensa_format_slot_nop_opcode (isa
, fmt
, slot
);
10708 cur_vinsn
.slots
[slot
].ntok
= 0;
10710 vinsn_to_insnbuf (&cur_vinsn
, immed_instr
, fragP
, TRUE
);
10711 xtensa_insnbuf_to_chars (isa
, cur_vinsn
.insnbuf
,
10712 (unsigned char *) immed_instr
, 0);
10713 fragP
->tc_frag_data
.is_insn
= TRUE
;
10714 size
= xtensa_format_length (isa
, fmt
);
10715 if (!opcode_fits_format_slot (tinsn
->opcode
, fmt
, slot
))
10717 xg_emit_insn_to_buf
10718 (tinsn
, immed_instr
+ size
, fragP
,
10719 immed_instr
- fragP
->fr_literal
+ size
, TRUE
);
10720 size
+= xg_get_single_size (tinsn
->opcode
);
10725 size
= xg_get_single_size (tinsn
->opcode
);
10726 xg_emit_insn_to_buf (tinsn
, immed_instr
, fragP
,
10727 immed_instr
- fragP
->fr_literal
, TRUE
);
10729 immed_instr
+= size
;
10730 total_size
+= size
;
10735 diff
= total_size
- old_size
;
10736 gas_assert (diff
>= 0);
10739 gas_assert (diff
<= fragP
->fr_var
);
10740 fragP
->fr_var
-= diff
;
10741 fragP
->fr_fix
+= diff
;
10744 /* Check for undefined immediates in LOOP instructions. */
10748 sym
= orig_tinsn
.tok
[1].X_add_symbol
;
10749 if (sym
!= NULL
&& !S_IS_DEFINED (sym
))
10751 as_bad (_("unresolved loop target symbol: %s"), S_GET_NAME (sym
));
10754 sym
= orig_tinsn
.tok
[1].X_op_symbol
;
10755 if (sym
!= NULL
&& !S_IS_DEFINED (sym
))
10757 as_bad (_("unresolved loop target symbol: %s"), S_GET_NAME (sym
));
10762 if (expanded
&& xtensa_opcode_is_loop (isa
, orig_tinsn
.opcode
) == 1)
10763 convert_frag_immed_finish_loop (segP
, fragP
, &orig_tinsn
);
10765 if (expanded
&& is_direct_call_opcode (orig_tinsn
.opcode
))
10767 /* Add an expansion note on the expanded instruction. */
10768 fix_new_exp_in_seg (now_seg
, 0, fragP
, fr_opcode
- fragP
->fr_literal
, 4,
10769 &orig_tinsn
.tok
[0], TRUE
,
10770 BFD_RELOC_XTENSA_ASM_EXPAND
);
10775 /* Add a new fix expression into the desired segment. We have to
10776 switch to that segment to do this. */
10779 fix_new_exp_in_seg (segT new_seg
,
10780 subsegT new_subseg
,
10786 bfd_reloc_code_real_type r_type
)
10789 segT seg
= now_seg
;
10790 subsegT subseg
= now_subseg
;
10792 gas_assert (new_seg
!= 0);
10793 subseg_set (new_seg
, new_subseg
);
10795 new_fix
= fix_new_exp (frag
, where
, size
, exp
, pcrel
, r_type
);
10796 subseg_set (seg
, subseg
);
10801 /* Relax a loop instruction so that it can span loop >256 bytes.
10807 addi as, as, lo8 (label-.L1)
10808 addmi as, as, mid8 (label-.L1)
10819 convert_frag_immed_finish_loop (segT segP
, fragS
*fragP
, TInsn
*tinsn
)
10824 unsigned long target
;
10825 static xtensa_insnbuf insnbuf
= NULL
;
10826 unsigned int loop_length
, loop_length_hi
, loop_length_lo
;
10827 xtensa_isa isa
= xtensa_default_isa
;
10828 addressT loop_offset
;
10829 addressT addi_offset
= 9;
10830 addressT addmi_offset
= 12;
10835 insnbuf
= xtensa_insnbuf_alloc (isa
);
10837 /* Get the loop offset. */
10838 loop_offset
= get_expanded_loop_offset (tinsn
->opcode
);
10840 /* Validate that there really is a LOOP at the loop_offset. Because
10841 loops are not bundleable, we can assume that the instruction will be
10843 tinsn_from_chars (&loop_insn
, fragP
->fr_opcode
+ loop_offset
, 0);
10844 tinsn_immed_from_frag (&loop_insn
, fragP
, 0);
10846 gas_assert (xtensa_opcode_is_loop (isa
, loop_insn
.opcode
) == 1);
10847 addi_offset
+= loop_offset
;
10848 addmi_offset
+= loop_offset
;
10850 gas_assert (tinsn
->ntok
== 2);
10851 if (tinsn
->tok
[1].X_op
== O_constant
)
10852 target
= tinsn
->tok
[1].X_add_number
;
10853 else if (tinsn
->tok
[1].X_op
== O_symbol
)
10855 /* Find the fragment. */
10856 symbolS
*sym
= tinsn
->tok
[1].X_add_symbol
;
10857 gas_assert (S_GET_SEGMENT (sym
) == segP
10858 || S_GET_SEGMENT (sym
) == absolute_section
);
10859 target
= (S_GET_VALUE (sym
) + tinsn
->tok
[1].X_add_number
);
10863 as_bad (_("invalid expression evaluation type %d"), tinsn
->tok
[1].X_op
);
10867 loop_length
= target
- (fragP
->fr_address
+ fragP
->fr_fix
);
10868 loop_length_hi
= loop_length
& ~0x0ff;
10869 loop_length_lo
= loop_length
& 0x0ff;
10870 if (loop_length_lo
>= 128)
10872 loop_length_lo
-= 256;
10873 loop_length_hi
+= 256;
10876 /* Because addmi sign-extends the immediate, 'loop_length_hi' can be at most
10877 32512. If the loop is larger than that, then we just fail. */
10878 if (loop_length_hi
> 32512)
10879 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
10880 _("loop too long for LOOP instruction"));
10882 tinsn_from_chars (&addi_insn
, fragP
->fr_opcode
+ addi_offset
, 0);
10883 gas_assert (addi_insn
.opcode
== xtensa_addi_opcode
);
10885 tinsn_from_chars (&addmi_insn
, fragP
->fr_opcode
+ addmi_offset
, 0);
10886 gas_assert (addmi_insn
.opcode
== xtensa_addmi_opcode
);
10888 set_expr_const (&addi_insn
.tok
[2], loop_length_lo
);
10889 tinsn_to_insnbuf (&addi_insn
, insnbuf
);
10891 fragP
->tc_frag_data
.is_insn
= TRUE
;
10892 xtensa_insnbuf_to_chars
10893 (isa
, insnbuf
, (unsigned char *) fragP
->fr_opcode
+ addi_offset
, 0);
10895 set_expr_const (&addmi_insn
.tok
[2], loop_length_hi
);
10896 tinsn_to_insnbuf (&addmi_insn
, insnbuf
);
10897 xtensa_insnbuf_to_chars
10898 (isa
, insnbuf
, (unsigned char *) fragP
->fr_opcode
+ addmi_offset
, 0);
10900 /* Walk through all of the frags from here to the loop end
10901 and mark them as no_transform to keep them from being modified
10902 by the linker. If we ever have a relocation for the
10903 addi/addmi of the difference of two symbols we can remove this. */
10906 for (next_fragP
= fragP
; next_fragP
!= NULL
;
10907 next_fragP
= next_fragP
->fr_next
)
10909 next_fragP
->tc_frag_data
.is_no_transform
= TRUE
;
10910 if (next_fragP
->tc_frag_data
.is_loop_target
)
10912 if (target_count
== 2)
10918 /* A map that keeps information on a per-subsegment basis. This is
10919 maintained during initial assembly, but is invalid once the
10920 subsegments are smashed together. I.E., it cannot be used during
10923 typedef struct subseg_map_struct
10931 float total_freq
; /* fall-through + branch target frequency */
10932 float target_freq
; /* branch target frequency alone */
10934 struct subseg_map_struct
*next
;
10938 static subseg_map
*sseg_map
= NULL
;
10940 static subseg_map
*
10941 get_subseg_info (segT seg
, subsegT subseg
)
10943 subseg_map
*subseg_e
;
10945 for (subseg_e
= sseg_map
; subseg_e
; subseg_e
= subseg_e
->next
)
10947 if (seg
== subseg_e
->seg
&& subseg
== subseg_e
->subseg
)
10954 static subseg_map
*
10955 add_subseg_info (segT seg
, subsegT subseg
)
10957 subseg_map
*subseg_e
= (subseg_map
*) xmalloc (sizeof (subseg_map
));
10958 memset (subseg_e
, 0, sizeof (subseg_map
));
10959 subseg_e
->seg
= seg
;
10960 subseg_e
->subseg
= subseg
;
10961 subseg_e
->flags
= 0;
10962 /* Start off considering every branch target very important. */
10963 subseg_e
->target_freq
= 1.0;
10964 subseg_e
->total_freq
= 1.0;
10965 subseg_e
->next
= sseg_map
;
10966 sseg_map
= subseg_e
;
10972 get_last_insn_flags (segT seg
, subsegT subseg
)
10974 subseg_map
*subseg_e
= get_subseg_info (seg
, subseg
);
10976 return subseg_e
->flags
;
10982 set_last_insn_flags (segT seg
,
10987 subseg_map
*subseg_e
= get_subseg_info (seg
, subseg
);
10989 subseg_e
= add_subseg_info (seg
, subseg
);
10991 subseg_e
->flags
|= fl
;
10993 subseg_e
->flags
&= ~fl
;
10998 get_subseg_total_freq (segT seg
, subsegT subseg
)
11000 subseg_map
*subseg_e
= get_subseg_info (seg
, subseg
);
11002 return subseg_e
->total_freq
;
11008 get_subseg_target_freq (segT seg
, subsegT subseg
)
11010 subseg_map
*subseg_e
= get_subseg_info (seg
, subseg
);
11012 return subseg_e
->target_freq
;
11018 set_subseg_freq (segT seg
, subsegT subseg
, float total_f
, float target_f
)
11020 subseg_map
*subseg_e
= get_subseg_info (seg
, subseg
);
11022 subseg_e
= add_subseg_info (seg
, subseg
);
11023 subseg_e
->total_freq
= total_f
;
11024 subseg_e
->target_freq
= target_f
;
11028 /* Segment Lists and emit_state Stuff. */
11031 xtensa_move_seg_list_to_beginning (seg_list
*head
)
11036 segT literal_section
= head
->seg
;
11038 /* Move the literal section to the front of the section list. */
11039 gas_assert (literal_section
);
11040 if (literal_section
!= stdoutput
->sections
)
11042 bfd_section_list_remove (stdoutput
, literal_section
);
11043 bfd_section_list_prepend (stdoutput
, literal_section
);
11050 static void mark_literal_frags (seg_list
*);
11053 xtensa_move_literals (void)
11056 frchainS
*frchain_from
, *frchain_to
;
11057 fragS
*search_frag
, *next_frag
, *literal_pool
, *insert_after
;
11058 fragS
**frag_splice
;
11061 fixS
*fix
, *next_fix
, **fix_splice
;
11063 struct litpool_seg
*lps
;
11065 mark_literal_frags (literal_head
->next
);
11067 if (use_literal_section
)
11070 /* Assign addresses (rough estimates) to the potential literal pool locations
11071 and create new ones if the gaps are too large. */
11073 for (lps
= litpool_seg_list
.next
; lps
; lps
= lps
->next
)
11075 frchainS
*frchP
= seg_info (lps
->seg
)->frchainP
;
11076 struct litpool_frag
*lpf
= lps
->frag_list
.next
;
11079 for ( ; frchP
; frchP
= frchP
->frch_next
)
11082 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
11084 if (lpf
&& fragP
== lpf
->fragP
)
11086 gas_assert(fragP
->fr_type
== rs_machine_dependent
&&
11087 (fragP
->fr_subtype
== RELAX_LITERAL_POOL_BEGIN
||
11088 fragP
->fr_subtype
== RELAX_LITERAL_POOL_CANDIDATE_BEGIN
));
11089 /* Found a litpool location. */
11093 if (fragP
->fr_type
== rs_machine_dependent
&&
11094 fragP
->fr_subtype
== RELAX_SLOTS
)
11097 for (slot
= 0; slot
< MAX_SLOTS
; slot
++)
11099 if (fragP
->tc_frag_data
.literal_frags
[slot
])
11101 /* L32R; point its literal to the nearest litpool
11102 preferring non-"candidate" positions to avoid
11103 the jump-around. */
11104 fragS
*litfrag
= fragP
->tc_frag_data
.literal_frags
[slot
];
11105 struct litpool_frag
*lp
= lpf
->prev
;
11110 while (lp
->fragP
->fr_subtype
==
11111 RELAX_LITERAL_POOL_CANDIDATE_BEGIN
)
11114 if (lp
->fragP
== NULL
)
11116 /* End of list; have to bite the bullet.
11117 Take the nearest. */
11121 /* Does it (conservatively) reach? */
11122 if (addr
- lp
->addr
<= 128 * 1024)
11124 if (lp
->fragP
->fr_subtype
== RELAX_LITERAL_POOL_BEGIN
)
11126 /* Found a good one. */
11129 else if (lp
->prev
->fragP
&&
11130 addr
- lp
->prev
->addr
> 128 * 1024)
11132 /* This is still a "candidate" but the next one
11133 will be too far away, so revert to the nearest
11134 one, convert it and add the jump around. */
11138 char label
[10 + 2 * sizeof (fragS
*)];
11140 poolbeg
= lp
->fragP
;
11142 poolbeg
->fr_subtype
= RELAX_LITERAL_POOL_BEGIN
;
11143 poolend
= poolbeg
->fr_next
;
11144 gas_assert (poolend
->fr_type
== rs_machine_dependent
&&
11145 poolend
->fr_subtype
== RELAX_LITERAL_POOL_END
);
11146 /* Create a local symbol pointing to the
11147 end of the pool. */
11148 sprintf (label
, ".L0_LT_%p", poolbeg
);
11149 lsym
= (symbolS
*)local_symbol_make (label
, lps
->seg
,
11151 poolbeg
->fr_symbol
= lsym
;
11152 /* Rest is done in xtensa_relax_frag. */
11156 if (! litfrag
->tc_frag_data
.literal_frag
)
11158 /* Take earliest use of this literal to avoid
11160 litfrag
->tc_frag_data
.literal_frag
= lp
->fragP
;
11165 addr
+= fragP
->fr_fix
;
11166 if (fragP
->fr_type
== rs_fill
)
11167 addr
+= fragP
->fr_offset
;
11172 for (segment
= literal_head
->next
; segment
; segment
= segment
->next
)
11174 /* Keep the literals for .init and .fini in separate sections. */
11175 if (!strcmp (segment_name (segment
->seg
), INIT_SECTION_NAME
)
11176 || !strcmp (segment_name (segment
->seg
), FINI_SECTION_NAME
))
11179 frchain_from
= seg_info (segment
->seg
)->frchainP
;
11180 search_frag
= frchain_from
->frch_root
;
11181 literal_pool
= NULL
;
11183 frag_splice
= &(frchain_from
->frch_root
);
11185 while (search_frag
&& !search_frag
->tc_frag_data
.literal_frag
)
11187 gas_assert (search_frag
->fr_fix
== 0
11188 || search_frag
->fr_type
== rs_align
);
11189 search_frag
= search_frag
->fr_next
;
11194 search_frag
= frchain_from
->frch_root
;
11195 as_bad_where (search_frag
->fr_file
, search_frag
->fr_line
,
11196 _("literal pool location required for text-section-literals; specify with .literal_position"));
11200 gas_assert (search_frag
->tc_frag_data
.literal_frag
->fr_subtype
11201 == RELAX_LITERAL_POOL_BEGIN
);
11202 xtensa_switch_section_emit_state (&state
, segment
->seg
, 0);
11204 /* Make sure that all the frags in this series are closed, and
11205 that there is at least one left over of zero-size. This
11206 prevents us from making a segment with an frchain without any
11208 frag_variant (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
11209 xtensa_set_frag_assembly_state (frag_now
);
11210 frag_variant (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
11211 xtensa_set_frag_assembly_state (frag_now
);
11213 while (search_frag
!= frag_now
)
11215 next_frag
= search_frag
->fr_next
;
11216 if (search_frag
->tc_frag_data
.literal_frag
)
11218 literal_pool
= search_frag
->tc_frag_data
.literal_frag
;
11219 gas_assert (literal_pool
->fr_subtype
== RELAX_LITERAL_POOL_BEGIN
);
11220 frchain_to
= literal_pool
->tc_frag_data
.lit_frchain
;
11221 gas_assert (frchain_to
);
11224 if (search_frag
->fr_type
== rs_fill
&& search_frag
->fr_fix
== 0)
11226 /* Skip empty fill frags. */
11227 *frag_splice
= next_frag
;
11228 search_frag
= next_frag
;
11232 if (search_frag
->fr_type
== rs_align
)
11234 /* Skip alignment frags, because the pool as a whole will be
11235 aligned if used, and we don't want to force alignment if the
11237 *frag_splice
= next_frag
;
11238 search_frag
= next_frag
;
11242 /* First, move the frag out of the literal section and
11243 to the appropriate place. */
11245 /* Insert an aligmnent frag at start of pool. */
11246 if (literal_pool
->fr_next
->fr_type
== rs_machine_dependent
&&
11247 literal_pool
->fr_next
->fr_subtype
== RELAX_LITERAL_POOL_END
)
11249 segT pool_seg
= literal_pool
->fr_next
->tc_frag_data
.lit_seg
;
11250 emit_state prev_state
;
11253 xtensa_switch_section_emit_state (&prev_state
, pool_seg
, 0);
11254 prev_frag
= frag_now
;
11255 frag_variant (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
11256 align_frag
= frag_now
;
11257 frag_align (2, 0, 0);
11258 /* Splice it into the right place. */
11259 prev_frag
->fr_next
= align_frag
->fr_next
;
11260 align_frag
->fr_next
= literal_pool
->fr_next
;
11261 literal_pool
->fr_next
= align_frag
;
11262 /* Insert after this one. */
11263 literal_pool
->tc_frag_data
.literal_frag
= align_frag
;
11264 xtensa_restore_emit_state (&prev_state
);
11266 insert_after
= literal_pool
->tc_frag_data
.literal_frag
;
11267 dest_seg
= insert_after
->fr_next
->tc_frag_data
.lit_seg
;
11268 /* Skip align frag. */
11269 if (insert_after
->fr_next
->fr_type
== rs_align
)
11271 insert_after
= insert_after
->fr_next
;
11274 *frag_splice
= next_frag
;
11275 search_frag
->fr_next
= insert_after
->fr_next
;
11276 insert_after
->fr_next
= search_frag
;
11277 search_frag
->tc_frag_data
.lit_seg
= dest_seg
;
11278 literal_pool
->tc_frag_data
.literal_frag
= search_frag
;
11280 /* Now move any fixups associated with this frag to the
11282 fix
= frchain_from
->fix_root
;
11283 fix_splice
= &(frchain_from
->fix_root
);
11286 next_fix
= fix
->fx_next
;
11287 if (fix
->fx_frag
== search_frag
)
11289 *fix_splice
= next_fix
;
11290 fix
->fx_next
= frchain_to
->fix_root
;
11291 frchain_to
->fix_root
= fix
;
11292 if (frchain_to
->fix_tail
== NULL
)
11293 frchain_to
->fix_tail
= fix
;
11296 fix_splice
= &(fix
->fx_next
);
11299 search_frag
= next_frag
;
11302 if (frchain_from
->fix_root
!= NULL
)
11304 frchain_from
= seg_info (segment
->seg
)->frchainP
;
11305 as_warn (_("fixes not all moved from %s"), segment
->seg
->name
);
11307 gas_assert (frchain_from
->fix_root
== NULL
);
11309 frchain_from
->fix_tail
= NULL
;
11310 xtensa_restore_emit_state (&state
);
11313 /* Now fix up the SEGMENT value for all the literal symbols. */
11314 for (lit
= literal_syms
; lit
; lit
= lit
->next
)
11316 symbolS
*lit_sym
= lit
->sym
;
11317 segT dseg
= symbol_get_frag (lit_sym
)->tc_frag_data
.lit_seg
;
11319 S_SET_SEGMENT (lit_sym
, dseg
);
11324 /* Walk over all the frags for segments in a list and mark them as
11325 containing literals. As clunky as this is, we can't rely on frag_var
11326 and frag_variant to get called in all situations. */
11329 mark_literal_frags (seg_list
*segment
)
11331 frchainS
*frchain_from
;
11332 fragS
*search_frag
;
11336 frchain_from
= seg_info (segment
->seg
)->frchainP
;
11337 search_frag
= frchain_from
->frch_root
;
11338 while (search_frag
)
11340 search_frag
->tc_frag_data
.is_literal
= TRUE
;
11341 search_frag
= search_frag
->fr_next
;
11343 segment
= segment
->next
;
11349 xtensa_reorder_seg_list (seg_list
*head
, segT after
)
11351 /* Move all of the sections in the section list to come
11352 after "after" in the gnu segment list. */
11357 segT literal_section
= head
->seg
;
11359 /* Move the literal section after "after". */
11360 gas_assert (literal_section
);
11361 if (literal_section
!= after
)
11363 bfd_section_list_remove (stdoutput
, literal_section
);
11364 bfd_section_list_insert_after (stdoutput
, after
, literal_section
);
11372 /* Push all the literal segments to the end of the gnu list. */
11375 xtensa_reorder_segments (void)
11382 for (sec
= stdoutput
->sections
; sec
!= NULL
; sec
= sec
->next
)
11388 /* Now that we have the last section, push all the literal
11389 sections to the end. */
11390 xtensa_reorder_seg_list (literal_head
, last_sec
);
11392 /* Now perform the final error check. */
11393 for (sec
= stdoutput
->sections
; sec
!= NULL
; sec
= sec
->next
)
11395 gas_assert (new_count
== old_count
);
11399 /* Change the emit state (seg, subseg, and frag related stuff) to the
11400 correct location. Return a emit_state which can be passed to
11401 xtensa_restore_emit_state to return to current fragment. */
11404 xtensa_switch_to_literal_fragment (emit_state
*result
)
11406 if (directive_state
[directive_absolute_literals
])
11408 segT lit4_seg
= cache_literal_section (TRUE
);
11409 xtensa_switch_section_emit_state (result
, lit4_seg
, 0);
11412 xtensa_switch_to_non_abs_literal_fragment (result
);
11414 /* Do a 4-byte align here. */
11415 frag_align (2, 0, 0);
11416 record_alignment (now_seg
, 2);
11421 xtensa_switch_to_non_abs_literal_fragment (emit_state
*result
)
11423 static bfd_boolean recursive
= FALSE
;
11424 fragS
*pool_location
= get_literal_pool_location (now_seg
);
11426 bfd_boolean is_init
=
11427 (now_seg
&& !strcmp (segment_name (now_seg
), INIT_SECTION_NAME
));
11428 bfd_boolean is_fini
=
11429 (now_seg
&& !strcmp (segment_name (now_seg
), FINI_SECTION_NAME
));
11431 if (pool_location
== NULL
11432 && !use_literal_section
11434 && !is_init
&& ! is_fini
)
11436 if (!auto_litpools
)
11438 as_bad (_("literal pool location required for text-section-literals; specify with .literal_position"));
11441 /* When we mark a literal pool location, we want to put a frag in
11442 the literal pool that points to it. But to do that, we want to
11443 switch_to_literal_fragment. But literal sections don't have
11444 literal pools, so their location is always null, so we would
11445 recurse forever. This is kind of hacky, but it works. */
11448 xtensa_mark_literal_pool_location ();
11452 lit_seg
= cache_literal_section (FALSE
);
11453 xtensa_switch_section_emit_state (result
, lit_seg
, 0);
11455 if (!use_literal_section
11456 && !is_init
&& !is_fini
11457 && get_literal_pool_location (now_seg
) != pool_location
)
11459 /* Close whatever frag is there. */
11460 frag_variant (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
11461 xtensa_set_frag_assembly_state (frag_now
);
11462 frag_now
->tc_frag_data
.literal_frag
= pool_location
;
11463 frag_variant (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
11464 xtensa_set_frag_assembly_state (frag_now
);
11469 /* Call this function before emitting data into the literal section.
11470 This is a helper function for xtensa_switch_to_literal_fragment.
11471 This is similar to a .section new_now_seg subseg. */
11474 xtensa_switch_section_emit_state (emit_state
*state
,
11476 subsegT new_now_subseg
)
11478 state
->name
= now_seg
->name
;
11479 state
->now_seg
= now_seg
;
11480 state
->now_subseg
= now_subseg
;
11481 state
->generating_literals
= generating_literals
;
11482 generating_literals
++;
11483 subseg_set (new_now_seg
, new_now_subseg
);
11487 /* Use to restore the emitting into the normal place. */
11490 xtensa_restore_emit_state (emit_state
*state
)
11492 generating_literals
= state
->generating_literals
;
11493 subseg_set (state
->now_seg
, state
->now_subseg
);
11497 /* Predicate function used to look up a section in a particular group. */
11500 match_section_group (bfd
*abfd ATTRIBUTE_UNUSED
, asection
*sec
, void *inf
)
11502 const char *gname
= inf
;
11503 const char *group_name
= elf_group_name (sec
);
11505 return (group_name
== gname
11506 || (group_name
!= NULL
11508 && strcmp (group_name
, gname
) == 0));
11512 /* Get the literal section to be used for the current text section.
11513 The result may be cached in the default_lit_sections structure. */
11516 cache_literal_section (bfd_boolean use_abs_literals
)
11518 const char *text_name
, *group_name
= 0;
11519 char *base_name
, *name
, *suffix
;
11521 segT seg
, current_section
;
11522 int current_subsec
;
11523 bfd_boolean linkonce
= FALSE
;
11525 /* Save the current section/subsection. */
11526 current_section
= now_seg
;
11527 current_subsec
= now_subseg
;
11529 /* Clear the cached values if they are no longer valid. */
11530 if (now_seg
!= default_lit_sections
.current_text_seg
)
11532 default_lit_sections
.current_text_seg
= now_seg
;
11533 default_lit_sections
.lit_seg
= NULL
;
11534 default_lit_sections
.lit4_seg
= NULL
;
11537 /* Check if the literal section is already cached. */
11538 if (use_abs_literals
)
11539 pcached
= &default_lit_sections
.lit4_seg
;
11541 pcached
= &default_lit_sections
.lit_seg
;
11546 text_name
= default_lit_sections
.lit_prefix
;
11547 if (! text_name
|| ! *text_name
)
11549 text_name
= segment_name (current_section
);
11550 group_name
= elf_group_name (current_section
);
11551 linkonce
= (current_section
->flags
& SEC_LINK_ONCE
) != 0;
11554 base_name
= use_abs_literals
? ".lit4" : ".literal";
11557 name
= xmalloc (strlen (base_name
) + strlen (group_name
) + 2);
11558 sprintf (name
, "%s.%s", base_name
, group_name
);
11560 else if (strncmp (text_name
, ".gnu.linkonce.", linkonce_len
) == 0)
11562 suffix
= strchr (text_name
+ linkonce_len
, '.');
11564 name
= xmalloc (linkonce_len
+ strlen (base_name
) + 1
11565 + (suffix
? strlen (suffix
) : 0));
11566 strcpy (name
, ".gnu.linkonce");
11567 strcat (name
, base_name
);
11569 strcat (name
, suffix
);
11574 /* If the section name begins or ends with ".text", then replace
11575 that portion instead of appending an additional suffix. */
11576 size_t len
= strlen (text_name
);
11578 && (strcmp (text_name
+ len
- 5, ".text") == 0
11579 || strncmp (text_name
, ".text", 5) == 0))
11582 name
= xmalloc (len
+ strlen (base_name
) + 1);
11583 if (strncmp (text_name
, ".text", 5) == 0)
11585 strcpy (name
, base_name
);
11586 strcat (name
, text_name
+ 5);
11590 strcpy (name
, text_name
);
11591 strcpy (name
+ len
, base_name
);
11595 /* Canonicalize section names to allow renaming literal sections.
11596 The group name, if any, came from the current text section and
11597 has already been canonicalized. */
11598 name
= tc_canonicalize_symbol_name (name
);
11600 seg
= bfd_get_section_by_name_if (stdoutput
, name
, match_section_group
,
11601 (void *) group_name
);
11606 seg
= subseg_force_new (name
, 0);
11608 if (! use_abs_literals
)
11610 /* Add the newly created literal segment to the list. */
11611 seg_list
*n
= (seg_list
*) xmalloc (sizeof (seg_list
));
11613 n
->next
= literal_head
->next
;
11614 literal_head
->next
= n
;
11617 flags
= (SEC_HAS_CONTENTS
| SEC_READONLY
| SEC_ALLOC
| SEC_LOAD
11618 | (linkonce
? (SEC_LINK_ONCE
| SEC_LINK_DUPLICATES_DISCARD
) : 0)
11619 | (use_abs_literals
? SEC_DATA
: SEC_CODE
));
11621 elf_group_name (seg
) = group_name
;
11623 bfd_set_section_flags (stdoutput
, seg
, flags
);
11624 bfd_set_section_alignment (stdoutput
, seg
, 2);
11628 subseg_set (current_section
, current_subsec
);
11633 /* Property Tables Stuff. */
11635 #define XTENSA_INSN_SEC_NAME ".xt.insn"
11636 #define XTENSA_LIT_SEC_NAME ".xt.lit"
11637 #define XTENSA_PROP_SEC_NAME ".xt.prop"
11639 typedef bfd_boolean (*frag_predicate
) (const fragS
*);
11640 typedef void (*frag_flags_fn
) (const fragS
*, frag_flags
*);
11642 static bfd_boolean
get_frag_is_literal (const fragS
*);
11643 static void xtensa_create_property_segments
11644 (frag_predicate
, frag_predicate
, const char *, xt_section_type
);
11645 static void xtensa_create_xproperty_segments
11646 (frag_flags_fn
, const char *, xt_section_type
);
11647 static bfd_boolean
exclude_section_from_property_tables (segT
);
11648 static bfd_boolean
section_has_property (segT
, frag_predicate
);
11649 static bfd_boolean
section_has_xproperty (segT
, frag_flags_fn
);
11650 static void add_xt_block_frags
11651 (segT
, xtensa_block_info
**, frag_predicate
, frag_predicate
);
11652 static bfd_boolean
xtensa_frag_flags_is_empty (const frag_flags
*);
11653 static void xtensa_frag_flags_init (frag_flags
*);
11654 static void get_frag_property_flags (const fragS
*, frag_flags
*);
11655 static flagword
frag_flags_to_number (const frag_flags
*);
11656 static void add_xt_prop_frags (segT
, xtensa_block_info
**, frag_flags_fn
);
11658 /* Set up property tables after relaxation. */
11661 xtensa_post_relax_hook (void)
11663 xtensa_move_seg_list_to_beginning (literal_head
);
11665 xtensa_find_unmarked_state_frags ();
11666 xtensa_mark_frags_for_org ();
11667 xtensa_mark_difference_of_two_symbols ();
11669 xtensa_create_property_segments (get_frag_is_literal
,
11671 XTENSA_LIT_SEC_NAME
,
11673 xtensa_create_xproperty_segments (get_frag_property_flags
,
11674 XTENSA_PROP_SEC_NAME
,
11677 if (warn_unaligned_branch_targets
)
11678 bfd_map_over_sections (stdoutput
, xtensa_find_unaligned_branch_targets
, 0);
11679 bfd_map_over_sections (stdoutput
, xtensa_find_unaligned_loops
, 0);
11683 /* This function is only meaningful after xtensa_move_literals. */
11686 get_frag_is_literal (const fragS
*fragP
)
11688 gas_assert (fragP
!= NULL
);
11689 return fragP
->tc_frag_data
.is_literal
;
11694 xtensa_create_property_segments (frag_predicate property_function
,
11695 frag_predicate end_property_function
,
11696 const char *section_name_base
,
11697 xt_section_type sec_type
)
11701 /* Walk over all of the current segments.
11702 Walk over each fragment
11703 For each non-empty fragment,
11704 Build a property record (append where possible). */
11706 for (seclist
= &stdoutput
->sections
;
11707 seclist
&& *seclist
;
11708 seclist
= &(*seclist
)->next
)
11710 segT sec
= *seclist
;
11712 if (exclude_section_from_property_tables (sec
))
11715 if (section_has_property (sec
, property_function
))
11717 segment_info_type
*xt_seg_info
;
11718 xtensa_block_info
**xt_blocks
;
11719 segT prop_sec
= xtensa_make_property_section (sec
, section_name_base
);
11721 prop_sec
->output_section
= prop_sec
;
11722 subseg_set (prop_sec
, 0);
11723 xt_seg_info
= seg_info (prop_sec
);
11724 xt_blocks
= &xt_seg_info
->tc_segment_info_data
.blocks
[sec_type
];
11726 /* Walk over all of the frchains here and add new sections. */
11727 add_xt_block_frags (sec
, xt_blocks
, property_function
,
11728 end_property_function
);
11732 /* Now we fill them out.... */
11734 for (seclist
= &stdoutput
->sections
;
11735 seclist
&& *seclist
;
11736 seclist
= &(*seclist
)->next
)
11738 segment_info_type
*seginfo
;
11739 xtensa_block_info
*block
;
11740 segT sec
= *seclist
;
11742 seginfo
= seg_info (sec
);
11743 block
= seginfo
->tc_segment_info_data
.blocks
[sec_type
];
11747 xtensa_block_info
*cur_block
;
11749 bfd_size_type rec_size
;
11751 for (cur_block
= block
; cur_block
; cur_block
= cur_block
->next
)
11754 rec_size
= num_recs
* 8;
11755 bfd_set_section_size (stdoutput
, sec
, rec_size
);
11762 subseg_set (sec
, 0);
11763 frag_data
= frag_more (rec_size
);
11765 for (i
= 0; i
< num_recs
; i
++)
11769 /* Write the fixup. */
11770 gas_assert (cur_block
);
11771 fix
= fix_new (frag_now
, i
* 8, 4,
11772 section_symbol (cur_block
->sec
),
11774 FALSE
, BFD_RELOC_32
);
11775 fix
->fx_file
= "<internal>";
11778 /* Write the length. */
11779 md_number_to_chars (&frag_data
[4 + i
* 8],
11780 cur_block
->size
, 4);
11781 cur_block
= cur_block
->next
;
11783 frag_wane (frag_now
);
11785 frag_wane (frag_now
);
11793 xtensa_create_xproperty_segments (frag_flags_fn flag_fn
,
11794 const char *section_name_base
,
11795 xt_section_type sec_type
)
11799 /* Walk over all of the current segments.
11800 Walk over each fragment.
11801 For each fragment that has instructions,
11802 build an instruction record (append where possible). */
11804 for (seclist
= &stdoutput
->sections
;
11805 seclist
&& *seclist
;
11806 seclist
= &(*seclist
)->next
)
11808 segT sec
= *seclist
;
11810 if (exclude_section_from_property_tables (sec
))
11813 if (section_has_xproperty (sec
, flag_fn
))
11815 segment_info_type
*xt_seg_info
;
11816 xtensa_block_info
**xt_blocks
;
11817 segT prop_sec
= xtensa_make_property_section (sec
, section_name_base
);
11819 prop_sec
->output_section
= prop_sec
;
11820 subseg_set (prop_sec
, 0);
11821 xt_seg_info
= seg_info (prop_sec
);
11822 xt_blocks
= &xt_seg_info
->tc_segment_info_data
.blocks
[sec_type
];
11824 /* Walk over all of the frchains here and add new sections. */
11825 add_xt_prop_frags (sec
, xt_blocks
, flag_fn
);
11829 /* Now we fill them out.... */
11831 for (seclist
= &stdoutput
->sections
;
11832 seclist
&& *seclist
;
11833 seclist
= &(*seclist
)->next
)
11835 segment_info_type
*seginfo
;
11836 xtensa_block_info
*block
;
11837 segT sec
= *seclist
;
11839 seginfo
= seg_info (sec
);
11840 block
= seginfo
->tc_segment_info_data
.blocks
[sec_type
];
11844 xtensa_block_info
*cur_block
;
11846 bfd_size_type rec_size
;
11848 for (cur_block
= block
; cur_block
; cur_block
= cur_block
->next
)
11851 rec_size
= num_recs
* (8 + 4);
11852 bfd_set_section_size (stdoutput
, sec
, rec_size
);
11853 /* elf_section_data (sec)->this_hdr.sh_entsize = 12; */
11860 subseg_set (sec
, 0);
11861 frag_data
= frag_more (rec_size
);
11863 for (i
= 0; i
< num_recs
; i
++)
11867 /* Write the fixup. */
11868 gas_assert (cur_block
);
11869 fix
= fix_new (frag_now
, i
* 12, 4,
11870 section_symbol (cur_block
->sec
),
11872 FALSE
, BFD_RELOC_32
);
11873 fix
->fx_file
= "<internal>";
11876 /* Write the length. */
11877 md_number_to_chars (&frag_data
[4 + i
* 12],
11878 cur_block
->size
, 4);
11879 md_number_to_chars (&frag_data
[8 + i
* 12],
11880 frag_flags_to_number (&cur_block
->flags
),
11881 sizeof (flagword
));
11882 cur_block
= cur_block
->next
;
11884 frag_wane (frag_now
);
11886 frag_wane (frag_now
);
11894 exclude_section_from_property_tables (segT sec
)
11896 flagword flags
= bfd_get_section_flags (stdoutput
, sec
);
11898 /* Sections that don't contribute to the memory footprint are excluded. */
11899 if ((flags
& SEC_DEBUGGING
)
11900 || !(flags
& SEC_ALLOC
)
11901 || (flags
& SEC_MERGE
))
11904 /* Linker cie and fde optimizations mess up property entries for
11905 eh_frame sections, but there is nothing inside them relevant to
11906 property tables anyway. */
11907 if (strcmp (sec
->name
, ".eh_frame") == 0)
11915 section_has_property (segT sec
, frag_predicate property_function
)
11917 segment_info_type
*seginfo
= seg_info (sec
);
11920 if (seginfo
&& seginfo
->frchainP
)
11922 for (fragP
= seginfo
->frchainP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
11924 if (property_function (fragP
)
11925 && (fragP
->fr_type
!= rs_fill
|| fragP
->fr_fix
!= 0))
11934 section_has_xproperty (segT sec
, frag_flags_fn property_function
)
11936 segment_info_type
*seginfo
= seg_info (sec
);
11939 if (seginfo
&& seginfo
->frchainP
)
11941 for (fragP
= seginfo
->frchainP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
11943 frag_flags prop_flags
;
11944 property_function (fragP
, &prop_flags
);
11945 if (!xtensa_frag_flags_is_empty (&prop_flags
))
11953 /* Two types of block sections exist right now: literal and insns. */
11956 add_xt_block_frags (segT sec
,
11957 xtensa_block_info
**xt_block
,
11958 frag_predicate property_function
,
11959 frag_predicate end_property_function
)
11963 /* Build it if needed. */
11964 while (*xt_block
!= NULL
)
11965 xt_block
= &(*xt_block
)->next
;
11966 /* We are either at NULL at the beginning or at the end. */
11968 /* Walk through the frags. */
11969 if (seg_info (sec
)->frchainP
)
11971 for (fragP
= seg_info (sec
)->frchainP
->frch_root
;
11973 fragP
= fragP
->fr_next
)
11975 if (property_function (fragP
)
11976 && (fragP
->fr_type
!= rs_fill
|| fragP
->fr_fix
!= 0))
11978 if (*xt_block
!= NULL
)
11980 if ((*xt_block
)->offset
+ (*xt_block
)->size
11981 == fragP
->fr_address
)
11982 (*xt_block
)->size
+= fragP
->fr_fix
;
11984 xt_block
= &((*xt_block
)->next
);
11986 if (*xt_block
== NULL
)
11988 xtensa_block_info
*new_block
= (xtensa_block_info
*)
11989 xmalloc (sizeof (xtensa_block_info
));
11990 new_block
->sec
= sec
;
11991 new_block
->offset
= fragP
->fr_address
;
11992 new_block
->size
= fragP
->fr_fix
;
11993 new_block
->next
= NULL
;
11994 xtensa_frag_flags_init (&new_block
->flags
);
11995 *xt_block
= new_block
;
11997 if (end_property_function
11998 && end_property_function (fragP
))
12000 xt_block
= &((*xt_block
)->next
);
12008 /* Break the encapsulation of add_xt_prop_frags here. */
12011 xtensa_frag_flags_is_empty (const frag_flags
*prop_flags
)
12013 if (prop_flags
->is_literal
12014 || prop_flags
->is_insn
12015 || prop_flags
->is_data
12016 || prop_flags
->is_unreachable
)
12023 xtensa_frag_flags_init (frag_flags
*prop_flags
)
12025 memset (prop_flags
, 0, sizeof (frag_flags
));
12030 get_frag_property_flags (const fragS
*fragP
, frag_flags
*prop_flags
)
12032 xtensa_frag_flags_init (prop_flags
);
12033 if (fragP
->tc_frag_data
.is_literal
)
12034 prop_flags
->is_literal
= TRUE
;
12035 if (fragP
->tc_frag_data
.is_specific_opcode
12036 || fragP
->tc_frag_data
.is_no_transform
)
12038 prop_flags
->is_no_transform
= TRUE
;
12039 if (xtensa_frag_flags_is_empty (prop_flags
))
12040 prop_flags
->is_data
= TRUE
;
12042 if (fragP
->tc_frag_data
.is_unreachable
)
12043 prop_flags
->is_unreachable
= TRUE
;
12044 else if (fragP
->tc_frag_data
.is_insn
)
12046 prop_flags
->is_insn
= TRUE
;
12047 if (fragP
->tc_frag_data
.is_loop_target
)
12048 prop_flags
->insn
.is_loop_target
= TRUE
;
12049 if (fragP
->tc_frag_data
.is_branch_target
)
12050 prop_flags
->insn
.is_branch_target
= TRUE
;
12051 if (fragP
->tc_frag_data
.is_no_density
)
12052 prop_flags
->insn
.is_no_density
= TRUE
;
12053 if (fragP
->tc_frag_data
.use_absolute_literals
)
12054 prop_flags
->insn
.is_abslit
= TRUE
;
12056 if (fragP
->tc_frag_data
.is_align
)
12058 prop_flags
->is_align
= TRUE
;
12059 prop_flags
->alignment
= fragP
->tc_frag_data
.alignment
;
12060 if (xtensa_frag_flags_is_empty (prop_flags
))
12061 prop_flags
->is_data
= TRUE
;
12067 frag_flags_to_number (const frag_flags
*prop_flags
)
12070 if (prop_flags
->is_literal
)
12071 num
|= XTENSA_PROP_LITERAL
;
12072 if (prop_flags
->is_insn
)
12073 num
|= XTENSA_PROP_INSN
;
12074 if (prop_flags
->is_data
)
12075 num
|= XTENSA_PROP_DATA
;
12076 if (prop_flags
->is_unreachable
)
12077 num
|= XTENSA_PROP_UNREACHABLE
;
12078 if (prop_flags
->insn
.is_loop_target
)
12079 num
|= XTENSA_PROP_INSN_LOOP_TARGET
;
12080 if (prop_flags
->insn
.is_branch_target
)
12082 num
|= XTENSA_PROP_INSN_BRANCH_TARGET
;
12083 num
= SET_XTENSA_PROP_BT_ALIGN (num
, prop_flags
->insn
.bt_align_priority
);
12086 if (prop_flags
->insn
.is_no_density
)
12087 num
|= XTENSA_PROP_INSN_NO_DENSITY
;
12088 if (prop_flags
->is_no_transform
)
12089 num
|= XTENSA_PROP_NO_TRANSFORM
;
12090 if (prop_flags
->insn
.is_no_reorder
)
12091 num
|= XTENSA_PROP_INSN_NO_REORDER
;
12092 if (prop_flags
->insn
.is_abslit
)
12093 num
|= XTENSA_PROP_INSN_ABSLIT
;
12095 if (prop_flags
->is_align
)
12097 num
|= XTENSA_PROP_ALIGN
;
12098 num
= SET_XTENSA_PROP_ALIGNMENT (num
, prop_flags
->alignment
);
12106 xtensa_frag_flags_combinable (const frag_flags
*prop_flags_1
,
12107 const frag_flags
*prop_flags_2
)
12109 /* Cannot combine with an end marker. */
12111 if (prop_flags_1
->is_literal
!= prop_flags_2
->is_literal
)
12113 if (prop_flags_1
->is_insn
!= prop_flags_2
->is_insn
)
12115 if (prop_flags_1
->is_data
!= prop_flags_2
->is_data
)
12118 if (prop_flags_1
->is_insn
)
12120 /* Properties of the beginning of the frag. */
12121 if (prop_flags_2
->insn
.is_loop_target
)
12123 if (prop_flags_2
->insn
.is_branch_target
)
12125 if (prop_flags_1
->insn
.is_no_density
!=
12126 prop_flags_2
->insn
.is_no_density
)
12128 if (prop_flags_1
->is_no_transform
!=
12129 prop_flags_2
->is_no_transform
)
12131 if (prop_flags_1
->insn
.is_no_reorder
!=
12132 prop_flags_2
->insn
.is_no_reorder
)
12134 if (prop_flags_1
->insn
.is_abslit
!=
12135 prop_flags_2
->insn
.is_abslit
)
12139 if (prop_flags_1
->is_align
)
12147 xt_block_aligned_size (const xtensa_block_info
*xt_block
)
12150 unsigned align_bits
;
12152 if (!xt_block
->flags
.is_align
)
12153 return xt_block
->size
;
12155 end_addr
= xt_block
->offset
+ xt_block
->size
;
12156 align_bits
= xt_block
->flags
.alignment
;
12157 end_addr
= ((end_addr
+ ((1 << align_bits
) -1)) >> align_bits
) << align_bits
;
12158 return end_addr
- xt_block
->offset
;
12163 xtensa_xt_block_combine (xtensa_block_info
*xt_block
,
12164 const xtensa_block_info
*xt_block_2
)
12166 if (xt_block
->sec
!= xt_block_2
->sec
)
12168 if (xt_block
->offset
+ xt_block_aligned_size (xt_block
)
12169 != xt_block_2
->offset
)
12172 if (xt_block_2
->size
== 0
12173 && (!xt_block_2
->flags
.is_unreachable
12174 || xt_block
->flags
.is_unreachable
))
12176 if (xt_block_2
->flags
.is_align
12177 && xt_block
->flags
.is_align
)
12179 /* Nothing needed. */
12180 if (xt_block
->flags
.alignment
>= xt_block_2
->flags
.alignment
)
12185 if (xt_block_2
->flags
.is_align
)
12187 /* Push alignment to previous entry. */
12188 xt_block
->flags
.is_align
= xt_block_2
->flags
.is_align
;
12189 xt_block
->flags
.alignment
= xt_block_2
->flags
.alignment
;
12194 if (!xtensa_frag_flags_combinable (&xt_block
->flags
,
12195 &xt_block_2
->flags
))
12198 xt_block
->size
+= xt_block_2
->size
;
12200 if (xt_block_2
->flags
.is_align
)
12202 xt_block
->flags
.is_align
= TRUE
;
12203 xt_block
->flags
.alignment
= xt_block_2
->flags
.alignment
;
12211 add_xt_prop_frags (segT sec
,
12212 xtensa_block_info
**xt_block
,
12213 frag_flags_fn property_function
)
12217 /* Build it if needed. */
12218 while (*xt_block
!= NULL
)
12220 xt_block
= &(*xt_block
)->next
;
12222 /* We are either at NULL at the beginning or at the end. */
12224 /* Walk through the frags. */
12225 if (seg_info (sec
)->frchainP
)
12227 for (fragP
= seg_info (sec
)->frchainP
->frch_root
; fragP
;
12228 fragP
= fragP
->fr_next
)
12230 xtensa_block_info tmp_block
;
12231 tmp_block
.sec
= sec
;
12232 tmp_block
.offset
= fragP
->fr_address
;
12233 tmp_block
.size
= fragP
->fr_fix
;
12234 tmp_block
.next
= NULL
;
12235 property_function (fragP
, &tmp_block
.flags
);
12237 if (!xtensa_frag_flags_is_empty (&tmp_block
.flags
))
12238 /* && fragP->fr_fix != 0) */
12240 if ((*xt_block
) == NULL
12241 || !xtensa_xt_block_combine (*xt_block
, &tmp_block
))
12243 xtensa_block_info
*new_block
;
12244 if ((*xt_block
) != NULL
)
12245 xt_block
= &(*xt_block
)->next
;
12246 new_block
= (xtensa_block_info
*)
12247 xmalloc (sizeof (xtensa_block_info
));
12248 *new_block
= tmp_block
;
12249 *xt_block
= new_block
;
12257 /* op_placement_info_table */
12259 /* op_placement_info makes it easier to determine which
12260 ops can go in which slots. */
12263 init_op_placement_info_table (void)
12265 xtensa_isa isa
= xtensa_default_isa
;
12266 xtensa_insnbuf ibuf
= xtensa_insnbuf_alloc (isa
);
12267 xtensa_opcode opcode
;
12270 int num_opcodes
= xtensa_isa_num_opcodes (isa
);
12272 op_placement_table
= (op_placement_info_table
)
12273 xmalloc (sizeof (op_placement_info
) * num_opcodes
);
12274 gas_assert (xtensa_isa_num_formats (isa
) < MAX_FORMATS
);
12276 for (opcode
= 0; opcode
< num_opcodes
; opcode
++)
12278 op_placement_info
*opi
= &op_placement_table
[opcode
];
12279 /* FIXME: Make tinsn allocation dynamic. */
12280 if (xtensa_opcode_num_operands (isa
, opcode
) > MAX_INSN_ARGS
)
12281 as_fatal (_("too many operands in instruction"));
12282 opi
->narrowest
= XTENSA_UNDEFINED
;
12283 opi
->narrowest_size
= 0x7F;
12284 opi
->narrowest_slot
= 0;
12286 opi
->num_formats
= 0;
12288 for (fmt
= 0; fmt
< xtensa_isa_num_formats (isa
); fmt
++)
12290 opi
->slots
[fmt
] = 0;
12291 for (slot
= 0; slot
< xtensa_format_num_slots (isa
, fmt
); slot
++)
12293 if (xtensa_opcode_encode (isa
, fmt
, slot
, ibuf
, opcode
) == 0)
12295 int fmt_length
= xtensa_format_length (isa
, fmt
);
12297 set_bit (fmt
, opi
->formats
);
12298 set_bit (slot
, opi
->slots
[fmt
]);
12299 if (fmt_length
< opi
->narrowest_size
12300 || (fmt_length
== opi
->narrowest_size
12301 && (xtensa_format_num_slots (isa
, fmt
)
12302 < xtensa_format_num_slots (isa
,
12305 opi
->narrowest
= fmt
;
12306 opi
->narrowest_size
= fmt_length
;
12307 opi
->narrowest_slot
= slot
;
12312 opi
->num_formats
++;
12315 xtensa_insnbuf_free (isa
, ibuf
);
12320 opcode_fits_format_slot (xtensa_opcode opcode
, xtensa_format fmt
, int slot
)
12322 return bit_is_set (slot
, op_placement_table
[opcode
].slots
[fmt
]);
12326 /* If the opcode is available in a single slot format, return its size. */
12329 xg_get_single_size (xtensa_opcode opcode
)
12331 return op_placement_table
[opcode
].narrowest_size
;
12335 static xtensa_format
12336 xg_get_single_format (xtensa_opcode opcode
)
12338 return op_placement_table
[opcode
].narrowest
;
12343 xg_get_single_slot (xtensa_opcode opcode
)
12345 return op_placement_table
[opcode
].narrowest_slot
;
12349 /* Instruction Stack Functions (from "xtensa-istack.h"). */
12352 istack_init (IStack
*stack
)
12359 istack_empty (IStack
*stack
)
12361 return (stack
->ninsn
== 0);
12366 istack_full (IStack
*stack
)
12368 return (stack
->ninsn
== MAX_ISTACK
);
12372 /* Return a pointer to the top IStack entry.
12373 It is an error to call this if istack_empty () is TRUE. */
12376 istack_top (IStack
*stack
)
12378 int rec
= stack
->ninsn
- 1;
12379 gas_assert (!istack_empty (stack
));
12380 return &stack
->insn
[rec
];
12384 /* Add a new TInsn to an IStack.
12385 It is an error to call this if istack_full () is TRUE. */
12388 istack_push (IStack
*stack
, TInsn
*insn
)
12390 int rec
= stack
->ninsn
;
12391 gas_assert (!istack_full (stack
));
12392 stack
->insn
[rec
] = *insn
;
12397 /* Clear space for the next TInsn on the IStack and return a pointer
12398 to it. It is an error to call this if istack_full () is TRUE. */
12401 istack_push_space (IStack
*stack
)
12403 int rec
= stack
->ninsn
;
12405 gas_assert (!istack_full (stack
));
12406 insn
= &stack
->insn
[rec
];
12413 /* Remove the last pushed instruction. It is an error to call this if
12414 istack_empty () returns TRUE. */
12417 istack_pop (IStack
*stack
)
12419 int rec
= stack
->ninsn
- 1;
12420 gas_assert (!istack_empty (stack
));
12422 tinsn_init (&stack
->insn
[rec
]);
12426 /* TInsn functions. */
12429 tinsn_init (TInsn
*dst
)
12431 memset (dst
, 0, sizeof (TInsn
));
12435 /* Return TRUE if ANY of the operands in the insn are symbolic. */
12438 tinsn_has_symbolic_operands (const TInsn
*insn
)
12441 int n
= insn
->ntok
;
12443 gas_assert (insn
->insn_type
== ITYPE_INSN
);
12445 for (i
= 0; i
< n
; ++i
)
12447 switch (insn
->tok
[i
].X_op
)
12461 tinsn_has_invalid_symbolic_operands (const TInsn
*insn
)
12463 xtensa_isa isa
= xtensa_default_isa
;
12465 int n
= insn
->ntok
;
12467 gas_assert (insn
->insn_type
== ITYPE_INSN
);
12469 for (i
= 0; i
< n
; ++i
)
12471 switch (insn
->tok
[i
].X_op
)
12479 /* Errors for these types are caught later. */
12484 /* Symbolic immediates are only allowed on the last immediate
12485 operand. At this time, CONST16 is the only opcode where we
12486 support non-PC-relative relocations. */
12487 if (i
!= get_relaxable_immed (insn
->opcode
)
12488 || (xtensa_operand_is_PCrelative (isa
, insn
->opcode
, i
) != 1
12489 && insn
->opcode
!= xtensa_const16_opcode
))
12491 as_bad (_("invalid symbolic operand"));
12500 /* For assembly code with complex expressions (e.g. subtraction),
12501 we have to build them in the literal pool so that
12502 their results are calculated correctly after relaxation.
12503 The relaxation only handles expressions that
12504 boil down to SYMBOL + OFFSET. */
12507 tinsn_has_complex_operands (const TInsn
*insn
)
12510 int n
= insn
->ntok
;
12511 gas_assert (insn
->insn_type
== ITYPE_INSN
);
12512 for (i
= 0; i
< n
; ++i
)
12514 switch (insn
->tok
[i
].X_op
)
12530 /* Encode a TInsn opcode and its constant operands into slotbuf.
12531 Return TRUE if there is a symbol in the immediate field. This
12532 function assumes that:
12533 1) The number of operands are correct.
12534 2) The insn_type is ITYPE_INSN.
12535 3) The opcode can be encoded in the specified format and slot.
12536 4) Operands are either O_constant or O_symbol, and all constants fit. */
12539 tinsn_to_slotbuf (xtensa_format fmt
,
12542 xtensa_insnbuf slotbuf
)
12544 xtensa_isa isa
= xtensa_default_isa
;
12545 xtensa_opcode opcode
= tinsn
->opcode
;
12546 bfd_boolean has_fixup
= FALSE
;
12547 int noperands
= xtensa_opcode_num_operands (isa
, opcode
);
12550 gas_assert (tinsn
->insn_type
== ITYPE_INSN
);
12551 if (noperands
!= tinsn
->ntok
)
12552 as_fatal (_("operand number mismatch"));
12554 if (xtensa_opcode_encode (isa
, fmt
, slot
, slotbuf
, opcode
))
12556 as_bad (_("cannot encode opcode \"%s\" in the given format \"%s\""),
12557 xtensa_opcode_name (isa
, opcode
), xtensa_format_name (isa
, fmt
));
12561 for (i
= 0; i
< noperands
; i
++)
12563 expressionS
*exp
= &tinsn
->tok
[i
];
12572 if (xtensa_operand_is_visible (isa
, opcode
, i
) == 0)
12574 /* The register number has already been checked in
12575 expression_maybe_register, so we don't need to check here. */
12576 opnd_value
= exp
->X_add_number
;
12577 (void) xtensa_operand_encode (isa
, opcode
, i
, &opnd_value
);
12578 rc
= xtensa_operand_set_field (isa
, opcode
, i
, fmt
, slot
, slotbuf
,
12581 as_warn (_("xtensa-isa failure: %s"), xtensa_isa_error_msg (isa
));
12585 if (xtensa_operand_is_visible (isa
, opcode
, i
) == 0)
12587 as_where (&file_name
, &line
);
12588 /* It is a constant and we called this function
12589 then we have to try to fit it. */
12590 xtensa_insnbuf_set_operand (slotbuf
, fmt
, slot
, opcode
, i
,
12591 exp
->X_add_number
, file_name
, line
);
12604 /* Encode a single TInsn into an insnbuf. If the opcode can only be encoded
12605 into a multi-slot instruction, fill the other slots with NOPs.
12606 Return TRUE if there is a symbol in the immediate field. See also the
12607 assumptions listed for tinsn_to_slotbuf. */
12610 tinsn_to_insnbuf (TInsn
*tinsn
, xtensa_insnbuf insnbuf
)
12612 static xtensa_insnbuf slotbuf
= 0;
12613 static vliw_insn vinsn
;
12614 xtensa_isa isa
= xtensa_default_isa
;
12615 bfd_boolean has_fixup
= FALSE
;
12620 slotbuf
= xtensa_insnbuf_alloc (isa
);
12621 xg_init_vinsn (&vinsn
);
12624 xg_clear_vinsn (&vinsn
);
12626 bundle_tinsn (tinsn
, &vinsn
);
12628 xtensa_format_encode (isa
, vinsn
.format
, insnbuf
);
12630 for (i
= 0; i
< vinsn
.num_slots
; i
++)
12632 /* Only one slot may have a fix-up because the rest contains NOPs. */
12634 tinsn_to_slotbuf (vinsn
.format
, i
, &vinsn
.slots
[i
], vinsn
.slotbuf
[i
]);
12635 xtensa_format_set_slot (isa
, vinsn
.format
, i
, insnbuf
, vinsn
.slotbuf
[i
]);
12642 /* Check the instruction arguments. Return TRUE on failure. */
12645 tinsn_check_arguments (const TInsn
*insn
)
12647 xtensa_isa isa
= xtensa_default_isa
;
12648 xtensa_opcode opcode
= insn
->opcode
;
12649 xtensa_regfile t1_regfile
, t2_regfile
;
12650 int t1_reg
, t2_reg
;
12651 int t1_base_reg
, t1_last_reg
;
12652 int t2_base_reg
, t2_last_reg
;
12653 char t1_inout
, t2_inout
;
12656 if (opcode
== XTENSA_UNDEFINED
)
12658 as_bad (_("invalid opcode"));
12662 if (xtensa_opcode_num_operands (isa
, opcode
) > insn
->ntok
)
12664 as_bad (_("too few operands"));
12668 if (xtensa_opcode_num_operands (isa
, opcode
) < insn
->ntok
)
12670 as_bad (_("too many operands"));
12674 /* Check registers. */
12675 for (j
= 0; j
< insn
->ntok
; j
++)
12677 if (xtensa_operand_is_register (isa
, insn
->opcode
, j
) != 1)
12680 t2_regfile
= xtensa_operand_regfile (isa
, insn
->opcode
, j
);
12681 t2_base_reg
= insn
->tok
[j
].X_add_number
;
12683 = t2_base_reg
+ xtensa_operand_num_regs (isa
, insn
->opcode
, j
);
12685 for (i
= 0; i
< insn
->ntok
; i
++)
12690 if (xtensa_operand_is_register (isa
, insn
->opcode
, i
) != 1)
12693 t1_regfile
= xtensa_operand_regfile (isa
, insn
->opcode
, i
);
12695 if (t1_regfile
!= t2_regfile
)
12698 t1_inout
= xtensa_operand_inout (isa
, insn
->opcode
, i
);
12699 t2_inout
= xtensa_operand_inout (isa
, insn
->opcode
, j
);
12701 t1_base_reg
= insn
->tok
[i
].X_add_number
;
12702 t1_last_reg
= (t1_base_reg
12703 + xtensa_operand_num_regs (isa
, insn
->opcode
, i
));
12705 for (t1_reg
= t1_base_reg
; t1_reg
< t1_last_reg
; t1_reg
++)
12707 for (t2_reg
= t2_base_reg
; t2_reg
< t2_last_reg
; t2_reg
++)
12709 if (t1_reg
!= t2_reg
)
12712 if (t1_inout
!= 'i' && t2_inout
!= 'i')
12714 as_bad (_("multiple writes to the same register"));
12725 /* Load an instruction from its encoded form. */
12728 tinsn_from_chars (TInsn
*tinsn
, char *f
, int slot
)
12732 xg_init_vinsn (&vinsn
);
12733 vinsn_from_chars (&vinsn
, f
);
12735 *tinsn
= vinsn
.slots
[slot
];
12736 xg_free_vinsn (&vinsn
);
12741 tinsn_from_insnbuf (TInsn
*tinsn
,
12742 xtensa_insnbuf slotbuf
,
12747 xtensa_isa isa
= xtensa_default_isa
;
12749 /* Find the immed. */
12750 tinsn_init (tinsn
);
12751 tinsn
->insn_type
= ITYPE_INSN
;
12752 tinsn
->is_specific_opcode
= FALSE
; /* must not be specific */
12753 tinsn
->opcode
= xtensa_opcode_decode (isa
, fmt
, slot
, slotbuf
);
12754 tinsn
->ntok
= xtensa_opcode_num_operands (isa
, tinsn
->opcode
);
12755 for (i
= 0; i
< tinsn
->ntok
; i
++)
12757 set_expr_const (&tinsn
->tok
[i
],
12758 xtensa_insnbuf_get_operand (slotbuf
, fmt
, slot
,
12759 tinsn
->opcode
, i
));
12764 /* Read the value of the relaxable immed from the fr_symbol and fr_offset. */
12767 tinsn_immed_from_frag (TInsn
*tinsn
, fragS
*fragP
, int slot
)
12769 xtensa_opcode opcode
= tinsn
->opcode
;
12772 if (fragP
->tc_frag_data
.slot_symbols
[slot
])
12774 opnum
= get_relaxable_immed (opcode
);
12775 gas_assert (opnum
>= 0);
12776 set_expr_symbol_offset (&tinsn
->tok
[opnum
],
12777 fragP
->tc_frag_data
.slot_symbols
[slot
],
12778 fragP
->tc_frag_data
.slot_offsets
[slot
]);
12780 tinsn
->extra_arg
= fragP
->tc_frag_data
.free_reg
[slot
];
12785 get_num_stack_text_bytes (IStack
*istack
)
12788 int text_bytes
= 0;
12790 for (i
= 0; i
< istack
->ninsn
; i
++)
12792 TInsn
*tinsn
= &istack
->insn
[i
];
12793 if (tinsn
->insn_type
== ITYPE_INSN
)
12794 text_bytes
+= xg_get_single_size (tinsn
->opcode
);
12801 get_num_stack_literal_bytes (IStack
*istack
)
12806 for (i
= 0; i
< istack
->ninsn
; i
++)
12808 TInsn
*tinsn
= &istack
->insn
[i
];
12809 if (tinsn
->insn_type
== ITYPE_LITERAL
&& tinsn
->ntok
== 1)
12816 /* vliw_insn functions. */
12819 xg_init_vinsn (vliw_insn
*v
)
12822 xtensa_isa isa
= xtensa_default_isa
;
12824 xg_clear_vinsn (v
);
12826 v
->insnbuf
= xtensa_insnbuf_alloc (isa
);
12827 if (v
->insnbuf
== NULL
)
12828 as_fatal (_("out of memory"));
12830 for (i
= 0; i
< config_max_slots
; i
++)
12832 v
->slotbuf
[i
] = xtensa_insnbuf_alloc (isa
);
12833 if (v
->slotbuf
[i
] == NULL
)
12834 as_fatal (_("out of memory"));
12840 xg_clear_vinsn (vliw_insn
*v
)
12844 memset (v
, 0, offsetof (vliw_insn
, slots
)
12845 + sizeof(TInsn
) * config_max_slots
);
12847 v
->format
= XTENSA_UNDEFINED
;
12849 v
->inside_bundle
= FALSE
;
12851 if (xt_saved_debug_type
!= DEBUG_NONE
)
12852 debug_type
= xt_saved_debug_type
;
12854 for (i
= 0; i
< config_max_slots
; i
++)
12855 v
->slots
[i
].opcode
= XTENSA_UNDEFINED
;
12860 xg_copy_vinsn (vliw_insn
*dst
, vliw_insn
*src
)
12863 offsetof(vliw_insn
, slots
) + src
->num_slots
* sizeof(TInsn
));
12864 dst
->insnbuf
= src
->insnbuf
;
12865 memcpy (dst
->slotbuf
, src
->slotbuf
, src
->num_slots
* sizeof(xtensa_insnbuf
));
12870 vinsn_has_specific_opcodes (vliw_insn
*v
)
12874 for (i
= 0; i
< v
->num_slots
; i
++)
12876 if (v
->slots
[i
].is_specific_opcode
)
12884 xg_free_vinsn (vliw_insn
*v
)
12887 xtensa_insnbuf_free (xtensa_default_isa
, v
->insnbuf
);
12888 for (i
= 0; i
< config_max_slots
; i
++)
12889 xtensa_insnbuf_free (xtensa_default_isa
, v
->slotbuf
[i
]);
12893 /* Encode a vliw_insn into an insnbuf. Return TRUE if there are any symbolic
12894 operands. See also the assumptions listed for tinsn_to_slotbuf. */
12897 vinsn_to_insnbuf (vliw_insn
*vinsn
,
12900 bfd_boolean record_fixup
)
12902 xtensa_isa isa
= xtensa_default_isa
;
12903 xtensa_format fmt
= vinsn
->format
;
12904 xtensa_insnbuf insnbuf
= vinsn
->insnbuf
;
12906 bfd_boolean has_fixup
= FALSE
;
12908 xtensa_format_encode (isa
, fmt
, insnbuf
);
12910 for (slot
= 0; slot
< vinsn
->num_slots
; slot
++)
12912 TInsn
*tinsn
= &vinsn
->slots
[slot
];
12913 expressionS
*extra_arg
= &tinsn
->extra_arg
;
12914 bfd_boolean tinsn_has_fixup
=
12915 tinsn_to_slotbuf (vinsn
->format
, slot
, tinsn
,
12916 vinsn
->slotbuf
[slot
]);
12918 xtensa_format_set_slot (isa
, fmt
, slot
,
12919 insnbuf
, vinsn
->slotbuf
[slot
]);
12920 if (extra_arg
->X_op
!= O_illegal
&& extra_arg
->X_op
!= O_register
)
12922 if (vinsn
->num_slots
!= 1)
12923 as_bad (_("TLS relocation not allowed in FLIX bundle"));
12924 else if (record_fixup
)
12925 /* Instructions that generate TLS relocations should always be
12926 relaxed in the front-end. If "record_fixup" is set, then this
12927 function is being called during back-end relaxation, so flag
12928 the unexpected behavior as an error. */
12929 as_bad (_("unexpected TLS relocation"));
12931 fix_new (fragP
, frag_offset
- fragP
->fr_literal
,
12932 xtensa_format_length (isa
, fmt
),
12933 extra_arg
->X_add_symbol
, extra_arg
->X_add_number
,
12934 FALSE
, map_operator_to_reloc (extra_arg
->X_op
, FALSE
));
12936 if (tinsn_has_fixup
)
12939 xtensa_opcode opcode
= tinsn
->opcode
;
12940 int noperands
= xtensa_opcode_num_operands (isa
, opcode
);
12943 for (i
= 0; i
< noperands
; i
++)
12945 expressionS
* exp
= &tinsn
->tok
[i
];
12951 if (get_relaxable_immed (opcode
) == i
)
12953 /* Add a fix record for the instruction, except if this
12954 function is being called prior to relaxation, i.e.,
12955 if record_fixup is false, and the instruction might
12956 be relaxed later. */
12958 || tinsn
->is_specific_opcode
12959 || !xg_is_relaxable_insn (tinsn
, 0))
12961 xg_add_opcode_fix (tinsn
, i
, fmt
, slot
, exp
, fragP
,
12962 frag_offset
- fragP
->fr_literal
);
12966 if (exp
->X_op
!= O_symbol
)
12967 as_bad (_("invalid operand"));
12968 tinsn
->symbol
= exp
->X_add_symbol
;
12969 tinsn
->offset
= exp
->X_add_number
;
12973 as_bad (_("symbolic operand not allowed"));
12981 as_bad (_("expression too complex"));
12993 vinsn_from_chars (vliw_insn
*vinsn
, char *f
)
12995 static xtensa_insnbuf insnbuf
= NULL
;
12996 static xtensa_insnbuf slotbuf
= NULL
;
12999 xtensa_isa isa
= xtensa_default_isa
;
13003 insnbuf
= xtensa_insnbuf_alloc (isa
);
13004 slotbuf
= xtensa_insnbuf_alloc (isa
);
13007 xtensa_insnbuf_from_chars (isa
, insnbuf
, (unsigned char *) f
, 0);
13008 fmt
= xtensa_format_decode (isa
, insnbuf
);
13009 if (fmt
== XTENSA_UNDEFINED
)
13010 as_fatal (_("cannot decode instruction format"));
13011 vinsn
->format
= fmt
;
13012 vinsn
->num_slots
= xtensa_format_num_slots (isa
, fmt
);
13014 for (i
= 0; i
< vinsn
->num_slots
; i
++)
13016 TInsn
*tinsn
= &vinsn
->slots
[i
];
13017 xtensa_format_get_slot (isa
, fmt
, i
, insnbuf
, slotbuf
);
13018 tinsn_from_insnbuf (tinsn
, slotbuf
, fmt
, i
);
13023 /* Expression utilities. */
13025 /* Return TRUE if the expression is an integer constant. */
13028 expr_is_const (const expressionS
*s
)
13030 return (s
->X_op
== O_constant
);
13034 /* Get the expression constant.
13035 Calling this is illegal if expr_is_const () returns TRUE. */
13038 get_expr_const (const expressionS
*s
)
13040 gas_assert (expr_is_const (s
));
13041 return s
->X_add_number
;
13045 /* Set the expression to a constant value. */
13048 set_expr_const (expressionS
*s
, offsetT val
)
13050 s
->X_op
= O_constant
;
13051 s
->X_add_number
= val
;
13052 s
->X_add_symbol
= NULL
;
13053 s
->X_op_symbol
= NULL
;
13058 expr_is_register (const expressionS
*s
)
13060 return (s
->X_op
== O_register
);
13064 /* Get the expression constant.
13065 Calling this is illegal if expr_is_const () returns TRUE. */
13068 get_expr_register (const expressionS
*s
)
13070 gas_assert (expr_is_register (s
));
13071 return s
->X_add_number
;
13075 /* Set the expression to a symbol + constant offset. */
13078 set_expr_symbol_offset (expressionS
*s
, symbolS
*sym
, offsetT offset
)
13080 s
->X_op
= O_symbol
;
13081 s
->X_add_symbol
= sym
;
13082 s
->X_op_symbol
= NULL
; /* unused */
13083 s
->X_add_number
= offset
;
13087 /* Return TRUE if the two expressions are equal. */
13090 expr_is_equal (expressionS
*s1
, expressionS
*s2
)
13092 if (s1
->X_op
!= s2
->X_op
)
13094 if (s1
->X_add_symbol
!= s2
->X_add_symbol
)
13096 if (s1
->X_op_symbol
!= s2
->X_op_symbol
)
13098 if (s1
->X_add_number
!= s2
->X_add_number
)
13105 copy_expr (expressionS
*dst
, const expressionS
*src
)
13107 memcpy (dst
, src
, sizeof (expressionS
));
13111 /* Support for the "--rename-section" option. */
13113 struct rename_section_struct
13117 struct rename_section_struct
*next
;
13120 static struct rename_section_struct
*section_rename
;
13123 /* Parse the string "oldname=new_name(:oldname2=new_name2)*" and add
13124 entries to the section_rename list. Note: Specifying multiple
13125 renamings separated by colons is not documented and is retained only
13126 for backward compatibility. */
13129 build_section_rename (const char *arg
)
13131 struct rename_section_struct
*r
;
13132 char *this_arg
= NULL
;
13133 char *next_arg
= NULL
;
13135 for (this_arg
= xstrdup (arg
); this_arg
!= NULL
; this_arg
= next_arg
)
13137 char *old_name
, *new_name
;
13141 next_arg
= strchr (this_arg
, ':');
13149 old_name
= this_arg
;
13150 new_name
= strchr (this_arg
, '=');
13152 if (*old_name
== '\0')
13154 as_warn (_("ignoring extra '-rename-section' delimiter ':'"));
13157 if (!new_name
|| new_name
[1] == '\0')
13159 as_warn (_("ignoring invalid '-rename-section' specification: '%s'"),
13166 /* Check for invalid section renaming. */
13167 for (r
= section_rename
; r
!= NULL
; r
= r
->next
)
13169 if (strcmp (r
->old_name
, old_name
) == 0)
13170 as_bad (_("section %s renamed multiple times"), old_name
);
13171 if (strcmp (r
->new_name
, new_name
) == 0)
13172 as_bad (_("multiple sections remapped to output section %s"),
13177 r
= (struct rename_section_struct
*)
13178 xmalloc (sizeof (struct rename_section_struct
));
13179 r
->old_name
= xstrdup (old_name
);
13180 r
->new_name
= xstrdup (new_name
);
13181 r
->next
= section_rename
;
13182 section_rename
= r
;
13188 xtensa_section_rename (char *name
)
13190 struct rename_section_struct
*r
= section_rename
;
13192 for (r
= section_rename
; r
!= NULL
; r
= r
->next
)
13194 if (strcmp (r
->old_name
, name
) == 0)
13195 return r
->new_name
;