1 /* tc-xtensa.c -- Assemble Xtensa instructions.
2 Copyright (C) 2003-2017 Free Software Foundation, Inc.
4 This file is part of GAS, the GNU Assembler.
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
24 #include "safe-ctype.h"
25 #include "tc-xtensa.h"
27 #include "xtensa-relax.h"
28 #include "dwarf2dbg.h"
29 #include "xtensa-istack.h"
30 #include "struc-symbol.h"
31 #include "xtensa-config.h"
32 #include "elf/xtensa.h"
34 /* Provide default values for new configuration settings. */
40 #define uint32 unsigned int
43 #define int32 signed int
48 Naming conventions (used somewhat inconsistently):
49 The xtensa_ functions are exported
50 The xg_ functions are internal
52 We also have a couple of different extensibility mechanisms.
53 1) The idiom replacement:
54 This is used when a line is first parsed to
55 replace an instruction pattern with another instruction
56 It is currently limited to replacements of instructions
57 with constant operands.
58 2) The xtensa-relax.c mechanism that has stronger instruction
59 replacement patterns. When an instruction's immediate field
60 does not fit the next instruction sequence is attempted.
61 In addition, "narrow" opcodes are supported this way. */
64 /* Define characters with special meanings to GAS. */
65 const char comment_chars
[] = "#";
66 const char line_comment_chars
[] = "#";
67 const char line_separator_chars
[] = ";";
68 const char EXP_CHARS
[] = "eE";
69 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
72 /* Flags to indicate whether the hardware supports the density and
73 absolute literals options. */
75 bfd_boolean density_supported
= XCHAL_HAVE_DENSITY
;
76 bfd_boolean absolute_literals_supported
= XSHAL_USE_ABSOLUTE_LITERALS
;
78 static vliw_insn cur_vinsn
;
80 unsigned xtensa_num_pipe_stages
;
81 unsigned xtensa_fetch_width
= XCHAL_INST_FETCH_WIDTH
;
83 static enum debug_info_type xt_saved_debug_type
= DEBUG_NONE
;
85 /* Some functions are only valid in the front end. This variable
86 allows us to assert that we haven't crossed over into the
88 static bfd_boolean past_xtensa_end
= FALSE
;
90 /* Flags for properties of the last instruction in a segment. */
91 #define FLAG_IS_A0_WRITER 0x1
92 #define FLAG_IS_BAD_LOOPEND 0x2
95 /* We define a special segment names ".literal" to place literals
96 into. The .fini and .init sections are special because they
97 contain code that is moved together by the linker. We give them
98 their own special .fini.literal and .init.literal sections. */
100 #define LITERAL_SECTION_NAME xtensa_section_rename (".literal")
101 #define LIT4_SECTION_NAME xtensa_section_rename (".lit4")
102 #define INIT_SECTION_NAME xtensa_section_rename (".init")
103 #define FINI_SECTION_NAME xtensa_section_rename (".fini")
106 /* This type is used for the directive_stack to keep track of the
107 state of the literal collection pools. If lit_prefix is set, it is
108 used to determine the literal section names; otherwise, the literal
109 sections are determined based on the current text section. The
110 lit_seg and lit4_seg fields cache these literal sections, with the
111 current_text_seg field used a tag to indicate whether the cached
114 typedef struct lit_state_struct
117 segT current_text_seg
;
122 static lit_state default_lit_sections
;
125 /* We keep a list of literal segments. The seg_list type is the node
126 for this list. The literal_head pointer is the head of the list,
127 with the literal_head_h dummy node at the start. */
129 typedef struct seg_list_struct
131 struct seg_list_struct
*next
;
135 static seg_list literal_head_h
;
136 static seg_list
*literal_head
= &literal_head_h
;
139 /* Lists of symbols. We keep a list of symbols that label the current
140 instruction, so that we can adjust the symbols when inserting alignment
141 for various instructions. We also keep a list of all the symbols on
142 literals, so that we can fix up those symbols when the literals are
143 later moved into the text sections. */
145 typedef struct sym_list_struct
147 struct sym_list_struct
*next
;
151 static sym_list
*insn_labels
= NULL
;
152 static sym_list
*free_insn_labels
= NULL
;
153 static sym_list
*saved_insn_labels
= NULL
;
155 static sym_list
*literal_syms
;
158 /* Flags to determine whether to prefer const16 or l32r
159 if both options are available. */
160 int prefer_const16
= 0;
163 /* Global flag to indicate when we are emitting literals. */
164 int generating_literals
= 0;
166 /* The following PROPERTY table definitions are copied from
167 <elf/xtensa.h> and must be kept in sync with the code there. */
169 /* Flags in the property tables to specify whether blocks of memory
170 are literals, instructions, data, or unreachable. For
171 instructions, blocks that begin loop targets and branch targets are
172 designated. Blocks that do not allow density, instruction
173 reordering or transformation are also specified. Finally, for
174 branch targets, branch target alignment priority is included.
175 Alignment of the next block is specified in the current block
176 and the size of the current block does not include any fill required
177 to align to the next block. */
179 #define XTENSA_PROP_LITERAL 0x00000001
180 #define XTENSA_PROP_INSN 0x00000002
181 #define XTENSA_PROP_DATA 0x00000004
182 #define XTENSA_PROP_UNREACHABLE 0x00000008
183 /* Instruction only properties at beginning of code. */
184 #define XTENSA_PROP_INSN_LOOP_TARGET 0x00000010
185 #define XTENSA_PROP_INSN_BRANCH_TARGET 0x00000020
186 /* Instruction only properties about code. */
187 #define XTENSA_PROP_INSN_NO_DENSITY 0x00000040
188 #define XTENSA_PROP_INSN_NO_REORDER 0x00000080
189 /* Historically, NO_TRANSFORM was a property of instructions,
190 but it should apply to literals under certain circumstances. */
191 #define XTENSA_PROP_NO_TRANSFORM 0x00000100
193 /* Branch target alignment information. This transmits information
194 to the linker optimization about the priority of aligning a
195 particular block for branch target alignment: None, low priority,
196 high priority, or required. These only need to be checked in
197 instruction blocks marked as XTENSA_PROP_INSN_BRANCH_TARGET.
200 switch (GET_XTENSA_PROP_BT_ALIGN (flags))
201 case XTENSA_PROP_BT_ALIGN_NONE:
202 case XTENSA_PROP_BT_ALIGN_LOW:
203 case XTENSA_PROP_BT_ALIGN_HIGH:
204 case XTENSA_PROP_BT_ALIGN_REQUIRE:
206 #define XTENSA_PROP_BT_ALIGN_MASK 0x00000600
208 /* No branch target alignment. */
209 #define XTENSA_PROP_BT_ALIGN_NONE 0x0
210 /* Low priority branch target alignment. */
211 #define XTENSA_PROP_BT_ALIGN_LOW 0x1
212 /* High priority branch target alignment. */
213 #define XTENSA_PROP_BT_ALIGN_HIGH 0x2
214 /* Required branch target alignment. */
215 #define XTENSA_PROP_BT_ALIGN_REQUIRE 0x3
217 #define SET_XTENSA_PROP_BT_ALIGN(flag, align) \
218 (((flag) & (~XTENSA_PROP_BT_ALIGN_MASK)) | \
219 (((align) << 9) & XTENSA_PROP_BT_ALIGN_MASK))
222 /* Alignment is specified in the block BEFORE the one that needs
223 alignment. Up to 5 bits. Use GET_XTENSA_PROP_ALIGNMENT(flags) to
224 get the required alignment specified as a power of 2. Use
225 SET_XTENSA_PROP_ALIGNMENT(flags, pow2) to set the required
226 alignment. Be careful of side effects since the SET will evaluate
227 flags twice. Also, note that the SIZE of a block in the property
228 table does not include the alignment size, so the alignment fill
229 must be calculated to determine if two blocks are contiguous.
230 TEXT_ALIGN is not currently implemented but is a placeholder for a
231 possible future implementation. */
233 #define XTENSA_PROP_ALIGN 0x00000800
235 #define XTENSA_PROP_ALIGNMENT_MASK 0x0001f000
237 #define SET_XTENSA_PROP_ALIGNMENT(flag, align) \
238 (((flag) & (~XTENSA_PROP_ALIGNMENT_MASK)) | \
239 (((align) << 12) & XTENSA_PROP_ALIGNMENT_MASK))
241 #define XTENSA_PROP_INSN_ABSLIT 0x00020000
244 /* Structure for saving instruction and alignment per-fragment data
245 that will be written to the object file. This structure is
246 equivalent to the actual data that will be written out to the file
247 but is easier to use. We provide a conversion to file flags
248 in frag_flags_to_number. */
250 typedef struct frag_flags_struct frag_flags
;
252 struct frag_flags_struct
254 /* is_literal should only be used after xtensa_move_literals.
255 If you need to check if you are generating a literal fragment,
256 then use the generating_literals global. */
258 unsigned is_literal
: 1;
259 unsigned is_insn
: 1;
260 unsigned is_data
: 1;
261 unsigned is_unreachable
: 1;
263 /* is_specific_opcode implies no_transform. */
264 unsigned is_no_transform
: 1;
268 unsigned is_loop_target
: 1;
269 unsigned is_branch_target
: 1; /* Branch targets have a priority. */
270 unsigned bt_align_priority
: 2;
272 unsigned is_no_density
: 1;
273 /* no_longcalls flag does not need to be placed in the object file. */
275 unsigned is_no_reorder
: 1;
277 /* Uses absolute literal addressing for l32r. */
278 unsigned is_abslit
: 1;
280 unsigned is_align
: 1;
281 unsigned alignment
: 5;
285 /* Structure for saving information about a block of property data
286 for frags that have the same flags. */
287 struct xtensa_block_info_struct
293 struct xtensa_block_info_struct
*next
;
297 /* Structure for saving the current state before emitting literals. */
298 typedef struct emit_state_struct
303 int generating_literals
;
307 /* Opcode placement information */
309 typedef unsigned long long bitfield
;
310 #define bit_is_set(bit, bf) ((bf) & (0x01ll << (bit)))
311 #define set_bit(bit, bf) ((bf) |= (0x01ll << (bit)))
312 #define clear_bit(bit, bf) ((bf) &= ~(0x01ll << (bit)))
314 #define MAX_FORMATS 32
316 typedef struct op_placement_info_struct
319 /* A number describing how restrictive the issue is for this
320 opcode. For example, an opcode that fits lots of different
321 formats has a high freedom, as does an opcode that fits
322 only one format but many slots in that format. The most
323 restrictive is the opcode that fits only one slot in one
326 xtensa_format narrowest
;
330 /* formats is a bitfield with the Nth bit set
331 if the opcode fits in the Nth xtensa_format. */
334 /* slots[N]'s Mth bit is set if the op fits in the
335 Mth slot of the Nth xtensa_format. */
336 bitfield slots
[MAX_FORMATS
];
338 /* A count of the number of slots in a given format
339 an op can fit (i.e., the bitcount of the slot field above). */
340 char slots_in_format
[MAX_FORMATS
];
342 } op_placement_info
, *op_placement_info_table
;
344 op_placement_info_table op_placement_table
;
347 /* Extra expression types. */
349 #define O_pltrel O_md1 /* like O_symbol but use a PLT reloc */
350 #define O_hi16 O_md2 /* use high 16 bits of symbolic value */
351 #define O_lo16 O_md3 /* use low 16 bits of symbolic value */
352 #define O_pcrel O_md4 /* value is a PC-relative offset */
353 #define O_tlsfunc O_md5 /* TLS_FUNC/TLSDESC_FN relocation */
354 #define O_tlsarg O_md6 /* TLS_ARG/TLSDESC_ARG relocation */
355 #define O_tlscall O_md7 /* TLS_CALL relocation */
356 #define O_tpoff O_md8 /* TPOFF relocation */
357 #define O_dtpoff O_md9 /* DTPOFF relocation */
359 struct suffix_reloc_map
363 bfd_reloc_code_real_type reloc
;
367 #define SUFFIX_MAP(str, reloc, op) { str, sizeof (str) - 1, reloc, op }
369 static struct suffix_reloc_map suffix_relocs
[] =
371 SUFFIX_MAP ("l", BFD_RELOC_LO16
, O_lo16
),
372 SUFFIX_MAP ("h", BFD_RELOC_HI16
, O_hi16
),
373 SUFFIX_MAP ("plt", BFD_RELOC_XTENSA_PLT
, O_pltrel
),
374 SUFFIX_MAP ("pcrel", BFD_RELOC_32_PCREL
, O_pcrel
),
375 SUFFIX_MAP ("tlsfunc", BFD_RELOC_XTENSA_TLS_FUNC
, O_tlsfunc
),
376 SUFFIX_MAP ("tlsarg", BFD_RELOC_XTENSA_TLS_ARG
, O_tlsarg
),
377 SUFFIX_MAP ("tlscall", BFD_RELOC_XTENSA_TLS_CALL
, O_tlscall
),
378 SUFFIX_MAP ("tpoff", BFD_RELOC_XTENSA_TLS_TPOFF
, O_tpoff
),
379 SUFFIX_MAP ("dtpoff", BFD_RELOC_XTENSA_TLS_DTPOFF
, O_dtpoff
),
393 directive_literal_prefix
,
395 directive_absolute_literals
,
396 directive_last_directive
402 bfd_boolean can_be_negated
;
405 const directive_infoS directive_info
[] =
408 { "literal", FALSE
},
410 { "transform", TRUE
},
411 { "freeregs", FALSE
},
412 { "longcalls", TRUE
},
413 { "literal_prefix", FALSE
},
414 { "schedule", TRUE
},
415 { "absolute-literals", TRUE
}
418 bfd_boolean directive_state
[] =
422 #if !XCHAL_HAVE_DENSITY
427 TRUE
, /* transform */
428 FALSE
, /* freeregs */
429 FALSE
, /* longcalls */
430 FALSE
, /* literal_prefix */
431 FALSE
, /* schedule */
432 #if XSHAL_USE_ABSOLUTE_LITERALS
433 TRUE
/* absolute_literals */
435 FALSE
/* absolute_literals */
439 /* A circular list of all potential and actual literal pool locations
443 struct litpool_frag
*next
;
444 struct litpool_frag
*prev
;
447 short priority
; /* 1, 2, or 3 -- 1 is highest */
448 short original_priority
;
451 /* Map a segment to its litpool_frag list. */
454 struct litpool_seg
*next
;
456 struct litpool_frag frag_list
;
457 int frag_count
; /* since last litpool location */
460 static struct litpool_seg litpool_seg_list
;
463 /* Directive functions. */
465 static void xtensa_begin_directive (int);
466 static void xtensa_end_directive (int);
467 static void xtensa_literal_prefix (void);
468 static void xtensa_literal_position (int);
469 static void xtensa_literal_pseudo (int);
470 static void xtensa_frequency_pseudo (int);
471 static void xtensa_elf_cons (int);
472 static void xtensa_leb128 (int);
474 /* Parsing and Idiom Translation. */
476 static bfd_reloc_code_real_type
xtensa_elf_suffix (char **, expressionS
*);
478 /* Various Other Internal Functions. */
480 extern bfd_boolean
xg_is_single_relaxable_insn (TInsn
*, TInsn
*, bfd_boolean
);
481 static bfd_boolean
xg_build_to_insn (TInsn
*, TInsn
*, BuildInstr
*);
482 static void xtensa_mark_literal_pool_location (void);
483 static addressT
get_expanded_loop_offset (xtensa_opcode
);
484 static fragS
*get_literal_pool_location (segT
);
485 static void set_literal_pool_location (segT
, fragS
*);
486 static void xtensa_set_frag_assembly_state (fragS
*);
487 static void finish_vinsn (vliw_insn
*);
488 static bfd_boolean
emit_single_op (TInsn
*);
489 static int total_frag_text_expansion (fragS
*);
490 static bfd_boolean use_trampolines
= TRUE
;
491 static void xtensa_check_frag_count (void);
492 static void xtensa_create_trampoline_frag (bfd_boolean
);
493 static void xtensa_maybe_create_trampoline_frag (void);
494 struct trampoline_frag
;
495 static int init_trampoline_frag (struct trampoline_frag
*);
496 static void xtensa_maybe_create_literal_pool_frag (bfd_boolean
, bfd_boolean
);
497 static bfd_boolean auto_litpools
= FALSE
;
498 static int auto_litpool_limit
= 10000;
500 /* Alignment Functions. */
502 static int get_text_align_power (unsigned);
503 static int get_text_align_max_fill_size (int, bfd_boolean
, bfd_boolean
);
504 static int branch_align_power (segT
);
506 /* Helpers for xtensa_relax_frag(). */
508 static long relax_frag_add_nop (fragS
*);
510 /* Accessors for additional per-subsegment information. */
512 static unsigned get_last_insn_flags (segT
, subsegT
);
513 static void set_last_insn_flags (segT
, subsegT
, unsigned, bfd_boolean
);
514 static float get_subseg_total_freq (segT
, subsegT
);
515 static float get_subseg_target_freq (segT
, subsegT
);
516 static void set_subseg_freq (segT
, subsegT
, float, float);
518 /* Segment list functions. */
520 static void xtensa_move_literals (void);
521 static void xtensa_reorder_segments (void);
522 static void xtensa_switch_to_literal_fragment (emit_state
*);
523 static void xtensa_switch_to_non_abs_literal_fragment (emit_state
*);
524 static void xtensa_switch_section_emit_state (emit_state
*, segT
, subsegT
);
525 static void xtensa_restore_emit_state (emit_state
*);
526 static segT
cache_literal_section (bfd_boolean
);
528 /* op_placement_info functions. */
530 static void init_op_placement_info_table (void);
531 extern bfd_boolean
opcode_fits_format_slot (xtensa_opcode
, xtensa_format
, int);
532 static int xg_get_single_size (xtensa_opcode
);
533 static xtensa_format
xg_get_single_format (xtensa_opcode
);
534 static int xg_get_single_slot (xtensa_opcode
);
536 /* TInsn and IStack functions. */
538 static bfd_boolean
tinsn_has_symbolic_operands (const TInsn
*);
539 static bfd_boolean
tinsn_has_invalid_symbolic_operands (const TInsn
*);
540 static bfd_boolean
tinsn_has_complex_operands (const TInsn
*);
541 static bfd_boolean
tinsn_to_insnbuf (TInsn
*, xtensa_insnbuf
);
542 static bfd_boolean
tinsn_check_arguments (const TInsn
*);
543 static void tinsn_from_chars (TInsn
*, char *, int);
544 static void tinsn_immed_from_frag (TInsn
*, fragS
*, int);
545 static int get_num_stack_text_bytes (IStack
*);
546 static int get_num_stack_literal_bytes (IStack
*);
547 static bfd_boolean
tinsn_to_slotbuf (xtensa_format
, int, TInsn
*, xtensa_insnbuf
);
549 /* vliw_insn functions. */
551 static void xg_init_vinsn (vliw_insn
*);
552 static void xg_copy_vinsn (vliw_insn
*, vliw_insn
*);
553 static void xg_clear_vinsn (vliw_insn
*);
554 static bfd_boolean
vinsn_has_specific_opcodes (vliw_insn
*);
555 static void xg_free_vinsn (vliw_insn
*);
556 static bfd_boolean vinsn_to_insnbuf
557 (vliw_insn
*, char *, fragS
*, bfd_boolean
);
558 static void vinsn_from_chars (vliw_insn
*, char *);
560 /* Expression Utilities. */
562 bfd_boolean
expr_is_const (const expressionS
*);
563 offsetT
get_expr_const (const expressionS
*);
564 void set_expr_const (expressionS
*, offsetT
);
565 bfd_boolean
expr_is_register (const expressionS
*);
566 offsetT
get_expr_register (const expressionS
*);
567 void set_expr_symbol_offset (expressionS
*, symbolS
*, offsetT
);
568 bfd_boolean
expr_is_equal (expressionS
*, expressionS
*);
569 static void copy_expr (expressionS
*, const expressionS
*);
571 /* Section renaming. */
573 static void build_section_rename (const char *);
576 /* ISA imported from bfd. */
577 extern xtensa_isa xtensa_default_isa
;
579 extern int target_big_endian
;
581 static xtensa_opcode xtensa_addi_opcode
;
582 static xtensa_opcode xtensa_addmi_opcode
;
583 static xtensa_opcode xtensa_call0_opcode
;
584 static xtensa_opcode xtensa_call4_opcode
;
585 static xtensa_opcode xtensa_call8_opcode
;
586 static xtensa_opcode xtensa_call12_opcode
;
587 static xtensa_opcode xtensa_callx0_opcode
;
588 static xtensa_opcode xtensa_callx4_opcode
;
589 static xtensa_opcode xtensa_callx8_opcode
;
590 static xtensa_opcode xtensa_callx12_opcode
;
591 static xtensa_opcode xtensa_const16_opcode
;
592 static xtensa_opcode xtensa_entry_opcode
;
593 static xtensa_opcode xtensa_extui_opcode
;
594 static xtensa_opcode xtensa_movi_opcode
;
595 static xtensa_opcode xtensa_movi_n_opcode
;
596 static xtensa_opcode xtensa_isync_opcode
;
597 static xtensa_opcode xtensa_j_opcode
;
598 static xtensa_opcode xtensa_jx_opcode
;
599 static xtensa_opcode xtensa_l32r_opcode
;
600 static xtensa_opcode xtensa_loop_opcode
;
601 static xtensa_opcode xtensa_loopnez_opcode
;
602 static xtensa_opcode xtensa_loopgtz_opcode
;
603 static xtensa_opcode xtensa_nop_opcode
;
604 static xtensa_opcode xtensa_nop_n_opcode
;
605 static xtensa_opcode xtensa_or_opcode
;
606 static xtensa_opcode xtensa_ret_opcode
;
607 static xtensa_opcode xtensa_ret_n_opcode
;
608 static xtensa_opcode xtensa_retw_opcode
;
609 static xtensa_opcode xtensa_retw_n_opcode
;
610 static xtensa_opcode xtensa_rsr_lcount_opcode
;
611 static xtensa_opcode xtensa_waiti_opcode
;
612 static int config_max_slots
= 0;
615 /* Command-line Options. */
617 bfd_boolean use_literal_section
= TRUE
;
618 enum flix_level produce_flix
= FLIX_ALL
;
619 static bfd_boolean align_targets
= TRUE
;
620 static bfd_boolean warn_unaligned_branch_targets
= FALSE
;
621 static bfd_boolean has_a0_b_retw
= FALSE
;
622 static bfd_boolean workaround_a0_b_retw
= FALSE
;
623 static bfd_boolean workaround_b_j_loop_end
= FALSE
;
624 static bfd_boolean workaround_short_loop
= FALSE
;
625 static bfd_boolean maybe_has_short_loop
= FALSE
;
626 static bfd_boolean workaround_close_loop_end
= FALSE
;
627 static bfd_boolean maybe_has_close_loop_end
= FALSE
;
628 static bfd_boolean enforce_three_byte_loop_align
= FALSE
;
630 /* When workaround_short_loops is TRUE, all loops with early exits must
631 have at least 3 instructions. workaround_all_short_loops is a modifier
632 to the workaround_short_loop flag. In addition to the
633 workaround_short_loop actions, all straightline loopgtz and loopnez
634 must have at least 3 instructions. */
636 static bfd_boolean workaround_all_short_loops
= FALSE
;
640 xtensa_setup_hw_workarounds (int earliest
, int latest
)
642 if (earliest
> latest
)
643 as_fatal (_("illegal range of target hardware versions"));
645 /* Enable all workarounds for pre-T1050.0 hardware. */
646 if (earliest
< 105000 || latest
< 105000)
648 workaround_a0_b_retw
|= TRUE
;
649 workaround_b_j_loop_end
|= TRUE
;
650 workaround_short_loop
|= TRUE
;
651 workaround_close_loop_end
|= TRUE
;
652 workaround_all_short_loops
|= TRUE
;
653 enforce_three_byte_loop_align
= TRUE
;
660 option_density
= OPTION_MD_BASE
,
664 option_no_generate_flix
,
671 option_no_link_relax
,
679 option_text_section_literals
,
680 option_no_text_section_literals
,
682 option_absolute_literals
,
683 option_no_absolute_literals
,
685 option_align_targets
,
686 option_no_align_targets
,
688 option_warn_unaligned_targets
,
693 option_workaround_a0_b_retw
,
694 option_no_workaround_a0_b_retw
,
696 option_workaround_b_j_loop_end
,
697 option_no_workaround_b_j_loop_end
,
699 option_workaround_short_loop
,
700 option_no_workaround_short_loop
,
702 option_workaround_all_short_loops
,
703 option_no_workaround_all_short_loops
,
705 option_workaround_close_loop_end
,
706 option_no_workaround_close_loop_end
,
708 option_no_workarounds
,
710 option_rename_section_name
,
713 option_prefer_const16
,
715 option_target_hardware
,
718 option_no_trampolines
,
720 option_auto_litpools
,
721 option_no_auto_litpools
,
722 option_auto_litpool_limit
,
725 const char *md_shortopts
= "";
727 struct option md_longopts
[] =
729 { "density", no_argument
, NULL
, option_density
},
730 { "no-density", no_argument
, NULL
, option_no_density
},
732 { "flix", no_argument
, NULL
, option_flix
},
733 { "no-generate-flix", no_argument
, NULL
, option_no_generate_flix
},
734 { "no-allow-flix", no_argument
, NULL
, option_no_flix
},
736 /* Both "relax" and "generics" are deprecated and treated as equivalent
737 to the "transform" option. */
738 { "relax", no_argument
, NULL
, option_relax
},
739 { "no-relax", no_argument
, NULL
, option_no_relax
},
740 { "generics", no_argument
, NULL
, option_generics
},
741 { "no-generics", no_argument
, NULL
, option_no_generics
},
743 { "transform", no_argument
, NULL
, option_transform
},
744 { "no-transform", no_argument
, NULL
, option_no_transform
},
745 { "text-section-literals", no_argument
, NULL
, option_text_section_literals
},
746 { "no-text-section-literals", no_argument
, NULL
,
747 option_no_text_section_literals
},
748 { "absolute-literals", no_argument
, NULL
, option_absolute_literals
},
749 { "no-absolute-literals", no_argument
, NULL
, option_no_absolute_literals
},
750 /* This option was changed from -align-target to -target-align
751 because it conflicted with the "-al" option. */
752 { "target-align", no_argument
, NULL
, option_align_targets
},
753 { "no-target-align", no_argument
, NULL
, option_no_align_targets
},
754 { "warn-unaligned-targets", no_argument
, NULL
,
755 option_warn_unaligned_targets
},
756 { "longcalls", no_argument
, NULL
, option_longcalls
},
757 { "no-longcalls", no_argument
, NULL
, option_no_longcalls
},
759 { "no-workaround-a0-b-retw", no_argument
, NULL
,
760 option_no_workaround_a0_b_retw
},
761 { "workaround-a0-b-retw", no_argument
, NULL
, option_workaround_a0_b_retw
},
763 { "no-workaround-b-j-loop-end", no_argument
, NULL
,
764 option_no_workaround_b_j_loop_end
},
765 { "workaround-b-j-loop-end", no_argument
, NULL
,
766 option_workaround_b_j_loop_end
},
768 { "no-workaround-short-loops", no_argument
, NULL
,
769 option_no_workaround_short_loop
},
770 { "workaround-short-loops", no_argument
, NULL
,
771 option_workaround_short_loop
},
773 { "no-workaround-all-short-loops", no_argument
, NULL
,
774 option_no_workaround_all_short_loops
},
775 { "workaround-all-short-loop", no_argument
, NULL
,
776 option_workaround_all_short_loops
},
778 { "prefer-l32r", no_argument
, NULL
, option_prefer_l32r
},
779 { "prefer-const16", no_argument
, NULL
, option_prefer_const16
},
781 { "no-workarounds", no_argument
, NULL
, option_no_workarounds
},
783 { "no-workaround-close-loop-end", no_argument
, NULL
,
784 option_no_workaround_close_loop_end
},
785 { "workaround-close-loop-end", no_argument
, NULL
,
786 option_workaround_close_loop_end
},
788 { "rename-section", required_argument
, NULL
, option_rename_section_name
},
790 { "link-relax", no_argument
, NULL
, option_link_relax
},
791 { "no-link-relax", no_argument
, NULL
, option_no_link_relax
},
793 { "target-hardware", required_argument
, NULL
, option_target_hardware
},
795 { "trampolines", no_argument
, NULL
, option_trampolines
},
796 { "no-trampolines", no_argument
, NULL
, option_no_trampolines
},
798 { "auto-litpools", no_argument
, NULL
, option_auto_litpools
},
799 { "no-auto-litpools", no_argument
, NULL
, option_no_auto_litpools
},
800 { "auto-litpool-limit", required_argument
, NULL
, option_auto_litpool_limit
},
802 { NULL
, no_argument
, NULL
, 0 }
805 size_t md_longopts_size
= sizeof md_longopts
;
809 md_parse_option (int c
, const char *arg
)
814 as_warn (_("--density option is ignored"));
816 case option_no_density
:
817 as_warn (_("--no-density option is ignored"));
819 case option_link_relax
:
822 case option_no_link_relax
:
826 produce_flix
= FLIX_ALL
;
828 case option_no_generate_flix
:
829 produce_flix
= FLIX_NO_GENERATE
;
832 produce_flix
= FLIX_NONE
;
834 case option_generics
:
835 as_warn (_("--generics is deprecated; use --transform instead"));
836 return md_parse_option (option_transform
, arg
);
837 case option_no_generics
:
838 as_warn (_("--no-generics is deprecated; use --no-transform instead"));
839 return md_parse_option (option_no_transform
, arg
);
841 as_warn (_("--relax is deprecated; use --transform instead"));
842 return md_parse_option (option_transform
, arg
);
843 case option_no_relax
:
844 as_warn (_("--no-relax is deprecated; use --no-transform instead"));
845 return md_parse_option (option_no_transform
, arg
);
846 case option_longcalls
:
847 directive_state
[directive_longcalls
] = TRUE
;
849 case option_no_longcalls
:
850 directive_state
[directive_longcalls
] = FALSE
;
852 case option_text_section_literals
:
853 use_literal_section
= FALSE
;
855 case option_no_text_section_literals
:
856 use_literal_section
= TRUE
;
858 case option_absolute_literals
:
859 if (!absolute_literals_supported
)
861 as_fatal (_("--absolute-literals option not supported in this Xtensa configuration"));
864 directive_state
[directive_absolute_literals
] = TRUE
;
866 case option_no_absolute_literals
:
867 directive_state
[directive_absolute_literals
] = FALSE
;
870 case option_workaround_a0_b_retw
:
871 workaround_a0_b_retw
= TRUE
;
873 case option_no_workaround_a0_b_retw
:
874 workaround_a0_b_retw
= FALSE
;
876 case option_workaround_b_j_loop_end
:
877 workaround_b_j_loop_end
= TRUE
;
879 case option_no_workaround_b_j_loop_end
:
880 workaround_b_j_loop_end
= FALSE
;
883 case option_workaround_short_loop
:
884 workaround_short_loop
= TRUE
;
886 case option_no_workaround_short_loop
:
887 workaround_short_loop
= FALSE
;
890 case option_workaround_all_short_loops
:
891 workaround_all_short_loops
= TRUE
;
893 case option_no_workaround_all_short_loops
:
894 workaround_all_short_loops
= FALSE
;
897 case option_workaround_close_loop_end
:
898 workaround_close_loop_end
= TRUE
;
900 case option_no_workaround_close_loop_end
:
901 workaround_close_loop_end
= FALSE
;
904 case option_no_workarounds
:
905 workaround_a0_b_retw
= FALSE
;
906 workaround_b_j_loop_end
= FALSE
;
907 workaround_short_loop
= FALSE
;
908 workaround_all_short_loops
= FALSE
;
909 workaround_close_loop_end
= FALSE
;
912 case option_align_targets
:
913 align_targets
= TRUE
;
915 case option_no_align_targets
:
916 align_targets
= FALSE
;
919 case option_warn_unaligned_targets
:
920 warn_unaligned_branch_targets
= TRUE
;
923 case option_rename_section_name
:
924 build_section_rename (arg
);
928 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
929 should be emitted or not. FIXME: Not implemented. */
932 case option_prefer_l32r
:
934 as_fatal (_("prefer-l32r conflicts with prefer-const16"));
938 case option_prefer_const16
:
940 as_fatal (_("prefer-const16 conflicts with prefer-l32r"));
944 case option_target_hardware
:
946 int earliest
, latest
= 0;
948 if (*arg
== 0 || *arg
== '-')
949 as_fatal (_("invalid target hardware version"));
951 earliest
= strtol (arg
, &end
, 0);
955 else if (*end
== '-')
958 as_fatal (_("invalid target hardware version"));
959 latest
= strtol (end
, &end
, 0);
962 as_fatal (_("invalid target hardware version"));
964 xtensa_setup_hw_workarounds (earliest
, latest
);
968 case option_transform
:
969 /* This option has no affect other than to use the defaults,
970 which are already set. */
973 case option_no_transform
:
974 /* This option turns off all transformations of any kind.
975 However, because we want to preserve the state of other
976 directives, we only change its own field. Thus, before
977 you perform any transformation, always check if transform
978 is available. If you use the functions we provide for this
979 purpose, you will be ok. */
980 directive_state
[directive_transform
] = FALSE
;
983 case option_trampolines
:
984 use_trampolines
= TRUE
;
987 case option_no_trampolines
:
988 use_trampolines
= FALSE
;
991 case option_auto_litpools
:
992 auto_litpools
= TRUE
;
993 use_literal_section
= FALSE
;
996 case option_no_auto_litpools
:
997 auto_litpools
= FALSE
;
998 auto_litpool_limit
= -1;
1001 case option_auto_litpool_limit
:
1005 if (auto_litpool_limit
< 0)
1006 as_fatal (_("no-auto-litpools is incompatible with auto-litpool-limit"));
1007 if (*arg
== 0 || *arg
== '-')
1008 as_fatal (_("invalid auto-litpool-limit argument"));
1009 value
= strtol (arg
, &end
, 10);
1011 as_fatal (_("invalid auto-litpool-limit argument"));
1012 if (value
< 100 || value
> 10000)
1013 as_fatal (_("invalid auto-litpool-limit argument (range is 100-10000)"));
1014 auto_litpool_limit
= value
;
1015 auto_litpools
= TRUE
;
1016 use_literal_section
= FALSE
;
1027 md_show_usage (FILE *stream
)
1031 --[no-]text-section-literals\n\
1032 [Do not] put literals in the text section\n\
1033 --[no-]absolute-literals\n\
1034 [Do not] default to use non-PC-relative literals\n\
1035 --[no-]target-align [Do not] try to align branch targets\n\
1036 --[no-]longcalls [Do not] emit 32-bit call sequences\n\
1037 --[no-]transform [Do not] transform instructions\n\
1038 --flix both allow hand-written and generate flix bundles\n\
1039 --no-generate-flix allow hand-written but do not generate\n\
1041 --no-allow-flix neither allow hand-written nor generate\n\
1043 --rename-section old=new Rename section 'old' to 'new'\n\
1044 --[no-]trampolines [Do not] generate trampolines (jumps to jumps)\n\
1045 when jumps do not reach their targets\n\
1046 --[no-]auto-litpools [Do not] automatically create literal pools\n\
1047 --auto-litpool-limit=<value>\n\
1048 (range 100-10000) Maximum number of blocks of\n\
1049 instructions to emit between literal pool\n\
1050 locations; implies --auto-litpools flag\n", stream
);
1054 /* Functions related to the list of current label symbols. */
1057 xtensa_add_insn_label (symbolS
*sym
)
1061 if (!free_insn_labels
)
1062 l
= XNEW (sym_list
);
1065 l
= free_insn_labels
;
1066 free_insn_labels
= l
->next
;
1070 l
->next
= insn_labels
;
1076 xtensa_clear_insn_labels (void)
1080 for (pl
= &free_insn_labels
; *pl
!= NULL
; pl
= &(*pl
)->next
)
1088 xtensa_move_labels (fragS
*new_frag
, valueT new_offset
)
1092 for (lit
= insn_labels
; lit
; lit
= lit
->next
)
1094 symbolS
*lit_sym
= lit
->sym
;
1095 S_SET_VALUE (lit_sym
, new_offset
);
1096 symbol_set_frag (lit_sym
, new_frag
);
1101 /* Directive data and functions. */
1103 typedef struct state_stackS_struct
1105 directiveE directive
;
1106 bfd_boolean negated
;
1107 bfd_boolean old_state
;
1111 struct state_stackS_struct
*prev
;
1114 state_stackS
*directive_state_stack
;
1116 const pseudo_typeS md_pseudo_table
[] =
1118 { "align", s_align_bytes
, 0 }, /* Defaulting is invalid (0). */
1119 { "literal_position", xtensa_literal_position
, 0 },
1120 { "frame", s_ignore
, 0 }, /* Formerly used for STABS debugging. */
1121 { "long", xtensa_elf_cons
, 4 },
1122 { "word", xtensa_elf_cons
, 4 },
1123 { "4byte", xtensa_elf_cons
, 4 },
1124 { "short", xtensa_elf_cons
, 2 },
1125 { "2byte", xtensa_elf_cons
, 2 },
1126 { "sleb128", xtensa_leb128
, 1},
1127 { "uleb128", xtensa_leb128
, 0},
1128 { "begin", xtensa_begin_directive
, 0 },
1129 { "end", xtensa_end_directive
, 0 },
1130 { "literal", xtensa_literal_pseudo
, 0 },
1131 { "frequency", xtensa_frequency_pseudo
, 0 },
1137 use_transform (void)
1139 /* After md_end, you should be checking frag by frag, rather
1140 than state directives. */
1141 gas_assert (!past_xtensa_end
);
1142 return directive_state
[directive_transform
];
1147 do_align_targets (void)
1149 /* Do not use this function after md_end; just look at align_targets
1150 instead. There is no target-align directive, so alignment is either
1151 enabled for all frags or not done at all. */
1152 gas_assert (!past_xtensa_end
);
1153 return align_targets
&& use_transform ();
1158 directive_push (directiveE directive
, bfd_boolean negated
, const void *datum
)
1162 state_stackS
*stack
= XNEW (state_stackS
);
1164 file
= as_where (&line
);
1166 stack
->directive
= directive
;
1167 stack
->negated
= negated
;
1168 stack
->old_state
= directive_state
[directive
];
1171 stack
->datum
= datum
;
1172 stack
->prev
= directive_state_stack
;
1173 directive_state_stack
= stack
;
1175 directive_state
[directive
] = !negated
;
1180 directive_pop (directiveE
*directive
,
1181 bfd_boolean
*negated
,
1186 state_stackS
*top
= directive_state_stack
;
1188 if (!directive_state_stack
)
1190 as_bad (_("unmatched .end directive"));
1191 *directive
= directive_none
;
1195 directive_state
[directive_state_stack
->directive
] = top
->old_state
;
1196 *directive
= top
->directive
;
1197 *negated
= top
->negated
;
1200 *datum
= top
->datum
;
1201 directive_state_stack
= top
->prev
;
1207 directive_balance (void)
1209 while (directive_state_stack
)
1211 directiveE directive
;
1212 bfd_boolean negated
;
1217 directive_pop (&directive
, &negated
, &file
, &line
, &datum
);
1218 as_warn_where ((char *) file
, line
,
1219 _(".begin directive with no matching .end directive"));
1225 inside_directive (directiveE dir
)
1227 state_stackS
*top
= directive_state_stack
;
1229 while (top
&& top
->directive
!= dir
)
1232 return (top
!= NULL
);
1237 get_directive (directiveE
*directive
, bfd_boolean
*negated
)
1241 const char *directive_string
;
1243 if (strncmp (input_line_pointer
, "no-", 3) != 0)
1248 input_line_pointer
+= 3;
1251 len
= strspn (input_line_pointer
,
1252 "abcdefghijklmnopqrstuvwxyz_-/0123456789.");
1254 /* This code is a hack to make .begin [no-][generics|relax] exactly
1255 equivalent to .begin [no-]transform. We should remove it when
1256 we stop accepting those options. */
1258 if (strncmp (input_line_pointer
, "generics", strlen ("generics")) == 0)
1260 as_warn (_("[no-]generics is deprecated; use [no-]transform instead"));
1261 directive_string
= "transform";
1263 else if (strncmp (input_line_pointer
, "relax", strlen ("relax")) == 0)
1265 as_warn (_("[no-]relax is deprecated; use [no-]transform instead"));
1266 directive_string
= "transform";
1269 directive_string
= input_line_pointer
;
1271 for (i
= 0; i
< sizeof (directive_info
) / sizeof (*directive_info
); ++i
)
1273 if (strncmp (directive_string
, directive_info
[i
].name
, len
) == 0)
1275 input_line_pointer
+= len
;
1276 *directive
= (directiveE
) i
;
1277 if (*negated
&& !directive_info
[i
].can_be_negated
)
1278 as_bad (_("directive %s cannot be negated"),
1279 directive_info
[i
].name
);
1284 as_bad (_("unknown directive"));
1285 *directive
= (directiveE
) XTENSA_UNDEFINED
;
1290 xtensa_begin_directive (int ignore ATTRIBUTE_UNUSED
)
1292 directiveE directive
;
1293 bfd_boolean negated
;
1297 get_directive (&directive
, &negated
);
1298 if (directive
== (directiveE
) XTENSA_UNDEFINED
)
1300 discard_rest_of_line ();
1304 if (cur_vinsn
.inside_bundle
)
1305 as_bad (_("directives are not valid inside bundles"));
1309 case directive_literal
:
1310 if (!inside_directive (directive_literal
))
1312 /* Previous labels go with whatever follows this directive, not with
1313 the literal, so save them now. */
1314 saved_insn_labels
= insn_labels
;
1317 as_warn (_(".begin literal is deprecated; use .literal instead"));
1318 state
= XNEW (emit_state
);
1319 xtensa_switch_to_literal_fragment (state
);
1320 directive_push (directive_literal
, negated
, state
);
1323 case directive_literal_prefix
:
1324 /* Have to flush pending output because a movi relaxed to an l32r
1325 might produce a literal. */
1326 md_flush_pending_output ();
1327 /* Check to see if the current fragment is a literal
1328 fragment. If it is, then this operation is not allowed. */
1329 if (generating_literals
)
1331 as_bad (_("cannot set literal_prefix inside literal fragment"));
1335 /* Allocate the literal state for this section and push
1336 onto the directive stack. */
1337 ls
= XNEW (lit_state
);
1340 *ls
= default_lit_sections
;
1341 directive_push (directive_literal_prefix
, negated
, ls
);
1343 /* Process the new prefix. */
1344 xtensa_literal_prefix ();
1347 case directive_freeregs
:
1348 /* This information is currently unused, but we'll accept the statement
1349 and just discard the rest of the line. This won't check the syntax,
1350 but it will accept every correct freeregs directive. */
1351 input_line_pointer
+= strcspn (input_line_pointer
, "\n");
1352 directive_push (directive_freeregs
, negated
, 0);
1355 case directive_schedule
:
1356 md_flush_pending_output ();
1357 frag_var (rs_fill
, 0, 0, frag_now
->fr_subtype
,
1358 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
1359 directive_push (directive_schedule
, negated
, 0);
1360 xtensa_set_frag_assembly_state (frag_now
);
1363 case directive_density
:
1364 as_warn (_(".begin [no-]density is ignored"));
1367 case directive_absolute_literals
:
1368 md_flush_pending_output ();
1369 if (!absolute_literals_supported
&& !negated
)
1371 as_warn (_("Xtensa absolute literals option not supported; ignored"));
1374 xtensa_set_frag_assembly_state (frag_now
);
1375 directive_push (directive
, negated
, 0);
1379 md_flush_pending_output ();
1380 xtensa_set_frag_assembly_state (frag_now
);
1381 directive_push (directive
, negated
, 0);
1385 demand_empty_rest_of_line ();
1390 xtensa_end_directive (int ignore ATTRIBUTE_UNUSED
)
1392 directiveE begin_directive
, end_directive
;
1393 bfd_boolean begin_negated
, end_negated
;
1397 emit_state
**state_ptr
;
1400 if (cur_vinsn
.inside_bundle
)
1401 as_bad (_("directives are not valid inside bundles"));
1403 get_directive (&end_directive
, &end_negated
);
1405 md_flush_pending_output ();
1407 switch ((int) end_directive
)
1409 case XTENSA_UNDEFINED
:
1410 discard_rest_of_line ();
1413 case (int) directive_density
:
1414 as_warn (_(".end [no-]density is ignored"));
1415 demand_empty_rest_of_line ();
1418 case (int) directive_absolute_literals
:
1419 if (!absolute_literals_supported
&& !end_negated
)
1421 as_warn (_("Xtensa absolute literals option not supported; ignored"));
1422 demand_empty_rest_of_line ();
1431 state_ptr
= &state
; /* use state_ptr to avoid type-punning warning */
1432 directive_pop (&begin_directive
, &begin_negated
, &file
, &line
,
1433 (const void **) state_ptr
);
1435 if (begin_directive
!= directive_none
)
1437 if (begin_directive
!= end_directive
|| begin_negated
!= end_negated
)
1439 as_bad (_("does not match begin %s%s at %s:%d"),
1440 begin_negated
? "no-" : "",
1441 directive_info
[begin_directive
].name
, file
, line
);
1445 switch (end_directive
)
1447 case directive_literal
:
1448 frag_var (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
1449 xtensa_restore_emit_state (state
);
1450 xtensa_set_frag_assembly_state (frag_now
);
1452 if (!inside_directive (directive_literal
))
1454 /* Restore the list of current labels. */
1455 xtensa_clear_insn_labels ();
1456 insn_labels
= saved_insn_labels
;
1460 case directive_literal_prefix
:
1461 /* Restore the default collection sections from saved state. */
1462 s
= (lit_state
*) state
;
1464 default_lit_sections
= *s
;
1466 /* Free the state storage. */
1467 free (s
->lit_prefix
);
1471 case directive_schedule
:
1472 case directive_freeregs
:
1476 xtensa_set_frag_assembly_state (frag_now
);
1482 demand_empty_rest_of_line ();
1486 /* Place an aligned literal fragment at the current location. */
1489 xtensa_literal_position (int ignore ATTRIBUTE_UNUSED
)
1491 md_flush_pending_output ();
1493 if (inside_directive (directive_literal
))
1494 as_warn (_(".literal_position inside literal directive; ignoring"));
1495 xtensa_mark_literal_pool_location ();
1497 demand_empty_rest_of_line ();
1498 xtensa_clear_insn_labels ();
1502 /* Support .literal label, expr, ... */
1505 xtensa_literal_pseudo (int ignored ATTRIBUTE_UNUSED
)
1508 char *p
, *base_name
;
1512 if (inside_directive (directive_literal
))
1514 as_bad (_(".literal not allowed inside .begin literal region"));
1515 ignore_rest_of_line ();
1519 md_flush_pending_output ();
1521 /* Previous labels go with whatever follows this directive, not with
1522 the literal, so save them now. */
1523 saved_insn_labels
= insn_labels
;
1526 /* If we are using text-section literals, then this is the right value... */
1529 base_name
= input_line_pointer
;
1531 xtensa_switch_to_literal_fragment (&state
);
1533 /* ...but if we aren't using text-section-literals, then we
1534 need to put them in the section we just switched to. */
1535 if (use_literal_section
|| directive_state
[directive_absolute_literals
])
1538 /* FIXME, despite the previous comments, dest_seg is unused... */
1541 /* All literals are aligned to four-byte boundaries. */
1542 frag_align (2, 0, 0);
1543 record_alignment (now_seg
, 2);
1545 c
= get_symbol_name (&base_name
);
1546 /* Just after name is now '\0'. */
1547 p
= input_line_pointer
;
1549 SKIP_WHITESPACE_AFTER_NAME ();
1551 if (*input_line_pointer
!= ',' && *input_line_pointer
!= ':')
1553 as_bad (_("expected comma or colon after symbol name; "
1554 "rest of line ignored"));
1555 ignore_rest_of_line ();
1556 xtensa_restore_emit_state (&state
);
1564 input_line_pointer
++; /* skip ',' or ':' */
1566 xtensa_elf_cons (4);
1568 xtensa_restore_emit_state (&state
);
1570 /* Restore the list of current labels. */
1571 xtensa_clear_insn_labels ();
1572 insn_labels
= saved_insn_labels
;
1577 xtensa_literal_prefix (void)
1582 /* Parse the new prefix from the input_line_pointer. */
1584 len
= strspn (input_line_pointer
,
1585 "ABCDEFGHIJKLMNOPQRSTUVWXYZ"
1586 "abcdefghijklmnopqrstuvwxyz_/0123456789.$");
1588 /* Get a null-terminated copy of the name. */
1589 name
= xmemdup0 (input_line_pointer
, len
);
1591 /* Skip the name in the input line. */
1592 input_line_pointer
+= len
;
1594 default_lit_sections
.lit_prefix
= name
;
1596 /* Clear cached literal sections, since the prefix has changed. */
1597 default_lit_sections
.lit_seg
= NULL
;
1598 default_lit_sections
.lit4_seg
= NULL
;
1602 /* Support ".frequency branch_target_frequency fall_through_frequency". */
1605 xtensa_frequency_pseudo (int ignored ATTRIBUTE_UNUSED
)
1607 float fall_through_f
, target_f
;
1609 fall_through_f
= (float) strtod (input_line_pointer
, &input_line_pointer
);
1610 if (fall_through_f
< 0)
1612 as_bad (_("fall through frequency must be greater than 0"));
1613 ignore_rest_of_line ();
1617 target_f
= (float) strtod (input_line_pointer
, &input_line_pointer
);
1620 as_bad (_("branch target frequency must be greater than 0"));
1621 ignore_rest_of_line ();
1625 set_subseg_freq (now_seg
, now_subseg
, target_f
+ fall_through_f
, target_f
);
1627 demand_empty_rest_of_line ();
1631 /* Like normal .long/.short/.word, except support @plt, etc.
1632 Clobbers input_line_pointer, checks end-of-line. */
1635 xtensa_elf_cons (int nbytes
)
1638 bfd_reloc_code_real_type reloc
;
1640 md_flush_pending_output ();
1642 if (cur_vinsn
.inside_bundle
)
1643 as_bad (_("directives are not valid inside bundles"));
1645 if (is_it_end_of_statement ())
1647 demand_empty_rest_of_line ();
1654 if (exp
.X_op
== O_symbol
1655 && *input_line_pointer
== '@'
1656 && ((reloc
= xtensa_elf_suffix (&input_line_pointer
, &exp
))
1659 reloc_howto_type
*reloc_howto
=
1660 bfd_reloc_type_lookup (stdoutput
, reloc
);
1662 if (reloc
== BFD_RELOC_UNUSED
|| !reloc_howto
)
1663 as_bad (_("unsupported relocation"));
1664 else if ((reloc
>= BFD_RELOC_XTENSA_SLOT0_OP
1665 && reloc
<= BFD_RELOC_XTENSA_SLOT14_OP
)
1666 || (reloc
>= BFD_RELOC_XTENSA_SLOT0_ALT
1667 && reloc
<= BFD_RELOC_XTENSA_SLOT14_ALT
))
1668 as_bad (_("opcode-specific %s relocation used outside "
1669 "an instruction"), reloc_howto
->name
);
1670 else if (nbytes
!= (int) bfd_get_reloc_size (reloc_howto
))
1671 as_bad (_("%s relocations do not fit in %d bytes"),
1672 reloc_howto
->name
, nbytes
);
1673 else if (reloc
== BFD_RELOC_XTENSA_TLS_FUNC
1674 || reloc
== BFD_RELOC_XTENSA_TLS_ARG
1675 || reloc
== BFD_RELOC_XTENSA_TLS_CALL
)
1676 as_bad (_("invalid use of %s relocation"), reloc_howto
->name
);
1679 char *p
= frag_more ((int) nbytes
);
1680 xtensa_set_frag_assembly_state (frag_now
);
1681 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
,
1682 nbytes
, &exp
, reloc_howto
->pc_relative
, reloc
);
1687 xtensa_set_frag_assembly_state (frag_now
);
1688 emit_expr (&exp
, (unsigned int) nbytes
);
1691 while (*input_line_pointer
++ == ',');
1693 input_line_pointer
--; /* Put terminator back into stream. */
1694 demand_empty_rest_of_line ();
1697 static bfd_boolean is_leb128_expr
;
1700 xtensa_leb128 (int sign
)
1702 is_leb128_expr
= TRUE
;
1704 is_leb128_expr
= FALSE
;
1708 /* Parsing and Idiom Translation. */
1710 /* Parse @plt, etc. and return the desired relocation. */
1711 static bfd_reloc_code_real_type
1712 xtensa_elf_suffix (char **str_p
, expressionS
*exp_p
)
1722 return BFD_RELOC_NONE
;
1724 for (ch
= *str
, str2
= ident
;
1725 (str2
< ident
+ sizeof (ident
) - 1
1726 && (ISALNUM (ch
) || ch
== '@'));
1729 *str2
++ = (ISLOWER (ch
)) ? ch
: TOLOWER (ch
);
1736 for (i
= 0; i
< ARRAY_SIZE (suffix_relocs
); i
++)
1737 if (ch
== suffix_relocs
[i
].suffix
[0]
1738 && len
== suffix_relocs
[i
].length
1739 && memcmp (ident
, suffix_relocs
[i
].suffix
, suffix_relocs
[i
].length
) == 0)
1741 /* Now check for "identifier@suffix+constant". */
1742 if (*str
== '-' || *str
== '+')
1744 char *orig_line
= input_line_pointer
;
1745 expressionS new_exp
;
1747 input_line_pointer
= str
;
1748 expression (&new_exp
);
1749 if (new_exp
.X_op
== O_constant
)
1751 exp_p
->X_add_number
+= new_exp
.X_add_number
;
1752 str
= input_line_pointer
;
1755 if (&input_line_pointer
!= str_p
)
1756 input_line_pointer
= orig_line
;
1760 return suffix_relocs
[i
].reloc
;
1763 return BFD_RELOC_UNUSED
;
1767 /* Find the matching operator type. */
1769 map_suffix_reloc_to_operator (bfd_reloc_code_real_type reloc
)
1771 operatorT
operator = O_illegal
;
1774 for (i
= 0; i
< ARRAY_SIZE (suffix_relocs
); i
++)
1776 if (suffix_relocs
[i
].reloc
== reloc
)
1778 operator = suffix_relocs
[i
].operator;
1782 gas_assert (operator != O_illegal
);
1787 /* Find the matching reloc type. */
1788 static bfd_reloc_code_real_type
1789 map_operator_to_reloc (unsigned char operator, bfd_boolean is_literal
)
1792 bfd_reloc_code_real_type reloc
= BFD_RELOC_UNUSED
;
1794 for (i
= 0; i
< ARRAY_SIZE (suffix_relocs
); i
++)
1796 if (suffix_relocs
[i
].operator == operator)
1798 reloc
= suffix_relocs
[i
].reloc
;
1805 if (reloc
== BFD_RELOC_XTENSA_TLS_FUNC
)
1806 return BFD_RELOC_XTENSA_TLSDESC_FN
;
1807 else if (reloc
== BFD_RELOC_XTENSA_TLS_ARG
)
1808 return BFD_RELOC_XTENSA_TLSDESC_ARG
;
1811 if (reloc
== BFD_RELOC_UNUSED
)
1812 return BFD_RELOC_32
;
1819 expression_end (const char *name
)
1842 #define ERROR_REG_NUM ((unsigned) -1)
1845 tc_get_register (const char *prefix
)
1848 const char *next_expr
;
1849 const char *old_line_pointer
;
1852 old_line_pointer
= input_line_pointer
;
1854 if (*input_line_pointer
== '$')
1855 ++input_line_pointer
;
1857 /* Accept "sp" as a synonym for "a1". */
1858 if (input_line_pointer
[0] == 's' && input_line_pointer
[1] == 'p'
1859 && expression_end (input_line_pointer
+ 2))
1861 input_line_pointer
+= 2;
1862 return 1; /* AR[1] */
1865 while (*input_line_pointer
++ == *prefix
++)
1867 --input_line_pointer
;
1872 as_bad (_("bad register name: %s"), old_line_pointer
);
1873 return ERROR_REG_NUM
;
1876 if (!ISDIGIT ((unsigned char) *input_line_pointer
))
1878 as_bad (_("bad register number: %s"), input_line_pointer
);
1879 return ERROR_REG_NUM
;
1884 while (ISDIGIT ((int) *input_line_pointer
))
1885 reg
= reg
* 10 + *input_line_pointer
++ - '0';
1887 if (!(next_expr
= expression_end (input_line_pointer
)))
1889 as_bad (_("bad register name: %s"), old_line_pointer
);
1890 return ERROR_REG_NUM
;
1893 input_line_pointer
= (char *) next_expr
;
1900 expression_maybe_register (xtensa_opcode opc
, int opnd
, expressionS
*tok
)
1902 xtensa_isa isa
= xtensa_default_isa
;
1904 /* Check if this is an immediate operand. */
1905 if (xtensa_operand_is_register (isa
, opc
, opnd
) == 0)
1907 bfd_reloc_code_real_type reloc
;
1908 segT t
= expression (tok
);
1910 if (t
== absolute_section
1911 && xtensa_operand_is_PCrelative (isa
, opc
, opnd
) == 1)
1913 gas_assert (tok
->X_op
== O_constant
);
1914 tok
->X_op
= O_symbol
;
1915 tok
->X_add_symbol
= &abs_symbol
;
1918 if ((tok
->X_op
== O_constant
|| tok
->X_op
== O_symbol
)
1919 && ((reloc
= xtensa_elf_suffix (&input_line_pointer
, tok
))
1924 case BFD_RELOC_LO16
:
1925 if (tok
->X_op
== O_constant
)
1927 tok
->X_add_number
&= 0xffff;
1931 case BFD_RELOC_HI16
:
1932 if (tok
->X_op
== O_constant
)
1934 tok
->X_add_number
= ((unsigned) tok
->X_add_number
) >> 16;
1938 case BFD_RELOC_UNUSED
:
1939 as_bad (_("unsupported relocation"));
1941 case BFD_RELOC_32_PCREL
:
1942 as_bad (_("pcrel relocation not allowed in an instruction"));
1947 tok
->X_op
= map_suffix_reloc_to_operator (reloc
);
1952 xtensa_regfile opnd_rf
= xtensa_operand_regfile (isa
, opc
, opnd
);
1953 unsigned reg
= tc_get_register (xtensa_regfile_shortname (isa
, opnd_rf
));
1955 if (reg
!= ERROR_REG_NUM
) /* Already errored */
1958 if (xtensa_operand_encode (isa
, opc
, opnd
, &buf
))
1959 as_bad (_("register number out of range"));
1962 tok
->X_op
= O_register
;
1963 tok
->X_add_symbol
= 0;
1964 tok
->X_add_number
= reg
;
1969 /* Split up the arguments for an opcode or pseudo-op. */
1972 tokenize_arguments (char **args
, char *str
)
1974 char *old_input_line_pointer
;
1975 bfd_boolean saw_comma
= FALSE
;
1976 bfd_boolean saw_arg
= FALSE
;
1977 bfd_boolean saw_colon
= FALSE
;
1979 char *arg_end
, *arg
;
1982 /* Save and restore input_line_pointer around this function. */
1983 old_input_line_pointer
= input_line_pointer
;
1984 input_line_pointer
= str
;
1986 while (*input_line_pointer
)
1989 switch (*input_line_pointer
)
1996 input_line_pointer
++;
1997 if (saw_comma
|| saw_colon
|| !saw_arg
)
2003 input_line_pointer
++;
2004 if (saw_comma
|| saw_colon
|| !saw_arg
)
2010 if (!saw_comma
&& !saw_colon
&& saw_arg
)
2013 arg_end
= input_line_pointer
+ 1;
2014 while (!expression_end (arg_end
))
2017 arg_len
= arg_end
- input_line_pointer
;
2018 arg
= XNEWVEC (char, (saw_colon
? 1 : 0) + arg_len
+ 1);
2019 args
[num_args
] = arg
;
2023 strncpy (arg
, input_line_pointer
, arg_len
);
2024 arg
[arg_len
] = '\0';
2026 input_line_pointer
= arg_end
;
2036 if (saw_comma
|| saw_colon
)
2038 input_line_pointer
= old_input_line_pointer
;
2043 as_bad (_("extra comma"));
2045 as_bad (_("extra colon"));
2047 as_bad (_("missing argument"));
2049 as_bad (_("missing comma or colon"));
2050 input_line_pointer
= old_input_line_pointer
;
2055 /* Parse the arguments to an opcode. Return TRUE on error. */
2058 parse_arguments (TInsn
*insn
, int num_args
, char **arg_strings
)
2060 expressionS
*tok
, *last_tok
;
2061 xtensa_opcode opcode
= insn
->opcode
;
2062 bfd_boolean had_error
= TRUE
;
2063 xtensa_isa isa
= xtensa_default_isa
;
2064 int n
, num_regs
= 0;
2065 int opcode_operand_count
;
2066 int opnd_cnt
, last_opnd_cnt
;
2067 unsigned int next_reg
= 0;
2068 char *old_input_line_pointer
;
2070 if (insn
->insn_type
== ITYPE_LITERAL
)
2071 opcode_operand_count
= 1;
2073 opcode_operand_count
= xtensa_opcode_num_operands (isa
, opcode
);
2076 memset (tok
, 0, sizeof (*tok
) * MAX_INSN_ARGS
);
2078 /* Save and restore input_line_pointer around this function. */
2079 old_input_line_pointer
= input_line_pointer
;
2085 /* Skip invisible operands. */
2086 while (xtensa_operand_is_visible (isa
, opcode
, opnd_cnt
) == 0)
2092 for (n
= 0; n
< num_args
; n
++)
2094 input_line_pointer
= arg_strings
[n
];
2095 if (*input_line_pointer
== ':')
2097 xtensa_regfile opnd_rf
;
2098 input_line_pointer
++;
2101 gas_assert (opnd_cnt
> 0);
2103 opnd_rf
= xtensa_operand_regfile (isa
, opcode
, last_opnd_cnt
);
2105 != tc_get_register (xtensa_regfile_shortname (isa
, opnd_rf
)))
2106 as_warn (_("incorrect register number, ignoring"));
2111 if (opnd_cnt
>= opcode_operand_count
)
2113 as_warn (_("too many arguments"));
2116 gas_assert (opnd_cnt
< MAX_INSN_ARGS
);
2118 expression_maybe_register (opcode
, opnd_cnt
, tok
);
2119 next_reg
= tok
->X_add_number
+ 1;
2121 if (tok
->X_op
== O_illegal
|| tok
->X_op
== O_absent
)
2123 if (xtensa_operand_is_register (isa
, opcode
, opnd_cnt
) == 1)
2125 num_regs
= xtensa_operand_num_regs (isa
, opcode
, opnd_cnt
) - 1;
2126 /* minus 1 because we are seeing one right now */
2132 last_opnd_cnt
= opnd_cnt
;
2133 demand_empty_rest_of_line ();
2140 while (xtensa_operand_is_visible (isa
, opcode
, opnd_cnt
) == 0);
2144 if (num_regs
> 0 && ((int) next_reg
!= last_tok
->X_add_number
+ 1))
2147 insn
->ntok
= tok
- insn
->tok
;
2151 input_line_pointer
= old_input_line_pointer
;
2157 get_invisible_operands (TInsn
*insn
)
2159 xtensa_isa isa
= xtensa_default_isa
;
2160 static xtensa_insnbuf slotbuf
= NULL
;
2162 xtensa_opcode opc
= insn
->opcode
;
2163 int slot
, opnd
, fmt_found
;
2167 slotbuf
= xtensa_insnbuf_alloc (isa
);
2169 /* Find format/slot where this can be encoded. */
2172 for (fmt
= 0; fmt
< xtensa_isa_num_formats (isa
); fmt
++)
2174 for (slot
= 0; slot
< xtensa_format_num_slots (isa
, fmt
); slot
++)
2176 if (xtensa_opcode_encode (isa
, fmt
, slot
, slotbuf
, opc
) == 0)
2182 if (fmt_found
) break;
2187 as_bad (_("cannot encode opcode \"%s\""), xtensa_opcode_name (isa
, opc
));
2191 /* First encode all the visible operands
2192 (to deal with shared field operands). */
2193 for (opnd
= 0; opnd
< insn
->ntok
; opnd
++)
2195 if (xtensa_operand_is_visible (isa
, opc
, opnd
) == 1
2196 && (insn
->tok
[opnd
].X_op
== O_register
2197 || insn
->tok
[opnd
].X_op
== O_constant
))
2199 val
= insn
->tok
[opnd
].X_add_number
;
2200 xtensa_operand_encode (isa
, opc
, opnd
, &val
);
2201 xtensa_operand_set_field (isa
, opc
, opnd
, fmt
, slot
, slotbuf
, val
);
2205 /* Then pull out the values for the invisible ones. */
2206 for (opnd
= 0; opnd
< insn
->ntok
; opnd
++)
2208 if (xtensa_operand_is_visible (isa
, opc
, opnd
) == 0)
2210 xtensa_operand_get_field (isa
, opc
, opnd
, fmt
, slot
, slotbuf
, &val
);
2211 xtensa_operand_decode (isa
, opc
, opnd
, &val
);
2212 insn
->tok
[opnd
].X_add_number
= val
;
2213 if (xtensa_operand_is_register (isa
, opc
, opnd
) == 1)
2214 insn
->tok
[opnd
].X_op
= O_register
;
2216 insn
->tok
[opnd
].X_op
= O_constant
;
2225 xg_reverse_shift_count (char **cnt_argp
)
2227 char *cnt_arg
, *new_arg
;
2228 cnt_arg
= *cnt_argp
;
2230 /* replace the argument with "31-(argument)" */
2231 new_arg
= concat ("31-(", cnt_arg
, ")", (char *) NULL
);
2234 *cnt_argp
= new_arg
;
2238 /* If "arg" is a constant expression, return non-zero with the value
2242 xg_arg_is_constant (char *arg
, offsetT
*valp
)
2245 char *save_ptr
= input_line_pointer
;
2247 input_line_pointer
= arg
;
2249 input_line_pointer
= save_ptr
;
2251 if (exp
.X_op
== O_constant
)
2253 *valp
= exp
.X_add_number
;
2262 xg_replace_opname (char **popname
, const char *newop
)
2265 *popname
= xstrdup (newop
);
2270 xg_check_num_args (int *pnum_args
,
2275 int num_args
= *pnum_args
;
2277 if (num_args
< expected_num
)
2279 as_bad (_("not enough operands (%d) for '%s'; expected %d"),
2280 num_args
, opname
, expected_num
);
2284 if (num_args
> expected_num
)
2286 as_warn (_("too many operands (%d) for '%s'; expected %d"),
2287 num_args
, opname
, expected_num
);
2288 while (num_args
-- > expected_num
)
2290 free (arg_strings
[num_args
]);
2291 arg_strings
[num_args
] = 0;
2293 *pnum_args
= expected_num
;
2301 /* If the register is not specified as part of the opcode,
2302 then get it from the operand and move it to the opcode. */
2305 xg_translate_sysreg_op (char **popname
, int *pnum_args
, char **arg_strings
)
2307 xtensa_isa isa
= xtensa_default_isa
;
2309 char *opname
, *new_opname
;
2310 const char *sr_name
;
2311 int is_user
, is_write
;
2316 is_user
= (opname
[1] == 'u');
2317 is_write
= (opname
[0] == 'w');
2319 /* Opname == [rw]ur or [rwx]sr... */
2321 if (xg_check_num_args (pnum_args
, 2, opname
, arg_strings
))
2324 /* Check if the argument is a symbolic register name. */
2325 sr
= xtensa_sysreg_lookup_name (isa
, arg_strings
[1]);
2326 /* Handle WSR to "INTSET" as a special case. */
2327 if (sr
== XTENSA_UNDEFINED
&& is_write
&& !is_user
2328 && !strcasecmp (arg_strings
[1], "intset"))
2329 sr
= xtensa_sysreg_lookup_name (isa
, "interrupt");
2330 if (sr
== XTENSA_UNDEFINED
2331 || (xtensa_sysreg_is_user (isa
, sr
) == 1) != is_user
)
2333 /* Maybe it's a register number.... */
2335 if (!xg_arg_is_constant (arg_strings
[1], &val
))
2337 as_bad (_("invalid register '%s' for '%s' instruction"),
2338 arg_strings
[1], opname
);
2341 sr
= xtensa_sysreg_lookup (isa
, val
, is_user
);
2342 if (sr
== XTENSA_UNDEFINED
)
2344 as_bad (_("invalid register number (%ld) for '%s' instruction"),
2345 (long) val
, opname
);
2350 /* Remove the last argument, which is now part of the opcode. */
2351 free (arg_strings
[1]);
2355 /* Translate the opcode. */
2356 sr_name
= xtensa_sysreg_name (isa
, sr
);
2357 /* Another special case for "WSR.INTSET".... */
2358 if (is_write
&& !is_user
&& !strcasecmp ("interrupt", sr_name
))
2360 new_opname
= concat (*popname
, ".", sr_name
, (char *) NULL
);
2362 *popname
= new_opname
;
2369 xtensa_translate_old_userreg_ops (char **popname
)
2371 xtensa_isa isa
= xtensa_default_isa
;
2373 char *opname
, *new_opname
;
2374 const char *sr_name
;
2375 bfd_boolean has_underbar
= FALSE
;
2378 if (opname
[0] == '_')
2380 has_underbar
= TRUE
;
2384 sr
= xtensa_sysreg_lookup_name (isa
, opname
+ 1);
2385 if (sr
!= XTENSA_UNDEFINED
)
2387 /* The new default name ("nnn") is different from the old default
2388 name ("URnnn"). The old default is handled below, and we don't
2389 want to recognize [RW]nnn, so do nothing if the name is the (new)
2391 static char namebuf
[10];
2392 sprintf (namebuf
, "%d", xtensa_sysreg_number (isa
, sr
));
2393 if (strcmp (namebuf
, opname
+ 1) == 0)
2401 /* Only continue if the reg name is "URnnn". */
2402 if (opname
[1] != 'u' || opname
[2] != 'r')
2404 val
= strtoul (opname
+ 3, &end
, 10);
2408 sr
= xtensa_sysreg_lookup (isa
, val
, 1);
2409 if (sr
== XTENSA_UNDEFINED
)
2411 as_bad (_("invalid register number (%ld) for '%s'"),
2412 (long) val
, opname
);
2417 /* Translate the opcode. */
2418 sr_name
= xtensa_sysreg_name (isa
, sr
);
2419 new_opname
= XNEWVEC (char, strlen (sr_name
) + 6);
2420 sprintf (new_opname
, "%s%cur.%s", (has_underbar
? "_" : ""),
2421 opname
[0], sr_name
);
2423 *popname
= new_opname
;
2430 xtensa_translate_zero_immed (const char *old_op
,
2440 gas_assert (opname
[0] != '_');
2442 if (strcmp (opname
, old_op
) != 0)
2445 if (xg_check_num_args (pnum_args
, 3, opname
, arg_strings
))
2447 if (xg_arg_is_constant (arg_strings
[1], &val
) && val
== 0)
2449 xg_replace_opname (popname
, new_op
);
2450 free (arg_strings
[1]);
2451 arg_strings
[1] = arg_strings
[2];
2460 /* If the instruction is an idiom (i.e., a built-in macro), translate it.
2461 Returns non-zero if an error was found. */
2464 xg_translate_idioms (char **popname
, int *pnum_args
, char **arg_strings
)
2466 char *opname
= *popname
;
2467 bfd_boolean has_underbar
= FALSE
;
2471 has_underbar
= TRUE
;
2475 if (strcmp (opname
, "mov") == 0)
2477 if (use_transform () && !has_underbar
&& density_supported
)
2478 xg_replace_opname (popname
, "mov.n");
2481 if (xg_check_num_args (pnum_args
, 2, opname
, arg_strings
))
2483 xg_replace_opname (popname
, (has_underbar
? "_or" : "or"));
2484 arg_strings
[2] = xstrdup (arg_strings
[1]);
2490 if (strcmp (opname
, "bbsi.l") == 0)
2492 if (xg_check_num_args (pnum_args
, 3, opname
, arg_strings
))
2494 xg_replace_opname (popname
, (has_underbar
? "_bbsi" : "bbsi"));
2495 if (target_big_endian
)
2496 xg_reverse_shift_count (&arg_strings
[1]);
2500 if (strcmp (opname
, "bbci.l") == 0)
2502 if (xg_check_num_args (pnum_args
, 3, opname
, arg_strings
))
2504 xg_replace_opname (popname
, (has_underbar
? "_bbci" : "bbci"));
2505 if (target_big_endian
)
2506 xg_reverse_shift_count (&arg_strings
[1]);
2510 /* Don't do anything special with NOPs inside FLIX instructions. They
2511 are handled elsewhere. Real NOP instructions are always available
2512 in configurations with FLIX, so this should never be an issue but
2513 check for it anyway. */
2514 if (!cur_vinsn
.inside_bundle
&& xtensa_nop_opcode
== XTENSA_UNDEFINED
2515 && strcmp (opname
, "nop") == 0)
2517 if (use_transform () && !has_underbar
&& density_supported
)
2518 xg_replace_opname (popname
, "nop.n");
2521 if (xg_check_num_args (pnum_args
, 0, opname
, arg_strings
))
2523 xg_replace_opname (popname
, (has_underbar
? "_or" : "or"));
2524 arg_strings
[0] = xstrdup ("a1");
2525 arg_strings
[1] = xstrdup ("a1");
2526 arg_strings
[2] = xstrdup ("a1");
2532 /* Recognize [RW]UR and [RWX]SR. */
2533 if ((((opname
[0] == 'r' || opname
[0] == 'w')
2534 && (opname
[1] == 'u' || opname
[1] == 's'))
2535 || (opname
[0] == 'x' && opname
[1] == 's'))
2537 && opname
[3] == '\0')
2538 return xg_translate_sysreg_op (popname
, pnum_args
, arg_strings
);
2540 /* Backward compatibility for RUR and WUR: Recognize [RW]UR<nnn> and
2541 [RW]<name> if <name> is the non-default name of a user register. */
2542 if ((opname
[0] == 'r' || opname
[0] == 'w')
2543 && xtensa_opcode_lookup (xtensa_default_isa
, opname
) == XTENSA_UNDEFINED
)
2544 return xtensa_translate_old_userreg_ops (popname
);
2546 /* Relax branches that don't allow comparisons against an immediate value
2547 of zero to the corresponding branches with implicit zero immediates. */
2548 if (!has_underbar
&& use_transform ())
2550 if (xtensa_translate_zero_immed ("bnei", "bnez", popname
,
2551 pnum_args
, arg_strings
))
2554 if (xtensa_translate_zero_immed ("beqi", "beqz", popname
,
2555 pnum_args
, arg_strings
))
2558 if (xtensa_translate_zero_immed ("bgei", "bgez", popname
,
2559 pnum_args
, arg_strings
))
2562 if (xtensa_translate_zero_immed ("blti", "bltz", popname
,
2563 pnum_args
, arg_strings
))
2571 /* Functions for dealing with the Xtensa ISA. */
2573 /* Currently the assembler only allows us to use a single target per
2574 fragment. Because of this, only one operand for a given
2575 instruction may be symbolic. If there is a PC-relative operand,
2576 the last one is chosen. Otherwise, the result is the number of the
2577 last immediate operand, and if there are none of those, we fail and
2581 get_relaxable_immed (xtensa_opcode opcode
)
2583 int last_immed
= -1;
2586 if (opcode
== XTENSA_UNDEFINED
)
2589 noperands
= xtensa_opcode_num_operands (xtensa_default_isa
, opcode
);
2590 for (opi
= noperands
- 1; opi
>= 0; opi
--)
2592 if (xtensa_operand_is_visible (xtensa_default_isa
, opcode
, opi
) == 0)
2594 if (xtensa_operand_is_PCrelative (xtensa_default_isa
, opcode
, opi
) == 1)
2596 if (last_immed
== -1
2597 && xtensa_operand_is_register (xtensa_default_isa
, opcode
, opi
) == 0)
2604 static xtensa_opcode
2605 get_opcode_from_buf (const char *buf
, int slot
)
2607 static xtensa_insnbuf insnbuf
= NULL
;
2608 static xtensa_insnbuf slotbuf
= NULL
;
2609 xtensa_isa isa
= xtensa_default_isa
;
2614 insnbuf
= xtensa_insnbuf_alloc (isa
);
2615 slotbuf
= xtensa_insnbuf_alloc (isa
);
2618 xtensa_insnbuf_from_chars (isa
, insnbuf
, (const unsigned char *) buf
, 0);
2619 fmt
= xtensa_format_decode (isa
, insnbuf
);
2620 if (fmt
== XTENSA_UNDEFINED
)
2621 return XTENSA_UNDEFINED
;
2623 if (slot
>= xtensa_format_num_slots (isa
, fmt
))
2624 return XTENSA_UNDEFINED
;
2626 xtensa_format_get_slot (isa
, fmt
, slot
, insnbuf
, slotbuf
);
2627 return xtensa_opcode_decode (isa
, fmt
, slot
, slotbuf
);
2631 #ifdef TENSILICA_DEBUG
2633 /* For debugging, print out the mapping of opcode numbers to opcodes. */
2636 xtensa_print_insn_table (void)
2638 int num_opcodes
, num_operands
;
2639 xtensa_opcode opcode
;
2640 xtensa_isa isa
= xtensa_default_isa
;
2642 num_opcodes
= xtensa_isa_num_opcodes (xtensa_default_isa
);
2643 for (opcode
= 0; opcode
< num_opcodes
; opcode
++)
2646 fprintf (stderr
, "%d: %s: ", opcode
, xtensa_opcode_name (isa
, opcode
));
2647 num_operands
= xtensa_opcode_num_operands (isa
, opcode
);
2648 for (opn
= 0; opn
< num_operands
; opn
++)
2650 if (xtensa_operand_is_visible (isa
, opcode
, opn
) == 0)
2652 if (xtensa_operand_is_register (isa
, opcode
, opn
) == 1)
2654 xtensa_regfile opnd_rf
=
2655 xtensa_operand_regfile (isa
, opcode
, opn
);
2656 fprintf (stderr
, "%s ", xtensa_regfile_shortname (isa
, opnd_rf
));
2658 else if (xtensa_operand_is_PCrelative (isa
, opcode
, opn
) == 1)
2659 fputs ("[lLr] ", stderr
);
2661 fputs ("i ", stderr
);
2663 fprintf (stderr
, "\n");
2669 print_vliw_insn (xtensa_insnbuf vbuf
)
2671 xtensa_isa isa
= xtensa_default_isa
;
2672 xtensa_format f
= xtensa_format_decode (isa
, vbuf
);
2673 xtensa_insnbuf sbuf
= xtensa_insnbuf_alloc (isa
);
2676 fprintf (stderr
, "format = %d\n", f
);
2678 for (op
= 0; op
< xtensa_format_num_slots (isa
, f
); op
++)
2680 xtensa_opcode opcode
;
2684 xtensa_format_get_slot (isa
, f
, op
, vbuf
, sbuf
);
2685 opcode
= xtensa_opcode_decode (isa
, f
, op
, sbuf
);
2686 opname
= xtensa_opcode_name (isa
, opcode
);
2688 fprintf (stderr
, "op in slot %i is %s;\n", op
, opname
);
2689 fprintf (stderr
, " operands = ");
2691 operands
< xtensa_opcode_num_operands (isa
, opcode
);
2695 if (xtensa_operand_is_visible (isa
, opcode
, operands
) == 0)
2697 xtensa_operand_get_field (isa
, opcode
, operands
, f
, op
, sbuf
, &val
);
2698 xtensa_operand_decode (isa
, opcode
, operands
, &val
);
2699 fprintf (stderr
, "%d ", val
);
2701 fprintf (stderr
, "\n");
2703 xtensa_insnbuf_free (isa
, sbuf
);
2706 #endif /* TENSILICA_DEBUG */
2710 is_direct_call_opcode (xtensa_opcode opcode
)
2712 xtensa_isa isa
= xtensa_default_isa
;
2713 int n
, num_operands
;
2715 if (xtensa_opcode_is_call (isa
, opcode
) != 1)
2718 num_operands
= xtensa_opcode_num_operands (isa
, opcode
);
2719 for (n
= 0; n
< num_operands
; n
++)
2721 if (xtensa_operand_is_register (isa
, opcode
, n
) == 0
2722 && xtensa_operand_is_PCrelative (isa
, opcode
, n
) == 1)
2729 /* Convert from BFD relocation type code to slot and operand number.
2730 Returns non-zero on failure. */
2733 decode_reloc (bfd_reloc_code_real_type reloc
, int *slot
, bfd_boolean
*is_alt
)
2735 if (reloc
>= BFD_RELOC_XTENSA_SLOT0_OP
2736 && reloc
<= BFD_RELOC_XTENSA_SLOT14_OP
)
2738 *slot
= reloc
- BFD_RELOC_XTENSA_SLOT0_OP
;
2741 else if (reloc
>= BFD_RELOC_XTENSA_SLOT0_ALT
2742 && reloc
<= BFD_RELOC_XTENSA_SLOT14_ALT
)
2744 *slot
= reloc
- BFD_RELOC_XTENSA_SLOT0_ALT
;
2754 /* Convert from slot number to BFD relocation type code for the
2755 standard PC-relative relocations. Return BFD_RELOC_NONE on
2758 static bfd_reloc_code_real_type
2759 encode_reloc (int slot
)
2761 if (slot
< 0 || slot
> 14)
2762 return BFD_RELOC_NONE
;
2764 return BFD_RELOC_XTENSA_SLOT0_OP
+ slot
;
2768 /* Convert from slot numbers to BFD relocation type code for the
2769 "alternate" relocations. Return BFD_RELOC_NONE on failure. */
2771 static bfd_reloc_code_real_type
2772 encode_alt_reloc (int slot
)
2774 if (slot
< 0 || slot
> 14)
2775 return BFD_RELOC_NONE
;
2777 return BFD_RELOC_XTENSA_SLOT0_ALT
+ slot
;
2782 xtensa_insnbuf_set_operand (xtensa_insnbuf slotbuf
,
2785 xtensa_opcode opcode
,
2791 uint32 valbuf
= value
;
2793 if (xtensa_operand_encode (xtensa_default_isa
, opcode
, operand
, &valbuf
))
2795 if (xtensa_operand_is_PCrelative (xtensa_default_isa
, opcode
, operand
)
2797 as_bad_where ((char *) file
, line
,
2798 _("operand %d of '%s' has out of range value '%u'"),
2800 xtensa_opcode_name (xtensa_default_isa
, opcode
),
2803 as_bad_where ((char *) file
, line
,
2804 _("operand %d of '%s' has invalid value '%u'"),
2806 xtensa_opcode_name (xtensa_default_isa
, opcode
),
2811 xtensa_operand_set_field (xtensa_default_isa
, opcode
, operand
, fmt
, slot
,
2817 xtensa_insnbuf_get_operand (xtensa_insnbuf slotbuf
,
2820 xtensa_opcode opcode
,
2824 (void) xtensa_operand_get_field (xtensa_default_isa
, opcode
, opnum
,
2825 fmt
, slot
, slotbuf
, &val
);
2826 (void) xtensa_operand_decode (xtensa_default_isa
, opcode
, opnum
, &val
);
2831 /* Checks for rules from xtensa-relax tables. */
2833 /* The routine xg_instruction_matches_option_term must return TRUE
2834 when a given option term is true. The meaning of all of the option
2835 terms is given interpretation by this function. */
2838 xg_instruction_matches_option_term (TInsn
*insn
, const ReqOrOption
*option
)
2840 if (strcmp (option
->option_name
, "realnop") == 0
2841 || strncmp (option
->option_name
, "IsaUse", 6) == 0)
2843 /* These conditions were evaluated statically when building the
2844 relaxation table. There's no need to reevaluate them now. */
2847 else if (strcmp (option
->option_name
, "FREEREG") == 0)
2848 return insn
->extra_arg
.X_op
== O_register
;
2851 as_fatal (_("internal error: unknown option name '%s'"),
2852 option
->option_name
);
2858 xg_instruction_matches_or_options (TInsn
*insn
,
2859 const ReqOrOptionList
*or_option
)
2861 const ReqOrOption
*option
;
2862 /* Must match each of the AND terms. */
2863 for (option
= or_option
; option
!= NULL
; option
= option
->next
)
2865 if (xg_instruction_matches_option_term (insn
, option
))
2873 xg_instruction_matches_options (TInsn
*insn
, const ReqOptionList
*options
)
2875 const ReqOption
*req_options
;
2876 /* Must match each of the AND terms. */
2877 for (req_options
= options
;
2878 req_options
!= NULL
;
2879 req_options
= req_options
->next
)
2881 /* Must match one of the OR clauses. */
2882 if (!xg_instruction_matches_or_options (insn
,
2883 req_options
->or_option_terms
))
2890 /* Return the transition rule that matches or NULL if none matches. */
2893 xg_instruction_matches_rule (TInsn
*insn
, TransitionRule
*rule
)
2895 PreconditionList
*condition_l
;
2897 if (rule
->opcode
!= insn
->opcode
)
2900 for (condition_l
= rule
->conditions
;
2901 condition_l
!= NULL
;
2902 condition_l
= condition_l
->next
)
2906 Precondition
*cond
= condition_l
->precond
;
2911 /* The expression must be the constant. */
2912 gas_assert (cond
->op_num
< insn
->ntok
);
2913 exp1
= &insn
->tok
[cond
->op_num
];
2914 if (expr_is_const (exp1
))
2919 if (get_expr_const (exp1
) != cond
->op_data
)
2923 if (get_expr_const (exp1
) == cond
->op_data
)
2930 else if (expr_is_register (exp1
))
2935 if (get_expr_register (exp1
) != cond
->op_data
)
2939 if (get_expr_register (exp1
) == cond
->op_data
)
2951 gas_assert (cond
->op_num
< insn
->ntok
);
2952 gas_assert (cond
->op_data
< insn
->ntok
);
2953 exp1
= &insn
->tok
[cond
->op_num
];
2954 exp2
= &insn
->tok
[cond
->op_data
];
2959 if (!expr_is_equal (exp1
, exp2
))
2963 if (expr_is_equal (exp1
, exp2
))
2975 if (!xg_instruction_matches_options (insn
, rule
->options
))
2983 transition_rule_cmp (const TransitionRule
*a
, const TransitionRule
*b
)
2985 bfd_boolean a_greater
= FALSE
;
2986 bfd_boolean b_greater
= FALSE
;
2988 ReqOptionList
*l_a
= a
->options
;
2989 ReqOptionList
*l_b
= b
->options
;
2991 /* We only care if they both are the same except for
2992 a const16 vs. an l32r. */
2994 while (l_a
&& l_b
&& ((l_a
->next
== NULL
) == (l_b
->next
== NULL
)))
2996 ReqOrOptionList
*l_or_a
= l_a
->or_option_terms
;
2997 ReqOrOptionList
*l_or_b
= l_b
->or_option_terms
;
2998 while (l_or_a
&& l_or_b
&& ((l_a
->next
== NULL
) == (l_b
->next
== NULL
)))
3000 if (l_or_a
->is_true
!= l_or_b
->is_true
)
3002 if (strcmp (l_or_a
->option_name
, l_or_b
->option_name
) != 0)
3004 /* This is the case we care about. */
3005 if (strcmp (l_or_a
->option_name
, "IsaUseConst16") == 0
3006 && strcmp (l_or_b
->option_name
, "IsaUseL32R") == 0)
3013 else if (strcmp (l_or_a
->option_name
, "IsaUseL32R") == 0
3014 && strcmp (l_or_b
->option_name
, "IsaUseConst16") == 0)
3024 l_or_a
= l_or_a
->next
;
3025 l_or_b
= l_or_b
->next
;
3027 if (l_or_a
|| l_or_b
)
3036 /* Incomparable if the substitution was used differently in two cases. */
3037 if (a_greater
&& b_greater
)
3049 static TransitionRule
*
3050 xg_instruction_match (TInsn
*insn
)
3052 TransitionTable
*table
= xg_build_simplify_table (&transition_rule_cmp
);
3054 gas_assert (insn
->opcode
< table
->num_opcodes
);
3056 /* Walk through all of the possible transitions. */
3057 for (l
= table
->table
[insn
->opcode
]; l
!= NULL
; l
= l
->next
)
3059 TransitionRule
*rule
= l
->rule
;
3060 if (xg_instruction_matches_rule (insn
, rule
))
3067 /* Various Other Internal Functions. */
3070 is_unique_insn_expansion (TransitionRule
*r
)
3072 if (!r
->to_instr
|| r
->to_instr
->next
!= NULL
)
3074 if (r
->to_instr
->typ
!= INSTR_INSTR
)
3080 /* Check if there is exactly one relaxation for INSN that converts it to
3081 another instruction of equal or larger size. If so, and if TARG is
3082 non-null, go ahead and generate the relaxed instruction into TARG. If
3083 NARROW_ONLY is true, then only consider relaxations that widen a narrow
3084 instruction, i.e., ignore relaxations that convert to an instruction of
3085 equal size. In some contexts where this function is used, only
3086 a single widening is allowed and the NARROW_ONLY argument is used to
3087 exclude cases like ADDI being "widened" to an ADDMI, which may
3088 later be relaxed to an ADDMI/ADDI pair. */
3091 xg_is_single_relaxable_insn (TInsn
*insn
, TInsn
*targ
, bfd_boolean narrow_only
)
3093 TransitionTable
*table
= xg_build_widen_table (&transition_rule_cmp
);
3095 TransitionRule
*match
= 0;
3097 gas_assert (insn
->insn_type
== ITYPE_INSN
);
3098 gas_assert (insn
->opcode
< table
->num_opcodes
);
3100 for (l
= table
->table
[insn
->opcode
]; l
!= NULL
; l
= l
->next
)
3102 TransitionRule
*rule
= l
->rule
;
3104 if (xg_instruction_matches_rule (insn
, rule
)
3105 && is_unique_insn_expansion (rule
)
3106 && (xg_get_single_size (insn
->opcode
) + (narrow_only
? 1 : 0)
3107 <= xg_get_single_size (rule
->to_instr
->opcode
)))
3118 xg_build_to_insn (targ
, insn
, match
->to_instr
);
3123 /* Return the maximum number of bytes this opcode can expand to. */
3126 xg_get_max_insn_widen_size (xtensa_opcode opcode
)
3128 TransitionTable
*table
= xg_build_widen_table (&transition_rule_cmp
);
3130 int max_size
= xg_get_single_size (opcode
);
3132 gas_assert (opcode
< table
->num_opcodes
);
3134 for (l
= table
->table
[opcode
]; l
!= NULL
; l
= l
->next
)
3136 TransitionRule
*rule
= l
->rule
;
3137 BuildInstr
*build_list
;
3142 build_list
= rule
->to_instr
;
3143 if (is_unique_insn_expansion (rule
))
3145 gas_assert (build_list
->typ
== INSTR_INSTR
);
3146 this_size
= xg_get_max_insn_widen_size (build_list
->opcode
);
3149 for (; build_list
!= NULL
; build_list
= build_list
->next
)
3151 switch (build_list
->typ
)
3154 this_size
+= xg_get_single_size (build_list
->opcode
);
3156 case INSTR_LITERAL_DEF
:
3157 case INSTR_LABEL_DEF
:
3162 if (this_size
> max_size
)
3163 max_size
= this_size
;
3169 /* Return the maximum number of literal bytes this opcode can generate. */
3172 xg_get_max_insn_widen_literal_size (xtensa_opcode opcode
)
3174 TransitionTable
*table
= xg_build_widen_table (&transition_rule_cmp
);
3178 gas_assert (opcode
< table
->num_opcodes
);
3180 for (l
= table
->table
[opcode
]; l
!= NULL
; l
= l
->next
)
3182 TransitionRule
*rule
= l
->rule
;
3183 BuildInstr
*build_list
;
3188 build_list
= rule
->to_instr
;
3189 if (is_unique_insn_expansion (rule
))
3191 gas_assert (build_list
->typ
== INSTR_INSTR
);
3192 this_size
= xg_get_max_insn_widen_literal_size (build_list
->opcode
);
3195 for (; build_list
!= NULL
; build_list
= build_list
->next
)
3197 switch (build_list
->typ
)
3199 case INSTR_LITERAL_DEF
:
3200 /* Hard-coded 4-byte literal. */
3204 case INSTR_LABEL_DEF
:
3209 if (this_size
> max_size
)
3210 max_size
= this_size
;
3217 xg_is_relaxable_insn (TInsn
*insn
, int lateral_steps
)
3219 int steps_taken
= 0;
3220 TransitionTable
*table
= xg_build_widen_table (&transition_rule_cmp
);
3223 gas_assert (insn
->insn_type
== ITYPE_INSN
);
3224 gas_assert (insn
->opcode
< table
->num_opcodes
);
3226 for (l
= table
->table
[insn
->opcode
]; l
!= NULL
; l
= l
->next
)
3228 TransitionRule
*rule
= l
->rule
;
3230 if (xg_instruction_matches_rule (insn
, rule
))
3232 if (steps_taken
== lateral_steps
)
3242 get_special_literal_symbol (void)
3244 static symbolS
*sym
= NULL
;
3247 sym
= symbol_find_or_make ("SPECIAL_LITERAL0\001");
3253 get_special_label_symbol (void)
3255 static symbolS
*sym
= NULL
;
3258 sym
= symbol_find_or_make ("SPECIAL_LABEL0\001");
3264 xg_valid_literal_expression (const expressionS
*exp
)
3286 /* This will check to see if the value can be converted into the
3287 operand type. It will return TRUE if it does not fit. */
3290 xg_check_operand (int32 value
, xtensa_opcode opcode
, int operand
)
3292 uint32 valbuf
= value
;
3293 if (xtensa_operand_encode (xtensa_default_isa
, opcode
, operand
, &valbuf
))
3299 /* Assumes: All immeds are constants. Check that all constants fit
3300 into their immeds; return FALSE if not. */
3303 xg_immeds_fit (const TInsn
*insn
)
3305 xtensa_isa isa
= xtensa_default_isa
;
3309 gas_assert (insn
->insn_type
== ITYPE_INSN
);
3310 for (i
= 0; i
< n
; ++i
)
3312 const expressionS
*exp
= &insn
->tok
[i
];
3314 if (xtensa_operand_is_register (isa
, insn
->opcode
, i
) == 1)
3321 if (xg_check_operand (exp
->X_add_number
, insn
->opcode
, i
))
3326 /* The symbol should have a fixup associated with it. */
3335 /* This should only be called after we have an initial
3336 estimate of the addresses. */
3339 xg_symbolic_immeds_fit (const TInsn
*insn
,
3345 xtensa_isa isa
= xtensa_default_isa
;
3353 gas_assert (insn
->insn_type
== ITYPE_INSN
);
3355 for (i
= 0; i
< n
; ++i
)
3357 const expressionS
*exp
= &insn
->tok
[i
];
3359 if (xtensa_operand_is_register (isa
, insn
->opcode
, i
) == 1)
3366 if (xg_check_operand (exp
->X_add_number
, insn
->opcode
, i
))
3372 /* Check for the worst case. */
3373 if (xg_check_operand (0xffff, insn
->opcode
, i
))
3378 /* We only allow symbols for PC-relative references.
3379 If pc_frag == 0, then we don't have frag locations yet. */
3381 || xtensa_operand_is_PCrelative (isa
, insn
->opcode
, i
) == 0)
3384 /* If it is a weak symbol or a symbol in a different section,
3385 it cannot be known to fit at assembly time. */
3386 if (S_IS_WEAK (exp
->X_add_symbol
)
3387 || S_GET_SEGMENT (exp
->X_add_symbol
) != pc_seg
)
3389 /* For a direct call with --no-longcalls, be optimistic and
3390 assume it will be in range. If the symbol is weak and
3391 undefined, it may remain undefined at link-time, in which
3392 case it will have a zero value and almost certainly be out
3393 of range for a direct call; thus, relax for undefined weak
3394 symbols even if longcalls is not enabled. */
3395 if (is_direct_call_opcode (insn
->opcode
)
3396 && ! pc_frag
->tc_frag_data
.use_longcalls
3397 && (! S_IS_WEAK (exp
->X_add_symbol
)
3398 || S_IS_DEFINED (exp
->X_add_symbol
)))
3404 symbolP
= exp
->X_add_symbol
;
3405 sym_frag
= symbol_get_frag (symbolP
);
3406 target
= S_GET_VALUE (symbolP
) + exp
->X_add_number
;
3407 pc
= pc_frag
->fr_address
+ pc_offset
;
3409 /* If frag has yet to be reached on this pass, assume it
3410 will move by STRETCH just as we did. If this is not so,
3411 it will be because some frag between grows, and that will
3412 force another pass. Beware zero-length frags. There
3413 should be a faster way to do this. */
3416 && sym_frag
->relax_marker
!= pc_frag
->relax_marker
3417 && S_GET_SEGMENT (symbolP
) == pc_seg
)
3422 new_offset
= target
;
3423 xtensa_operand_do_reloc (isa
, insn
->opcode
, i
, &new_offset
, pc
);
3424 if (xg_check_operand (new_offset
, insn
->opcode
, i
))
3429 /* The symbol should have a fixup associated with it. */
3438 /* Return TRUE on success. */
3441 xg_build_to_insn (TInsn
*targ
, TInsn
*insn
, BuildInstr
*bi
)
3447 targ
->debug_line
= insn
->debug_line
;
3448 targ
->loc_directive_seen
= insn
->loc_directive_seen
;
3453 targ
->opcode
= bi
->opcode
;
3454 targ
->insn_type
= ITYPE_INSN
;
3455 targ
->is_specific_opcode
= FALSE
;
3457 for (; op
!= NULL
; op
= op
->next
)
3459 int op_num
= op
->op_num
;
3460 int op_data
= op
->op_data
;
3462 gas_assert (op
->op_num
< MAX_INSN_ARGS
);
3464 if (targ
->ntok
<= op_num
)
3465 targ
->ntok
= op_num
+ 1;
3470 set_expr_const (&targ
->tok
[op_num
], op_data
);
3473 gas_assert (op_data
< insn
->ntok
);
3474 copy_expr (&targ
->tok
[op_num
], &insn
->tok
[op_data
]);
3477 if (insn
->extra_arg
.X_op
!= O_register
)
3479 copy_expr (&targ
->tok
[op_num
], &insn
->extra_arg
);
3482 sym
= get_special_literal_symbol ();
3483 set_expr_symbol_offset (&targ
->tok
[op_num
], sym
, 0);
3484 if (insn
->tok
[op_data
].X_op
== O_tlsfunc
3485 || insn
->tok
[op_data
].X_op
== O_tlsarg
)
3486 copy_expr (&targ
->extra_arg
, &insn
->tok
[op_data
]);
3489 sym
= get_special_label_symbol ();
3490 set_expr_symbol_offset (&targ
->tok
[op_num
], sym
, 0);
3492 case OP_OPERAND_HI16U
:
3493 case OP_OPERAND_LOW16U
:
3494 gas_assert (op_data
< insn
->ntok
);
3495 if (expr_is_const (&insn
->tok
[op_data
]))
3498 copy_expr (&targ
->tok
[op_num
], &insn
->tok
[op_data
]);
3499 val
= xg_apply_userdef_op_fn (op
->typ
,
3502 targ
->tok
[op_num
].X_add_number
= val
;
3506 /* For const16 we can create relocations for these. */
3507 if (targ
->opcode
== XTENSA_UNDEFINED
3508 || (targ
->opcode
!= xtensa_const16_opcode
))
3510 gas_assert (op_data
< insn
->ntok
);
3511 /* Need to build a O_lo16 or O_hi16. */
3512 copy_expr (&targ
->tok
[op_num
], &insn
->tok
[op_data
]);
3513 if (targ
->tok
[op_num
].X_op
== O_symbol
)
3515 if (op
->typ
== OP_OPERAND_HI16U
)
3516 targ
->tok
[op_num
].X_op
= O_hi16
;
3517 else if (op
->typ
== OP_OPERAND_LOW16U
)
3518 targ
->tok
[op_num
].X_op
= O_lo16
;
3525 /* currently handles:
3528 OP_OPERAND_F32MINUS */
3529 if (xg_has_userdef_op_fn (op
->typ
))
3531 gas_assert (op_data
< insn
->ntok
);
3532 if (expr_is_const (&insn
->tok
[op_data
]))
3535 copy_expr (&targ
->tok
[op_num
], &insn
->tok
[op_data
]);
3536 val
= xg_apply_userdef_op_fn (op
->typ
,
3539 targ
->tok
[op_num
].X_add_number
= val
;
3542 return FALSE
; /* We cannot use a relocation for this. */
3551 case INSTR_LITERAL_DEF
:
3553 targ
->opcode
= XTENSA_UNDEFINED
;
3554 targ
->insn_type
= ITYPE_LITERAL
;
3555 targ
->is_specific_opcode
= FALSE
;
3556 for (; op
!= NULL
; op
= op
->next
)
3558 int op_num
= op
->op_num
;
3559 int op_data
= op
->op_data
;
3560 gas_assert (op
->op_num
< MAX_INSN_ARGS
);
3562 if (targ
->ntok
<= op_num
)
3563 targ
->ntok
= op_num
+ 1;
3568 gas_assert (op_data
< insn
->ntok
);
3569 /* We can only pass resolvable literals through. */
3570 if (!xg_valid_literal_expression (&insn
->tok
[op_data
]))
3572 copy_expr (&targ
->tok
[op_num
], &insn
->tok
[op_data
]);
3584 case INSTR_LABEL_DEF
:
3586 targ
->opcode
= XTENSA_UNDEFINED
;
3587 targ
->insn_type
= ITYPE_LABEL
;
3588 targ
->is_specific_opcode
= FALSE
;
3589 /* Literal with no ops is a label? */
3590 gas_assert (op
== NULL
);
3601 /* Return TRUE on success. */
3604 xg_build_to_stack (IStack
*istack
, TInsn
*insn
, BuildInstr
*bi
)
3606 for (; bi
!= NULL
; bi
= bi
->next
)
3608 TInsn
*next_insn
= istack_push_space (istack
);
3610 if (!xg_build_to_insn (next_insn
, insn
, bi
))
3617 /* Return TRUE on valid expansion. */
3620 xg_expand_to_stack (IStack
*istack
, TInsn
*insn
, int lateral_steps
)
3622 int stack_size
= istack
->ninsn
;
3623 int steps_taken
= 0;
3624 TransitionTable
*table
= xg_build_widen_table (&transition_rule_cmp
);
3627 gas_assert (insn
->insn_type
== ITYPE_INSN
);
3628 gas_assert (insn
->opcode
< table
->num_opcodes
);
3630 for (l
= table
->table
[insn
->opcode
]; l
!= NULL
; l
= l
->next
)
3632 TransitionRule
*rule
= l
->rule
;
3634 if (xg_instruction_matches_rule (insn
, rule
))
3636 if (lateral_steps
== steps_taken
)
3640 /* This is it. Expand the rule to the stack. */
3641 if (!xg_build_to_stack (istack
, insn
, rule
->to_instr
))
3644 /* Check to see if it fits. */
3645 for (i
= stack_size
; i
< istack
->ninsn
; i
++)
3647 TInsn
*tinsn
= &istack
->insn
[i
];
3649 if (tinsn
->insn_type
== ITYPE_INSN
3650 && !tinsn_has_symbolic_operands (tinsn
)
3651 && !xg_immeds_fit (tinsn
))
3653 istack
->ninsn
= stack_size
;
3666 /* Relax the assembly instruction at least "min_steps".
3667 Return the number of steps taken.
3669 For relaxation to correctly terminate, every relaxation chain must
3670 terminate in one of two ways:
3672 1. If the chain from one instruction to the next consists entirely of
3673 single instructions, then the chain *must* handle all possible
3674 immediates without failing. It must not ever fail because an
3675 immediate is out of range. The MOVI.N -> MOVI -> L32R relaxation
3676 chain is one example. L32R loads 32 bits, and there cannot be an
3677 immediate larger than 32 bits, so it satisfies this condition.
3678 Single instruction relaxation chains are as defined by
3679 xg_is_single_relaxable_instruction.
3681 2. Otherwise, the chain must end in a multi-instruction expansion: e.g.,
3682 BNEZ.N -> BNEZ -> BNEZ.W15 -> BENZ.N/J
3684 Strictly speaking, in most cases you can violate condition 1 and be OK
3685 -- in particular when the last two instructions have the same single
3686 size. But nevertheless, you should guarantee the above two conditions.
3688 We could fix this so that single-instruction expansions correctly
3689 terminate when they can't handle the range, but the error messages are
3690 worse, and it actually turns out that in every case but one (18-bit wide
3691 branches), you need a multi-instruction expansion to get the full range
3692 anyway. And because 18-bit branches are handled identically to 15-bit
3693 branches, there isn't any point in changing it. */
3696 xg_assembly_relax (IStack
*istack
,
3699 fragS
*pc_frag
, /* if pc_frag == 0, not pc-relative */
3700 offsetT pc_offset
, /* offset in fragment */
3701 int min_steps
, /* minimum conversion steps */
3702 long stretch
) /* number of bytes stretched so far */
3704 int steps_taken
= 0;
3706 /* Some of its immeds don't fit. Try to build a relaxed version.
3707 This may go through a couple of stages of single instruction
3708 transformations before we get there. */
3710 TInsn single_target
;
3712 int lateral_steps
= 0;
3713 int istack_size
= istack
->ninsn
;
3715 if (xg_symbolic_immeds_fit (insn
, pc_seg
, pc_frag
, pc_offset
, stretch
)
3716 && steps_taken
>= min_steps
)
3718 istack_push (istack
, insn
);
3721 current_insn
= *insn
;
3723 /* Walk through all of the single instruction expansions. */
3724 while (xg_is_single_relaxable_insn (¤t_insn
, &single_target
, FALSE
))
3727 if (xg_symbolic_immeds_fit (&single_target
, pc_seg
, pc_frag
, pc_offset
,
3730 if (steps_taken
>= min_steps
)
3732 istack_push (istack
, &single_target
);
3736 current_insn
= single_target
;
3739 /* Now check for a multi-instruction expansion. */
3740 while (xg_is_relaxable_insn (¤t_insn
, lateral_steps
))
3742 if (xg_symbolic_immeds_fit (¤t_insn
, pc_seg
, pc_frag
, pc_offset
,
3745 if (steps_taken
>= min_steps
)
3747 istack_push (istack
, ¤t_insn
);
3752 if (xg_expand_to_stack (istack
, ¤t_insn
, lateral_steps
))
3754 if (steps_taken
>= min_steps
)
3758 istack
->ninsn
= istack_size
;
3761 /* It's not going to work -- use the original. */
3762 istack_push (istack
, insn
);
3768 xg_finish_frag (char *last_insn
,
3769 enum xtensa_relax_statesE frag_state
,
3770 enum xtensa_relax_statesE slot0_state
,
3772 bfd_boolean is_insn
)
3774 /* Finish off this fragment so that it has at LEAST the desired
3775 max_growth. If it doesn't fit in this fragment, close this one
3776 and start a new one. In either case, return a pointer to the
3777 beginning of the growth area. */
3781 frag_grow (max_growth
);
3782 old_frag
= frag_now
;
3784 frag_now
->fr_opcode
= last_insn
;
3786 frag_now
->tc_frag_data
.is_insn
= TRUE
;
3788 frag_var (rs_machine_dependent
, max_growth
, max_growth
,
3789 frag_state
, frag_now
->fr_symbol
, frag_now
->fr_offset
, last_insn
);
3791 old_frag
->tc_frag_data
.slot_subtypes
[0] = slot0_state
;
3792 xtensa_set_frag_assembly_state (frag_now
);
3794 /* Just to make sure that we did not split it up. */
3795 gas_assert (old_frag
->fr_next
== frag_now
);
3799 /* Return TRUE if the target frag is one of the next non-empty frags. */
3802 is_next_frag_target (const fragS
*fragP
, const fragS
*target
)
3807 for (; fragP
; fragP
= fragP
->fr_next
)
3809 if (fragP
== target
)
3811 if (fragP
->fr_fix
!= 0)
3813 if (fragP
->fr_type
== rs_fill
&& fragP
->fr_offset
!= 0)
3815 if ((fragP
->fr_type
== rs_align
|| fragP
->fr_type
== rs_align_code
)
3816 && ((fragP
->fr_address
% (1 << fragP
->fr_offset
)) != 0))
3818 if (fragP
->fr_type
== rs_space
)
3826 is_branch_jmp_to_next (TInsn
*insn
, fragS
*fragP
)
3828 xtensa_isa isa
= xtensa_default_isa
;
3830 int num_ops
= xtensa_opcode_num_operands (isa
, insn
->opcode
);
3835 if (xtensa_opcode_is_branch (isa
, insn
->opcode
) != 1
3836 && xtensa_opcode_is_jump (isa
, insn
->opcode
) != 1)
3839 for (i
= 0; i
< num_ops
; i
++)
3841 if (xtensa_operand_is_PCrelative (isa
, insn
->opcode
, i
) == 1)
3847 if (target_op
== -1)
3850 if (insn
->ntok
<= target_op
)
3853 if (insn
->tok
[target_op
].X_op
!= O_symbol
)
3856 sym
= insn
->tok
[target_op
].X_add_symbol
;
3860 if (insn
->tok
[target_op
].X_add_number
!= 0)
3863 target_frag
= symbol_get_frag (sym
);
3864 if (target_frag
== NULL
)
3867 if (is_next_frag_target (fragP
->fr_next
, target_frag
)
3868 && S_GET_VALUE (sym
) == target_frag
->fr_address
)
3876 xg_add_branch_and_loop_targets (TInsn
*insn
)
3878 xtensa_isa isa
= xtensa_default_isa
;
3879 int num_ops
= xtensa_opcode_num_operands (isa
, insn
->opcode
);
3881 if (xtensa_opcode_is_loop (isa
, insn
->opcode
) == 1)
3884 if (xtensa_operand_is_PCrelative (isa
, insn
->opcode
, i
) == 1
3885 && insn
->tok
[i
].X_op
== O_symbol
)
3886 symbol_get_tc (insn
->tok
[i
].X_add_symbol
)->is_loop_target
= TRUE
;
3890 if (xtensa_opcode_is_branch (isa
, insn
->opcode
) == 1
3891 || xtensa_opcode_is_loop (isa
, insn
->opcode
) == 1)
3895 for (i
= 0; i
< insn
->ntok
&& i
< num_ops
; i
++)
3897 if (xtensa_operand_is_PCrelative (isa
, insn
->opcode
, i
) == 1
3898 && insn
->tok
[i
].X_op
== O_symbol
)
3900 symbolS
*sym
= insn
->tok
[i
].X_add_symbol
;
3901 symbol_get_tc (sym
)->is_branch_target
= TRUE
;
3902 if (S_IS_DEFINED (sym
))
3903 symbol_get_frag (sym
)->tc_frag_data
.is_branch_target
= TRUE
;
3910 /* Return FALSE if no error. */
3913 xg_build_token_insn (BuildInstr
*instr_spec
, TInsn
*old_insn
, TInsn
*new_insn
)
3918 switch (instr_spec
->typ
)
3921 new_insn
->insn_type
= ITYPE_INSN
;
3922 new_insn
->opcode
= instr_spec
->opcode
;
3924 case INSTR_LITERAL_DEF
:
3925 new_insn
->insn_type
= ITYPE_LITERAL
;
3926 new_insn
->opcode
= XTENSA_UNDEFINED
;
3928 case INSTR_LABEL_DEF
:
3931 new_insn
->is_specific_opcode
= FALSE
;
3932 new_insn
->debug_line
= old_insn
->debug_line
;
3933 new_insn
->loc_directive_seen
= old_insn
->loc_directive_seen
;
3935 for (b_op
= instr_spec
->ops
; b_op
!= NULL
; b_op
= b_op
->next
)
3938 const expressionS
*src_exp
;
3944 /* The expression must be the constant. */
3945 gas_assert (b_op
->op_num
< MAX_INSN_ARGS
);
3946 exp
= &new_insn
->tok
[b_op
->op_num
];
3947 set_expr_const (exp
, b_op
->op_data
);
3951 gas_assert (b_op
->op_num
< MAX_INSN_ARGS
);
3952 gas_assert (b_op
->op_data
< (unsigned) old_insn
->ntok
);
3953 src_exp
= &old_insn
->tok
[b_op
->op_data
];
3954 exp
= &new_insn
->tok
[b_op
->op_num
];
3955 copy_expr (exp
, src_exp
);
3960 as_bad (_("can't handle generation of literal/labels yet"));
3964 as_bad (_("can't handle undefined OP TYPE"));
3969 new_insn
->ntok
= num_ops
;
3974 /* Return TRUE if it was simplified. */
3977 xg_simplify_insn (TInsn
*old_insn
, TInsn
*new_insn
)
3979 TransitionRule
*rule
;
3980 BuildInstr
*insn_spec
;
3982 if (old_insn
->is_specific_opcode
|| !density_supported
)
3985 rule
= xg_instruction_match (old_insn
);
3989 insn_spec
= rule
->to_instr
;
3990 /* There should only be one. */
3991 gas_assert (insn_spec
!= NULL
);
3992 gas_assert (insn_spec
->next
== NULL
);
3993 if (insn_spec
->next
!= NULL
)
3996 xg_build_token_insn (insn_spec
, old_insn
, new_insn
);
4002 /* xg_expand_assembly_insn: (1) Simplify the instruction, i.e., l32i ->
4003 l32i.n. (2) Check the number of operands. (3) Place the instruction
4004 tokens into the stack or relax it and place multiple
4005 instructions/literals onto the stack. Return FALSE if no error. */
4008 xg_expand_assembly_insn (IStack
*istack
, TInsn
*orig_insn
)
4012 bfd_boolean do_expand
;
4014 tinsn_init (&new_insn
);
4016 /* Narrow it if we can. xg_simplify_insn now does all the
4017 appropriate checking (e.g., for the density option). */
4018 if (xg_simplify_insn (orig_insn
, &new_insn
))
4019 orig_insn
= &new_insn
;
4021 noperands
= xtensa_opcode_num_operands (xtensa_default_isa
,
4023 if (orig_insn
->ntok
< noperands
)
4025 as_bad (_("found %d operands for '%s': Expected %d"),
4027 xtensa_opcode_name (xtensa_default_isa
, orig_insn
->opcode
),
4031 if (orig_insn
->ntok
> noperands
)
4032 as_warn (_("found too many (%d) operands for '%s': Expected %d"),
4034 xtensa_opcode_name (xtensa_default_isa
, orig_insn
->opcode
),
4037 /* If there are not enough operands, we will assert above. If there
4038 are too many, just cut out the extras here. */
4039 orig_insn
->ntok
= noperands
;
4041 if (tinsn_has_invalid_symbolic_operands (orig_insn
))
4044 /* Special case for extui opcode which has constraints not handled
4045 by the ordinary operand encoding checks. The number of operands
4046 and related syntax issues have already been checked. */
4047 if (orig_insn
->opcode
== xtensa_extui_opcode
)
4049 int shiftimm
= orig_insn
->tok
[2].X_add_number
;
4050 int maskimm
= orig_insn
->tok
[3].X_add_number
;
4051 if (shiftimm
+ maskimm
> 32)
4053 as_bad (_("immediate operands sum to greater than 32"));
4058 /* If the instruction will definitely need to be relaxed, it is better
4059 to expand it now for better scheduling. Decide whether to expand
4061 do_expand
= (!orig_insn
->is_specific_opcode
&& use_transform ());
4063 /* Calls should be expanded to longcalls only in the backend relaxation
4064 so that the assembly scheduler will keep the L32R/CALLX instructions
4066 if (is_direct_call_opcode (orig_insn
->opcode
))
4069 if (tinsn_has_symbolic_operands (orig_insn
))
4071 /* The values of symbolic operands are not known yet, so only expand
4072 now if an operand is "complex" (e.g., difference of symbols) and
4073 will have to be stored as a literal regardless of the value. */
4074 if (!tinsn_has_complex_operands (orig_insn
))
4077 else if (xg_immeds_fit (orig_insn
))
4081 xg_assembly_relax (istack
, orig_insn
, 0, 0, 0, 0, 0);
4083 istack_push (istack
, orig_insn
);
4089 /* Return TRUE if the section flags are marked linkonce
4090 or the name is .gnu.linkonce.*. */
4092 static int linkonce_len
= sizeof (".gnu.linkonce.") - 1;
4095 get_is_linkonce_section (bfd
*abfd ATTRIBUTE_UNUSED
, segT sec
)
4097 flagword flags
, link_once_flags
;
4099 flags
= bfd_get_section_flags (abfd
, sec
);
4100 link_once_flags
= (flags
& SEC_LINK_ONCE
);
4102 /* Flags might not be set yet. */
4103 if (!link_once_flags
4104 && strncmp (segment_name (sec
), ".gnu.linkonce.", linkonce_len
) == 0)
4105 link_once_flags
= SEC_LINK_ONCE
;
4107 return (link_once_flags
!= 0);
4112 xtensa_add_literal_sym (symbolS
*sym
)
4116 l
= XNEW (sym_list
);
4118 l
->next
= literal_syms
;
4124 xtensa_create_literal_symbol (segT sec
, fragS
*frag
)
4126 static int lit_num
= 0;
4127 static char name
[256];
4130 sprintf (name
, ".L_lit_sym%d", lit_num
);
4132 /* Create a local symbol. If it is in a linkonce section, we have to
4133 be careful to make sure that if it is used in a relocation that the
4134 symbol will be in the output file. */
4135 if (get_is_linkonce_section (stdoutput
, sec
))
4137 symbolP
= symbol_new (name
, sec
, 0, frag
);
4138 S_CLEAR_EXTERNAL (symbolP
);
4139 /* symbolP->local = 1; */
4142 symbolP
= symbol_new (name
, sec
, 0, frag
);
4144 xtensa_add_literal_sym (symbolP
);
4151 /* Currently all literals that are generated here are 32-bit L32R targets. */
4154 xg_assemble_literal (/* const */ TInsn
*insn
)
4157 symbolS
*lit_sym
= NULL
;
4158 bfd_reloc_code_real_type reloc
;
4159 bfd_boolean pcrel
= FALSE
;
4162 /* size = 4 for L32R. It could easily be larger when we move to
4163 larger constants. Add a parameter later. */
4164 offsetT litsize
= 4;
4165 offsetT litalign
= 2; /* 2^2 = 4 */
4166 expressionS saved_loc
;
4167 expressionS
* emit_val
;
4169 set_expr_symbol_offset (&saved_loc
, frag_now
->fr_symbol
, frag_now_fix ());
4171 gas_assert (insn
->insn_type
== ITYPE_LITERAL
);
4172 gas_assert (insn
->ntok
== 1); /* must be only one token here */
4174 xtensa_switch_to_literal_fragment (&state
);
4176 emit_val
= &insn
->tok
[0];
4177 if (emit_val
->X_op
== O_big
)
4179 int size
= emit_val
->X_add_number
* CHARS_PER_LITTLENUM
;
4182 /* This happens when someone writes a "movi a2, big_number". */
4183 as_bad_where (frag_now
->fr_file
, frag_now
->fr_line
,
4184 _("invalid immediate"));
4185 xtensa_restore_emit_state (&state
);
4190 /* Force a 4-byte align here. Note that this opens a new frag, so all
4191 literals done with this function have a frag to themselves. That's
4192 important for the way text section literals work. */
4193 frag_align (litalign
, 0, 0);
4194 record_alignment (now_seg
, litalign
);
4196 switch (emit_val
->X_op
)
4206 p
= frag_more (litsize
);
4207 xtensa_set_frag_assembly_state (frag_now
);
4208 reloc
= map_operator_to_reloc (emit_val
->X_op
, TRUE
);
4209 if (emit_val
->X_add_symbol
)
4210 emit_val
->X_op
= O_symbol
;
4212 emit_val
->X_op
= O_constant
;
4213 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
,
4214 litsize
, emit_val
, pcrel
, reloc
);
4218 emit_expr (emit_val
, litsize
);
4222 gas_assert (frag_now
->tc_frag_data
.literal_frag
== NULL
);
4223 frag_now
->tc_frag_data
.literal_frag
= get_literal_pool_location (now_seg
);
4224 frag_now
->fr_symbol
= xtensa_create_literal_symbol (now_seg
, frag_now
);
4225 lit_sym
= frag_now
->fr_symbol
;
4228 xtensa_restore_emit_state (&state
);
4234 xg_assemble_literal_space (/* const */ int size
, int slot
)
4237 /* We might have to do something about this alignment. It only
4238 takes effect if something is placed here. */
4239 offsetT litalign
= 2; /* 2^2 = 4 */
4240 fragS
*lit_saved_frag
;
4242 gas_assert (size
% 4 == 0);
4244 xtensa_switch_to_literal_fragment (&state
);
4246 /* Force a 4-byte align here. */
4247 frag_align (litalign
, 0, 0);
4248 record_alignment (now_seg
, litalign
);
4252 lit_saved_frag
= frag_now
;
4253 frag_now
->tc_frag_data
.literal_frag
= get_literal_pool_location (now_seg
);
4254 frag_now
->fr_symbol
= xtensa_create_literal_symbol (now_seg
, frag_now
);
4255 xg_finish_frag (0, RELAX_LITERAL
, 0, size
, FALSE
);
4258 xtensa_restore_emit_state (&state
);
4259 frag_now
->tc_frag_data
.literal_frags
[slot
] = lit_saved_frag
;
4263 /* Put in a fixup record based on the opcode.
4264 Return TRUE on success. */
4267 xg_add_opcode_fix (TInsn
*tinsn
,
4275 xtensa_opcode opcode
= tinsn
->opcode
;
4276 bfd_reloc_code_real_type reloc
;
4277 reloc_howto_type
*howto
;
4281 reloc
= BFD_RELOC_NONE
;
4283 /* First try the special cases for "alternate" relocs. */
4284 if (opcode
== xtensa_l32r_opcode
)
4286 if (fragP
->tc_frag_data
.use_absolute_literals
)
4287 reloc
= encode_alt_reloc (slot
);
4289 else if (opcode
== xtensa_const16_opcode
)
4291 if (exp
->X_op
== O_lo16
)
4293 reloc
= encode_reloc (slot
);
4294 exp
->X_op
= O_symbol
;
4296 else if (exp
->X_op
== O_hi16
)
4298 reloc
= encode_alt_reloc (slot
);
4299 exp
->X_op
= O_symbol
;
4303 if (opnum
!= get_relaxable_immed (opcode
))
4305 as_bad (_("invalid relocation for operand %i of '%s'"),
4306 opnum
+ 1, xtensa_opcode_name (xtensa_default_isa
, opcode
));
4310 /* Handle erroneous "@h" and "@l" expressions here before they propagate
4311 into the symbol table where the generic portions of the assembler
4312 won't know what to do with them. */
4313 if (exp
->X_op
== O_lo16
|| exp
->X_op
== O_hi16
)
4315 as_bad (_("invalid expression for operand %i of '%s'"),
4316 opnum
+ 1, xtensa_opcode_name (xtensa_default_isa
, opcode
));
4320 /* Next try the generic relocs. */
4321 if (reloc
== BFD_RELOC_NONE
)
4322 reloc
= encode_reloc (slot
);
4323 if (reloc
== BFD_RELOC_NONE
)
4325 as_bad (_("invalid relocation in instruction slot %i"), slot
);
4329 howto
= bfd_reloc_type_lookup (stdoutput
, reloc
);
4332 as_bad (_("undefined symbol for opcode \"%s\""),
4333 xtensa_opcode_name (xtensa_default_isa
, opcode
));
4337 fmt_length
= xtensa_format_length (xtensa_default_isa
, fmt
);
4338 the_fix
= fix_new_exp (fragP
, offset
, fmt_length
, exp
,
4339 howto
->pc_relative
, reloc
);
4340 the_fix
->fx_no_overflow
= 1;
4341 the_fix
->tc_fix_data
.X_add_symbol
= exp
->X_add_symbol
;
4342 the_fix
->tc_fix_data
.X_add_number
= exp
->X_add_number
;
4343 the_fix
->tc_fix_data
.slot
= slot
;
4350 xg_emit_insn_to_buf (TInsn
*tinsn
,
4354 bfd_boolean build_fix
)
4356 static xtensa_insnbuf insnbuf
= NULL
;
4357 bfd_boolean has_symbolic_immed
= FALSE
;
4358 bfd_boolean ok
= TRUE
;
4361 insnbuf
= xtensa_insnbuf_alloc (xtensa_default_isa
);
4363 has_symbolic_immed
= tinsn_to_insnbuf (tinsn
, insnbuf
);
4364 if (has_symbolic_immed
&& build_fix
)
4367 xtensa_format fmt
= xg_get_single_format (tinsn
->opcode
);
4368 int slot
= xg_get_single_slot (tinsn
->opcode
);
4369 int opnum
= get_relaxable_immed (tinsn
->opcode
);
4370 expressionS
*exp
= &tinsn
->tok
[opnum
];
4372 if (!xg_add_opcode_fix (tinsn
, opnum
, fmt
, slot
, exp
, fragP
, offset
))
4375 fragP
->tc_frag_data
.is_insn
= TRUE
;
4376 xtensa_insnbuf_to_chars (xtensa_default_isa
, insnbuf
,
4377 (unsigned char *) buf
, 0);
4383 xg_resolve_literals (TInsn
*insn
, symbolS
*lit_sym
)
4385 symbolS
*sym
= get_special_literal_symbol ();
4389 gas_assert (insn
->insn_type
== ITYPE_INSN
);
4390 for (i
= 0; i
< insn
->ntok
; i
++)
4391 if (insn
->tok
[i
].X_add_symbol
== sym
)
4392 insn
->tok
[i
].X_add_symbol
= lit_sym
;
4398 xg_resolve_labels (TInsn
*insn
, symbolS
*label_sym
)
4400 symbolS
*sym
= get_special_label_symbol ();
4402 for (i
= 0; i
< insn
->ntok
; i
++)
4403 if (insn
->tok
[i
].X_add_symbol
== sym
)
4404 insn
->tok
[i
].X_add_symbol
= label_sym
;
4409 /* Return TRUE if the instruction can write to the specified
4410 integer register. */
4413 is_register_writer (const TInsn
*insn
, const char *regset
, int regnum
)
4417 xtensa_isa isa
= xtensa_default_isa
;
4419 num_ops
= xtensa_opcode_num_operands (isa
, insn
->opcode
);
4421 for (i
= 0; i
< num_ops
; i
++)
4424 inout
= xtensa_operand_inout (isa
, insn
->opcode
, i
);
4425 if ((inout
== 'o' || inout
== 'm')
4426 && xtensa_operand_is_register (isa
, insn
->opcode
, i
) == 1)
4428 xtensa_regfile opnd_rf
=
4429 xtensa_operand_regfile (isa
, insn
->opcode
, i
);
4430 if (!strcmp (xtensa_regfile_shortname (isa
, opnd_rf
), regset
))
4432 if ((insn
->tok
[i
].X_op
== O_register
)
4433 && (insn
->tok
[i
].X_add_number
== regnum
))
4443 is_bad_loopend_opcode (const TInsn
*tinsn
)
4445 xtensa_opcode opcode
= tinsn
->opcode
;
4447 if (opcode
== XTENSA_UNDEFINED
)
4450 if (opcode
== xtensa_call0_opcode
4451 || opcode
== xtensa_callx0_opcode
4452 || opcode
== xtensa_call4_opcode
4453 || opcode
== xtensa_callx4_opcode
4454 || opcode
== xtensa_call8_opcode
4455 || opcode
== xtensa_callx8_opcode
4456 || opcode
== xtensa_call12_opcode
4457 || opcode
== xtensa_callx12_opcode
4458 || opcode
== xtensa_isync_opcode
4459 || opcode
== xtensa_ret_opcode
4460 || opcode
== xtensa_ret_n_opcode
4461 || opcode
== xtensa_retw_opcode
4462 || opcode
== xtensa_retw_n_opcode
4463 || opcode
== xtensa_waiti_opcode
4464 || opcode
== xtensa_rsr_lcount_opcode
)
4471 /* Labels that begin with ".Ln" or ".LM" are unaligned.
4472 This allows the debugger to add unaligned labels.
4473 Also, the assembler generates stabs labels that need
4474 not be aligned: FAKE_LABEL_NAME . {"F", "L", "endfunc"}. */
4477 is_unaligned_label (symbolS
*sym
)
4479 const char *name
= S_GET_NAME (sym
);
4480 static size_t fake_size
= 0;
4484 && name
[1] == 'L' && (name
[2] == 'n' || name
[2] == 'M'))
4487 /* FAKE_LABEL_NAME followed by "F", "L" or "endfunc" */
4489 fake_size
= strlen (FAKE_LABEL_NAME
);
4492 && strncmp (FAKE_LABEL_NAME
, name
, fake_size
) == 0
4493 && (name
[fake_size
] == 'F'
4494 || name
[fake_size
] == 'L'
4495 || (name
[fake_size
] == 'e'
4496 && strncmp ("endfunc", name
+fake_size
, 7) == 0)))
4504 next_non_empty_frag (const fragS
*fragP
)
4506 fragS
*next_fragP
= fragP
->fr_next
;
4508 /* Sometimes an empty will end up here due storage allocation issues.
4509 So we have to skip until we find something legit. */
4510 while (next_fragP
&& next_fragP
->fr_fix
== 0)
4511 next_fragP
= next_fragP
->fr_next
;
4513 if (next_fragP
== NULL
|| next_fragP
->fr_fix
== 0)
4521 next_frag_opcode_is_loop (const fragS
*fragP
, xtensa_opcode
*opcode
)
4523 xtensa_opcode out_opcode
;
4524 const fragS
*next_fragP
= next_non_empty_frag (fragP
);
4526 if (next_fragP
== NULL
)
4529 out_opcode
= get_opcode_from_buf (next_fragP
->fr_literal
, 0);
4530 if (xtensa_opcode_is_loop (xtensa_default_isa
, out_opcode
) == 1)
4532 *opcode
= out_opcode
;
4540 frag_format_size (const fragS
*fragP
)
4542 static xtensa_insnbuf insnbuf
= NULL
;
4543 xtensa_isa isa
= xtensa_default_isa
;
4548 insnbuf
= xtensa_insnbuf_alloc (isa
);
4551 return XTENSA_UNDEFINED
;
4553 xtensa_insnbuf_from_chars (isa
, insnbuf
,
4554 (unsigned char *) fragP
->fr_literal
, 0);
4556 fmt
= xtensa_format_decode (isa
, insnbuf
);
4557 if (fmt
== XTENSA_UNDEFINED
)
4558 return XTENSA_UNDEFINED
;
4559 fmt_size
= xtensa_format_length (isa
, fmt
);
4561 /* If the next format won't be changing due to relaxation, just
4562 return the length of the first format. */
4563 if (fragP
->fr_opcode
!= fragP
->fr_literal
)
4566 /* If during relaxation we have to pull an instruction out of a
4567 multi-slot instruction, we will return the more conservative
4568 number. This works because alignment on bigger instructions
4569 is more restrictive than alignment on smaller instructions.
4570 This is more conservative than we would like, but it happens
4573 if (xtensa_format_num_slots (xtensa_default_isa
, fmt
) > 1)
4576 /* If we aren't doing one of our own relaxations or it isn't
4577 slot-based, then the insn size won't change. */
4578 if (fragP
->fr_type
!= rs_machine_dependent
)
4580 if (fragP
->fr_subtype
!= RELAX_SLOTS
)
4583 /* If an instruction is about to grow, return the longer size. */
4584 if (fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_IMMED_STEP1
4585 || fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_IMMED_STEP2
4586 || fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_IMMED_STEP3
)
4588 /* For most frags at RELAX_IMMED_STEPX, with X > 0, the first
4589 instruction in the relaxed version is of length 3. (The case
4590 where we have to pull the instruction out of a FLIX bundle
4591 is handled conservatively above.) However, frags with opcodes
4592 that are expanding to wide branches end up having formats that
4593 are not determinable by the RELAX_IMMED_STEPX enumeration, and
4594 we can't tell directly what format the relaxer picked. This
4595 is a wart in the design of the relaxer that should someday be
4596 fixed, but would require major changes, or at least should
4597 be accompanied by major changes to make use of that data.
4599 In any event, we can tell that we are expanding from a single-slot
4600 format to a wider one with the logic below. */
4603 int relaxed_size
= fmt_size
+ fragP
->tc_frag_data
.text_expansion
[0];
4605 for (i
= 0; i
< xtensa_isa_num_formats (isa
); i
++)
4607 if (relaxed_size
== xtensa_format_length (isa
, i
))
4608 return relaxed_size
;
4614 if (fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_NARROW
)
4615 return 2 + fragP
->tc_frag_data
.text_expansion
[0];
4622 next_frag_format_size (const fragS
*fragP
)
4624 const fragS
*next_fragP
= next_non_empty_frag (fragP
);
4625 return frag_format_size (next_fragP
);
4629 /* In early Xtensa Processors, for reasons that are unclear, the ISA
4630 required two-byte instructions to be treated as three-byte instructions
4631 for loop instruction alignment. This restriction was removed beginning
4632 with Xtensa LX. Now the only requirement on loop instruction alignment
4633 is that the first instruction of the loop must appear at an address that
4634 does not cross a fetch boundary. */
4637 get_loop_align_size (int insn_size
)
4639 if (insn_size
== XTENSA_UNDEFINED
)
4640 return xtensa_fetch_width
;
4642 if (enforce_three_byte_loop_align
&& insn_size
== 2)
4649 /* If the next legit fragment is an end-of-loop marker,
4650 switch its state so it will instantiate a NOP. */
4653 update_next_frag_state (fragS
*fragP
)
4655 fragS
*next_fragP
= fragP
->fr_next
;
4656 fragS
*new_target
= NULL
;
4660 /* We are guaranteed there will be one of these... */
4661 while (!(next_fragP
->fr_type
== rs_machine_dependent
4662 && (next_fragP
->fr_subtype
== RELAX_MAYBE_UNREACHABLE
4663 || next_fragP
->fr_subtype
== RELAX_UNREACHABLE
)))
4664 next_fragP
= next_fragP
->fr_next
;
4666 gas_assert (next_fragP
->fr_type
== rs_machine_dependent
4667 && (next_fragP
->fr_subtype
== RELAX_MAYBE_UNREACHABLE
4668 || next_fragP
->fr_subtype
== RELAX_UNREACHABLE
));
4670 /* ...and one of these. */
4671 new_target
= next_fragP
->fr_next
;
4672 while (!(new_target
->fr_type
== rs_machine_dependent
4673 && (new_target
->fr_subtype
== RELAX_MAYBE_DESIRE_ALIGN
4674 || new_target
->fr_subtype
== RELAX_DESIRE_ALIGN
)))
4675 new_target
= new_target
->fr_next
;
4677 gas_assert (new_target
->fr_type
== rs_machine_dependent
4678 && (new_target
->fr_subtype
== RELAX_MAYBE_DESIRE_ALIGN
4679 || new_target
->fr_subtype
== RELAX_DESIRE_ALIGN
));
4682 while (next_fragP
&& next_fragP
->fr_fix
== 0)
4684 if (next_fragP
->fr_type
== rs_machine_dependent
4685 && next_fragP
->fr_subtype
== RELAX_LOOP_END
)
4687 next_fragP
->fr_subtype
= RELAX_LOOP_END_ADD_NOP
;
4691 next_fragP
= next_fragP
->fr_next
;
4697 next_frag_is_branch_target (const fragS
*fragP
)
4699 /* Sometimes an empty will end up here due to storage allocation issues,
4700 so we have to skip until we find something legit. */
4701 for (fragP
= fragP
->fr_next
; fragP
; fragP
= fragP
->fr_next
)
4703 if (fragP
->tc_frag_data
.is_branch_target
)
4705 if (fragP
->fr_fix
!= 0)
4713 next_frag_is_loop_target (const fragS
*fragP
)
4715 /* Sometimes an empty will end up here due storage allocation issues.
4716 So we have to skip until we find something legit. */
4717 for (fragP
= fragP
->fr_next
; fragP
; fragP
= fragP
->fr_next
)
4719 if (fragP
->tc_frag_data
.is_loop_target
)
4721 if (fragP
->fr_fix
!= 0)
4728 /* As specified in the relaxation table, when a loop instruction is
4729 relaxed, there are 24 bytes between the loop instruction itself and
4730 the first instruction in the loop. */
4732 #define RELAXED_LOOP_INSN_BYTES 24
4735 next_frag_pre_opcode_bytes (const fragS
*fragp
)
4737 const fragS
*next_fragp
= fragp
->fr_next
;
4738 xtensa_opcode next_opcode
;
4740 if (!next_frag_opcode_is_loop (fragp
, &next_opcode
))
4743 /* Sometimes an empty will end up here due to storage allocation issues,
4744 so we have to skip until we find something legit. */
4745 while (next_fragp
->fr_fix
== 0)
4746 next_fragp
= next_fragp
->fr_next
;
4748 if (next_fragp
->fr_type
!= rs_machine_dependent
)
4751 /* There is some implicit knowledge encoded in here.
4752 The LOOP instructions that are NOT RELAX_IMMED have
4753 been relaxed. Note that we can assume that the LOOP
4754 instruction is in slot 0 because loops aren't bundleable. */
4755 if (next_fragp
->tc_frag_data
.slot_subtypes
[0] > RELAX_IMMED
)
4756 return get_expanded_loop_offset (next_opcode
) + RELAXED_LOOP_INSN_BYTES
;
4762 /* Mark a location where we can later insert literal frags. Update
4763 the section's literal_pool_loc, so subsequent literals can be
4764 placed nearest to their use. */
4767 xtensa_mark_literal_pool_location (void)
4769 /* Any labels pointing to the current location need
4770 to be adjusted to after the literal pool. */
4772 fragS
*pool_location
;
4774 if (use_literal_section
)
4777 /* We stash info in these frags so we can later move the literal's
4778 fixes into this frchain's fix list. */
4779 pool_location
= frag_now
;
4780 frag_now
->tc_frag_data
.lit_frchain
= frchain_now
;
4781 frag_now
->tc_frag_data
.literal_frag
= frag_now
;
4782 /* Just record this frag. */
4783 xtensa_maybe_create_literal_pool_frag (FALSE
, FALSE
);
4784 frag_variant (rs_machine_dependent
, 0, 0,
4785 RELAX_LITERAL_POOL_BEGIN
, NULL
, 0, NULL
);
4786 xtensa_set_frag_assembly_state (frag_now
);
4787 frag_now
->tc_frag_data
.lit_seg
= now_seg
;
4788 frag_variant (rs_machine_dependent
, 0, 0,
4789 RELAX_LITERAL_POOL_END
, NULL
, 0, NULL
);
4790 xtensa_set_frag_assembly_state (frag_now
);
4792 /* Now put a frag into the literal pool that points to this location. */
4793 set_literal_pool_location (now_seg
, pool_location
);
4794 xtensa_switch_to_non_abs_literal_fragment (&s
);
4795 frag_align (2, 0, 0);
4796 record_alignment (now_seg
, 2);
4798 /* Close whatever frag is there. */
4799 frag_variant (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
4800 xtensa_set_frag_assembly_state (frag_now
);
4801 frag_now
->tc_frag_data
.literal_frag
= pool_location
;
4802 frag_variant (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
4803 xtensa_restore_emit_state (&s
);
4804 xtensa_set_frag_assembly_state (frag_now
);
4808 /* Build a nop of the correct size into tinsn. */
4811 build_nop (TInsn
*tinsn
, int size
)
4817 tinsn
->opcode
= xtensa_nop_n_opcode
;
4819 if (tinsn
->opcode
== XTENSA_UNDEFINED
)
4820 as_fatal (_("opcode 'NOP.N' unavailable in this configuration"));
4824 if (xtensa_nop_opcode
== XTENSA_UNDEFINED
)
4826 tinsn
->opcode
= xtensa_or_opcode
;
4827 set_expr_const (&tinsn
->tok
[0], 1);
4828 set_expr_const (&tinsn
->tok
[1], 1);
4829 set_expr_const (&tinsn
->tok
[2], 1);
4833 tinsn
->opcode
= xtensa_nop_opcode
;
4835 gas_assert (tinsn
->opcode
!= XTENSA_UNDEFINED
);
4840 /* Assemble a NOP of the requested size in the buffer. User must have
4841 allocated "buf" with at least "size" bytes. */
4844 assemble_nop (int size
, char *buf
)
4846 static xtensa_insnbuf insnbuf
= NULL
;
4849 build_nop (&tinsn
, size
);
4852 insnbuf
= xtensa_insnbuf_alloc (xtensa_default_isa
);
4854 tinsn_to_insnbuf (&tinsn
, insnbuf
);
4855 xtensa_insnbuf_to_chars (xtensa_default_isa
, insnbuf
,
4856 (unsigned char *) buf
, 0);
4860 /* Return the number of bytes for the offset of the expanded loop
4861 instruction. This should be incorporated into the relaxation
4862 specification but is hard-coded here. This is used to auto-align
4863 the loop instruction. It is invalid to call this function if the
4864 configuration does not have loops or if the opcode is not a loop
4868 get_expanded_loop_offset (xtensa_opcode opcode
)
4870 /* This is the OFFSET of the loop instruction in the expanded loop.
4871 This MUST correspond directly to the specification of the loop
4872 expansion. It will be validated on fragment conversion. */
4873 gas_assert (opcode
!= XTENSA_UNDEFINED
);
4874 if (opcode
== xtensa_loop_opcode
)
4876 if (opcode
== xtensa_loopnez_opcode
)
4878 if (opcode
== xtensa_loopgtz_opcode
)
4880 as_fatal (_("get_expanded_loop_offset: invalid opcode"));
4886 get_literal_pool_location (segT seg
)
4888 struct litpool_seg
*lps
= litpool_seg_list
.next
;
4889 struct litpool_frag
*lpf
;
4890 for ( ; lps
&& lps
->seg
->id
!= seg
->id
; lps
= lps
->next
)
4894 for (lpf
= lps
->frag_list
.prev
; lpf
->fragP
; lpf
= lpf
->prev
)
4895 { /* Skip "candidates" for now. */
4896 if (lpf
->fragP
->fr_subtype
== RELAX_LITERAL_POOL_BEGIN
&&
4900 /* Must convert a lower-priority pool. */
4901 for (lpf
= lps
->frag_list
.prev
; lpf
->fragP
; lpf
= lpf
->prev
)
4903 if (lpf
->fragP
->fr_subtype
== RELAX_LITERAL_POOL_BEGIN
)
4906 /* Still no match -- try for a low priority pool. */
4907 for (lpf
= lps
->frag_list
.prev
; lpf
->fragP
; lpf
= lpf
->prev
)
4909 if (lpf
->fragP
->fr_subtype
== RELAX_LITERAL_POOL_CANDIDATE_BEGIN
)
4913 return seg_info (seg
)->tc_segment_info_data
.literal_pool_loc
;
4918 set_literal_pool_location (segT seg
, fragS
*literal_pool_loc
)
4920 seg_info (seg
)->tc_segment_info_data
.literal_pool_loc
= literal_pool_loc
;
4924 /* Set frag assembly state should be called when a new frag is
4925 opened and after a frag has been closed. */
4928 xtensa_set_frag_assembly_state (fragS
*fragP
)
4930 if (!density_supported
)
4931 fragP
->tc_frag_data
.is_no_density
= TRUE
;
4933 /* This function is called from subsegs_finish, which is called
4934 after xtensa_end, so we can't use "use_transform" or
4935 "use_schedule" here. */
4936 if (!directive_state
[directive_transform
])
4937 fragP
->tc_frag_data
.is_no_transform
= TRUE
;
4938 if (directive_state
[directive_longcalls
])
4939 fragP
->tc_frag_data
.use_longcalls
= TRUE
;
4940 fragP
->tc_frag_data
.use_absolute_literals
=
4941 directive_state
[directive_absolute_literals
];
4942 fragP
->tc_frag_data
.is_assembly_state_set
= TRUE
;
4947 relaxable_section (asection
*sec
)
4949 return ((sec
->flags
& SEC_DEBUGGING
) == 0
4950 && strcmp (sec
->name
, ".eh_frame") != 0);
4955 xtensa_mark_frags_for_org (void)
4959 /* Walk over each fragment of all of the current segments. If we find
4960 a .org frag in any of the segments, mark all frags prior to it as
4961 "no transform", which will prevent linker optimizations from messing
4962 up the .org distance. This should be done after
4963 xtensa_find_unmarked_state_frags, because we don't want to worry here
4964 about that function trashing the data we save here. */
4966 for (seclist
= &stdoutput
->sections
;
4967 seclist
&& *seclist
;
4968 seclist
= &(*seclist
)->next
)
4970 segT sec
= *seclist
;
4971 segment_info_type
*seginfo
;
4974 flags
= bfd_get_section_flags (stdoutput
, sec
);
4975 if (flags
& SEC_DEBUGGING
)
4977 if (!(flags
& SEC_ALLOC
))
4980 seginfo
= seg_info (sec
);
4981 if (seginfo
&& seginfo
->frchainP
)
4983 fragS
*last_fragP
= seginfo
->frchainP
->frch_root
;
4984 for (fragP
= seginfo
->frchainP
->frch_root
; fragP
;
4985 fragP
= fragP
->fr_next
)
4987 /* cvt_frag_to_fill has changed the fr_type of org frags to
4988 rs_fill, so use the value as cached in rs_subtype here. */
4989 if (fragP
->fr_subtype
== RELAX_ORG
)
4991 while (last_fragP
!= fragP
->fr_next
)
4993 last_fragP
->tc_frag_data
.is_no_transform
= TRUE
;
4994 last_fragP
= last_fragP
->fr_next
;
5004 xtensa_find_unmarked_state_frags (void)
5008 /* Walk over each fragment of all of the current segments. For each
5009 unmarked fragment, mark it with the same info as the previous
5011 for (seclist
= &stdoutput
->sections
;
5012 seclist
&& *seclist
;
5013 seclist
= &(*seclist
)->next
)
5015 segT sec
= *seclist
;
5016 segment_info_type
*seginfo
;
5019 flags
= bfd_get_section_flags (stdoutput
, sec
);
5020 if (flags
& SEC_DEBUGGING
)
5022 if (!(flags
& SEC_ALLOC
))
5025 seginfo
= seg_info (sec
);
5026 if (seginfo
&& seginfo
->frchainP
)
5028 fragS
*last_fragP
= 0;
5029 for (fragP
= seginfo
->frchainP
->frch_root
; fragP
;
5030 fragP
= fragP
->fr_next
)
5032 if (fragP
->fr_fix
!= 0
5033 && !fragP
->tc_frag_data
.is_assembly_state_set
)
5035 if (last_fragP
== 0)
5037 as_warn_where (fragP
->fr_file
, fragP
->fr_line
,
5038 _("assembly state not set for first frag in section %s"),
5043 fragP
->tc_frag_data
.is_assembly_state_set
= TRUE
;
5044 fragP
->tc_frag_data
.is_no_density
=
5045 last_fragP
->tc_frag_data
.is_no_density
;
5046 fragP
->tc_frag_data
.is_no_transform
=
5047 last_fragP
->tc_frag_data
.is_no_transform
;
5048 fragP
->tc_frag_data
.use_longcalls
=
5049 last_fragP
->tc_frag_data
.use_longcalls
;
5050 fragP
->tc_frag_data
.use_absolute_literals
=
5051 last_fragP
->tc_frag_data
.use_absolute_literals
;
5054 if (fragP
->tc_frag_data
.is_assembly_state_set
)
5063 xtensa_find_unaligned_branch_targets (bfd
*abfd ATTRIBUTE_UNUSED
,
5065 void *unused ATTRIBUTE_UNUSED
)
5067 flagword flags
= bfd_get_section_flags (abfd
, sec
);
5068 segment_info_type
*seginfo
= seg_info (sec
);
5069 fragS
*frag
= seginfo
->frchainP
->frch_root
;
5071 if (flags
& SEC_CODE
)
5073 xtensa_isa isa
= xtensa_default_isa
;
5074 xtensa_insnbuf insnbuf
= xtensa_insnbuf_alloc (isa
);
5075 while (frag
!= NULL
)
5077 if (frag
->tc_frag_data
.is_branch_target
)
5080 addressT branch_align
, frag_addr
;
5083 xtensa_insnbuf_from_chars
5084 (isa
, insnbuf
, (unsigned char *) frag
->fr_literal
, 0);
5085 fmt
= xtensa_format_decode (isa
, insnbuf
);
5086 op_size
= xtensa_format_length (isa
, fmt
);
5087 branch_align
= 1 << branch_align_power (sec
);
5088 frag_addr
= frag
->fr_address
% branch_align
;
5089 if (frag_addr
+ op_size
> branch_align
)
5090 as_warn_where (frag
->fr_file
, frag
->fr_line
,
5091 _("unaligned branch target: %d bytes at 0x%lx"),
5092 op_size
, (long) frag
->fr_address
);
5094 frag
= frag
->fr_next
;
5096 xtensa_insnbuf_free (isa
, insnbuf
);
5102 xtensa_find_unaligned_loops (bfd
*abfd ATTRIBUTE_UNUSED
,
5104 void *unused ATTRIBUTE_UNUSED
)
5106 flagword flags
= bfd_get_section_flags (abfd
, sec
);
5107 segment_info_type
*seginfo
= seg_info (sec
);
5108 fragS
*frag
= seginfo
->frchainP
->frch_root
;
5109 xtensa_isa isa
= xtensa_default_isa
;
5111 if (flags
& SEC_CODE
)
5113 xtensa_insnbuf insnbuf
= xtensa_insnbuf_alloc (isa
);
5114 while (frag
!= NULL
)
5116 if (frag
->tc_frag_data
.is_first_loop_insn
)
5122 if (frag
->fr_fix
== 0)
5123 frag
= next_non_empty_frag (frag
);
5127 xtensa_insnbuf_from_chars
5128 (isa
, insnbuf
, (unsigned char *) frag
->fr_literal
, 0);
5129 fmt
= xtensa_format_decode (isa
, insnbuf
);
5130 op_size
= xtensa_format_length (isa
, fmt
);
5131 frag_addr
= frag
->fr_address
% xtensa_fetch_width
;
5133 if (frag_addr
+ op_size
> xtensa_fetch_width
)
5134 as_warn_where (frag
->fr_file
, frag
->fr_line
,
5135 _("unaligned loop: %d bytes at 0x%lx"),
5136 op_size
, (long) frag
->fr_address
);
5139 frag
= frag
->fr_next
;
5141 xtensa_insnbuf_free (isa
, insnbuf
);
5147 xg_apply_fix_value (fixS
*fixP
, valueT val
)
5149 xtensa_isa isa
= xtensa_default_isa
;
5150 static xtensa_insnbuf insnbuf
= NULL
;
5151 static xtensa_insnbuf slotbuf
= NULL
;
5154 bfd_boolean alt_reloc
;
5155 xtensa_opcode opcode
;
5156 char *const fixpos
= fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
;
5158 if (decode_reloc (fixP
->fx_r_type
, &slot
, &alt_reloc
)
5160 as_fatal (_("unexpected fix"));
5164 insnbuf
= xtensa_insnbuf_alloc (isa
);
5165 slotbuf
= xtensa_insnbuf_alloc (isa
);
5168 xtensa_insnbuf_from_chars (isa
, insnbuf
, (unsigned char *) fixpos
, 0);
5169 fmt
= xtensa_format_decode (isa
, insnbuf
);
5170 if (fmt
== XTENSA_UNDEFINED
)
5171 as_fatal (_("undecodable fix"));
5172 xtensa_format_get_slot (isa
, fmt
, slot
, insnbuf
, slotbuf
);
5173 opcode
= xtensa_opcode_decode (isa
, fmt
, slot
, slotbuf
);
5174 if (opcode
== XTENSA_UNDEFINED
)
5175 as_fatal (_("undecodable fix"));
5177 /* CONST16 immediates are not PC-relative, despite the fact that we
5178 reuse the normal PC-relative operand relocations for the low part
5179 of a CONST16 operand. */
5180 if (opcode
== xtensa_const16_opcode
)
5183 xtensa_insnbuf_set_operand (slotbuf
, fmt
, slot
, opcode
,
5184 get_relaxable_immed (opcode
), val
,
5185 fixP
->fx_file
, fixP
->fx_line
);
5187 xtensa_format_set_slot (isa
, fmt
, slot
, insnbuf
, slotbuf
);
5188 xtensa_insnbuf_to_chars (isa
, insnbuf
, (unsigned char *) fixpos
, 0);
5194 /* External Functions and Other GAS Hooks. */
5197 xtensa_target_format (void)
5199 return (target_big_endian
? "elf32-xtensa-be" : "elf32-xtensa-le");
5204 xtensa_file_arch_init (bfd
*abfd
)
5206 bfd_set_private_flags (abfd
, 0x100 | 0x200);
5211 md_number_to_chars (char *buf
, valueT val
, int n
)
5213 if (target_big_endian
)
5214 number_to_chars_bigendian (buf
, val
, n
);
5216 number_to_chars_littleendian (buf
, val
, n
);
5220 /* This function is called once, at assembler startup time. It should
5221 set up all the tables, etc. that the MD part of the assembler will
5227 segT current_section
= now_seg
;
5228 int current_subsec
= now_subseg
;
5232 xtensa_default_isa
= xtensa_isa_init (0, 0);
5233 isa
= xtensa_default_isa
;
5237 /* Set up the literal sections. */
5238 memset (&default_lit_sections
, 0, sizeof (default_lit_sections
));
5240 subseg_set (current_section
, current_subsec
);
5242 xtensa_addi_opcode
= xtensa_opcode_lookup (isa
, "addi");
5243 xtensa_addmi_opcode
= xtensa_opcode_lookup (isa
, "addmi");
5244 xtensa_call0_opcode
= xtensa_opcode_lookup (isa
, "call0");
5245 xtensa_call4_opcode
= xtensa_opcode_lookup (isa
, "call4");
5246 xtensa_call8_opcode
= xtensa_opcode_lookup (isa
, "call8");
5247 xtensa_call12_opcode
= xtensa_opcode_lookup (isa
, "call12");
5248 xtensa_callx0_opcode
= xtensa_opcode_lookup (isa
, "callx0");
5249 xtensa_callx4_opcode
= xtensa_opcode_lookup (isa
, "callx4");
5250 xtensa_callx8_opcode
= xtensa_opcode_lookup (isa
, "callx8");
5251 xtensa_callx12_opcode
= xtensa_opcode_lookup (isa
, "callx12");
5252 xtensa_const16_opcode
= xtensa_opcode_lookup (isa
, "const16");
5253 xtensa_entry_opcode
= xtensa_opcode_lookup (isa
, "entry");
5254 xtensa_extui_opcode
= xtensa_opcode_lookup (isa
, "extui");
5255 xtensa_movi_opcode
= xtensa_opcode_lookup (isa
, "movi");
5256 xtensa_movi_n_opcode
= xtensa_opcode_lookup (isa
, "movi.n");
5257 xtensa_isync_opcode
= xtensa_opcode_lookup (isa
, "isync");
5258 xtensa_j_opcode
= xtensa_opcode_lookup (isa
, "j");
5259 xtensa_jx_opcode
= xtensa_opcode_lookup (isa
, "jx");
5260 xtensa_l32r_opcode
= xtensa_opcode_lookup (isa
, "l32r");
5261 xtensa_loop_opcode
= xtensa_opcode_lookup (isa
, "loop");
5262 xtensa_loopnez_opcode
= xtensa_opcode_lookup (isa
, "loopnez");
5263 xtensa_loopgtz_opcode
= xtensa_opcode_lookup (isa
, "loopgtz");
5264 xtensa_nop_opcode
= xtensa_opcode_lookup (isa
, "nop");
5265 xtensa_nop_n_opcode
= xtensa_opcode_lookup (isa
, "nop.n");
5266 xtensa_or_opcode
= xtensa_opcode_lookup (isa
, "or");
5267 xtensa_ret_opcode
= xtensa_opcode_lookup (isa
, "ret");
5268 xtensa_ret_n_opcode
= xtensa_opcode_lookup (isa
, "ret.n");
5269 xtensa_retw_opcode
= xtensa_opcode_lookup (isa
, "retw");
5270 xtensa_retw_n_opcode
= xtensa_opcode_lookup (isa
, "retw.n");
5271 xtensa_rsr_lcount_opcode
= xtensa_opcode_lookup (isa
, "rsr.lcount");
5272 xtensa_waiti_opcode
= xtensa_opcode_lookup (isa
, "waiti");
5274 for (i
= 0; i
< xtensa_isa_num_formats (isa
); i
++)
5276 int format_slots
= xtensa_format_num_slots (isa
, i
);
5277 if (format_slots
> config_max_slots
)
5278 config_max_slots
= format_slots
;
5281 xg_init_vinsn (&cur_vinsn
);
5283 xtensa_num_pipe_stages
= xtensa_isa_num_pipe_stages (isa
);
5285 init_op_placement_info_table ();
5287 /* Set up the assembly state. */
5288 if (!frag_now
->tc_frag_data
.is_assembly_state_set
)
5289 xtensa_set_frag_assembly_state (frag_now
);
5293 /* TC_INIT_FIX_DATA hook */
5296 xtensa_init_fix_data (fixS
*x
)
5298 x
->tc_fix_data
.slot
= 0;
5299 x
->tc_fix_data
.X_add_symbol
= NULL
;
5300 x
->tc_fix_data
.X_add_number
= 0;
5304 /* tc_frob_label hook */
5307 xtensa_frob_label (symbolS
*sym
)
5311 if (cur_vinsn
.inside_bundle
)
5313 as_bad (_("labels are not valid inside bundles"));
5317 freq
= get_subseg_target_freq (now_seg
, now_subseg
);
5319 /* Since the label was already attached to a frag associated with the
5320 previous basic block, it now needs to be reset to the current frag. */
5321 symbol_set_frag (sym
, frag_now
);
5322 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
5324 if (generating_literals
)
5325 xtensa_add_literal_sym (sym
);
5327 xtensa_add_insn_label (sym
);
5329 if (symbol_get_tc (sym
)->is_loop_target
)
5331 if ((get_last_insn_flags (now_seg
, now_subseg
)
5332 & FLAG_IS_BAD_LOOPEND
) != 0)
5333 as_bad (_("invalid last instruction for a zero-overhead loop"));
5335 xtensa_set_frag_assembly_state (frag_now
);
5336 frag_var (rs_machine_dependent
, 4, 4, RELAX_LOOP_END
,
5337 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
5339 xtensa_set_frag_assembly_state (frag_now
);
5340 xtensa_move_labels (frag_now
, 0);
5343 /* No target aligning in the absolute section. */
5344 if (now_seg
!= absolute_section
5345 && !is_unaligned_label (sym
)
5346 && !generating_literals
)
5348 xtensa_set_frag_assembly_state (frag_now
);
5350 if (do_align_targets ())
5351 frag_var (rs_machine_dependent
, 0, (int) freq
,
5352 RELAX_DESIRE_ALIGN_IF_TARGET
, frag_now
->fr_symbol
,
5353 frag_now
->fr_offset
, NULL
);
5355 frag_var (rs_fill
, 0, 0, frag_now
->fr_subtype
,
5356 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
5357 xtensa_set_frag_assembly_state (frag_now
);
5358 xtensa_move_labels (frag_now
, 0);
5361 /* We need to mark the following properties even if we aren't aligning. */
5363 /* If the label is already known to be a branch target, i.e., a
5364 forward branch, mark the frag accordingly. Backward branches
5365 are handled by xg_add_branch_and_loop_targets. */
5366 if (symbol_get_tc (sym
)->is_branch_target
)
5367 symbol_get_frag (sym
)->tc_frag_data
.is_branch_target
= TRUE
;
5369 /* Loops only go forward, so they can be identified here. */
5370 if (symbol_get_tc (sym
)->is_loop_target
)
5371 symbol_get_frag (sym
)->tc_frag_data
.is_loop_target
= TRUE
;
5373 dwarf2_emit_label (sym
);
5377 /* tc_unrecognized_line hook */
5380 xtensa_unrecognized_line (int ch
)
5385 if (cur_vinsn
.inside_bundle
== 0)
5387 /* PR8110: Cannot emit line number info inside a FLIX bundle
5388 when using --gstabs. Temporarily disable debug info. */
5389 generate_lineno_debug ();
5390 if (debug_type
== DEBUG_STABS
)
5392 xt_saved_debug_type
= debug_type
;
5393 debug_type
= DEBUG_NONE
;
5396 cur_vinsn
.inside_bundle
= 1;
5400 as_bad (_("extra opening brace"));
5406 if (cur_vinsn
.inside_bundle
)
5407 finish_vinsn (&cur_vinsn
);
5410 as_bad (_("extra closing brace"));
5415 as_bad (_("syntax error"));
5422 /* md_flush_pending_output hook */
5425 xtensa_flush_pending_output (void)
5427 /* This line fixes a bug where automatically generated gstabs info
5428 separates a function label from its entry instruction, ending up
5429 with the literal position between the function label and the entry
5430 instruction and crashing code. It only happens with --gstabs and
5431 --text-section-literals, and when several other obscure relaxation
5432 conditions are met. */
5433 if (outputting_stabs_line_debug
)
5436 if (cur_vinsn
.inside_bundle
)
5437 as_bad (_("missing closing brace"));
5439 /* If there is a non-zero instruction fragment, close it. */
5440 if (frag_now_fix () != 0 && frag_now
->tc_frag_data
.is_insn
)
5442 frag_wane (frag_now
);
5444 xtensa_set_frag_assembly_state (frag_now
);
5446 frag_now
->tc_frag_data
.is_insn
= FALSE
;
5448 xtensa_clear_insn_labels ();
5452 /* We had an error while parsing an instruction. The string might look
5453 like this: "insn arg1, arg2 }". If so, we need to see the closing
5454 brace and reset some fields. Otherwise, the vinsn never gets closed
5455 and the num_slots field will grow past the end of the array of slots,
5456 and bad things happen. */
5459 error_reset_cur_vinsn (void)
5461 if (cur_vinsn
.inside_bundle
)
5463 if (*input_line_pointer
== '}'
5464 || *(input_line_pointer
- 1) == '}'
5465 || *(input_line_pointer
- 2) == '}')
5466 xg_clear_vinsn (&cur_vinsn
);
5472 md_assemble (char *str
)
5474 xtensa_isa isa
= xtensa_default_isa
;
5477 bfd_boolean has_underbar
= FALSE
;
5478 char *arg_strings
[MAX_INSN_ARGS
];
5480 TInsn orig_insn
; /* Original instruction from the input. */
5482 tinsn_init (&orig_insn
);
5484 /* Split off the opcode. */
5485 opnamelen
= strspn (str
, "abcdefghijklmnopqrstuvwxyz_/0123456789.");
5486 opname
= xstrndup (str
, opnamelen
);
5488 num_args
= tokenize_arguments (arg_strings
, str
+ opnamelen
);
5491 as_bad (_("syntax error"));
5495 if (xg_translate_idioms (&opname
, &num_args
, arg_strings
))
5498 /* Check for an underbar prefix. */
5501 has_underbar
= TRUE
;
5505 orig_insn
.insn_type
= ITYPE_INSN
;
5507 orig_insn
.is_specific_opcode
= (has_underbar
|| !use_transform ());
5508 orig_insn
.opcode
= xtensa_opcode_lookup (isa
, opname
);
5510 /* Special case: Check for "CALLXn.TLS" pseudo op. If found, grab its
5511 extra argument and set the opcode to "CALLXn". */
5512 if (orig_insn
.opcode
== XTENSA_UNDEFINED
5513 && strncasecmp (opname
, "callx", 5) == 0)
5515 unsigned long window_size
;
5518 window_size
= strtoul (opname
+ 5, &suffix
, 10);
5519 if (suffix
!= opname
+ 5
5520 && (window_size
== 0
5523 || window_size
== 12)
5524 && strcasecmp (suffix
, ".tls") == 0)
5526 switch (window_size
)
5528 case 0: orig_insn
.opcode
= xtensa_callx0_opcode
; break;
5529 case 4: orig_insn
.opcode
= xtensa_callx4_opcode
; break;
5530 case 8: orig_insn
.opcode
= xtensa_callx8_opcode
; break;
5531 case 12: orig_insn
.opcode
= xtensa_callx12_opcode
; break;
5535 as_bad (_("wrong number of operands for '%s'"), opname
);
5538 bfd_reloc_code_real_type reloc
;
5539 char *old_input_line_pointer
;
5540 expressionS
*tok
= &orig_insn
.extra_arg
;
5542 old_input_line_pointer
= input_line_pointer
;
5543 input_line_pointer
= arg_strings
[num_args
- 1];
5546 if (tok
->X_op
== O_symbol
5547 && ((reloc
= xtensa_elf_suffix (&input_line_pointer
, tok
))
5548 == BFD_RELOC_XTENSA_TLS_CALL
))
5549 tok
->X_op
= map_suffix_reloc_to_operator (reloc
);
5551 as_bad (_("bad relocation expression for '%s'"), opname
);
5553 input_line_pointer
= old_input_line_pointer
;
5559 /* Special case: Check for "j.l" pseudo op. */
5560 if (orig_insn
.opcode
== XTENSA_UNDEFINED
5561 && strncasecmp (opname
, "j.l", 3) == 0)
5564 as_bad (_("wrong number of operands for '%s'"), opname
);
5567 char *old_input_line_pointer
;
5568 expressionS
*tok
= &orig_insn
.extra_arg
;
5570 old_input_line_pointer
= input_line_pointer
;
5571 input_line_pointer
= arg_strings
[num_args
- 1];
5573 expression_maybe_register (xtensa_jx_opcode
, 0, tok
);
5574 input_line_pointer
= old_input_line_pointer
;
5577 orig_insn
.opcode
= xtensa_j_opcode
;
5581 if (orig_insn
.opcode
== XTENSA_UNDEFINED
)
5583 xtensa_format fmt
= xtensa_format_lookup (isa
, opname
);
5584 if (fmt
== XTENSA_UNDEFINED
)
5586 as_bad (_("unknown opcode or format name '%s'"), opname
);
5587 error_reset_cur_vinsn ();
5590 if (!cur_vinsn
.inside_bundle
)
5592 as_bad (_("format names only valid inside bundles"));
5593 error_reset_cur_vinsn ();
5596 if (cur_vinsn
.format
!= XTENSA_UNDEFINED
)
5597 as_warn (_("multiple formats specified for one bundle; using '%s'"),
5599 cur_vinsn
.format
= fmt
;
5600 free (has_underbar
? opname
- 1 : opname
);
5601 error_reset_cur_vinsn ();
5605 /* Parse the arguments. */
5606 if (parse_arguments (&orig_insn
, num_args
, arg_strings
))
5608 as_bad (_("syntax error"));
5609 error_reset_cur_vinsn ();
5613 /* Free the opcode and argument strings, now that they've been parsed. */
5614 free (has_underbar
? opname
- 1 : opname
);
5616 while (num_args
-- > 0)
5617 free (arg_strings
[num_args
]);
5619 /* Get expressions for invisible operands. */
5620 if (get_invisible_operands (&orig_insn
))
5622 error_reset_cur_vinsn ();
5626 /* Check for the right number and type of arguments. */
5627 if (tinsn_check_arguments (&orig_insn
))
5629 error_reset_cur_vinsn ();
5633 /* Record the line number for each TInsn, because a FLIX bundle may be
5634 spread across multiple input lines and individual instructions may be
5635 moved around in some cases. */
5636 orig_insn
.loc_directive_seen
= dwarf2_loc_directive_seen
;
5637 dwarf2_where (&orig_insn
.debug_line
);
5638 dwarf2_consume_line_info ();
5640 xg_add_branch_and_loop_targets (&orig_insn
);
5642 /* Check that immediate value for ENTRY is >= 16. */
5643 if (orig_insn
.opcode
== xtensa_entry_opcode
&& orig_insn
.ntok
>= 3)
5645 expressionS
*exp
= &orig_insn
.tok
[2];
5646 if (exp
->X_op
== O_constant
&& exp
->X_add_number
< 16)
5647 as_warn (_("entry instruction with stack decrement < 16"));
5651 assemble_tokens (opcode, tok, ntok);
5652 expand the tokens from the orig_insn into the
5653 stack of instructions that will not expand
5654 unless required at relaxation time. */
5656 if (!cur_vinsn
.inside_bundle
)
5657 emit_single_op (&orig_insn
);
5658 else /* We are inside a bundle. */
5660 cur_vinsn
.slots
[cur_vinsn
.num_slots
] = orig_insn
;
5661 cur_vinsn
.num_slots
++;
5662 if (*input_line_pointer
== '}'
5663 || *(input_line_pointer
- 1) == '}'
5664 || *(input_line_pointer
- 2) == '}')
5665 finish_vinsn (&cur_vinsn
);
5668 /* We've just emitted a new instruction so clear the list of labels. */
5669 xtensa_clear_insn_labels ();
5671 xtensa_check_frag_count ();
5675 /* HANDLE_ALIGN hook */
5677 /* For a .align directive, we mark the previous block with the alignment
5678 information. This will be placed in the object file in the
5679 property section corresponding to this section. */
5682 xtensa_handle_align (fragS
*fragP
)
5685 && ! fragP
->tc_frag_data
.is_literal
5686 && (fragP
->fr_type
== rs_align
5687 || fragP
->fr_type
== rs_align_code
)
5688 && fragP
->fr_offset
> 0
5689 && now_seg
!= bss_section
)
5691 fragP
->tc_frag_data
.is_align
= TRUE
;
5692 fragP
->tc_frag_data
.alignment
= fragP
->fr_offset
;
5695 if (fragP
->fr_type
== rs_align_test
)
5698 count
= fragP
->fr_next
->fr_address
- fragP
->fr_address
- fragP
->fr_fix
;
5700 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
5701 _("unaligned entry instruction"));
5704 if (linkrelax
&& fragP
->fr_type
== rs_org
)
5705 fragP
->fr_subtype
= RELAX_ORG
;
5709 /* TC_FRAG_INIT hook */
5712 xtensa_frag_init (fragS
*frag
)
5714 xtensa_set_frag_assembly_state (frag
);
5719 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
5725 /* Round up a section size to the appropriate boundary. */
5728 md_section_align (segT segment ATTRIBUTE_UNUSED
, valueT size
)
5730 return size
; /* Byte alignment is fine. */
5735 md_pcrel_from (fixS
*fixP
)
5738 static xtensa_insnbuf insnbuf
= NULL
;
5739 static xtensa_insnbuf slotbuf
= NULL
;
5742 xtensa_opcode opcode
;
5745 xtensa_isa isa
= xtensa_default_isa
;
5746 valueT addr
= fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
5747 bfd_boolean alt_reloc
;
5749 if (fixP
->fx_r_type
== BFD_RELOC_XTENSA_ASM_EXPAND
)
5752 if (fixP
->fx_r_type
== BFD_RELOC_32_PCREL
)
5757 insnbuf
= xtensa_insnbuf_alloc (isa
);
5758 slotbuf
= xtensa_insnbuf_alloc (isa
);
5761 insn_p
= &fixP
->fx_frag
->fr_literal
[fixP
->fx_where
];
5762 xtensa_insnbuf_from_chars (isa
, insnbuf
, (unsigned char *) insn_p
, 0);
5763 fmt
= xtensa_format_decode (isa
, insnbuf
);
5765 if (fmt
== XTENSA_UNDEFINED
)
5766 as_fatal (_("bad instruction format"));
5768 if (decode_reloc (fixP
->fx_r_type
, &slot
, &alt_reloc
) != 0)
5769 as_fatal (_("invalid relocation"));
5771 xtensa_format_get_slot (isa
, fmt
, slot
, insnbuf
, slotbuf
);
5772 opcode
= xtensa_opcode_decode (isa
, fmt
, slot
, slotbuf
);
5774 /* Check for "alternate" relocations (operand not specified). None
5775 of the current uses for these are really PC-relative. */
5776 if (alt_reloc
|| opcode
== xtensa_const16_opcode
)
5778 if (opcode
!= xtensa_l32r_opcode
5779 && opcode
!= xtensa_const16_opcode
)
5780 as_fatal (_("invalid relocation for '%s' instruction"),
5781 xtensa_opcode_name (isa
, opcode
));
5785 opnum
= get_relaxable_immed (opcode
);
5787 if (xtensa_operand_is_PCrelative (isa
, opcode
, opnum
) != 1
5788 || xtensa_operand_do_reloc (isa
, opcode
, opnum
, &opnd_value
, addr
))
5790 as_bad_where (fixP
->fx_file
,
5792 _("invalid relocation for operand %d of '%s'"),
5793 opnum
, xtensa_opcode_name (isa
, opcode
));
5796 return 0 - opnd_value
;
5800 /* TC_FORCE_RELOCATION hook */
5803 xtensa_force_relocation (fixS
*fix
)
5805 switch (fix
->fx_r_type
)
5807 case BFD_RELOC_XTENSA_ASM_EXPAND
:
5808 case BFD_RELOC_XTENSA_SLOT0_ALT
:
5809 case BFD_RELOC_XTENSA_SLOT1_ALT
:
5810 case BFD_RELOC_XTENSA_SLOT2_ALT
:
5811 case BFD_RELOC_XTENSA_SLOT3_ALT
:
5812 case BFD_RELOC_XTENSA_SLOT4_ALT
:
5813 case BFD_RELOC_XTENSA_SLOT5_ALT
:
5814 case BFD_RELOC_XTENSA_SLOT6_ALT
:
5815 case BFD_RELOC_XTENSA_SLOT7_ALT
:
5816 case BFD_RELOC_XTENSA_SLOT8_ALT
:
5817 case BFD_RELOC_XTENSA_SLOT9_ALT
:
5818 case BFD_RELOC_XTENSA_SLOT10_ALT
:
5819 case BFD_RELOC_XTENSA_SLOT11_ALT
:
5820 case BFD_RELOC_XTENSA_SLOT12_ALT
:
5821 case BFD_RELOC_XTENSA_SLOT13_ALT
:
5822 case BFD_RELOC_XTENSA_SLOT14_ALT
:
5828 if (linkrelax
&& fix
->fx_addsy
5829 && relaxable_section (S_GET_SEGMENT (fix
->fx_addsy
)))
5832 return generic_force_reloc (fix
);
5836 /* TC_VALIDATE_FIX_SUB hook */
5839 xtensa_validate_fix_sub (fixS
*fix
)
5841 segT add_symbol_segment
, sub_symbol_segment
;
5843 /* The difference of two symbols should be resolved by the assembler when
5844 linkrelax is not set. If the linker may relax the section containing
5845 the symbols, then an Xtensa DIFF relocation must be generated so that
5846 the linker knows to adjust the difference value. */
5847 if (!linkrelax
|| fix
->fx_addsy
== NULL
)
5850 /* Make sure both symbols are in the same segment, and that segment is
5851 "normal" and relaxable. If the segment is not "normal", then the
5852 fix is not valid. If the segment is not "relaxable", then the fix
5853 should have been handled earlier. */
5854 add_symbol_segment
= S_GET_SEGMENT (fix
->fx_addsy
);
5855 if (! SEG_NORMAL (add_symbol_segment
) ||
5856 ! relaxable_section (add_symbol_segment
))
5858 sub_symbol_segment
= S_GET_SEGMENT (fix
->fx_subsy
);
5859 return (sub_symbol_segment
== add_symbol_segment
);
5863 /* NO_PSEUDO_DOT hook */
5865 /* This function has nothing to do with pseudo dots, but this is the
5866 nearest macro to where the check needs to take place. FIXME: This
5870 xtensa_check_inside_bundle (void)
5872 if (cur_vinsn
.inside_bundle
&& input_line_pointer
[-1] == '.')
5873 as_bad (_("directives are not valid inside bundles"));
5875 /* This function must always return FALSE because it is called via a
5876 macro that has nothing to do with bundling. */
5881 /* md_elf_section_change_hook */
5884 xtensa_elf_section_change_hook (void)
5886 /* Set up the assembly state. */
5887 if (!frag_now
->tc_frag_data
.is_assembly_state_set
)
5888 xtensa_set_frag_assembly_state (frag_now
);
5892 /* tc_fix_adjustable hook */
5895 xtensa_fix_adjustable (fixS
*fixP
)
5897 /* We need the symbol name for the VTABLE entries. */
5898 if (fixP
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
5899 || fixP
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
5906 /* tc_symbol_new_hook */
5908 symbolS
*expr_symbols
= NULL
;
5911 xtensa_symbol_new_hook (symbolS
*sym
)
5913 if (is_leb128_expr
&& S_GET_SEGMENT (sym
) == expr_section
)
5915 symbol_get_tc (sym
)->next_expr_symbol
= expr_symbols
;
5922 md_apply_fix (fixS
*fixP
, valueT
*valP
, segT seg
)
5924 char *const fixpos
= fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
;
5927 /* Subtracted symbols are only allowed for a few relocation types, and
5928 unless linkrelax is enabled, they should not make it to this point. */
5929 if (fixP
->fx_subsy
&& !(linkrelax
&& (fixP
->fx_r_type
== BFD_RELOC_32
5930 || fixP
->fx_r_type
== BFD_RELOC_16
5931 || fixP
->fx_r_type
== BFD_RELOC_8
)))
5932 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("expression too complex"));
5934 switch (fixP
->fx_r_type
)
5936 case BFD_RELOC_32_PCREL
:
5942 switch (fixP
->fx_r_type
)
5945 fixP
->fx_r_type
= BFD_RELOC_XTENSA_DIFF8
;
5946 fixP
->fx_signed
= 0;
5949 fixP
->fx_r_type
= BFD_RELOC_XTENSA_DIFF16
;
5950 fixP
->fx_signed
= 0;
5953 fixP
->fx_r_type
= BFD_RELOC_XTENSA_DIFF32
;
5954 fixP
->fx_signed
= 0;
5960 val
= (S_GET_VALUE (fixP
->fx_addsy
) + fixP
->fx_offset
5961 - S_GET_VALUE (fixP
->fx_subsy
));
5963 /* The difference value gets written out, and the DIFF reloc
5964 identifies the address of the subtracted symbol (i.e., the one
5965 with the lowest address). */
5967 fixP
->fx_offset
-= val
;
5968 fixP
->fx_subsy
= NULL
;
5970 else if (! fixP
->fx_addsy
)
5977 case BFD_RELOC_XTENSA_PLT
:
5978 md_number_to_chars (fixpos
, val
, fixP
->fx_size
);
5979 fixP
->fx_no_overflow
= 0; /* Use the standard overflow check. */
5982 case BFD_RELOC_XTENSA_TLSDESC_FN
:
5983 case BFD_RELOC_XTENSA_TLSDESC_ARG
:
5984 case BFD_RELOC_XTENSA_TLS_TPOFF
:
5985 case BFD_RELOC_XTENSA_TLS_DTPOFF
:
5986 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
5987 md_number_to_chars (fixpos
, 0, fixP
->fx_size
);
5988 fixP
->fx_no_overflow
= 0; /* Use the standard overflow check. */
5991 case BFD_RELOC_XTENSA_SLOT0_OP
:
5992 case BFD_RELOC_XTENSA_SLOT1_OP
:
5993 case BFD_RELOC_XTENSA_SLOT2_OP
:
5994 case BFD_RELOC_XTENSA_SLOT3_OP
:
5995 case BFD_RELOC_XTENSA_SLOT4_OP
:
5996 case BFD_RELOC_XTENSA_SLOT5_OP
:
5997 case BFD_RELOC_XTENSA_SLOT6_OP
:
5998 case BFD_RELOC_XTENSA_SLOT7_OP
:
5999 case BFD_RELOC_XTENSA_SLOT8_OP
:
6000 case BFD_RELOC_XTENSA_SLOT9_OP
:
6001 case BFD_RELOC_XTENSA_SLOT10_OP
:
6002 case BFD_RELOC_XTENSA_SLOT11_OP
:
6003 case BFD_RELOC_XTENSA_SLOT12_OP
:
6004 case BFD_RELOC_XTENSA_SLOT13_OP
:
6005 case BFD_RELOC_XTENSA_SLOT14_OP
:
6008 /* Write the tentative value of a PC-relative relocation to a
6009 local symbol into the instruction. The value will be ignored
6010 by the linker, and it makes the object file disassembly
6011 readable when all branch targets are encoded in relocations. */
6013 gas_assert (fixP
->fx_addsy
);
6014 if (S_GET_SEGMENT (fixP
->fx_addsy
) == seg
6015 && !S_FORCE_RELOC (fixP
->fx_addsy
, 1))
6017 val
= (S_GET_VALUE (fixP
->fx_addsy
) + fixP
->fx_offset
6018 - md_pcrel_from (fixP
));
6019 (void) xg_apply_fix_value (fixP
, val
);
6022 else if (! fixP
->fx_addsy
)
6025 if (xg_apply_fix_value (fixP
, val
))
6030 case BFD_RELOC_XTENSA_ASM_EXPAND
:
6031 case BFD_RELOC_XTENSA_TLS_FUNC
:
6032 case BFD_RELOC_XTENSA_TLS_ARG
:
6033 case BFD_RELOC_XTENSA_TLS_CALL
:
6034 case BFD_RELOC_XTENSA_SLOT0_ALT
:
6035 case BFD_RELOC_XTENSA_SLOT1_ALT
:
6036 case BFD_RELOC_XTENSA_SLOT2_ALT
:
6037 case BFD_RELOC_XTENSA_SLOT3_ALT
:
6038 case BFD_RELOC_XTENSA_SLOT4_ALT
:
6039 case BFD_RELOC_XTENSA_SLOT5_ALT
:
6040 case BFD_RELOC_XTENSA_SLOT6_ALT
:
6041 case BFD_RELOC_XTENSA_SLOT7_ALT
:
6042 case BFD_RELOC_XTENSA_SLOT8_ALT
:
6043 case BFD_RELOC_XTENSA_SLOT9_ALT
:
6044 case BFD_RELOC_XTENSA_SLOT10_ALT
:
6045 case BFD_RELOC_XTENSA_SLOT11_ALT
:
6046 case BFD_RELOC_XTENSA_SLOT12_ALT
:
6047 case BFD_RELOC_XTENSA_SLOT13_ALT
:
6048 case BFD_RELOC_XTENSA_SLOT14_ALT
:
6049 /* These all need to be resolved at link-time. Do nothing now. */
6052 case BFD_RELOC_VTABLE_INHERIT
:
6053 case BFD_RELOC_VTABLE_ENTRY
:
6058 as_bad (_("unhandled local relocation fix %s"),
6059 bfd_get_reloc_code_name (fixP
->fx_r_type
));
6065 md_atof (int type
, char *litP
, int *sizeP
)
6067 return ieee_md_atof (type
, litP
, sizeP
, target_big_endian
);
6072 md_estimate_size_before_relax (fragS
*fragP
, segT seg ATTRIBUTE_UNUSED
)
6074 return total_frag_text_expansion (fragP
);
6078 /* Translate internal representation of relocation info to BFD target
6082 tc_gen_reloc (asection
*section ATTRIBUTE_UNUSED
, fixS
*fixp
)
6086 reloc
= XNEW (arelent
);
6087 reloc
->sym_ptr_ptr
= XNEW (asymbol
*);
6088 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
6089 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
6091 /* Make sure none of our internal relocations make it this far.
6092 They'd better have been fully resolved by this point. */
6093 gas_assert ((int) fixp
->fx_r_type
> 0);
6095 reloc
->addend
= fixp
->fx_offset
;
6097 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
6098 if (reloc
->howto
== NULL
)
6100 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
6101 _("cannot represent `%s' relocation in object file"),
6102 bfd_get_reloc_code_name (fixp
->fx_r_type
));
6103 free (reloc
->sym_ptr_ptr
);
6108 if (!fixp
->fx_pcrel
!= !reloc
->howto
->pc_relative
)
6109 as_fatal (_("internal error; cannot generate `%s' relocation"),
6110 bfd_get_reloc_code_name (fixp
->fx_r_type
));
6116 /* Checks for resource conflicts between instructions. */
6118 /* The func unit stuff could be implemented as bit-vectors rather
6119 than the iterative approach here. If it ends up being too
6120 slow, we will switch it. */
6123 new_resource_table (void *data
,
6126 unit_num_copies_func uncf
,
6127 opcode_num_units_func onuf
,
6128 opcode_funcUnit_use_unit_func ouuf
,
6129 opcode_funcUnit_use_stage_func ousf
)
6132 resource_table
*rt
= XNEW (resource_table
);
6134 rt
->cycles
= cycles
;
6135 rt
->allocated_cycles
= cycles
;
6137 rt
->unit_num_copies
= uncf
;
6138 rt
->opcode_num_units
= onuf
;
6139 rt
->opcode_unit_use
= ouuf
;
6140 rt
->opcode_unit_stage
= ousf
;
6142 rt
->units
= XCNEWVEC (unsigned char *, cycles
);
6143 for (i
= 0; i
< cycles
; i
++)
6144 rt
->units
[i
] = XCNEWVEC (unsigned char, nu
);
6151 clear_resource_table (resource_table
*rt
)
6154 for (i
= 0; i
< rt
->allocated_cycles
; i
++)
6155 for (j
= 0; j
< rt
->num_units
; j
++)
6156 rt
->units
[i
][j
] = 0;
6160 /* We never shrink it, just fake it into thinking so. */
6163 resize_resource_table (resource_table
*rt
, int cycles
)
6167 rt
->cycles
= cycles
;
6168 if (cycles
<= rt
->allocated_cycles
)
6171 old_cycles
= rt
->allocated_cycles
;
6172 rt
->allocated_cycles
= cycles
;
6174 rt
->units
= XRESIZEVEC (unsigned char *, rt
->units
, rt
->allocated_cycles
);
6175 for (i
= 0; i
< old_cycles
; i
++)
6176 rt
->units
[i
] = XRESIZEVEC (unsigned char, rt
->units
[i
], rt
->num_units
);
6177 for (i
= old_cycles
; i
< cycles
; i
++)
6178 rt
->units
[i
] = XCNEWVEC (unsigned char, rt
->num_units
);
6183 resources_available (resource_table
*rt
, xtensa_opcode opcode
, int cycle
)
6186 int uses
= (rt
->opcode_num_units
) (rt
->data
, opcode
);
6188 for (i
= 0; i
< uses
; i
++)
6190 xtensa_funcUnit unit
= (rt
->opcode_unit_use
) (rt
->data
, opcode
, i
);
6191 int stage
= (rt
->opcode_unit_stage
) (rt
->data
, opcode
, i
);
6192 int copies_in_use
= rt
->units
[stage
+ cycle
][unit
];
6193 int copies
= (rt
->unit_num_copies
) (rt
->data
, unit
);
6194 if (copies_in_use
>= copies
)
6202 reserve_resources (resource_table
*rt
, xtensa_opcode opcode
, int cycle
)
6205 int uses
= (rt
->opcode_num_units
) (rt
->data
, opcode
);
6207 for (i
= 0; i
< uses
; i
++)
6209 xtensa_funcUnit unit
= (rt
->opcode_unit_use
) (rt
->data
, opcode
, i
);
6210 int stage
= (rt
->opcode_unit_stage
) (rt
->data
, opcode
, i
);
6211 /* Note that this allows resources to be oversubscribed. That's
6212 essential to the way the optional scheduler works.
6213 resources_available reports when a resource is over-subscribed,
6214 so it's easy to tell. */
6215 rt
->units
[stage
+ cycle
][unit
]++;
6221 release_resources (resource_table
*rt
, xtensa_opcode opcode
, int cycle
)
6224 int uses
= (rt
->opcode_num_units
) (rt
->data
, opcode
);
6226 for (i
= 0; i
< uses
; i
++)
6228 xtensa_funcUnit unit
= (rt
->opcode_unit_use
) (rt
->data
, opcode
, i
);
6229 int stage
= (rt
->opcode_unit_stage
) (rt
->data
, opcode
, i
);
6230 gas_assert (rt
->units
[stage
+ cycle
][unit
] > 0);
6231 rt
->units
[stage
+ cycle
][unit
]--;
6236 /* Wrapper functions make parameterized resource reservation
6240 opcode_funcUnit_use_unit (void *data
, xtensa_opcode opcode
, int idx
)
6242 xtensa_funcUnit_use
*use
= xtensa_opcode_funcUnit_use (data
, opcode
, idx
);
6248 opcode_funcUnit_use_stage (void *data
, xtensa_opcode opcode
, int idx
)
6250 xtensa_funcUnit_use
*use
= xtensa_opcode_funcUnit_use (data
, opcode
, idx
);
6255 /* Note that this function does not check issue constraints, but
6256 solely whether the hardware is available to execute the given
6257 instructions together. It also doesn't check if the tinsns
6258 write the same state, or access the same tieports. That is
6259 checked by check_t1_t2_reads_and_writes. */
6262 resources_conflict (vliw_insn
*vinsn
)
6265 static resource_table
*rt
= NULL
;
6267 /* This is the most common case by far. Optimize it. */
6268 if (vinsn
->num_slots
== 1)
6273 xtensa_isa isa
= xtensa_default_isa
;
6274 rt
= new_resource_table
6275 (isa
, xtensa_num_pipe_stages
,
6276 xtensa_isa_num_funcUnits (isa
),
6277 (unit_num_copies_func
) xtensa_funcUnit_num_copies
,
6278 (opcode_num_units_func
) xtensa_opcode_num_funcUnit_uses
,
6279 opcode_funcUnit_use_unit
,
6280 opcode_funcUnit_use_stage
);
6283 clear_resource_table (rt
);
6285 for (i
= 0; i
< vinsn
->num_slots
; i
++)
6287 if (!resources_available (rt
, vinsn
->slots
[i
].opcode
, 0))
6289 reserve_resources (rt
, vinsn
->slots
[i
].opcode
, 0);
6296 /* finish_vinsn, emit_single_op and helper functions. */
6298 static bfd_boolean
find_vinsn_conflicts (vliw_insn
*);
6299 static xtensa_format
xg_find_narrowest_format (vliw_insn
*);
6300 static void xg_assemble_vliw_tokens (vliw_insn
*);
6303 /* We have reached the end of a bundle; emit into the frag. */
6306 finish_vinsn (vliw_insn
*vinsn
)
6311 if (find_vinsn_conflicts (vinsn
))
6313 xg_clear_vinsn (vinsn
);
6317 /* First, find a format that works. */
6318 if (vinsn
->format
== XTENSA_UNDEFINED
)
6319 vinsn
->format
= xg_find_narrowest_format (vinsn
);
6321 if (xtensa_format_num_slots (xtensa_default_isa
, vinsn
->format
) > 1
6322 && produce_flix
== FLIX_NONE
)
6324 as_bad (_("The option \"--no-allow-flix\" prohibits multi-slot flix."));
6325 xg_clear_vinsn (vinsn
);
6329 if (vinsn
->format
== XTENSA_UNDEFINED
)
6331 as_bad (_("couldn't find a valid instruction format"));
6332 fprintf (stderr
, _(" ops were: "));
6333 for (i
= 0; i
< vinsn
->num_slots
; i
++)
6334 fprintf (stderr
, _(" %s;"),
6335 xtensa_opcode_name (xtensa_default_isa
,
6336 vinsn
->slots
[i
].opcode
));
6337 fprintf (stderr
, _("\n"));
6338 xg_clear_vinsn (vinsn
);
6342 if (vinsn
->num_slots
6343 != xtensa_format_num_slots (xtensa_default_isa
, vinsn
->format
))
6345 as_bad (_("format '%s' allows %d slots, but there are %d opcodes"),
6346 xtensa_format_name (xtensa_default_isa
, vinsn
->format
),
6347 xtensa_format_num_slots (xtensa_default_isa
, vinsn
->format
),
6349 xg_clear_vinsn (vinsn
);
6353 if (resources_conflict (vinsn
))
6355 as_bad (_("illegal resource usage in bundle"));
6356 fprintf (stderr
, " ops were: ");
6357 for (i
= 0; i
< vinsn
->num_slots
; i
++)
6358 fprintf (stderr
, " %s;",
6359 xtensa_opcode_name (xtensa_default_isa
,
6360 vinsn
->slots
[i
].opcode
));
6361 fprintf (stderr
, "\n");
6362 xg_clear_vinsn (vinsn
);
6366 for (i
= 0; i
< vinsn
->num_slots
; i
++)
6368 if (vinsn
->slots
[i
].opcode
!= XTENSA_UNDEFINED
)
6370 symbolS
*lit_sym
= NULL
;
6372 bfd_boolean e
= FALSE
;
6373 bfd_boolean saved_density
= density_supported
;
6375 /* We don't want to narrow ops inside multi-slot bundles. */
6376 if (vinsn
->num_slots
> 1)
6377 density_supported
= FALSE
;
6379 istack_init (&slotstack
);
6380 if (vinsn
->slots
[i
].opcode
== xtensa_nop_opcode
)
6382 vinsn
->slots
[i
].opcode
=
6383 xtensa_format_slot_nop_opcode (xtensa_default_isa
,
6385 vinsn
->slots
[i
].ntok
= 0;
6388 if (xg_expand_assembly_insn (&slotstack
, &vinsn
->slots
[i
]))
6394 density_supported
= saved_density
;
6398 xg_clear_vinsn (vinsn
);
6402 for (j
= 0; j
< slotstack
.ninsn
; j
++)
6404 TInsn
*insn
= &slotstack
.insn
[j
];
6405 if (insn
->insn_type
== ITYPE_LITERAL
)
6407 gas_assert (lit_sym
== NULL
);
6408 lit_sym
= xg_assemble_literal (insn
);
6412 gas_assert (insn
->insn_type
== ITYPE_INSN
);
6414 xg_resolve_literals (insn
, lit_sym
);
6415 if (j
!= slotstack
.ninsn
- 1)
6416 emit_single_op (insn
);
6420 if (vinsn
->num_slots
> 1)
6422 if (opcode_fits_format_slot
6423 (slotstack
.insn
[slotstack
.ninsn
- 1].opcode
,
6426 vinsn
->slots
[i
] = slotstack
.insn
[slotstack
.ninsn
- 1];
6430 emit_single_op (&slotstack
.insn
[slotstack
.ninsn
- 1]);
6431 if (vinsn
->format
== XTENSA_UNDEFINED
)
6432 vinsn
->slots
[i
].opcode
= xtensa_nop_opcode
;
6434 vinsn
->slots
[i
].opcode
6435 = xtensa_format_slot_nop_opcode (xtensa_default_isa
,
6438 vinsn
->slots
[i
].ntok
= 0;
6443 vinsn
->slots
[0] = slotstack
.insn
[slotstack
.ninsn
- 1];
6444 vinsn
->format
= XTENSA_UNDEFINED
;
6449 /* Now check resource conflicts on the modified bundle. */
6450 if (resources_conflict (vinsn
))
6452 as_bad (_("illegal resource usage in bundle"));
6453 fprintf (stderr
, " ops were: ");
6454 for (i
= 0; i
< vinsn
->num_slots
; i
++)
6455 fprintf (stderr
, " %s;",
6456 xtensa_opcode_name (xtensa_default_isa
,
6457 vinsn
->slots
[i
].opcode
));
6458 fprintf (stderr
, "\n");
6459 xg_clear_vinsn (vinsn
);
6463 /* First, find a format that works. */
6464 if (vinsn
->format
== XTENSA_UNDEFINED
)
6465 vinsn
->format
= xg_find_narrowest_format (vinsn
);
6467 xg_assemble_vliw_tokens (vinsn
);
6469 xg_clear_vinsn (vinsn
);
6471 xtensa_check_frag_count ();
6475 /* Given an vliw instruction, what conflicts are there in register
6476 usage and in writes to states and queues?
6478 This function does two things:
6479 1. Reports an error when a vinsn contains illegal combinations
6480 of writes to registers states or queues.
6481 2. Marks individual tinsns as not relaxable if the combination
6482 contains antidependencies.
6484 Job 2 handles things like swap semantics in instructions that need
6485 to be relaxed. For example,
6489 normally would be relaxed to
6494 _but_, if the above instruction is bundled with an a0 reader, e.g.,
6496 { addi a0, a1, 10000 ; add a2, a0, a4 ; }
6498 then we can't relax it into
6501 { add a0, a1, a0 ; add a2, a0, a4 ; }
6503 because the value of a0 is trashed before the second add can read it. */
6505 static char check_t1_t2_reads_and_writes (TInsn
*, TInsn
*);
6508 find_vinsn_conflicts (vliw_insn
*vinsn
)
6512 xtensa_isa isa
= xtensa_default_isa
;
6514 gas_assert (!past_xtensa_end
);
6516 for (i
= 0 ; i
< vinsn
->num_slots
; i
++)
6518 TInsn
*op1
= &vinsn
->slots
[i
];
6519 if (op1
->is_specific_opcode
)
6520 op1
->keep_wide
= TRUE
;
6522 op1
->keep_wide
= FALSE
;
6525 for (i
= 0 ; i
< vinsn
->num_slots
; i
++)
6527 TInsn
*op1
= &vinsn
->slots
[i
];
6529 if (xtensa_opcode_is_branch (isa
, op1
->opcode
) == 1)
6532 for (j
= 0; j
< vinsn
->num_slots
; j
++)
6536 TInsn
*op2
= &vinsn
->slots
[j
];
6537 char conflict_type
= check_t1_t2_reads_and_writes (op1
, op2
);
6538 switch (conflict_type
)
6541 as_bad (_("opcodes '%s' (slot %d) and '%s' (slot %d) write the same register"),
6542 xtensa_opcode_name (isa
, op1
->opcode
), i
,
6543 xtensa_opcode_name (isa
, op2
->opcode
), j
);
6546 as_bad (_("opcodes '%s' (slot %d) and '%s' (slot %d) write the same state"),
6547 xtensa_opcode_name (isa
, op1
->opcode
), i
,
6548 xtensa_opcode_name (isa
, op2
->opcode
), j
);
6551 as_bad (_("opcodes '%s' (slot %d) and '%s' (slot %d) write the same port"),
6552 xtensa_opcode_name (isa
, op1
->opcode
), i
,
6553 xtensa_opcode_name (isa
, op2
->opcode
), j
);
6556 as_bad (_("opcodes '%s' (slot %d) and '%s' (slot %d) both have volatile port accesses"),
6557 xtensa_opcode_name (isa
, op1
->opcode
), i
,
6558 xtensa_opcode_name (isa
, op2
->opcode
), j
);
6561 /* Everything is OK. */
6564 op2
->is_specific_opcode
= (op2
->is_specific_opcode
6565 || conflict_type
== 'a');
6572 as_bad (_("multiple branches or jumps in the same bundle"));
6580 /* Check how the state used by t1 and t2 relate.
6583 case A: t1 reads a register t2 writes (an antidependency within a bundle)
6584 case B: no relationship between what is read and written (both could
6585 read the same reg though)
6586 case C: t1 writes a register t2 writes (a register conflict within a
6588 case D: t1 writes a state that t2 also writes
6589 case E: t1 writes a tie queue that t2 also writes
6590 case F: two volatile queue accesses
6594 check_t1_t2_reads_and_writes (TInsn
*t1
, TInsn
*t2
)
6596 xtensa_isa isa
= xtensa_default_isa
;
6597 xtensa_regfile t1_regfile
, t2_regfile
;
6599 int t1_base_reg
, t1_last_reg
;
6600 int t2_base_reg
, t2_last_reg
;
6601 char t1_inout
, t2_inout
;
6603 char conflict
= 'b';
6608 bfd_boolean t1_volatile
= FALSE
;
6609 bfd_boolean t2_volatile
= FALSE
;
6611 /* Check registers. */
6612 for (j
= 0; j
< t2
->ntok
; j
++)
6614 if (xtensa_operand_is_register (isa
, t2
->opcode
, j
) != 1)
6617 t2_regfile
= xtensa_operand_regfile (isa
, t2
->opcode
, j
);
6618 t2_base_reg
= t2
->tok
[j
].X_add_number
;
6619 t2_last_reg
= t2_base_reg
+ xtensa_operand_num_regs (isa
, t2
->opcode
, j
);
6621 for (i
= 0; i
< t1
->ntok
; i
++)
6623 if (xtensa_operand_is_register (isa
, t1
->opcode
, i
) != 1)
6626 t1_regfile
= xtensa_operand_regfile (isa
, t1
->opcode
, i
);
6628 if (t1_regfile
!= t2_regfile
)
6631 t1_inout
= xtensa_operand_inout (isa
, t1
->opcode
, i
);
6632 t2_inout
= xtensa_operand_inout (isa
, t2
->opcode
, j
);
6634 if (xtensa_operand_is_known_reg (isa
, t1
->opcode
, i
) == 0
6635 || xtensa_operand_is_known_reg (isa
, t2
->opcode
, j
) == 0)
6637 if (t1_inout
== 'm' || t1_inout
== 'o'
6638 || t2_inout
== 'm' || t2_inout
== 'o')
6645 t1_base_reg
= t1
->tok
[i
].X_add_number
;
6646 t1_last_reg
= (t1_base_reg
6647 + xtensa_operand_num_regs (isa
, t1
->opcode
, i
));
6649 for (t1_reg
= t1_base_reg
; t1_reg
< t1_last_reg
; t1_reg
++)
6651 for (t2_reg
= t2_base_reg
; t2_reg
< t2_last_reg
; t2_reg
++)
6653 if (t1_reg
!= t2_reg
)
6656 if (t2_inout
== 'i' && (t1_inout
== 'm' || t1_inout
== 'o'))
6662 if (t1_inout
== 'i' && (t2_inout
== 'm' || t2_inout
== 'o'))
6668 if (t1_inout
!= 'i' && t2_inout
!= 'i')
6676 t1_states
= xtensa_opcode_num_stateOperands (isa
, t1
->opcode
);
6677 t2_states
= xtensa_opcode_num_stateOperands (isa
, t2
->opcode
);
6678 for (j
= 0; j
< t2_states
; j
++)
6680 xtensa_state t2_so
= xtensa_stateOperand_state (isa
, t2
->opcode
, j
);
6681 t2_inout
= xtensa_stateOperand_inout (isa
, t2
->opcode
, j
);
6682 for (i
= 0; i
< t1_states
; i
++)
6684 xtensa_state t1_so
= xtensa_stateOperand_state (isa
, t1
->opcode
, i
);
6685 t1_inout
= xtensa_stateOperand_inout (isa
, t1
->opcode
, i
);
6686 if (t1_so
!= t2_so
|| xtensa_state_is_shared_or (isa
, t1_so
) == 1)
6689 if (t2_inout
== 'i' && (t1_inout
== 'm' || t1_inout
== 'o'))
6695 if (t1_inout
== 'i' && (t2_inout
== 'm' || t2_inout
== 'o'))
6701 if (t1_inout
!= 'i' && t2_inout
!= 'i')
6706 /* Check tieports. */
6707 t1_interfaces
= xtensa_opcode_num_interfaceOperands (isa
, t1
->opcode
);
6708 t2_interfaces
= xtensa_opcode_num_interfaceOperands (isa
, t2
->opcode
);
6709 for (j
= 0; j
< t2_interfaces
; j
++)
6711 xtensa_interface t2_int
6712 = xtensa_interfaceOperand_interface (isa
, t2
->opcode
, j
);
6713 int t2_class
= xtensa_interface_class_id (isa
, t2_int
);
6715 t2_inout
= xtensa_interface_inout (isa
, t2_int
);
6716 if (xtensa_interface_has_side_effect (isa
, t2_int
) == 1)
6719 for (i
= 0; i
< t1_interfaces
; i
++)
6721 xtensa_interface t1_int
6722 = xtensa_interfaceOperand_interface (isa
, t1
->opcode
, j
);
6723 int t1_class
= xtensa_interface_class_id (isa
, t1_int
);
6725 t1_inout
= xtensa_interface_inout (isa
, t1_int
);
6726 if (xtensa_interface_has_side_effect (isa
, t1_int
) == 1)
6729 if (t1_volatile
&& t2_volatile
&& (t1_class
== t2_class
))
6732 if (t1_int
!= t2_int
)
6735 if (t2_inout
== 'i' && t1_inout
== 'o')
6741 if (t1_inout
== 'i' && t2_inout
== 'o')
6747 if (t1_inout
!= 'i' && t2_inout
!= 'i')
6756 static xtensa_format
6757 xg_find_narrowest_format (vliw_insn
*vinsn
)
6759 /* Right now we assume that the ops within the vinsn are properly
6760 ordered for the slots that the programmer wanted them in. In
6761 other words, we don't rearrange the ops in hopes of finding a
6762 better format. The scheduler handles that. */
6764 xtensa_isa isa
= xtensa_default_isa
;
6765 xtensa_format format
;
6766 xtensa_opcode nop_opcode
= xtensa_nop_opcode
;
6768 if (vinsn
->num_slots
== 1)
6769 return xg_get_single_format (vinsn
->slots
[0].opcode
);
6771 for (format
= 0; format
< xtensa_isa_num_formats (isa
); format
++)
6774 xg_copy_vinsn (&v_copy
, vinsn
);
6775 if (xtensa_format_num_slots (isa
, format
) == v_copy
.num_slots
)
6779 for (slot
= 0; slot
< v_copy
.num_slots
; slot
++)
6781 if (v_copy
.slots
[slot
].opcode
== nop_opcode
)
6783 v_copy
.slots
[slot
].opcode
=
6784 xtensa_format_slot_nop_opcode (isa
, format
, slot
);
6785 v_copy
.slots
[slot
].ntok
= 0;
6788 if (opcode_fits_format_slot (v_copy
.slots
[slot
].opcode
,
6791 else if (v_copy
.num_slots
> 1)
6794 /* Try the widened version. */
6795 if (!v_copy
.slots
[slot
].keep_wide
6796 && !v_copy
.slots
[slot
].is_specific_opcode
6797 && xg_is_single_relaxable_insn (&v_copy
.slots
[slot
],
6799 && opcode_fits_format_slot (widened
.opcode
,
6802 v_copy
.slots
[slot
] = widened
;
6807 if (fit
== v_copy
.num_slots
)
6809 xg_copy_vinsn (vinsn
, &v_copy
);
6810 xtensa_format_encode (isa
, format
, vinsn
->insnbuf
);
6811 vinsn
->format
= format
;
6817 if (format
== xtensa_isa_num_formats (isa
))
6818 return XTENSA_UNDEFINED
;
6824 /* Return the additional space needed in a frag
6825 for possible relaxations of any ops in a VLIW insn.
6826 Also fill out the relaxations that might be required of
6827 each tinsn in the vinsn. */
6830 relaxation_requirements (vliw_insn
*vinsn
, bfd_boolean
*pfinish_frag
)
6832 bfd_boolean finish_frag
= FALSE
;
6833 int extra_space
= 0;
6836 for (slot
= 0; slot
< vinsn
->num_slots
; slot
++)
6838 TInsn
*tinsn
= &vinsn
->slots
[slot
];
6839 if (!tinsn_has_symbolic_operands (tinsn
))
6841 /* A narrow instruction could be widened later to help
6842 alignment issues. */
6843 if (xg_is_single_relaxable_insn (tinsn
, 0, TRUE
)
6844 && !tinsn
->is_specific_opcode
6845 && vinsn
->num_slots
== 1)
6847 /* Difference in bytes between narrow and wide insns... */
6849 tinsn
->subtype
= RELAX_NARROW
;
6854 if (workaround_b_j_loop_end
6855 && tinsn
->opcode
== xtensa_jx_opcode
6856 && use_transform ())
6858 /* Add 2 of these. */
6859 extra_space
+= 3; /* for the nop size */
6860 tinsn
->subtype
= RELAX_ADD_NOP_IF_PRE_LOOP_END
;
6863 /* Need to assemble it with space for the relocation. */
6864 if (xg_is_relaxable_insn (tinsn
, 0)
6865 && !tinsn
->is_specific_opcode
)
6867 int max_size
= xg_get_max_insn_widen_size (tinsn
->opcode
);
6868 int max_literal_size
=
6869 xg_get_max_insn_widen_literal_size (tinsn
->opcode
);
6871 tinsn
->literal_space
= max_literal_size
;
6873 tinsn
->subtype
= RELAX_IMMED
;
6874 extra_space
+= max_size
;
6878 /* A fix record will be added for this instruction prior
6879 to relaxation, so make it end the frag. */
6884 *pfinish_frag
= finish_frag
;
6890 bundle_tinsn (TInsn
*tinsn
, vliw_insn
*vinsn
)
6892 xtensa_isa isa
= xtensa_default_isa
;
6893 int slot
, chosen_slot
;
6895 vinsn
->format
= xg_get_single_format (tinsn
->opcode
);
6896 gas_assert (vinsn
->format
!= XTENSA_UNDEFINED
);
6897 vinsn
->num_slots
= xtensa_format_num_slots (isa
, vinsn
->format
);
6899 chosen_slot
= xg_get_single_slot (tinsn
->opcode
);
6900 for (slot
= 0; slot
< vinsn
->num_slots
; slot
++)
6902 if (slot
== chosen_slot
)
6903 vinsn
->slots
[slot
] = *tinsn
;
6906 vinsn
->slots
[slot
].opcode
=
6907 xtensa_format_slot_nop_opcode (isa
, vinsn
->format
, slot
);
6908 vinsn
->slots
[slot
].ntok
= 0;
6909 vinsn
->slots
[slot
].insn_type
= ITYPE_INSN
;
6916 emit_single_op (TInsn
*orig_insn
)
6919 IStack istack
; /* put instructions into here */
6920 symbolS
*lit_sym
= NULL
;
6921 symbolS
*label_sym
= NULL
;
6923 istack_init (&istack
);
6925 /* Special-case for "movi aX, foo" which is guaranteed to need relaxing.
6926 Because the scheduling and bundling characteristics of movi and
6927 l32r or const16 are so different, we can do much better if we relax
6928 it prior to scheduling and bundling, rather than after. */
6929 if ((orig_insn
->opcode
== xtensa_movi_opcode
6930 || orig_insn
->opcode
== xtensa_movi_n_opcode
)
6931 && !cur_vinsn
.inside_bundle
6932 && (orig_insn
->tok
[1].X_op
== O_symbol
6933 || orig_insn
->tok
[1].X_op
== O_pltrel
6934 || orig_insn
->tok
[1].X_op
== O_tlsfunc
6935 || orig_insn
->tok
[1].X_op
== O_tlsarg
6936 || orig_insn
->tok
[1].X_op
== O_tpoff
6937 || orig_insn
->tok
[1].X_op
== O_dtpoff
)
6938 && !orig_insn
->is_specific_opcode
&& use_transform ())
6939 xg_assembly_relax (&istack
, orig_insn
, now_seg
, frag_now
, 0, 1, 0);
6941 if (xg_expand_assembly_insn (&istack
, orig_insn
))
6944 for (i
= 0; i
< istack
.ninsn
; i
++)
6946 TInsn
*insn
= &istack
.insn
[i
];
6947 switch (insn
->insn_type
)
6950 gas_assert (lit_sym
== NULL
);
6951 lit_sym
= xg_assemble_literal (insn
);
6955 static int relaxed_sym_idx
= 0;
6956 char *label
= XNEWVEC (char, strlen (FAKE_LABEL_NAME
) + 12);
6957 sprintf (label
, "%s_rl_%x", FAKE_LABEL_NAME
, relaxed_sym_idx
++);
6959 gas_assert (label_sym
== NULL
);
6960 label_sym
= symbol_find_or_make (label
);
6961 gas_assert (label_sym
);
6969 xg_resolve_literals (insn
, lit_sym
);
6971 xg_resolve_labels (insn
, label_sym
);
6973 bundle_tinsn (insn
, &v
);
6988 total_frag_text_expansion (fragS
*fragP
)
6991 int total_expansion
= 0;
6993 for (slot
= 0; slot
< config_max_slots
; slot
++)
6994 total_expansion
+= fragP
->tc_frag_data
.text_expansion
[slot
];
6996 return total_expansion
;
7000 /* Emit a vliw instruction to the current fragment. */
7003 xg_assemble_vliw_tokens (vliw_insn
*vinsn
)
7005 bfd_boolean finish_frag
;
7006 bfd_boolean is_jump
= FALSE
;
7007 bfd_boolean is_branch
= FALSE
;
7008 xtensa_isa isa
= xtensa_default_isa
;
7013 struct dwarf2_line_info debug_line
;
7014 bfd_boolean loc_directive_seen
= FALSE
;
7017 memset (&debug_line
, 0, sizeof (struct dwarf2_line_info
));
7019 if (generating_literals
)
7021 static int reported
= 0;
7023 as_bad_where (frag_now
->fr_file
, frag_now
->fr_line
,
7024 _("cannot assemble into a literal fragment"));
7031 if (frag_now_fix () != 0
7032 && (! frag_now
->tc_frag_data
.is_insn
7033 || (vinsn_has_specific_opcodes (vinsn
) && use_transform ())
7034 || (!use_transform ()) != frag_now
->tc_frag_data
.is_no_transform
7035 || (directive_state
[directive_longcalls
]
7036 != frag_now
->tc_frag_data
.use_longcalls
)
7037 || (directive_state
[directive_absolute_literals
]
7038 != frag_now
->tc_frag_data
.use_absolute_literals
)))
7040 frag_wane (frag_now
);
7042 xtensa_set_frag_assembly_state (frag_now
);
7045 if (workaround_a0_b_retw
7046 && vinsn
->num_slots
== 1
7047 && (get_last_insn_flags (now_seg
, now_subseg
) & FLAG_IS_A0_WRITER
) != 0
7048 && xtensa_opcode_is_branch (isa
, vinsn
->slots
[0].opcode
) == 1
7049 && use_transform ())
7051 has_a0_b_retw
= TRUE
;
7053 /* Mark this fragment with the special RELAX_ADD_NOP_IF_A0_B_RETW.
7054 After the first assembly pass we will check all of them and
7055 add a nop if needed. */
7056 frag_now
->tc_frag_data
.is_insn
= TRUE
;
7057 frag_var (rs_machine_dependent
, 4, 4,
7058 RELAX_ADD_NOP_IF_A0_B_RETW
,
7059 frag_now
->fr_symbol
,
7060 frag_now
->fr_offset
,
7062 xtensa_set_frag_assembly_state (frag_now
);
7063 frag_now
->tc_frag_data
.is_insn
= TRUE
;
7064 frag_var (rs_machine_dependent
, 4, 4,
7065 RELAX_ADD_NOP_IF_A0_B_RETW
,
7066 frag_now
->fr_symbol
,
7067 frag_now
->fr_offset
,
7069 xtensa_set_frag_assembly_state (frag_now
);
7072 for (slot
= 0; slot
< vinsn
->num_slots
; slot
++)
7074 tinsn
= &vinsn
->slots
[slot
];
7076 /* See if the instruction implies an aligned section. */
7077 if (xtensa_opcode_is_loop (isa
, tinsn
->opcode
) == 1)
7078 record_alignment (now_seg
, 2);
7080 /* Determine the best line number for debug info. */
7081 if ((tinsn
->loc_directive_seen
|| !loc_directive_seen
)
7082 && (tinsn
->debug_line
.filenum
!= debug_line
.filenum
7083 || tinsn
->debug_line
.line
< debug_line
.line
7084 || tinsn
->debug_line
.column
< debug_line
.column
))
7085 debug_line
= tinsn
->debug_line
;
7086 if (tinsn
->loc_directive_seen
)
7087 loc_directive_seen
= TRUE
;
7090 /* Special cases for instructions that force an alignment... */
7091 /* None of these opcodes are bundle-able. */
7092 if (xtensa_opcode_is_loop (isa
, vinsn
->slots
[0].opcode
) == 1)
7096 /* Remember the symbol that marks the end of the loop in the frag
7097 that marks the start of the loop. This way we can easily find
7098 the end of the loop at the beginning, without adding special code
7099 to mark the loop instructions themselves. */
7100 symbolS
*target_sym
= NULL
;
7101 if (vinsn
->slots
[0].tok
[1].X_op
== O_symbol
)
7102 target_sym
= vinsn
->slots
[0].tok
[1].X_add_symbol
;
7104 xtensa_set_frag_assembly_state (frag_now
);
7105 frag_now
->tc_frag_data
.is_insn
= TRUE
;
7107 max_fill
= get_text_align_max_fill_size
7108 (get_text_align_power (xtensa_fetch_width
),
7109 TRUE
, frag_now
->tc_frag_data
.is_no_density
);
7111 if (use_transform ())
7112 frag_var (rs_machine_dependent
, max_fill
, max_fill
,
7113 RELAX_ALIGN_NEXT_OPCODE
, target_sym
, 0, NULL
);
7115 frag_var (rs_machine_dependent
, 0, 0,
7116 RELAX_CHECK_ALIGN_NEXT_OPCODE
, target_sym
, 0, NULL
);
7117 xtensa_set_frag_assembly_state (frag_now
);
7120 if (vinsn
->slots
[0].opcode
== xtensa_entry_opcode
7121 && !vinsn
->slots
[0].is_specific_opcode
)
7123 xtensa_mark_literal_pool_location ();
7124 xtensa_move_labels (frag_now
, 0);
7125 frag_var (rs_align_test
, 1, 1, 0, NULL
, 2, NULL
);
7128 if (vinsn
->num_slots
== 1)
7130 if (workaround_a0_b_retw
&& use_transform ())
7131 set_last_insn_flags (now_seg
, now_subseg
, FLAG_IS_A0_WRITER
,
7132 is_register_writer (&vinsn
->slots
[0], "a", 0));
7134 set_last_insn_flags (now_seg
, now_subseg
, FLAG_IS_BAD_LOOPEND
,
7135 is_bad_loopend_opcode (&vinsn
->slots
[0]));
7138 set_last_insn_flags (now_seg
, now_subseg
, FLAG_IS_BAD_LOOPEND
, FALSE
);
7140 insn_size
= xtensa_format_length (isa
, vinsn
->format
);
7142 extra_space
= relaxation_requirements (vinsn
, &finish_frag
);
7144 /* vinsn_to_insnbuf will produce the error. */
7145 if (vinsn
->format
!= XTENSA_UNDEFINED
)
7147 f
= frag_more (insn_size
+ extra_space
);
7148 xtensa_set_frag_assembly_state (frag_now
);
7149 frag_now
->tc_frag_data
.is_insn
= TRUE
;
7152 vinsn_to_insnbuf (vinsn
, f
, frag_now
, FALSE
);
7153 if (vinsn
->format
== XTENSA_UNDEFINED
)
7156 xtensa_insnbuf_to_chars (isa
, vinsn
->insnbuf
, (unsigned char *) f
, 0);
7158 if (debug_type
== DEBUG_DWARF2
|| loc_directive_seen
)
7159 dwarf2_gen_line_info (frag_now_fix () - (insn_size
+ extra_space
),
7162 for (slot
= 0; slot
< vinsn
->num_slots
; slot
++)
7164 tinsn
= &vinsn
->slots
[slot
];
7165 frag_now
->tc_frag_data
.slot_subtypes
[slot
] = tinsn
->subtype
;
7166 frag_now
->tc_frag_data
.slot_symbols
[slot
] = tinsn
->symbol
;
7167 frag_now
->tc_frag_data
.slot_offsets
[slot
] = tinsn
->offset
;
7168 frag_now
->tc_frag_data
.literal_frags
[slot
] = tinsn
->literal_frag
;
7169 if (tinsn
->opcode
== xtensa_l32r_opcode
)
7171 frag_now
->tc_frag_data
.literal_frags
[slot
] =
7172 tinsn
->tok
[1].X_add_symbol
->sy_frag
;
7174 if (tinsn
->literal_space
!= 0)
7175 xg_assemble_literal_space (tinsn
->literal_space
, slot
);
7176 frag_now
->tc_frag_data
.free_reg
[slot
] = tinsn
->extra_arg
;
7178 if (tinsn
->subtype
== RELAX_NARROW
)
7179 gas_assert (vinsn
->num_slots
== 1);
7180 if (xtensa_opcode_is_jump (isa
, tinsn
->opcode
) == 1)
7182 if (xtensa_opcode_is_branch (isa
, tinsn
->opcode
) == 1)
7185 if (tinsn
->subtype
|| tinsn
->symbol
|| tinsn
->offset
7186 || tinsn
->literal_frag
|| is_jump
|| is_branch
)
7190 if (vinsn_has_specific_opcodes (vinsn
) && use_transform ())
7191 frag_now
->tc_frag_data
.is_specific_opcode
= TRUE
;
7195 frag_variant (rs_machine_dependent
,
7196 extra_space
, extra_space
, RELAX_SLOTS
,
7197 frag_now
->fr_symbol
, frag_now
->fr_offset
, f
);
7198 xtensa_set_frag_assembly_state (frag_now
);
7201 /* Special cases for loops:
7202 close_loop_end should be inserted AFTER short_loop.
7203 Make sure that CLOSE loops are processed BEFORE short_loops
7204 when converting them. */
7206 /* "short_loop": Add a NOP if the loop is < 4 bytes. */
7207 if (xtensa_opcode_is_loop (isa
, vinsn
->slots
[0].opcode
) == 1
7208 && !vinsn
->slots
[0].is_specific_opcode
)
7210 if (workaround_short_loop
&& use_transform ())
7212 maybe_has_short_loop
= TRUE
;
7213 frag_now
->tc_frag_data
.is_insn
= TRUE
;
7214 frag_var (rs_machine_dependent
, 4, 4,
7215 RELAX_ADD_NOP_IF_SHORT_LOOP
,
7216 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
7217 frag_now
->tc_frag_data
.is_insn
= TRUE
;
7218 frag_var (rs_machine_dependent
, 4, 4,
7219 RELAX_ADD_NOP_IF_SHORT_LOOP
,
7220 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
7223 /* "close_loop_end": Add up to 12 bytes of NOPs to keep a
7224 loop at least 12 bytes away from another loop's end. */
7225 if (workaround_close_loop_end
&& use_transform ())
7227 maybe_has_close_loop_end
= TRUE
;
7228 frag_now
->tc_frag_data
.is_insn
= TRUE
;
7229 frag_var (rs_machine_dependent
, 12, 12,
7230 RELAX_ADD_NOP_IF_CLOSE_LOOP_END
,
7231 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
7235 if (use_transform ())
7239 gas_assert (finish_frag
);
7240 frag_var (rs_machine_dependent
,
7241 xtensa_fetch_width
, xtensa_fetch_width
,
7243 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
7244 xtensa_set_frag_assembly_state (frag_now
);
7245 xtensa_maybe_create_trampoline_frag ();
7246 /* Always create one here. */
7247 xtensa_maybe_create_literal_pool_frag (TRUE
, FALSE
);
7249 else if (is_branch
&& do_align_targets ())
7251 gas_assert (finish_frag
);
7252 frag_var (rs_machine_dependent
,
7253 xtensa_fetch_width
, xtensa_fetch_width
,
7254 RELAX_MAYBE_UNREACHABLE
,
7255 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
7256 xtensa_set_frag_assembly_state (frag_now
);
7257 frag_var (rs_machine_dependent
,
7259 RELAX_MAYBE_DESIRE_ALIGN
,
7260 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
7261 xtensa_set_frag_assembly_state (frag_now
);
7265 /* Now, if the original opcode was a call... */
7266 if (do_align_targets ()
7267 && xtensa_opcode_is_call (isa
, vinsn
->slots
[0].opcode
) == 1)
7269 float freq
= get_subseg_total_freq (now_seg
, now_subseg
);
7270 frag_now
->tc_frag_data
.is_insn
= TRUE
;
7271 frag_var (rs_machine_dependent
, 4, (int) freq
, RELAX_DESIRE_ALIGN
,
7272 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
7273 xtensa_set_frag_assembly_state (frag_now
);
7276 if (vinsn_has_specific_opcodes (vinsn
) && use_transform ())
7278 frag_wane (frag_now
);
7280 xtensa_set_frag_assembly_state (frag_now
);
7285 /* xtensa_end and helper functions. */
7287 static void xtensa_cleanup_align_frags (void);
7288 static void xtensa_fix_target_frags (void);
7289 static void xtensa_mark_narrow_branches (void);
7290 static void xtensa_mark_zcl_first_insns (void);
7291 static void xtensa_mark_difference_of_two_symbols (void);
7292 static void xtensa_fix_a0_b_retw_frags (void);
7293 static void xtensa_fix_b_j_loop_end_frags (void);
7294 static void xtensa_fix_close_loop_end_frags (void);
7295 static void xtensa_fix_short_loop_frags (void);
7296 static void xtensa_sanity_check (void);
7297 static void xtensa_add_config_info (void);
7302 directive_balance ();
7303 xtensa_flush_pending_output ();
7305 past_xtensa_end
= TRUE
;
7307 xtensa_move_literals ();
7309 xtensa_reorder_segments ();
7310 xtensa_cleanup_align_frags ();
7311 xtensa_fix_target_frags ();
7312 if (workaround_a0_b_retw
&& has_a0_b_retw
)
7313 xtensa_fix_a0_b_retw_frags ();
7314 if (workaround_b_j_loop_end
)
7315 xtensa_fix_b_j_loop_end_frags ();
7317 /* "close_loop_end" should be processed BEFORE "short_loop". */
7318 if (workaround_close_loop_end
&& maybe_has_close_loop_end
)
7319 xtensa_fix_close_loop_end_frags ();
7321 if (workaround_short_loop
&& maybe_has_short_loop
)
7322 xtensa_fix_short_loop_frags ();
7324 xtensa_mark_narrow_branches ();
7325 xtensa_mark_zcl_first_insns ();
7327 xtensa_sanity_check ();
7329 xtensa_add_config_info ();
7331 xtensa_check_frag_count ();
7335 struct trampoline_frag
7337 struct trampoline_frag
*next
;
7338 bfd_boolean needs_jump_around
;
7343 struct trampoline_seg
7345 struct trampoline_seg
*next
;
7347 struct trampoline_frag trampoline_list
;
7350 static struct trampoline_seg trampoline_seg_list
;
7351 #define J_RANGE (128 * 1024)
7353 static int unreachable_count
= 0;
7357 xtensa_maybe_create_trampoline_frag (void)
7359 if (!use_trampolines
)
7362 /* We create an area for possible trampolines every 10 unreachable frags.
7363 These are preferred over the ones not preceded by an unreachable frag,
7364 because we don't have to jump around them. This function is called after
7365 each RELAX_UNREACHABLE frag is created. */
7367 if (++unreachable_count
> 10)
7369 xtensa_create_trampoline_frag (FALSE
);
7370 clear_frag_count ();
7371 unreachable_count
= 0;
7376 xtensa_check_frag_count (void)
7378 if (!use_trampolines
|| frag_now
->tc_frag_data
.is_no_transform
)
7381 /* We create an area for possible trampolines every 8000 frags or so. This
7382 is an estimate based on the max range of a "j" insn (+/-128K) divided
7383 by a typical frag byte count (16), minus a few for safety. This function
7384 is called after each source line is processed. */
7386 if (get_frag_count () > 8000)
7388 xtensa_create_trampoline_frag (TRUE
);
7389 clear_frag_count ();
7390 unreachable_count
= 0;
7393 /* We create an area for a possible literal pool every N (default 5000)
7395 xtensa_maybe_create_literal_pool_frag (TRUE
, TRUE
);
7398 static xtensa_insnbuf trampoline_buf
= NULL
;
7399 static xtensa_insnbuf trampoline_slotbuf
= NULL
;
7401 static xtensa_insnbuf litpool_buf
= NULL
;
7402 static xtensa_insnbuf litpool_slotbuf
= NULL
;
7404 #define TRAMPOLINE_FRAG_SIZE 3000
7407 xtensa_create_trampoline_frag (bfd_boolean needs_jump_around
)
7409 /* Emit a frag where we can place intermediate jump instructions,
7410 in case we need to jump farther than 128K bytes.
7411 Each jump instruction takes three bytes.
7412 We allocate enough for 1000 trampolines in each frag.
7413 If that's not enough, oh well. */
7415 struct trampoline_seg
*ts
= trampoline_seg_list
.next
;
7416 struct trampoline_frag
*tf
;
7419 int size
= TRAMPOLINE_FRAG_SIZE
;
7421 for ( ; ts
; ts
= ts
->next
)
7423 if (ts
->seg
== now_seg
)
7429 ts
= XCNEW(struct trampoline_seg
);
7430 ts
->next
= trampoline_seg_list
.next
;
7431 trampoline_seg_list
.next
= ts
;
7435 frag_wane (frag_now
);
7437 xtensa_set_frag_assembly_state (frag_now
);
7438 varP
= frag_var (rs_machine_dependent
, size
, size
, RELAX_TRAMPOLINE
, NULL
, 0, NULL
);
7439 fragP
= (fragS
*)(varP
- SIZEOF_STRUCT_FRAG
);
7440 if (trampoline_buf
== NULL
)
7442 trampoline_buf
= xtensa_insnbuf_alloc (xtensa_default_isa
);
7443 trampoline_slotbuf
= xtensa_insnbuf_alloc (xtensa_default_isa
);
7445 tf
= XNEW (struct trampoline_frag
);
7446 tf
->next
= ts
->trampoline_list
.next
;
7447 ts
->trampoline_list
.next
= tf
;
7448 tf
->needs_jump_around
= needs_jump_around
;
7454 static struct trampoline_seg
*
7455 find_trampoline_seg (asection
*seg
)
7457 struct trampoline_seg
*ts
= trampoline_seg_list
.next
;
7459 for ( ; ts
; ts
= ts
->next
)
7469 void dump_trampolines (void);
7472 dump_trampolines (void)
7474 struct trampoline_seg
*ts
= trampoline_seg_list
.next
;
7476 for ( ; ts
; ts
= ts
->next
)
7478 asection
*seg
= ts
->seg
;
7482 fprintf(stderr
, "SECTION %s\n", seg
->name
);
7483 struct trampoline_frag
*tf
= ts
->trampoline_list
.next
;
7484 for ( ; tf
; tf
= tf
->next
)
7486 if (tf
->fragP
== NULL
)
7488 fprintf(stderr
, " 0x%08x: fix=%d, jump_around=%s\n",
7489 (int)tf
->fragP
->fr_address
, (int)tf
->fragP
->fr_fix
,
7490 tf
->needs_jump_around
? "T" : "F");
7495 static void dump_litpools (void) __attribute__ ((unused
));
7498 dump_litpools (void)
7500 struct litpool_seg
*lps
= litpool_seg_list
.next
;
7501 struct litpool_frag
*lpf
;
7503 for ( ; lps
; lps
= lps
->next
)
7505 printf("litpool seg %s\n", lps
->seg
->name
);
7506 for ( lpf
= lps
->frag_list
.next
; lpf
->fragP
; lpf
= lpf
->next
)
7508 fragS
*litfrag
= lpf
->fragP
->fr_next
;
7510 while (litfrag
&& litfrag
->fr_subtype
!= RELAX_LITERAL_POOL_END
)
7512 if (litfrag
->fr_fix
== 4)
7514 litfrag
= litfrag
->fr_next
;
7516 printf(" %ld <%d:%d> (%d) [%d]: ",
7517 lpf
->addr
, lpf
->priority
, lpf
->original_priority
,
7518 lpf
->fragP
->fr_line
, count
);
7519 //dump_frag(lpf->fragP);
7525 xtensa_maybe_create_literal_pool_frag (bfd_boolean create
,
7526 bfd_boolean only_if_needed
)
7528 struct litpool_seg
*lps
= litpool_seg_list
.next
;
7530 struct litpool_frag
*lpf
;
7531 bfd_boolean needed
= FALSE
;
7533 if (use_literal_section
|| !auto_litpools
)
7536 for ( ; lps
; lps
= lps
->next
)
7538 if (lps
->seg
== now_seg
)
7544 lps
= XCNEW (struct litpool_seg
);
7545 lps
->next
= litpool_seg_list
.next
;
7546 litpool_seg_list
.next
= lps
;
7548 lps
->frag_list
.next
= &lps
->frag_list
;
7549 lps
->frag_list
.prev
= &lps
->frag_list
;
7550 /* Put candidate literal pool at the beginning of every section,
7551 so that even when section starts with literal load there's a
7552 literal pool available. */
7553 lps
->frag_count
= auto_litpool_limit
;
7562 if (past_xtensa_end
|| !use_transform() ||
7563 frag_now
->tc_frag_data
.is_no_transform
)
7567 if (auto_litpool_limit
<= 0)
7569 /* Don't create a litpool based only on frag count. */
7572 else if (lps
->frag_count
> auto_litpool_limit
)
7589 int size
= (only_if_needed
) ? 3 : 0; /* Space for a "j" insn. */
7590 /* Create a potential site for a literal pool. */
7591 frag_wane (frag_now
);
7593 xtensa_set_frag_assembly_state (frag_now
);
7595 fragP
->tc_frag_data
.lit_frchain
= frchain_now
;
7596 fragP
->tc_frag_data
.literal_frag
= fragP
;
7597 frag_var (rs_machine_dependent
, size
, size
,
7599 RELAX_LITERAL_POOL_CANDIDATE_BEGIN
:
7600 RELAX_LITERAL_POOL_BEGIN
,
7602 frag_now
->tc_frag_data
.lit_seg
= now_seg
;
7603 frag_variant (rs_machine_dependent
, 0, 0,
7604 RELAX_LITERAL_POOL_END
, NULL
, 0, NULL
);
7605 xtensa_set_frag_assembly_state (frag_now
);
7609 /* RELAX_LITERAL_POOL_BEGIN frag is being created;
7610 just record it here. */
7614 lpf
= XNEW (struct litpool_frag
);
7615 /* Insert at tail of circular list. */
7617 lps
->frag_list
.prev
->next
= lpf
;
7618 lpf
->next
= &lps
->frag_list
;
7619 lpf
->prev
= lps
->frag_list
.prev
;
7620 lps
->frag_list
.prev
= lpf
;
7622 lpf
->priority
= (needed
) ? (only_if_needed
) ? 3 : 2 : 1;
7623 lpf
->original_priority
= lpf
->priority
;
7625 lps
->frag_count
= 0;
7629 xtensa_cleanup_align_frags (void)
7634 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
7635 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
7638 /* Walk over all of the fragments in a subsection. */
7639 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
7641 if ((fragP
->fr_type
== rs_align
7642 || fragP
->fr_type
== rs_align_code
7643 || (fragP
->fr_type
== rs_machine_dependent
7644 && (fragP
->fr_subtype
== RELAX_DESIRE_ALIGN
7645 || fragP
->fr_subtype
== RELAX_DESIRE_ALIGN_IF_TARGET
)))
7646 && fragP
->fr_fix
== 0)
7648 fragS
*next
= fragP
->fr_next
;
7651 && next
->fr_fix
== 0
7652 && next
->fr_type
== rs_machine_dependent
7653 && next
->fr_subtype
== RELAX_DESIRE_ALIGN_IF_TARGET
)
7656 next
= next
->fr_next
;
7659 /* If we don't widen branch targets, then they
7660 will be easier to align. */
7661 if (fragP
->tc_frag_data
.is_branch_target
7662 && fragP
->fr_opcode
== fragP
->fr_literal
7663 && fragP
->fr_type
== rs_machine_dependent
7664 && fragP
->fr_subtype
== RELAX_SLOTS
7665 && fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_NARROW
)
7667 if (fragP
->fr_type
== rs_machine_dependent
7668 && fragP
->fr_subtype
== RELAX_UNREACHABLE
)
7669 fragP
->tc_frag_data
.is_unreachable
= TRUE
;
7675 /* Re-process all of the fragments looking to convert all of the
7676 RELAX_DESIRE_ALIGN_IF_TARGET fragments. If there is a branch
7677 target in the next fragment, convert this to RELAX_DESIRE_ALIGN.
7678 Otherwise, convert to a .fill 0. */
7681 xtensa_fix_target_frags (void)
7686 /* When this routine is called, all of the subsections are still intact
7687 so we walk over subsections instead of sections. */
7688 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
7689 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
7693 /* Walk over all of the fragments in a subsection. */
7694 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
7696 if (fragP
->fr_type
== rs_machine_dependent
7697 && fragP
->fr_subtype
== RELAX_DESIRE_ALIGN_IF_TARGET
)
7699 if (next_frag_is_branch_target (fragP
))
7700 fragP
->fr_subtype
= RELAX_DESIRE_ALIGN
;
7709 static bfd_boolean
is_narrow_branch_guaranteed_in_range (fragS
*, TInsn
*);
7712 xtensa_mark_narrow_branches (void)
7717 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
7718 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
7721 /* Walk over all of the fragments in a subsection. */
7722 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
7724 if (fragP
->fr_type
== rs_machine_dependent
7725 && fragP
->fr_subtype
== RELAX_SLOTS
7726 && fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_IMMED
)
7730 vinsn_from_chars (&vinsn
, fragP
->fr_opcode
);
7731 tinsn_immed_from_frag (&vinsn
.slots
[0], fragP
, 0);
7733 if (vinsn
.num_slots
== 1
7734 && xtensa_opcode_is_branch (xtensa_default_isa
,
7735 vinsn
.slots
[0].opcode
) == 1
7736 && xg_get_single_size (vinsn
.slots
[0].opcode
) == 2
7737 && is_narrow_branch_guaranteed_in_range (fragP
,
7740 fragP
->fr_subtype
= RELAX_SLOTS
;
7741 fragP
->tc_frag_data
.slot_subtypes
[0] = RELAX_NARROW
;
7742 fragP
->tc_frag_data
.is_aligning_branch
= 1;
7750 /* A branch is typically widened only when its target is out of
7751 range. However, we would like to widen them to align a subsequent
7752 branch target when possible.
7754 Because the branch relaxation code is so convoluted, the optimal solution
7755 (combining the two cases) is difficult to get right in all circumstances.
7756 We therefore go with an "almost as good" solution, where we only
7757 use for alignment narrow branches that definitely will not expand to a
7758 jump and a branch. These functions find and mark these cases. */
7760 /* The range in bytes of BNEZ.N and BEQZ.N. The target operand is encoded
7761 as PC + 4 + imm6, where imm6 is a 6-bit immediate ranging from 0 to 63.
7762 We start counting beginning with the frag after the 2-byte branch, so the
7763 maximum offset is (4 - 2) + 63 = 65. */
7764 #define MAX_IMMED6 65
7766 static offsetT
unrelaxed_frag_max_size (fragS
*);
7769 is_narrow_branch_guaranteed_in_range (fragS
*fragP
, TInsn
*tinsn
)
7771 const expressionS
*exp
= &tinsn
->tok
[1];
7772 symbolS
*symbolP
= exp
->X_add_symbol
;
7773 offsetT max_distance
= exp
->X_add_number
;
7776 if (exp
->X_op
!= O_symbol
)
7779 target_frag
= symbol_get_frag (symbolP
);
7781 max_distance
+= (S_GET_VALUE (symbolP
) - target_frag
->fr_address
);
7782 if (is_branch_jmp_to_next (tinsn
, fragP
))
7785 /* The branch doesn't branch over it's own frag,
7786 but over the subsequent ones. */
7787 fragP
= fragP
->fr_next
;
7788 while (fragP
!= NULL
&& fragP
!= target_frag
&& max_distance
<= MAX_IMMED6
)
7790 max_distance
+= unrelaxed_frag_max_size (fragP
);
7791 fragP
= fragP
->fr_next
;
7793 if (max_distance
<= MAX_IMMED6
&& fragP
== target_frag
)
7800 xtensa_mark_zcl_first_insns (void)
7805 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
7806 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
7809 /* Walk over all of the fragments in a subsection. */
7810 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
7812 if (fragP
->fr_type
== rs_machine_dependent
7813 && (fragP
->fr_subtype
== RELAX_ALIGN_NEXT_OPCODE
7814 || fragP
->fr_subtype
== RELAX_CHECK_ALIGN_NEXT_OPCODE
))
7816 /* Find the loop frag. */
7817 fragS
*loop_frag
= next_non_empty_frag (fragP
);
7818 /* Find the first insn frag. */
7819 fragS
*targ_frag
= next_non_empty_frag (loop_frag
);
7821 /* Handle a corner case that comes up in hardware
7822 diagnostics. The original assembly looks like this:
7825 <empty_frag>--not found by next_non_empty_frag
7828 Depending on the start address, the assembler may or
7829 may not change it to look something like this:
7832 nop--frag isn't empty anymore
7835 So set up to check the alignment of the nop if it
7837 while (loop_frag
!= targ_frag
)
7839 if (loop_frag
->fr_type
== rs_machine_dependent
7840 && (loop_frag
->fr_subtype
== RELAX_ALIGN_NEXT_OPCODE
7841 || loop_frag
->fr_subtype
7842 == RELAX_CHECK_ALIGN_NEXT_OPCODE
))
7843 targ_frag
= loop_frag
;
7845 loop_frag
= loop_frag
->fr_next
;
7848 /* Of course, sometimes (mostly for toy test cases) a
7849 zero-cost loop instruction is the last in a section. */
7852 targ_frag
->tc_frag_data
.is_first_loop_insn
= TRUE
;
7853 /* Do not widen a frag that is the first instruction of a
7854 zero-cost loop. It makes that loop harder to align. */
7855 if (targ_frag
->fr_type
== rs_machine_dependent
7856 && targ_frag
->fr_subtype
== RELAX_SLOTS
7857 && (targ_frag
->tc_frag_data
.slot_subtypes
[0]
7860 if (targ_frag
->tc_frag_data
.is_aligning_branch
)
7861 targ_frag
->tc_frag_data
.slot_subtypes
[0] = RELAX_IMMED
;
7864 frag_wane (targ_frag
);
7865 targ_frag
->tc_frag_data
.slot_subtypes
[0] = 0;
7869 if (fragP
->fr_subtype
== RELAX_CHECK_ALIGN_NEXT_OPCODE
)
7877 /* When a difference-of-symbols expression is encoded as a uleb128 or
7878 sleb128 value, the linker is unable to adjust that value to account for
7879 link-time relaxation. Mark all the code between such symbols so that
7880 its size cannot be changed by linker relaxation. */
7883 xtensa_mark_difference_of_two_symbols (void)
7887 for (expr_sym
= expr_symbols
; expr_sym
;
7888 expr_sym
= symbol_get_tc (expr_sym
)->next_expr_symbol
)
7890 expressionS
*exp
= symbol_get_value_expression (expr_sym
);
7892 if (exp
->X_op
== O_subtract
)
7894 symbolS
*left
= exp
->X_add_symbol
;
7895 symbolS
*right
= exp
->X_op_symbol
;
7897 /* Difference of two symbols not in the same section
7898 are handled with relocations in the linker. */
7899 if (S_GET_SEGMENT (left
) == S_GET_SEGMENT (right
))
7905 if (symbol_get_frag (left
)->fr_address
7906 <= symbol_get_frag (right
)->fr_address
)
7908 start
= symbol_get_frag (left
);
7909 end
= symbol_get_frag (right
);
7913 start
= symbol_get_frag (right
);
7914 end
= symbol_get_frag (left
);
7917 if (start
->tc_frag_data
.no_transform_end
!= NULL
)
7918 walk
= start
->tc_frag_data
.no_transform_end
;
7923 walk
->tc_frag_data
.is_no_transform
= 1;
7924 walk
= walk
->fr_next
;
7926 while (walk
&& walk
->fr_address
< end
->fr_address
);
7928 start
->tc_frag_data
.no_transform_end
= walk
;
7935 /* Re-process all of the fragments looking to convert all of the
7936 RELAX_ADD_NOP_IF_A0_B_RETW. If the next instruction is a
7937 conditional branch or a retw/retw.n, convert this frag to one that
7938 will generate a NOP. In any case close it off with a .fill 0. */
7940 static bfd_boolean
next_instrs_are_b_retw (fragS
*);
7943 xtensa_fix_a0_b_retw_frags (void)
7948 /* When this routine is called, all of the subsections are still intact
7949 so we walk over subsections instead of sections. */
7950 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
7951 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
7955 /* Walk over all of the fragments in a subsection. */
7956 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
7958 if (fragP
->fr_type
== rs_machine_dependent
7959 && fragP
->fr_subtype
== RELAX_ADD_NOP_IF_A0_B_RETW
)
7961 if (next_instrs_are_b_retw (fragP
))
7963 if (fragP
->tc_frag_data
.is_no_transform
)
7964 as_bad (_("instruction sequence (write a0, branch, retw) may trigger hardware errata"));
7966 relax_frag_add_nop (fragP
);
7976 next_instrs_are_b_retw (fragS
*fragP
)
7978 xtensa_opcode opcode
;
7980 const fragS
*next_fragP
= next_non_empty_frag (fragP
);
7981 static xtensa_insnbuf insnbuf
= NULL
;
7982 static xtensa_insnbuf slotbuf
= NULL
;
7983 xtensa_isa isa
= xtensa_default_isa
;
7986 bfd_boolean branch_seen
= FALSE
;
7990 insnbuf
= xtensa_insnbuf_alloc (isa
);
7991 slotbuf
= xtensa_insnbuf_alloc (isa
);
7994 if (next_fragP
== NULL
)
7997 /* Check for the conditional branch. */
7998 xtensa_insnbuf_from_chars
7999 (isa
, insnbuf
, (unsigned char *) &next_fragP
->fr_literal
[offset
], 0);
8000 fmt
= xtensa_format_decode (isa
, insnbuf
);
8001 if (fmt
== XTENSA_UNDEFINED
)
8004 for (slot
= 0; slot
< xtensa_format_num_slots (isa
, fmt
); slot
++)
8006 xtensa_format_get_slot (isa
, fmt
, slot
, insnbuf
, slotbuf
);
8007 opcode
= xtensa_opcode_decode (isa
, fmt
, slot
, slotbuf
);
8009 branch_seen
= (branch_seen
8010 || xtensa_opcode_is_branch (isa
, opcode
) == 1);
8016 offset
+= xtensa_format_length (isa
, fmt
);
8017 if (offset
== next_fragP
->fr_fix
)
8019 next_fragP
= next_non_empty_frag (next_fragP
);
8023 if (next_fragP
== NULL
)
8026 /* Check for the retw/retw.n. */
8027 xtensa_insnbuf_from_chars
8028 (isa
, insnbuf
, (unsigned char *) &next_fragP
->fr_literal
[offset
], 0);
8029 fmt
= xtensa_format_decode (isa
, insnbuf
);
8031 /* Because RETW[.N] is not bundleable, a VLIW bundle here means that we
8032 have no problems. */
8033 if (fmt
== XTENSA_UNDEFINED
8034 || xtensa_format_num_slots (isa
, fmt
) != 1)
8037 xtensa_format_get_slot (isa
, fmt
, 0, insnbuf
, slotbuf
);
8038 opcode
= xtensa_opcode_decode (isa
, fmt
, 0, slotbuf
);
8040 if (opcode
== xtensa_retw_opcode
|| opcode
== xtensa_retw_n_opcode
)
8047 /* Re-process all of the fragments looking to convert all of the
8048 RELAX_ADD_NOP_IF_PRE_LOOP_END. If there is one instruction and a
8049 loop end label, convert this frag to one that will generate a NOP.
8050 In any case close it off with a .fill 0. */
8052 static bfd_boolean
next_instr_is_loop_end (fragS
*);
8055 xtensa_fix_b_j_loop_end_frags (void)
8060 /* When this routine is called, all of the subsections are still intact
8061 so we walk over subsections instead of sections. */
8062 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
8063 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
8067 /* Walk over all of the fragments in a subsection. */
8068 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
8070 if (fragP
->fr_type
== rs_machine_dependent
8071 && fragP
->fr_subtype
== RELAX_ADD_NOP_IF_PRE_LOOP_END
)
8073 if (next_instr_is_loop_end (fragP
))
8075 if (fragP
->tc_frag_data
.is_no_transform
)
8076 as_bad (_("branching or jumping to a loop end may trigger hardware errata"));
8078 relax_frag_add_nop (fragP
);
8088 next_instr_is_loop_end (fragS
*fragP
)
8090 const fragS
*next_fragP
;
8092 if (next_frag_is_loop_target (fragP
))
8095 next_fragP
= next_non_empty_frag (fragP
);
8096 if (next_fragP
== NULL
)
8099 if (!next_frag_is_loop_target (next_fragP
))
8102 /* If the size is >= 3 then there is more than one instruction here.
8103 The hardware bug will not fire. */
8104 if (next_fragP
->fr_fix
> 3)
8111 /* Re-process all of the fragments looking to convert all of the
8112 RELAX_ADD_NOP_IF_CLOSE_LOOP_END. If there is an loop end that is
8113 not MY loop's loop end within 12 bytes, add enough nops here to
8114 make it at least 12 bytes away. In any case close it off with a
8117 static offsetT min_bytes_to_other_loop_end
8118 (fragS
*, fragS
*, offsetT
);
8121 xtensa_fix_close_loop_end_frags (void)
8126 /* When this routine is called, all of the subsections are still intact
8127 so we walk over subsections instead of sections. */
8128 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
8129 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
8133 fragS
*current_target
= NULL
;
8135 /* Walk over all of the fragments in a subsection. */
8136 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
8138 if (fragP
->fr_type
== rs_machine_dependent
8139 && ((fragP
->fr_subtype
== RELAX_ALIGN_NEXT_OPCODE
)
8140 || (fragP
->fr_subtype
== RELAX_CHECK_ALIGN_NEXT_OPCODE
)))
8141 current_target
= symbol_get_frag (fragP
->fr_symbol
);
8144 && fragP
->fr_type
== rs_machine_dependent
8145 && fragP
->fr_subtype
== RELAX_ADD_NOP_IF_CLOSE_LOOP_END
)
8148 int bytes_added
= 0;
8150 #define REQUIRED_LOOP_DIVIDING_BYTES 12
8151 /* Max out at 12. */
8152 min_bytes
= min_bytes_to_other_loop_end
8153 (fragP
->fr_next
, current_target
, REQUIRED_LOOP_DIVIDING_BYTES
);
8155 if (min_bytes
< REQUIRED_LOOP_DIVIDING_BYTES
)
8157 if (fragP
->tc_frag_data
.is_no_transform
)
8158 as_bad (_("loop end too close to another loop end may trigger hardware errata"));
8161 while (min_bytes
+ bytes_added
8162 < REQUIRED_LOOP_DIVIDING_BYTES
)
8166 if (fragP
->fr_var
< length
)
8167 as_fatal (_("fr_var %lu < length %d"),
8168 (long) fragP
->fr_var
, length
);
8171 assemble_nop (length
,
8172 fragP
->fr_literal
+ fragP
->fr_fix
);
8173 fragP
->fr_fix
+= length
;
8174 fragP
->fr_var
-= length
;
8176 bytes_added
+= length
;
8182 gas_assert (fragP
->fr_type
!= rs_machine_dependent
8183 || fragP
->fr_subtype
!= RELAX_ADD_NOP_IF_CLOSE_LOOP_END
);
8189 static offsetT
unrelaxed_frag_min_size (fragS
*);
8192 min_bytes_to_other_loop_end (fragS
*fragP
,
8193 fragS
*current_target
,
8197 fragS
*current_fragP
;
8199 for (current_fragP
= fragP
;
8201 current_fragP
= current_fragP
->fr_next
)
8203 if (current_fragP
->tc_frag_data
.is_loop_target
8204 && current_fragP
!= current_target
)
8207 offset
+= unrelaxed_frag_min_size (current_fragP
);
8209 if (offset
>= max_size
)
8217 unrelaxed_frag_min_size (fragS
*fragP
)
8219 offsetT size
= fragP
->fr_fix
;
8221 /* Add fill size. */
8222 if (fragP
->fr_type
== rs_fill
)
8223 size
+= fragP
->fr_offset
;
8230 unrelaxed_frag_max_size (fragS
*fragP
)
8232 offsetT size
= fragP
->fr_fix
;
8233 switch (fragP
->fr_type
)
8236 /* Empty frags created by the obstack allocation scheme
8237 end up with type 0. */
8242 size
+= fragP
->fr_offset
;
8250 /* No further adjustments needed. */
8252 case rs_machine_dependent
:
8253 if (fragP
->fr_subtype
!= RELAX_DESIRE_ALIGN
)
8254 size
+= fragP
->fr_var
;
8257 /* We had darn well better know how big it is. */
8266 /* Re-process all of the fragments looking to convert all
8267 of the RELAX_ADD_NOP_IF_SHORT_LOOP. If:
8270 1) the instruction size count to the loop end label
8271 is too short (<= 2 instructions),
8272 2) loop has a jump or branch in it
8275 1) workaround_all_short_loops is TRUE
8276 2) The generating loop was a 'loopgtz' or 'loopnez'
8277 3) the instruction size count to the loop end label is too short
8279 then convert this frag (and maybe the next one) to generate a NOP.
8280 In any case close it off with a .fill 0. */
8282 static int count_insns_to_loop_end (fragS
*, bfd_boolean
, int);
8283 static bfd_boolean
branch_before_loop_end (fragS
*);
8286 xtensa_fix_short_loop_frags (void)
8291 /* When this routine is called, all of the subsections are still intact
8292 so we walk over subsections instead of sections. */
8293 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
8294 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
8297 xtensa_opcode current_opcode
= XTENSA_UNDEFINED
;
8299 /* Walk over all of the fragments in a subsection. */
8300 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
8302 if (fragP
->fr_type
== rs_machine_dependent
8303 && ((fragP
->fr_subtype
== RELAX_ALIGN_NEXT_OPCODE
)
8304 || (fragP
->fr_subtype
== RELAX_CHECK_ALIGN_NEXT_OPCODE
)))
8307 fragS
*loop_frag
= next_non_empty_frag (fragP
);
8308 tinsn_from_chars (&t_insn
, loop_frag
->fr_opcode
, 0);
8309 current_opcode
= t_insn
.opcode
;
8310 gas_assert (xtensa_opcode_is_loop (xtensa_default_isa
,
8311 current_opcode
) == 1);
8314 if (fragP
->fr_type
== rs_machine_dependent
8315 && fragP
->fr_subtype
== RELAX_ADD_NOP_IF_SHORT_LOOP
)
8317 if (count_insns_to_loop_end (fragP
->fr_next
, TRUE
, 3) < 3
8318 && (branch_before_loop_end (fragP
->fr_next
)
8319 || (workaround_all_short_loops
8320 && current_opcode
!= XTENSA_UNDEFINED
8321 && current_opcode
!= xtensa_loop_opcode
)))
8323 if (fragP
->tc_frag_data
.is_no_transform
)
8324 as_bad (_("loop containing less than three instructions may trigger hardware errata"));
8326 relax_frag_add_nop (fragP
);
8335 static int unrelaxed_frag_min_insn_count (fragS
*);
8338 count_insns_to_loop_end (fragS
*base_fragP
,
8339 bfd_boolean count_relax_add
,
8342 fragS
*fragP
= NULL
;
8347 for (; fragP
&& !fragP
->tc_frag_data
.is_loop_target
; fragP
= fragP
->fr_next
)
8349 insn_count
+= unrelaxed_frag_min_insn_count (fragP
);
8350 if (insn_count
>= max_count
)
8353 if (count_relax_add
)
8355 if (fragP
->fr_type
== rs_machine_dependent
8356 && fragP
->fr_subtype
== RELAX_ADD_NOP_IF_SHORT_LOOP
)
8358 /* In order to add the appropriate number of
8359 NOPs, we count an instruction for downstream
8362 if (insn_count
>= max_count
)
8372 unrelaxed_frag_min_insn_count (fragS
*fragP
)
8374 xtensa_isa isa
= xtensa_default_isa
;
8375 static xtensa_insnbuf insnbuf
= NULL
;
8379 if (!fragP
->tc_frag_data
.is_insn
)
8383 insnbuf
= xtensa_insnbuf_alloc (isa
);
8385 /* Decode the fixed instructions. */
8386 while (offset
< fragP
->fr_fix
)
8390 xtensa_insnbuf_from_chars
8391 (isa
, insnbuf
, (unsigned char *) fragP
->fr_literal
+ offset
, 0);
8392 fmt
= xtensa_format_decode (isa
, insnbuf
);
8394 if (fmt
== XTENSA_UNDEFINED
)
8396 as_fatal (_("undecodable instruction in instruction frag"));
8399 offset
+= xtensa_format_length (isa
, fmt
);
8407 static bfd_boolean
unrelaxed_frag_has_b_j (fragS
*);
8410 branch_before_loop_end (fragS
*base_fragP
)
8414 for (fragP
= base_fragP
;
8415 fragP
&& !fragP
->tc_frag_data
.is_loop_target
;
8416 fragP
= fragP
->fr_next
)
8418 if (unrelaxed_frag_has_b_j (fragP
))
8426 unrelaxed_frag_has_b_j (fragS
*fragP
)
8428 static xtensa_insnbuf insnbuf
= NULL
;
8429 xtensa_isa isa
= xtensa_default_isa
;
8432 if (!fragP
->tc_frag_data
.is_insn
)
8436 insnbuf
= xtensa_insnbuf_alloc (isa
);
8438 /* Decode the fixed instructions. */
8439 while (offset
< fragP
->fr_fix
)
8444 xtensa_insnbuf_from_chars
8445 (isa
, insnbuf
, (unsigned char *) fragP
->fr_literal
+ offset
, 0);
8446 fmt
= xtensa_format_decode (isa
, insnbuf
);
8447 if (fmt
== XTENSA_UNDEFINED
)
8450 for (slot
= 0; slot
< xtensa_format_num_slots (isa
, fmt
); slot
++)
8452 xtensa_opcode opcode
=
8453 get_opcode_from_buf (fragP
->fr_literal
+ offset
, slot
);
8454 if (xtensa_opcode_is_branch (isa
, opcode
) == 1
8455 || xtensa_opcode_is_jump (isa
, opcode
) == 1)
8458 offset
+= xtensa_format_length (isa
, fmt
);
8464 /* Checks to be made after initial assembly but before relaxation. */
8466 static bfd_boolean
is_empty_loop (const TInsn
*, fragS
*);
8467 static bfd_boolean
is_local_forward_loop (const TInsn
*, fragS
*);
8470 xtensa_sanity_check (void)
8472 const char *file_name
;
8477 file_name
= as_where (&line
);
8478 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
8479 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
8483 /* Walk over all of the fragments in a subsection. */
8484 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
8486 if (fragP
->fr_type
== rs_machine_dependent
8487 && fragP
->fr_subtype
== RELAX_SLOTS
8488 && fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_IMMED
)
8490 static xtensa_insnbuf insnbuf
= NULL
;
8493 if (fragP
->fr_opcode
!= NULL
)
8496 insnbuf
= xtensa_insnbuf_alloc (xtensa_default_isa
);
8497 tinsn_from_chars (&t_insn
, fragP
->fr_opcode
, 0);
8498 tinsn_immed_from_frag (&t_insn
, fragP
, 0);
8500 if (xtensa_opcode_is_loop (xtensa_default_isa
,
8501 t_insn
.opcode
) == 1)
8503 if (is_empty_loop (&t_insn
, fragP
))
8505 new_logical_line (fragP
->fr_file
, fragP
->fr_line
);
8506 as_bad (_("invalid empty loop"));
8508 if (!is_local_forward_loop (&t_insn
, fragP
))
8510 new_logical_line (fragP
->fr_file
, fragP
->fr_line
);
8511 as_bad (_("loop target does not follow "
8512 "loop instruction in section"));
8519 new_logical_line (file_name
, line
);
8523 #define LOOP_IMMED_OPN 1
8525 /* Return TRUE if the loop target is the next non-zero fragment. */
8528 is_empty_loop (const TInsn
*insn
, fragS
*fragP
)
8530 const expressionS
*exp
;
8534 if (insn
->insn_type
!= ITYPE_INSN
)
8537 if (xtensa_opcode_is_loop (xtensa_default_isa
, insn
->opcode
) != 1)
8540 if (insn
->ntok
<= LOOP_IMMED_OPN
)
8543 exp
= &insn
->tok
[LOOP_IMMED_OPN
];
8545 if (exp
->X_op
!= O_symbol
)
8548 symbolP
= exp
->X_add_symbol
;
8552 if (symbol_get_frag (symbolP
) == NULL
)
8555 if (S_GET_VALUE (symbolP
) != 0)
8558 /* Walk through the zero-size fragments from this one. If we find
8559 the target fragment, then this is a zero-size loop. */
8561 for (next_fragP
= fragP
->fr_next
;
8563 next_fragP
= next_fragP
->fr_next
)
8565 if (next_fragP
== symbol_get_frag (symbolP
))
8567 if (next_fragP
->fr_fix
!= 0)
8575 is_local_forward_loop (const TInsn
*insn
, fragS
*fragP
)
8577 const expressionS
*exp
;
8581 if (insn
->insn_type
!= ITYPE_INSN
)
8584 if (xtensa_opcode_is_loop (xtensa_default_isa
, insn
->opcode
) != 1)
8587 if (insn
->ntok
<= LOOP_IMMED_OPN
)
8590 exp
= &insn
->tok
[LOOP_IMMED_OPN
];
8592 if (exp
->X_op
!= O_symbol
)
8595 symbolP
= exp
->X_add_symbol
;
8599 if (symbol_get_frag (symbolP
) == NULL
)
8602 /* Walk through fragments until we find the target.
8603 If we do not find the target, then this is an invalid loop. */
8605 for (next_fragP
= fragP
->fr_next
;
8607 next_fragP
= next_fragP
->fr_next
)
8609 if (next_fragP
== symbol_get_frag (symbolP
))
8617 #define XTINFO_NAME "Xtensa_Info"
8618 #define XTINFO_NAMESZ 12
8619 #define XTINFO_TYPE 1
8622 xtensa_add_config_info (void)
8628 info_sec
= subseg_new (".xtensa.info", 0);
8629 bfd_set_section_flags (stdoutput
, info_sec
, SEC_HAS_CONTENTS
| SEC_READONLY
);
8631 data
= XNEWVEC (char, 100);
8632 sprintf (data
, "USE_ABSOLUTE_LITERALS=%d\nABI=%d\n",
8633 XSHAL_USE_ABSOLUTE_LITERALS
, XSHAL_ABI
);
8634 sz
= strlen (data
) + 1;
8636 /* Add enough null terminators to pad to a word boundary. */
8639 while ((sz
& 3) != 0);
8641 /* Follow the standard note section layout:
8642 First write the length of the name string. */
8644 md_number_to_chars (p
, (valueT
) XTINFO_NAMESZ
, 4);
8646 /* Next comes the length of the "descriptor", i.e., the actual data. */
8648 md_number_to_chars (p
, (valueT
) sz
, 4);
8650 /* Write the note type. */
8652 md_number_to_chars (p
, (valueT
) XTINFO_TYPE
, 4);
8654 /* Write the name field. */
8655 p
= frag_more (XTINFO_NAMESZ
);
8656 memcpy (p
, XTINFO_NAME
, XTINFO_NAMESZ
);
8658 /* Finally, write the descriptor. */
8660 memcpy (p
, data
, sz
);
8666 /* Alignment Functions. */
8669 get_text_align_power (unsigned target_size
)
8671 if (target_size
<= 4)
8674 if (target_size
<= 8)
8677 if (target_size
<= 16)
8680 if (target_size
<= 32)
8683 if (target_size
<= 64)
8686 if (target_size
<= 128)
8689 if (target_size
<= 256)
8692 if (target_size
<= 512)
8695 if (target_size
<= 1024)
8704 get_text_align_max_fill_size (int align_pow
,
8705 bfd_boolean use_nops
,
8706 bfd_boolean use_no_density
)
8709 return (1 << align_pow
);
8711 return 3 * (1 << align_pow
);
8713 return 1 + (1 << align_pow
);
8717 /* Calculate the minimum bytes of fill needed at "address" to align a
8718 target instruction of size "target_size" so that it does not cross a
8719 power-of-two boundary specified by "align_pow". If "use_nops" is FALSE,
8720 the fill can be an arbitrary number of bytes. Otherwise, the space must
8721 be filled by NOP instructions. */
8724 get_text_align_fill_size (addressT address
,
8727 bfd_boolean use_nops
,
8728 bfd_boolean use_no_density
)
8730 addressT alignment
, fill
, fill_limit
, fill_step
;
8731 bfd_boolean skip_one
= FALSE
;
8733 alignment
= (1 << align_pow
);
8734 gas_assert (target_size
> 0 && alignment
>= (addressT
) target_size
);
8738 fill_limit
= alignment
;
8741 else if (!use_no_density
)
8743 /* Combine 2- and 3-byte NOPs to fill anything larger than one. */
8744 fill_limit
= alignment
* 2;
8750 /* Fill with 3-byte NOPs -- can only fill multiples of 3. */
8751 fill_limit
= alignment
* 3;
8755 /* Try all fill sizes until finding one that works. */
8756 for (fill
= 0; fill
< fill_limit
; fill
+= fill_step
)
8758 if (skip_one
&& fill
== 1)
8760 if ((address
+ fill
) >> align_pow
8761 == (address
+ fill
+ target_size
- 1) >> align_pow
)
8770 branch_align_power (segT sec
)
8772 /* If the Xtensa processor has a fetch width of X, and
8773 the section is aligned to at least that boundary, then a branch
8774 target need only fit within that aligned block of memory to avoid
8775 a stall. Otherwise, try to fit branch targets within 4-byte
8776 aligned blocks (which may be insufficient, e.g., if the section
8777 has no alignment, but it's good enough). */
8778 int fetch_align
= get_text_align_power(xtensa_fetch_width
);
8779 int sec_align
= get_recorded_alignment (sec
);
8781 if (sec_align
>= fetch_align
)
8788 /* This will assert if it is not possible. */
8791 get_text_align_nop_count (offsetT fill_size
, bfd_boolean use_no_density
)
8797 gas_assert (fill_size
% 3 == 0);
8798 return (fill_size
/ 3);
8801 gas_assert (fill_size
!= 1); /* Bad argument. */
8803 while (fill_size
> 1)
8806 if (fill_size
== 2 || fill_size
== 4)
8808 fill_size
-= insn_size
;
8811 gas_assert (fill_size
!= 1); /* Bad algorithm. */
8817 get_text_align_nth_nop_size (offsetT fill_size
,
8819 bfd_boolean use_no_density
)
8826 gas_assert (fill_size
!= 1); /* Bad argument. */
8828 while (fill_size
> 1)
8831 if (fill_size
== 2 || fill_size
== 4)
8833 fill_size
-= insn_size
;
8843 /* For the given fragment, find the appropriate address
8844 for it to begin at if we are using NOPs to align it. */
8847 get_noop_aligned_address (fragS
*fragP
, addressT address
)
8849 /* The rule is: get next fragment's FIRST instruction. Find
8850 the smallest number of bytes that need to be added to
8851 ensure that the next fragment's FIRST instruction will fit
8854 E.G., 2 bytes : 0, 1, 2 mod 4
8857 If the FIRST instruction MIGHT be relaxed,
8858 assume that it will become a 3-byte instruction.
8860 Note again here that LOOP instructions are not bundleable,
8861 and this relaxation only applies to LOOP opcodes. */
8864 int first_insn_size
;
8866 addressT pre_opcode_bytes
;
8869 xtensa_opcode opcode
;
8870 bfd_boolean is_loop
;
8872 gas_assert (fragP
->fr_type
== rs_machine_dependent
);
8873 gas_assert (fragP
->fr_subtype
== RELAX_ALIGN_NEXT_OPCODE
);
8875 /* Find the loop frag. */
8876 first_insn
= next_non_empty_frag (fragP
);
8877 /* Now find the first insn frag. */
8878 first_insn
= next_non_empty_frag (first_insn
);
8880 is_loop
= next_frag_opcode_is_loop (fragP
, &opcode
);
8881 gas_assert (is_loop
);
8882 loop_insn_size
= xg_get_single_size (opcode
);
8884 pre_opcode_bytes
= next_frag_pre_opcode_bytes (fragP
);
8885 pre_opcode_bytes
+= loop_insn_size
;
8887 /* For loops, the alignment depends on the size of the
8888 instruction following the loop, not the LOOP instruction. */
8890 if (first_insn
== NULL
)
8891 first_insn_size
= xtensa_fetch_width
;
8893 first_insn_size
= get_loop_align_size (frag_format_size (first_insn
));
8895 /* If it was 8, then we'll need a larger alignment for the section. */
8896 align_power
= get_text_align_power (first_insn_size
);
8897 record_alignment (now_seg
, align_power
);
8899 fill_size
= get_text_align_fill_size
8900 (address
+ pre_opcode_bytes
, align_power
, first_insn_size
, TRUE
,
8901 fragP
->tc_frag_data
.is_no_density
);
8903 return address
+ fill_size
;
8907 /* 3 mechanisms for relaxing an alignment:
8909 Align to a power of 2.
8910 Align so the next fragment's instruction does not cross a word boundary.
8911 Align the current instruction so that if the next instruction
8912 were 3 bytes, it would not cross a word boundary.
8916 zeros - This is easy; always insert zeros.
8917 nops - 3-byte and 2-byte instructions
8921 >=5 : 3-byte instruction + fn (n-3)
8922 widening - widen previous instructions. */
8925 get_aligned_diff (fragS
*fragP
, addressT address
, offsetT
*max_diff
)
8927 addressT target_address
, loop_insn_offset
;
8929 xtensa_opcode loop_opcode
;
8930 bfd_boolean is_loop
;
8933 offsetT branch_align
;
8936 gas_assert (fragP
->fr_type
== rs_machine_dependent
);
8937 switch (fragP
->fr_subtype
)
8939 case RELAX_DESIRE_ALIGN
:
8940 target_size
= next_frag_format_size (fragP
);
8941 if (target_size
== XTENSA_UNDEFINED
)
8943 align_power
= branch_align_power (now_seg
);
8944 branch_align
= 1 << align_power
;
8945 /* Don't count on the section alignment being as large as the target. */
8946 if (target_size
> branch_align
)
8947 target_size
= branch_align
;
8948 opt_diff
= get_text_align_fill_size (address
, align_power
,
8949 target_size
, FALSE
, FALSE
);
8951 *max_diff
= (opt_diff
+ branch_align
8952 - (target_size
+ ((address
+ opt_diff
) % branch_align
)));
8953 gas_assert (*max_diff
>= opt_diff
);
8956 case RELAX_ALIGN_NEXT_OPCODE
:
8957 /* The next non-empty frag after this one holds the LOOP instruction
8958 that needs to be aligned. The required alignment depends on the
8959 size of the next non-empty frag after the loop frag, i.e., the
8960 first instruction in the loop. */
8961 loop_frag
= next_non_empty_frag (fragP
);
8962 target_size
= get_loop_align_size (next_frag_format_size (loop_frag
));
8963 loop_insn_offset
= 0;
8964 is_loop
= next_frag_opcode_is_loop (fragP
, &loop_opcode
);
8965 gas_assert (is_loop
);
8967 /* If the loop has been expanded then the LOOP instruction
8968 could be at an offset from this fragment. */
8969 if (loop_frag
->tc_frag_data
.slot_subtypes
[0] != RELAX_IMMED
)
8970 loop_insn_offset
= get_expanded_loop_offset (loop_opcode
);
8972 /* In an ideal world, which is what we are shooting for here,
8973 we wouldn't need to use any NOPs immediately prior to the
8974 LOOP instruction. If this approach fails, relax_frag_loop_align
8975 will call get_noop_aligned_address. */
8977 address
+ loop_insn_offset
+ xg_get_single_size (loop_opcode
);
8978 align_power
= get_text_align_power (target_size
);
8979 opt_diff
= get_text_align_fill_size (target_address
, align_power
,
8980 target_size
, FALSE
, FALSE
);
8982 *max_diff
= xtensa_fetch_width
8983 - ((target_address
+ opt_diff
) % xtensa_fetch_width
)
8984 - target_size
+ opt_diff
;
8985 gas_assert (*max_diff
>= opt_diff
);
8996 /* md_relax_frag Hook and Helper Functions. */
8998 static long relax_frag_loop_align (fragS
*, long);
8999 static long relax_frag_for_align (fragS
*, long);
9000 static long relax_frag_immed
9001 (segT
, fragS
*, long, int, xtensa_format
, int, int *, bfd_boolean
);
9003 typedef struct cached_fixup cached_fixupS
;
9012 typedef struct fixup_cache fixup_cacheS
;
9015 cached_fixupS
*fixups
;
9023 static int fixup_order (const void *a
, const void *b
)
9025 const cached_fixupS
*pa
= a
;
9026 const cached_fixupS
*pb
= b
;
9028 if (pa
->addr
== pb
->addr
)
9030 if (pa
->target
== pb
->target
)
9032 if (pa
->fixP
->fx_r_type
== pb
->fixP
->fx_r_type
)
9034 return pa
->fixP
->fx_r_type
< pb
->fixP
->fx_r_type
? -1 : 1;
9036 return pa
->target
- pb
->target
;
9038 return pa
->addr
- pb
->addr
;
9041 static bfd_boolean
xtensa_make_cached_fixup (cached_fixupS
*o
, fixS
*fixP
)
9043 xtensa_isa isa
= xtensa_default_isa
;
9044 int addr
= fixP
->fx_frag
->fr_address
;
9047 symbolS
*s
= fixP
->fx_addsy
;
9050 xtensa_opcode opcode
;
9052 if (fixP
->fx_r_type
< BFD_RELOC_XTENSA_SLOT0_OP
||
9053 fixP
->fx_r_type
> BFD_RELOC_XTENSA_SLOT14_OP
)
9055 target
= S_GET_VALUE (s
);
9056 delta
= target
- addr
;
9058 if (abs(delta
) < J_RANGE
/ 2)
9061 xtensa_insnbuf_from_chars (isa
, trampoline_buf
,
9062 (unsigned char *) fixP
->fx_frag
->fr_literal
+
9064 fmt
= xtensa_format_decode (isa
, trampoline_buf
);
9065 gas_assert (fmt
!= XTENSA_UNDEFINED
);
9066 slot
= fixP
->tc_fix_data
.slot
;
9067 xtensa_format_get_slot (isa
, fmt
, slot
, trampoline_buf
, trampoline_slotbuf
);
9068 opcode
= xtensa_opcode_decode (isa
, fmt
, slot
, trampoline_slotbuf
);
9069 if (opcode
!= xtensa_j_opcode
)
9080 static void xtensa_realloc_fixup_cache (fixup_cacheS
*cache
, unsigned add
)
9082 if (cache
->n_fixups
+ add
> cache
->n_max
)
9084 cache
->n_max
= (cache
->n_fixups
+ add
) * 2;
9085 cache
->fixups
= XRESIZEVEC (cached_fixupS
, cache
->fixups
, cache
->n_max
);
9089 static void xtensa_cache_relaxable_fixups (fixup_cacheS
*cache
,
9090 segment_info_type
*seginfo
)
9094 cache
->n_fixups
= 0;
9096 for (fixP
= seginfo
->fix_root
; fixP
; fixP
= fixP
->fx_next
)
9098 xtensa_realloc_fixup_cache (cache
, 1);
9100 if (xtensa_make_cached_fixup (cache
->fixups
+ cache
->n_fixups
, fixP
))
9103 qsort (cache
->fixups
, cache
->n_fixups
, sizeof (*cache
->fixups
), fixup_order
);
9106 static unsigned xtensa_find_first_cached_fixup (const fixup_cacheS
*cache
,
9110 unsigned b
= cache
->n_fixups
;
9114 unsigned c
= (a
+ b
) / 2;
9116 if (cache
->fixups
[c
].addr
< addr
)
9124 static void xtensa_delete_cached_fixup (fixup_cacheS
*cache
, unsigned i
)
9126 memmove (cache
->fixups
+ i
, cache
->fixups
+ i
+ 1,
9127 (cache
->n_fixups
- i
- 1) * sizeof (*cache
->fixups
));
9131 static bfd_boolean
xtensa_add_cached_fixup (fixup_cacheS
*cache
, fixS
*fixP
)
9136 if (!xtensa_make_cached_fixup (&o
, fixP
))
9138 xtensa_realloc_fixup_cache (cache
, 1);
9139 i
= xtensa_find_first_cached_fixup (cache
, o
.addr
);
9140 if (i
< cache
->n_fixups
)
9143 memmove (cache
->fixups
+ i
+ 1, cache
->fixups
+ i
,
9144 (cache
->n_fixups
- i
) * sizeof (*cache
->fixups
));
9146 cache
->fixups
[i
] = o
;
9151 /* Return the number of bytes added to this fragment, given that the
9152 input has been stretched already by "stretch". */
9155 xtensa_relax_frag (fragS
*fragP
, long stretch
, int *stretched_p
)
9157 xtensa_isa isa
= xtensa_default_isa
;
9158 int unreported
= fragP
->tc_frag_data
.unreported_expansion
;
9159 long new_stretch
= 0;
9160 const char *file_name
;
9163 static xtensa_insnbuf vbuf
= NULL
;
9164 int slot
, num_slots
;
9167 file_name
= as_where (&line
);
9168 new_logical_line (fragP
->fr_file
, fragP
->fr_line
);
9170 fragP
->tc_frag_data
.unreported_expansion
= 0;
9172 switch (fragP
->fr_subtype
)
9174 case RELAX_ALIGN_NEXT_OPCODE
:
9175 /* Always convert. */
9176 if (fragP
->tc_frag_data
.relax_seen
)
9177 new_stretch
= relax_frag_loop_align (fragP
, stretch
);
9180 case RELAX_LOOP_END
:
9184 case RELAX_LOOP_END_ADD_NOP
:
9185 /* Add a NOP and switch to .fill 0. */
9186 new_stretch
= relax_frag_add_nop (fragP
);
9190 case RELAX_DESIRE_ALIGN
:
9191 /* Do nothing. The narrowing before this frag will either align
9196 case RELAX_LITERAL_FINAL
:
9199 case RELAX_LITERAL_NR
:
9201 fragP
->fr_subtype
= RELAX_LITERAL_FINAL
;
9202 gas_assert (unreported
== lit_size
);
9203 memset (&fragP
->fr_literal
[fragP
->fr_fix
], 0, 4);
9204 fragP
->fr_var
-= lit_size
;
9205 fragP
->fr_fix
+= lit_size
;
9211 vbuf
= xtensa_insnbuf_alloc (isa
);
9213 xtensa_insnbuf_from_chars
9214 (isa
, vbuf
, (unsigned char *) fragP
->fr_opcode
, 0);
9215 fmt
= xtensa_format_decode (isa
, vbuf
);
9216 num_slots
= xtensa_format_num_slots (isa
, fmt
);
9218 for (slot
= 0; slot
< num_slots
; slot
++)
9220 switch (fragP
->tc_frag_data
.slot_subtypes
[slot
])
9223 if (fragP
->tc_frag_data
.relax_seen
)
9224 new_stretch
+= relax_frag_for_align (fragP
, stretch
);
9228 case RELAX_IMMED_STEP1
:
9229 case RELAX_IMMED_STEP2
:
9230 case RELAX_IMMED_STEP3
:
9231 /* Place the immediate. */
9232 new_stretch
+= relax_frag_immed
9233 (now_seg
, fragP
, stretch
,
9234 fragP
->tc_frag_data
.slot_subtypes
[slot
] - RELAX_IMMED
,
9235 fmt
, slot
, stretched_p
, FALSE
);
9239 /* This is OK; see the note in xg_assemble_vliw_tokens. */
9245 case RELAX_LITERAL_POOL_BEGIN
:
9246 if (fragP
->fr_var
!= 0)
9248 /* We have a converted "candidate" literal pool;
9249 assemble a jump around it. */
9251 if (!litpool_slotbuf
)
9253 litpool_buf
= xtensa_insnbuf_alloc (isa
);
9254 litpool_slotbuf
= xtensa_insnbuf_alloc (isa
);
9257 fragP
->tc_frag_data
.relax_seen
= FALSE
; /* Need another pass. */
9258 fragP
->tc_frag_data
.is_insn
= TRUE
;
9260 insn
.insn_type
= ITYPE_INSN
;
9261 insn
.opcode
= xtensa_j_opcode
;
9263 set_expr_symbol_offset (&insn
.tok
[0], fragP
->fr_symbol
,
9265 fmt
= xg_get_single_format (xtensa_j_opcode
);
9266 tinsn_to_slotbuf (fmt
, 0, &insn
, litpool_slotbuf
);
9267 xtensa_format_set_slot (isa
, fmt
, 0, litpool_buf
, litpool_slotbuf
);
9268 xtensa_insnbuf_to_chars (isa
, litpool_buf
,
9269 (unsigned char *)fragP
->fr_literal
+
9274 fix_new (fragP
, 0, 3, fragP
->fr_symbol
, 0, TRUE
,
9275 BFD_RELOC_XTENSA_SLOT0_OP
);
9279 case RELAX_LITERAL_POOL_END
:
9280 case RELAX_LITERAL_POOL_CANDIDATE_BEGIN
:
9281 case RELAX_MAYBE_UNREACHABLE
:
9282 case RELAX_MAYBE_DESIRE_ALIGN
:
9283 /* No relaxation required. */
9286 case RELAX_FILL_NOP
:
9287 case RELAX_UNREACHABLE
:
9288 if (fragP
->tc_frag_data
.relax_seen
)
9289 new_stretch
+= relax_frag_for_align (fragP
, stretch
);
9292 case RELAX_TRAMPOLINE
:
9293 if (fragP
->tc_frag_data
.relax_seen
)
9295 static fixup_cacheS fixup_cache
;
9296 segment_info_type
*seginfo
= seg_info (now_seg
);
9297 int trampaddr
= fragP
->fr_address
+ fragP
->fr_fix
;
9298 int searchaddr
= trampaddr
< J_RANGE
? 0 : trampaddr
- J_RANGE
;
9301 if (now_seg
!= fixup_cache
.seg
||
9302 fragP
== fixup_cache
.first_frag
||
9303 fixup_cache
.first_frag
== NULL
)
9305 xtensa_cache_relaxable_fixups (&fixup_cache
, seginfo
);
9306 fixup_cache
.seg
= now_seg
;
9307 fixup_cache
.first_frag
= fragP
;
9310 /* Scan for jumps that will not reach. */
9311 for (i
= xtensa_find_first_cached_fixup (&fixup_cache
, searchaddr
);
9312 i
< fixup_cache
.n_fixups
; ++i
)
9315 fixS
*fixP
= fixup_cache
.fixups
[i
].fixP
;
9316 int target
= fixup_cache
.fixups
[i
].target
;
9317 int addr
= fixup_cache
.fixups
[i
].addr
;
9318 int delta
= fixup_cache
.fixups
[i
].delta
+ stretch
;
9320 trampaddr
= fragP
->fr_address
+ fragP
->fr_fix
;
9322 if (addr
+ J_RANGE
< trampaddr
)
9324 if (addr
> trampaddr
+ J_RANGE
)
9326 if (abs (delta
) < J_RANGE
)
9329 slot
= fixP
->tc_fix_data
.slot
;
9331 if (delta
> J_RANGE
|| delta
< -1 * J_RANGE
)
9332 { /* Found an out-of-range jump; scan the list of trampolines for the best match. */
9333 struct trampoline_seg
*ts
= find_trampoline_seg (now_seg
);
9334 struct trampoline_frag
*tf
= ts
->trampoline_list
.next
;
9335 struct trampoline_frag
*prev
= &ts
->trampoline_list
;
9336 int lower
= (target
< addr
) ? target
: addr
;
9337 int upper
= (target
> addr
) ? target
: addr
;
9338 int midpoint
= lower
+ (upper
- lower
) / 2;
9340 if ((upper
- lower
) > 2 * J_RANGE
)
9342 /* One trampoline won't suffice; we need multiple jumps.
9343 Jump to the trampoline that's farthest, but still in
9344 range relative to the original "j" instruction. */
9345 for ( ; tf
; prev
= tf
, tf
= tf
->next
)
9347 int this_addr
= tf
->fragP
->fr_address
+ tf
->fragP
->fr_fix
;
9348 int next_addr
= (tf
->next
) ? tf
->next
->fragP
->fr_address
+ tf
->next
->fragP
->fr_fix
: 0 ;
9353 if (this_addr
- addr
< J_RANGE
)
9358 /* Backward jump. */
9359 if (next_addr
== 0 || addr
- next_addr
> J_RANGE
)
9366 struct trampoline_frag
*best_tf
= NULL
;
9369 for ( ; tf
; prev
= tf
, tf
= tf
->next
)
9371 int this_addr
= tf
->fragP
->fr_address
+ tf
->fragP
->fr_fix
;
9372 int this_delta
= abs (this_addr
- midpoint
);
9374 if (!best_tf
|| this_delta
< best_delta
)
9377 best_delta
= this_delta
;
9382 if (tf
->fragP
== fragP
)
9384 if (abs (addr
- trampaddr
) < J_RANGE
)
9385 { /* The trampoline is in range of original; fix it! */
9390 fragS
*fP
; /* The out-of-range jump. */
9392 new_stretch
+= init_trampoline_frag (tf
);
9393 offset
= fragP
->fr_fix
; /* Where to assemble the j insn. */
9394 lsym
= fragP
->fr_symbol
;
9396 /* Assemble a jump to the target label here. */
9398 insn
.insn_type
= ITYPE_INSN
;
9399 insn
.opcode
= xtensa_j_opcode
;
9401 set_expr_symbol_offset (&insn
.tok
[0], lsym
, offset
);
9402 fmt
= xg_get_single_format (xtensa_j_opcode
);
9403 tinsn_to_slotbuf (fmt
, 0, &insn
, trampoline_slotbuf
);
9404 xtensa_format_set_slot (isa
, fmt
, 0, trampoline_buf
, trampoline_slotbuf
);
9405 xtensa_insnbuf_to_chars (isa
, trampoline_buf
, (unsigned char *)fragP
->fr_literal
+ offset
, 3);
9408 /* Add a fix-up for the original j insn. */
9409 newfixP
= fix_new (fP
, fixP
->fx_where
, fixP
->fx_size
, lsym
, fragP
->fr_fix
- 3, TRUE
, fixP
->fx_r_type
);
9410 newfixP
->fx_no_overflow
= 1;
9411 newfixP
->tc_fix_data
.X_add_symbol
= lsym
;
9412 newfixP
->tc_fix_data
.X_add_number
= offset
;
9413 newfixP
->tc_fix_data
.slot
= slot
;
9415 xtensa_delete_cached_fixup (&fixup_cache
, i
);
9416 xtensa_add_cached_fixup (&fixup_cache
, newfixP
);
9418 /* Move the fix-up from the original j insn to this one. */
9419 fixP
->fx_frag
= fragP
;
9420 fixP
->fx_where
= fragP
->fr_fix
- 3;
9422 fixP
->tc_fix_data
.slot
= 0;
9423 fixP
->fx_r_type
= BFD_RELOC_XTENSA_SLOT0_OP
;
9425 xtensa_add_cached_fixup (&fixup_cache
, fixP
);
9427 /* re-do current fixup */
9430 /* Adjust the jump around this trampoline (if present). */
9431 if (tf
->fixP
!= NULL
)
9433 tf
->fixP
->fx_offset
+= 3;
9436 fragP
->tc_frag_data
.relax_seen
= FALSE
; /* Need another pass. */
9437 /* Do we have room for more? */
9438 if (fragP
->fr_var
< 3)
9439 { /* No, convert to fill. */
9441 fragP
->fr_subtype
= 0;
9442 /* Remove from the trampoline_list. */
9443 prev
->next
= tf
->next
;
9444 if (fragP
== fixup_cache
.first_frag
)
9445 fixup_cache
.first_frag
= NULL
;
9456 as_bad (_("bad relaxation state"));
9459 /* Tell gas we need another relaxation pass. */
9460 if (! fragP
->tc_frag_data
.relax_seen
)
9462 fragP
->tc_frag_data
.relax_seen
= TRUE
;
9466 new_logical_line (file_name
, line
);
9472 relax_frag_loop_align (fragS
*fragP
, long stretch
)
9474 addressT old_address
, old_next_address
, old_size
;
9475 addressT new_address
, new_next_address
, new_size
;
9478 /* All the frags with relax_frag_for_alignment prior to this one in the
9479 section have been done, hopefully eliminating the need for a NOP here.
9480 But, this will put it in if necessary. */
9482 /* Calculate the old address of this fragment and the next fragment. */
9483 old_address
= fragP
->fr_address
- stretch
;
9484 old_next_address
= (fragP
->fr_address
- stretch
+ fragP
->fr_fix
+
9485 fragP
->tc_frag_data
.text_expansion
[0]);
9486 old_size
= old_next_address
- old_address
;
9488 /* Calculate the new address of this fragment and the next fragment. */
9489 new_address
= fragP
->fr_address
;
9491 get_noop_aligned_address (fragP
, fragP
->fr_address
+ fragP
->fr_fix
);
9492 new_size
= new_next_address
- new_address
;
9494 growth
= new_size
- old_size
;
9496 /* Fix up the text_expansion field and return the new growth. */
9497 fragP
->tc_frag_data
.text_expansion
[0] += growth
;
9502 /* Add a NOP instruction. */
9505 relax_frag_add_nop (fragS
*fragP
)
9507 char *nop_buf
= fragP
->fr_literal
+ fragP
->fr_fix
;
9508 int length
= fragP
->tc_frag_data
.is_no_density
? 3 : 2;
9509 assemble_nop (length
, nop_buf
);
9510 fragP
->tc_frag_data
.is_insn
= TRUE
;
9512 if (fragP
->fr_var
< length
)
9514 as_fatal (_("fr_var (%ld) < length (%d)"), (long) fragP
->fr_var
, length
);
9518 fragP
->fr_fix
+= length
;
9519 fragP
->fr_var
-= length
;
9524 static long future_alignment_required (fragS
*, long);
9527 relax_frag_for_align (fragS
*fragP
, long stretch
)
9529 /* Overview of the relaxation procedure for alignment:
9530 We can widen with NOPs or by widening instructions or by filling
9531 bytes after jump instructions. Find the opportune places and widen
9532 them if necessary. */
9537 gas_assert (fragP
->fr_subtype
== RELAX_FILL_NOP
9538 || fragP
->fr_subtype
== RELAX_UNREACHABLE
9539 || (fragP
->fr_subtype
== RELAX_SLOTS
9540 && fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_NARROW
));
9542 stretch_me
= future_alignment_required (fragP
, stretch
);
9543 diff
= stretch_me
- fragP
->tc_frag_data
.text_expansion
[0];
9549 /* We expanded on a previous pass. Can we shrink now? */
9550 long shrink
= fragP
->tc_frag_data
.text_expansion
[0] - stretch_me
;
9551 if (shrink
<= stretch
&& stretch
> 0)
9553 fragP
->tc_frag_data
.text_expansion
[0] = stretch_me
;
9559 /* Below here, diff > 0. */
9560 fragP
->tc_frag_data
.text_expansion
[0] = stretch_me
;
9566 /* Return the address of the next frag that should be aligned.
9568 By "address" we mean the address it _would_ be at if there
9569 is no action taken to align it between here and the target frag.
9570 In other words, if no narrows and no fill nops are used between
9571 here and the frag to align, _even_if_ some of the frags we use
9572 to align targets have already expanded on a previous relaxation
9575 Also, count each frag that may be used to help align the target.
9577 Return 0 if there are no frags left in the chain that need to be
9581 find_address_of_next_align_frag (fragS
**fragPP
,
9585 bfd_boolean
*paddable
)
9587 fragS
*fragP
= *fragPP
;
9588 addressT address
= fragP
->fr_address
;
9590 /* Do not reset the counts to 0. */
9594 /* Limit this to a small search. */
9595 if (*widens
>= (int) xtensa_fetch_width
)
9600 address
+= fragP
->fr_fix
;
9602 if (fragP
->fr_type
== rs_fill
)
9603 address
+= fragP
->fr_offset
* fragP
->fr_var
;
9604 else if (fragP
->fr_type
== rs_machine_dependent
)
9606 switch (fragP
->fr_subtype
)
9608 case RELAX_UNREACHABLE
:
9612 case RELAX_FILL_NOP
:
9614 if (!fragP
->tc_frag_data
.is_no_density
)
9619 if (fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_NARROW
)
9624 address
+= total_frag_text_expansion (fragP
);
9628 address
+= fragP
->tc_frag_data
.text_expansion
[0];
9631 case RELAX_ALIGN_NEXT_OPCODE
:
9632 case RELAX_DESIRE_ALIGN
:
9636 case RELAX_MAYBE_UNREACHABLE
:
9637 case RELAX_MAYBE_DESIRE_ALIGN
:
9642 /* Just punt if we don't know the type. */
9649 /* Just punt if we don't know the type. */
9653 fragP
= fragP
->fr_next
;
9661 static long bytes_to_stretch (fragS
*, int, int, int, int);
9664 future_alignment_required (fragS
*fragP
, long stretch ATTRIBUTE_UNUSED
)
9666 fragS
*this_frag
= fragP
;
9670 int narrow_nops
= 0;
9671 bfd_boolean paddable
= FALSE
;
9672 offsetT local_opt_diff
;
9675 int stretch_amount
= 0;
9676 int local_stretch_amount
;
9677 int global_stretch_amount
;
9679 address
= find_address_of_next_align_frag
9680 (&fragP
, &wide_nops
, &narrow_nops
, &num_widens
, &paddable
);
9684 if (this_frag
->tc_frag_data
.is_aligning_branch
)
9685 this_frag
->tc_frag_data
.slot_subtypes
[0] = RELAX_IMMED
;
9687 frag_wane (this_frag
);
9691 local_opt_diff
= get_aligned_diff (fragP
, address
, &max_diff
);
9692 opt_diff
= local_opt_diff
;
9693 gas_assert (opt_diff
>= 0);
9694 gas_assert (max_diff
>= opt_diff
);
9699 fragP
= fragP
->fr_next
;
9701 while (fragP
&& opt_diff
< max_diff
&& address
)
9703 /* We only use these to determine if we can exit early
9704 because there will be plenty of ways to align future
9706 int glob_widens
= 0;
9709 bfd_boolean glob_pad
= 0;
9710 address
= find_address_of_next_align_frag
9711 (&fragP
, &glob_widens
, &dnn
, &dw
, &glob_pad
);
9712 /* If there is a padable portion, then skip. */
9713 if (glob_pad
|| glob_widens
>= (1 << branch_align_power (now_seg
)))
9718 offsetT next_m_diff
;
9719 offsetT next_o_diff
;
9721 /* Downrange frags haven't had stretch added to them yet. */
9724 /* The address also includes any text expansion from this
9725 frag in a previous pass, but we don't want that. */
9726 address
-= this_frag
->tc_frag_data
.text_expansion
[0];
9728 /* Assume we are going to move at least opt_diff. In
9729 reality, we might not be able to, but assuming that
9730 we will helps catch cases where moving opt_diff pushes
9731 the next target from aligned to unaligned. */
9732 address
+= opt_diff
;
9734 next_o_diff
= get_aligned_diff (fragP
, address
, &next_m_diff
);
9736 /* Now cleanup for the adjustments to address. */
9737 next_o_diff
+= opt_diff
;
9738 next_m_diff
+= opt_diff
;
9739 if (next_o_diff
<= max_diff
&& next_o_diff
> opt_diff
)
9740 opt_diff
= next_o_diff
;
9741 if (next_m_diff
< max_diff
)
9742 max_diff
= next_m_diff
;
9743 fragP
= fragP
->fr_next
;
9747 /* If there are enough wideners in between, do it. */
9750 if (this_frag
->fr_subtype
== RELAX_UNREACHABLE
)
9752 gas_assert (opt_diff
<= (signed) xtensa_fetch_width
);
9757 local_stretch_amount
9758 = bytes_to_stretch (this_frag
, wide_nops
, narrow_nops
,
9759 num_widens
, local_opt_diff
);
9760 global_stretch_amount
9761 = bytes_to_stretch (this_frag
, wide_nops
, narrow_nops
,
9762 num_widens
, opt_diff
);
9763 /* If the condition below is true, then the frag couldn't
9764 stretch the correct amount for the global case, so we just
9765 optimize locally. We'll rely on the subsequent frags to get
9766 the correct alignment in the global case. */
9767 if (global_stretch_amount
< local_stretch_amount
)
9768 stretch_amount
= local_stretch_amount
;
9770 stretch_amount
= global_stretch_amount
;
9772 if (this_frag
->fr_subtype
== RELAX_SLOTS
9773 && this_frag
->tc_frag_data
.slot_subtypes
[0] == RELAX_NARROW
)
9774 gas_assert (stretch_amount
<= 1);
9775 else if (this_frag
->fr_subtype
== RELAX_FILL_NOP
)
9777 if (this_frag
->tc_frag_data
.is_no_density
)
9778 gas_assert (stretch_amount
== 3 || stretch_amount
== 0);
9780 gas_assert (stretch_amount
<= 3);
9783 return stretch_amount
;
9787 /* The idea: widen everything you can to get a target or loop aligned,
9788 then start using NOPs.
9790 wide_nops = the number of wide NOPs available for aligning
9791 narrow_nops = the number of narrow NOPs available for aligning
9792 (a subset of wide_nops)
9793 widens = the number of narrow instructions that should be widened
9798 bytes_to_stretch (fragS
*this_frag
,
9807 int bytes_short
= desired_diff
- num_widens
;
9809 gas_assert (desired_diff
>= 0
9810 && desired_diff
< (signed) xtensa_fetch_width
);
9811 if (desired_diff
== 0)
9814 gas_assert (wide_nops
> 0 || num_widens
> 0);
9816 /* Always prefer widening to NOP-filling. */
9817 if (bytes_short
< 0)
9819 /* There are enough RELAX_NARROW frags after this one
9820 to align the target without widening this frag in any way. */
9824 if (bytes_short
== 0)
9826 /* Widen every narrow between here and the align target
9827 and the align target will be properly aligned. */
9828 if (this_frag
->fr_subtype
== RELAX_FILL_NOP
)
9834 /* From here we will need at least one NOP to get an alignment.
9835 However, we may not be able to align at all, in which case,
9837 nops_needed
= desired_diff
/ 3;
9839 /* If there aren't enough nops, don't widen. */
9840 if (nops_needed
> wide_nops
)
9843 /* First try it with all wide nops. */
9844 nop_bytes
= nops_needed
* 3;
9845 extra_bytes
= desired_diff
- nop_bytes
;
9847 if (nop_bytes
+ num_widens
>= desired_diff
)
9849 if (this_frag
->fr_subtype
== RELAX_FILL_NOP
)
9851 else if (num_widens
== extra_bytes
)
9856 /* Add a narrow nop. */
9860 if (narrow_nops
== 0 || nops_needed
> wide_nops
)
9863 if (nop_bytes
+ num_widens
>= desired_diff
&& extra_bytes
>= 0)
9865 if (this_frag
->fr_subtype
== RELAX_FILL_NOP
)
9866 return !this_frag
->tc_frag_data
.is_no_density
? 2 : 3;
9867 else if (num_widens
== extra_bytes
)
9872 /* Replace a wide nop with a narrow nop--we can get here if
9873 extra_bytes was negative in the previous conditional. */
9874 if (narrow_nops
== 1)
9878 if (nop_bytes
+ num_widens
>= desired_diff
)
9880 if (this_frag
->fr_subtype
== RELAX_FILL_NOP
)
9881 return !this_frag
->tc_frag_data
.is_no_density
? 2 : 3;
9882 else if (num_widens
== extra_bytes
)
9887 /* If we can't satisfy any of the above cases, then we can't align
9888 using padding or fill nops. */
9893 static struct trampoline_frag
*
9894 search_trampolines (TInsn
*tinsn
, fragS
*fragP
, bfd_boolean unreachable_only
)
9896 struct trampoline_seg
*ts
= find_trampoline_seg (now_seg
);
9897 struct trampoline_frag
*tf
= (ts
) ? ts
->trampoline_list
.next
: NULL
;
9898 struct trampoline_frag
*best_tf
= NULL
;
9901 symbolS
*sym
= tinsn
->tok
[0].X_add_symbol
;
9902 offsetT target
= S_GET_VALUE (sym
) + tinsn
->tok
[0].X_add_number
;
9903 offsetT addr
= fragP
->fr_address
;
9904 offsetT lower
= (addr
< target
) ? addr
: target
;
9905 offsetT upper
= (addr
> target
) ? addr
: target
;
9906 int delta
= upper
- lower
;
9907 offsetT midpoint
= lower
+ delta
/ 2;
9908 int this_delta
= -1;
9911 if (delta
> 2 * J_RANGE
)
9913 /* One trampoline won't do; we need multiple.
9914 Choose the farthest trampoline that's still in range of the original
9915 and let a later pass finish the job. */
9916 for ( ; tf
; tf
= tf
->next
)
9918 int next_addr
= (tf
->next
) ? tf
->next
->fragP
->fr_address
+ tf
->next
->fragP
->fr_fix
: 0;
9920 this_addr
= tf
->fragP
->fr_address
+ tf
->fragP
->fr_fix
;
9924 if (this_addr
- addr
< J_RANGE
)
9929 /* Backward jump. */
9930 if (next_addr
== 0 || addr
- next_addr
> J_RANGE
)
9934 if (abs (addr
- this_addr
) < J_RANGE
)
9939 for ( ; tf
; tf
= tf
->next
)
9941 this_addr
= tf
->fragP
->fr_address
+ tf
->fragP
->fr_fix
;
9942 this_delta
= abs (this_addr
- midpoint
);
9943 if (unreachable_only
&& tf
->needs_jump_around
)
9945 if (!best_tf
|| this_delta
< best_delta
)
9948 best_delta
= this_delta
;
9949 best_addr
= this_addr
;
9954 best_delta
< J_RANGE
&&
9955 abs(best_addr
- lower
) < J_RANGE
&&
9956 abs(best_addr
- upper
) < J_RANGE
)
9959 return NULL
; /* No suitable trampoline found. */
9963 static struct trampoline_frag
*
9964 get_best_trampoline (TInsn
*tinsn
, fragS
*fragP
)
9966 struct trampoline_frag
*tf
= NULL
;
9968 tf
= search_trampolines (tinsn
, fragP
, TRUE
); /* Try unreachable first. */
9971 tf
= search_trampolines (tinsn
, fragP
, FALSE
); /* Try ones needing a jump-around, too. */
9978 check_and_update_trampolines (void)
9980 struct trampoline_seg
*ts
= find_trampoline_seg (now_seg
);
9981 struct trampoline_frag
*tf
= ts
->trampoline_list
.next
;
9982 struct trampoline_frag
*prev
= &ts
->trampoline_list
;
9984 for ( ; tf
; prev
= tf
, tf
= tf
->next
)
9986 if (tf
->fragP
->fr_var
< 3)
9988 frag_wane (tf
->fragP
);
9989 prev
->next
= tf
->next
;
9997 init_trampoline_frag (struct trampoline_frag
*trampP
)
9999 fragS
*fp
= trampP
->fragP
;
10002 if (fp
->fr_fix
== 0)
10005 char label
[10 + 2 * sizeof(fp
)];
10006 sprintf (label
, ".L0_TR_%p", fp
);
10008 lsym
= (symbolS
*)local_symbol_make (label
, now_seg
, 0, fp
);
10009 fp
->fr_symbol
= lsym
;
10010 if (trampP
->needs_jump_around
)
10012 /* Add a jump around this block of jumps, in case
10013 control flows into this block. */
10017 xtensa_isa isa
= xtensa_default_isa
;
10019 fp
->tc_frag_data
.is_insn
= 1;
10020 /* Assemble a jump insn. */
10021 tinsn_init (&insn
);
10022 insn
.insn_type
= ITYPE_INSN
;
10023 insn
.opcode
= xtensa_j_opcode
;
10025 set_expr_symbol_offset (&insn
.tok
[0], lsym
, 3);
10026 fmt
= xg_get_single_format (xtensa_j_opcode
);
10027 tinsn_to_slotbuf (fmt
, 0, &insn
, trampoline_slotbuf
);
10028 xtensa_format_set_slot (isa
, fmt
, 0, trampoline_buf
, trampoline_slotbuf
);
10029 xtensa_insnbuf_to_chars (isa
, trampoline_buf
, (unsigned char *)fp
->fr_literal
, 3);
10033 fixP
= fix_new (fp
, 0, 3, lsym
, 3, TRUE
, BFD_RELOC_XTENSA_SLOT0_OP
);
10034 trampP
->fixP
= fixP
;
10042 add_jump_to_trampoline (struct trampoline_frag
*trampP
, fragS
*origfrag
)
10044 fragS
*tramp
= trampP
->fragP
;
10046 int offset
= tramp
->fr_fix
; /* Where to assemble the j insn. */
10052 xtensa_isa isa
= xtensa_default_isa
;
10056 for (i
= 0; i
< MAX_SLOTS
; ++i
)
10057 if (origfrag
->tc_frag_data
.slot_symbols
[i
])
10059 gas_assert (slot
== -1);
10063 gas_assert (slot
>= 0 && slot
< MAX_SLOTS
);
10065 lsym
= tramp
->fr_symbol
;
10066 /* Assemble a jump to the target label in the trampoline frag. */
10067 tsym
= origfrag
->tc_frag_data
.slot_symbols
[slot
];
10068 toffset
= origfrag
-> tc_frag_data
.slot_offsets
[slot
];
10069 tinsn_init (&insn
);
10070 insn
.insn_type
= ITYPE_INSN
;
10071 insn
.opcode
= xtensa_j_opcode
;
10073 set_expr_symbol_offset (&insn
.tok
[0], tsym
, toffset
);
10074 fmt
= xg_get_single_format (xtensa_j_opcode
);
10075 tinsn_to_slotbuf (fmt
, 0, &insn
, trampoline_slotbuf
);
10076 xtensa_format_set_slot (isa
, fmt
, 0, trampoline_buf
, trampoline_slotbuf
);
10077 xtensa_insnbuf_to_chars (isa
, trampoline_buf
, (unsigned char *)tramp
->fr_literal
+ offset
, 3);
10078 tramp
->fr_fix
+= 3;
10079 tramp
->fr_var
-= 3;
10081 /* add a fix-up for the trampoline jump. */
10082 fixP
= fix_new (tramp
, tramp
->fr_fix
- 3, 3, tsym
, toffset
, TRUE
, BFD_RELOC_XTENSA_SLOT0_OP
);
10083 /* Modify the jump at the start of this trampoline to point past the newly-added jump. */
10084 fixP
= trampP
->fixP
;
10086 fixP
->fx_offset
+= 3;
10087 /* Modify the original j to point here. */
10088 origfrag
->tc_frag_data
.slot_symbols
[slot
] = lsym
;
10089 origfrag
->tc_frag_data
.slot_offsets
[slot
] = tramp
->fr_fix
- 3;
10090 /* If trampoline is full, remove it from the list. */
10091 check_and_update_trampolines ();
10098 relax_frag_immed (segT segP
,
10105 bfd_boolean estimate_only
)
10109 bfd_boolean negatable_branch
= FALSE
;
10110 bfd_boolean branch_jmp_to_next
= FALSE
;
10111 bfd_boolean from_wide_insn
= FALSE
;
10112 xtensa_isa isa
= xtensa_default_isa
;
10114 offsetT frag_offset
;
10116 int num_text_bytes
, num_literal_bytes
;
10117 int literal_diff
, total_text_diff
, this_text_diff
;
10119 gas_assert (fragP
->fr_opcode
!= NULL
);
10121 xg_clear_vinsn (&cur_vinsn
);
10122 vinsn_from_chars (&cur_vinsn
, fragP
->fr_opcode
);
10123 if (cur_vinsn
.num_slots
> 1)
10124 from_wide_insn
= TRUE
;
10126 tinsn
= cur_vinsn
.slots
[slot
];
10127 tinsn_immed_from_frag (&tinsn
, fragP
, slot
);
10129 if (estimate_only
&& xtensa_opcode_is_loop (isa
, tinsn
.opcode
) == 1)
10132 if (workaround_b_j_loop_end
&& ! fragP
->tc_frag_data
.is_no_transform
)
10133 branch_jmp_to_next
= is_branch_jmp_to_next (&tinsn
, fragP
);
10135 negatable_branch
= (xtensa_opcode_is_branch (isa
, tinsn
.opcode
) == 1);
10137 old_size
= xtensa_format_length (isa
, fmt
);
10139 /* Special case: replace a branch to the next instruction with a NOP.
10140 This is required to work around a hardware bug in T1040.0 and also
10141 serves as an optimization. */
10143 if (branch_jmp_to_next
10144 && ((old_size
== 2) || (old_size
== 3))
10145 && !next_frag_is_loop_target (fragP
))
10148 /* Here is the fun stuff: Get the immediate field from this
10149 instruction. If it fits, we are done. If not, find the next
10150 instruction sequence that fits. */
10152 frag_offset
= fragP
->fr_opcode
- fragP
->fr_literal
;
10153 istack_init (&istack
);
10154 num_steps
= xg_assembly_relax (&istack
, &tinsn
, segP
, fragP
, frag_offset
,
10155 min_steps
, stretch
);
10156 gas_assert (num_steps
>= min_steps
&& num_steps
<= RELAX_IMMED_MAXSTEPS
);
10158 fragP
->tc_frag_data
.slot_subtypes
[slot
] = (int) RELAX_IMMED
+ num_steps
;
10160 /* Figure out the number of bytes needed. */
10161 num_literal_bytes
= get_num_stack_literal_bytes (&istack
);
10163 = num_literal_bytes
- fragP
->tc_frag_data
.literal_expansion
[slot
];
10164 num_text_bytes
= get_num_stack_text_bytes (&istack
);
10166 if (from_wide_insn
)
10169 while (istack
.insn
[first
].opcode
== XTENSA_UNDEFINED
)
10172 num_text_bytes
+= old_size
;
10173 if (opcode_fits_format_slot (istack
.insn
[first
].opcode
, fmt
, slot
))
10174 num_text_bytes
-= xg_get_single_size (istack
.insn
[first
].opcode
);
10177 /* The first instruction in the relaxed sequence will go after
10178 the current wide instruction, and thus its symbolic immediates
10181 istack_init (&istack
);
10182 num_steps
= xg_assembly_relax (&istack
, &tinsn
, segP
, fragP
,
10183 frag_offset
+ old_size
,
10184 min_steps
, stretch
+ old_size
);
10185 gas_assert (num_steps
>= min_steps
&& num_steps
<= RELAX_IMMED_MAXSTEPS
);
10187 fragP
->tc_frag_data
.slot_subtypes
[slot
]
10188 = (int) RELAX_IMMED
+ num_steps
;
10190 num_literal_bytes
= get_num_stack_literal_bytes (&istack
);
10192 = num_literal_bytes
- fragP
->tc_frag_data
.literal_expansion
[slot
];
10194 num_text_bytes
= get_num_stack_text_bytes (&istack
) + old_size
;
10198 total_text_diff
= num_text_bytes
- old_size
;
10199 this_text_diff
= total_text_diff
- fragP
->tc_frag_data
.text_expansion
[slot
];
10201 /* It MUST get larger. If not, we could get an infinite loop. */
10202 gas_assert (num_text_bytes
>= 0);
10203 gas_assert (literal_diff
>= 0);
10204 gas_assert (total_text_diff
>= 0);
10206 fragP
->tc_frag_data
.text_expansion
[slot
] = total_text_diff
;
10207 fragP
->tc_frag_data
.literal_expansion
[slot
] = num_literal_bytes
;
10208 gas_assert (fragP
->tc_frag_data
.text_expansion
[slot
] >= 0);
10209 gas_assert (fragP
->tc_frag_data
.literal_expansion
[slot
] >= 0);
10211 /* Find the associated expandable literal for this. */
10212 if (literal_diff
!= 0)
10214 fragS
*lit_fragP
= fragP
->tc_frag_data
.literal_frags
[slot
];
10217 gas_assert (literal_diff
== 4);
10218 lit_fragP
->tc_frag_data
.unreported_expansion
+= literal_diff
;
10220 /* We expect that the literal section state has NOT been
10222 gas_assert (lit_fragP
->fr_type
== rs_machine_dependent
10223 && lit_fragP
->fr_subtype
== RELAX_LITERAL
);
10224 lit_fragP
->fr_subtype
= RELAX_LITERAL_NR
;
10226 /* We need to mark this section for another iteration
10232 if (negatable_branch
&& istack
.ninsn
> 1)
10233 update_next_frag_state (fragP
);
10235 /* If last insn is a jump, and it cannot reach its target, try to find a trampoline. */
10236 if (istack
.ninsn
> 2 &&
10237 istack
.insn
[istack
.ninsn
- 1].insn_type
== ITYPE_LABEL
&&
10238 istack
.insn
[istack
.ninsn
- 2].insn_type
== ITYPE_INSN
&&
10239 istack
.insn
[istack
.ninsn
- 2].opcode
== xtensa_j_opcode
)
10241 TInsn
*jinsn
= &istack
.insn
[istack
.ninsn
- 2];
10243 if (!xg_symbolic_immeds_fit (jinsn
, segP
, fragP
, fragP
->fr_offset
, total_text_diff
))
10245 struct trampoline_frag
*tf
= get_best_trampoline (jinsn
, fragP
);
10249 this_text_diff
+= init_trampoline_frag (tf
);
10250 this_text_diff
+= add_jump_to_trampoline (tf
, fragP
);
10254 /* If target symbol is undefined, assume it will reach once linked. */
10255 expressionS
*exp
= &istack
.insn
[istack
.ninsn
- 2].tok
[0];
10257 if (exp
->X_op
== O_symbol
&& S_IS_DEFINED (exp
->X_add_symbol
))
10259 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
10260 _("jump target out of range; no usable trampoline found"));
10266 return this_text_diff
;
10270 /* md_convert_frag Hook and Helper Functions. */
10272 static void convert_frag_align_next_opcode (fragS
*);
10273 static void convert_frag_narrow (segT
, fragS
*, xtensa_format
, int);
10274 static void convert_frag_fill_nop (fragS
*);
10275 static void convert_frag_immed (segT
, fragS
*, int, xtensa_format
, int);
10278 md_convert_frag (bfd
*abfd ATTRIBUTE_UNUSED
, segT sec
, fragS
*fragp
)
10280 static xtensa_insnbuf vbuf
= NULL
;
10281 xtensa_isa isa
= xtensa_default_isa
;
10285 const char *file_name
;
10288 file_name
= as_where (&line
);
10289 new_logical_line (fragp
->fr_file
, fragp
->fr_line
);
10291 switch (fragp
->fr_subtype
)
10293 case RELAX_ALIGN_NEXT_OPCODE
:
10294 /* Always convert. */
10295 convert_frag_align_next_opcode (fragp
);
10298 case RELAX_DESIRE_ALIGN
:
10299 /* Do nothing. If not aligned already, too bad. */
10302 case RELAX_LITERAL
:
10303 case RELAX_LITERAL_FINAL
:
10308 vbuf
= xtensa_insnbuf_alloc (isa
);
10310 xtensa_insnbuf_from_chars
10311 (isa
, vbuf
, (unsigned char *) fragp
->fr_opcode
, 0);
10312 fmt
= xtensa_format_decode (isa
, vbuf
);
10313 num_slots
= xtensa_format_num_slots (isa
, fmt
);
10315 for (slot
= 0; slot
< num_slots
; slot
++)
10317 switch (fragp
->tc_frag_data
.slot_subtypes
[slot
])
10320 convert_frag_narrow (sec
, fragp
, fmt
, slot
);
10324 case RELAX_IMMED_STEP1
:
10325 case RELAX_IMMED_STEP2
:
10326 case RELAX_IMMED_STEP3
:
10327 /* Place the immediate. */
10330 fragp
->tc_frag_data
.slot_subtypes
[slot
] - RELAX_IMMED
,
10335 /* This is OK because some slots could have
10336 relaxations and others have none. */
10342 case RELAX_UNREACHABLE
:
10343 memset (&fragp
->fr_literal
[fragp
->fr_fix
], 0, fragp
->fr_var
);
10344 fragp
->fr_fix
+= fragp
->tc_frag_data
.text_expansion
[0];
10345 fragp
->fr_var
-= fragp
->tc_frag_data
.text_expansion
[0];
10349 case RELAX_MAYBE_UNREACHABLE
:
10350 case RELAX_MAYBE_DESIRE_ALIGN
:
10354 case RELAX_FILL_NOP
:
10355 convert_frag_fill_nop (fragp
);
10358 case RELAX_LITERAL_NR
:
10359 if (use_literal_section
)
10361 /* This should have been handled during relaxation. When
10362 relaxing a code segment, literals sometimes need to be
10363 added to the corresponding literal segment. If that
10364 literal segment has already been relaxed, then we end up
10365 in this situation. Marking the literal segments as data
10366 would make this happen less often (since GAS always relaxes
10367 code before data), but we could still get into trouble if
10368 there are instructions in a segment that is not marked as
10369 containing code. Until we can implement a better solution,
10370 cheat and adjust the addresses of all the following frags.
10371 This could break subsequent alignments, but the linker's
10372 literal coalescing will do that anyway. */
10375 fragp
->fr_subtype
= RELAX_LITERAL_FINAL
;
10376 gas_assert (fragp
->tc_frag_data
.unreported_expansion
== 4);
10377 memset (&fragp
->fr_literal
[fragp
->fr_fix
], 0, 4);
10378 fragp
->fr_var
-= 4;
10379 fragp
->fr_fix
+= 4;
10380 for (f
= fragp
->fr_next
; f
; f
= f
->fr_next
)
10381 f
->fr_address
+= 4;
10384 as_bad (_("invalid relaxation fragment result"));
10387 case RELAX_TRAMPOLINE
:
10392 new_logical_line (file_name
, line
);
10397 convert_frag_align_next_opcode (fragS
*fragp
)
10399 char *nop_buf
; /* Location for Writing. */
10400 bfd_boolean use_no_density
= fragp
->tc_frag_data
.is_no_density
;
10401 addressT aligned_address
;
10403 int nop
, nop_count
;
10405 aligned_address
= get_noop_aligned_address (fragp
, fragp
->fr_address
+
10407 fill_size
= aligned_address
- (fragp
->fr_address
+ fragp
->fr_fix
);
10408 nop_count
= get_text_align_nop_count (fill_size
, use_no_density
);
10409 nop_buf
= fragp
->fr_literal
+ fragp
->fr_fix
;
10411 for (nop
= 0; nop
< nop_count
; nop
++)
10414 nop_size
= get_text_align_nth_nop_size (fill_size
, nop
, use_no_density
);
10416 assemble_nop (nop_size
, nop_buf
);
10417 nop_buf
+= nop_size
;
10420 fragp
->fr_fix
+= fill_size
;
10421 fragp
->fr_var
-= fill_size
;
10426 convert_frag_narrow (segT segP
, fragS
*fragP
, xtensa_format fmt
, int slot
)
10428 TInsn tinsn
, single_target
;
10429 int size
, old_size
, diff
;
10430 offsetT frag_offset
;
10432 gas_assert (slot
== 0);
10433 tinsn_from_chars (&tinsn
, fragP
->fr_opcode
, 0);
10435 if (fragP
->tc_frag_data
.is_aligning_branch
== 1)
10437 gas_assert (fragP
->tc_frag_data
.text_expansion
[0] == 1
10438 || fragP
->tc_frag_data
.text_expansion
[0] == 0);
10439 convert_frag_immed (segP
, fragP
, fragP
->tc_frag_data
.text_expansion
[0],
10444 if (fragP
->tc_frag_data
.text_expansion
[0] == 0)
10446 /* No conversion. */
10451 gas_assert (fragP
->fr_opcode
!= NULL
);
10453 /* Frags in this relaxation state should only contain
10454 single instruction bundles. */
10455 tinsn_immed_from_frag (&tinsn
, fragP
, 0);
10457 /* Just convert it to a wide form.... */
10459 old_size
= xg_get_single_size (tinsn
.opcode
);
10461 tinsn_init (&single_target
);
10462 frag_offset
= fragP
->fr_opcode
- fragP
->fr_literal
;
10464 if (! xg_is_single_relaxable_insn (&tinsn
, &single_target
, FALSE
))
10466 as_bad (_("unable to widen instruction"));
10470 size
= xg_get_single_size (single_target
.opcode
);
10471 xg_emit_insn_to_buf (&single_target
, fragP
->fr_opcode
, fragP
,
10472 frag_offset
, TRUE
);
10474 diff
= size
- old_size
;
10475 gas_assert (diff
>= 0);
10476 gas_assert (diff
<= fragP
->fr_var
);
10477 fragP
->fr_var
-= diff
;
10478 fragP
->fr_fix
+= diff
;
10486 convert_frag_fill_nop (fragS
*fragP
)
10488 char *loc
= &fragP
->fr_literal
[fragP
->fr_fix
];
10489 int size
= fragP
->tc_frag_data
.text_expansion
[0];
10490 gas_assert ((unsigned) size
== (fragP
->fr_next
->fr_address
10491 - fragP
->fr_address
- fragP
->fr_fix
));
10494 /* No conversion. */
10498 assemble_nop (size
, loc
);
10499 fragP
->tc_frag_data
.is_insn
= TRUE
;
10500 fragP
->fr_var
-= size
;
10501 fragP
->fr_fix
+= size
;
10506 static fixS
*fix_new_exp_in_seg
10507 (segT
, subsegT
, fragS
*, int, int, expressionS
*, int,
10508 bfd_reloc_code_real_type
);
10509 static void convert_frag_immed_finish_loop (segT
, fragS
*, TInsn
*);
10512 convert_frag_immed (segT segP
,
10518 char *immed_instr
= fragP
->fr_opcode
;
10520 bfd_boolean expanded
= FALSE
;
10521 bfd_boolean branch_jmp_to_next
= FALSE
;
10522 char *fr_opcode
= fragP
->fr_opcode
;
10523 xtensa_isa isa
= xtensa_default_isa
;
10524 bfd_boolean from_wide_insn
= FALSE
;
10526 bfd_boolean is_loop
;
10528 gas_assert (fr_opcode
!= NULL
);
10530 xg_clear_vinsn (&cur_vinsn
);
10532 vinsn_from_chars (&cur_vinsn
, fr_opcode
);
10533 if (cur_vinsn
.num_slots
> 1)
10534 from_wide_insn
= TRUE
;
10536 orig_tinsn
= cur_vinsn
.slots
[slot
];
10537 tinsn_immed_from_frag (&orig_tinsn
, fragP
, slot
);
10539 is_loop
= xtensa_opcode_is_loop (xtensa_default_isa
, orig_tinsn
.opcode
) == 1;
10541 if (workaround_b_j_loop_end
&& ! fragP
->tc_frag_data
.is_no_transform
)
10542 branch_jmp_to_next
= is_branch_jmp_to_next (&orig_tinsn
, fragP
);
10544 if (branch_jmp_to_next
&& !next_frag_is_loop_target (fragP
))
10546 /* Conversion just inserts a NOP and marks the fix as completed. */
10547 bytes
= xtensa_format_length (isa
, fmt
);
10550 cur_vinsn
.slots
[slot
].opcode
=
10551 xtensa_format_slot_nop_opcode (isa
, cur_vinsn
.format
, slot
);
10552 cur_vinsn
.slots
[slot
].ntok
= 0;
10556 bytes
+= fragP
->tc_frag_data
.text_expansion
[0];
10557 gas_assert (bytes
== 2 || bytes
== 3);
10558 build_nop (&cur_vinsn
.slots
[0], bytes
);
10559 fragP
->fr_fix
+= fragP
->tc_frag_data
.text_expansion
[0];
10561 vinsn_to_insnbuf (&cur_vinsn
, fr_opcode
, frag_now
, TRUE
);
10562 xtensa_insnbuf_to_chars
10563 (isa
, cur_vinsn
.insnbuf
, (unsigned char *) fr_opcode
, 0);
10568 /* Here is the fun stuff: Get the immediate field from this
10569 instruction. If it fits, we're done. If not, find the next
10570 instruction sequence that fits. */
10574 symbolS
*lit_sym
= NULL
;
10575 int total_size
= 0;
10576 int target_offset
= 0;
10579 symbolS
*gen_label
= NULL
;
10580 offsetT frag_offset
;
10581 bfd_boolean first
= TRUE
;
10583 /* It does not fit. Find something that does and
10584 convert immediately. */
10585 frag_offset
= fr_opcode
- fragP
->fr_literal
;
10586 istack_init (&istack
);
10587 xg_assembly_relax (&istack
, &orig_tinsn
,
10588 segP
, fragP
, frag_offset
, min_steps
, 0);
10590 old_size
= xtensa_format_length (isa
, fmt
);
10592 /* Assemble this right inline. */
10594 /* First, create the mapping from a label name to the REAL label. */
10596 for (i
= 0; i
< istack
.ninsn
; i
++)
10598 TInsn
*tinsn
= &istack
.insn
[i
];
10601 switch (tinsn
->insn_type
)
10603 case ITYPE_LITERAL
:
10604 if (lit_sym
!= NULL
)
10605 as_bad (_("multiple literals in expansion"));
10606 /* First find the appropriate space in the literal pool. */
10607 lit_frag
= fragP
->tc_frag_data
.literal_frags
[slot
];
10608 if (lit_frag
== NULL
)
10609 as_bad (_("no registered fragment for literal"));
10610 if (tinsn
->ntok
!= 1)
10611 as_bad (_("number of literal tokens != 1"));
10613 /* Set the literal symbol and add a fixup. */
10614 lit_sym
= lit_frag
->fr_symbol
;
10618 if (align_targets
&& !is_loop
)
10620 fragS
*unreach
= fragP
->fr_next
;
10621 while (!(unreach
->fr_type
== rs_machine_dependent
10622 && (unreach
->fr_subtype
== RELAX_MAYBE_UNREACHABLE
10623 || unreach
->fr_subtype
== RELAX_UNREACHABLE
)))
10625 unreach
= unreach
->fr_next
;
10628 gas_assert (unreach
->fr_type
== rs_machine_dependent
10629 && (unreach
->fr_subtype
== RELAX_MAYBE_UNREACHABLE
10630 || unreach
->fr_subtype
== RELAX_UNREACHABLE
));
10632 target_offset
+= unreach
->tc_frag_data
.text_expansion
[0];
10634 gas_assert (gen_label
== NULL
);
10635 gen_label
= symbol_new (FAKE_LABEL_NAME
, now_seg
,
10636 fr_opcode
- fragP
->fr_literal
10637 + target_offset
, fragP
);
10641 if (first
&& from_wide_insn
)
10643 target_offset
+= xtensa_format_length (isa
, fmt
);
10645 if (!opcode_fits_format_slot (tinsn
->opcode
, fmt
, slot
))
10646 target_offset
+= xg_get_single_size (tinsn
->opcode
);
10649 target_offset
+= xg_get_single_size (tinsn
->opcode
);
10656 for (i
= 0; i
< istack
.ninsn
; i
++)
10658 TInsn
*tinsn
= &istack
.insn
[i
];
10662 bfd_reloc_code_real_type reloc_type
;
10664 switch (tinsn
->insn_type
)
10666 case ITYPE_LITERAL
:
10667 lit_frag
= fragP
->tc_frag_data
.literal_frags
[slot
];
10668 /* Already checked. */
10669 gas_assert (lit_frag
!= NULL
);
10670 gas_assert (lit_sym
!= NULL
);
10671 gas_assert (tinsn
->ntok
== 1);
10673 target_seg
= S_GET_SEGMENT (lit_sym
);
10674 gas_assert (target_seg
);
10675 reloc_type
= map_operator_to_reloc (tinsn
->tok
[0].X_op
, TRUE
);
10676 fix_new_exp_in_seg (target_seg
, 0, lit_frag
, 0, 4,
10677 &tinsn
->tok
[0], FALSE
, reloc_type
);
10684 xg_resolve_labels (tinsn
, gen_label
);
10685 xg_resolve_literals (tinsn
, lit_sym
);
10686 if (from_wide_insn
&& first
)
10689 if (opcode_fits_format_slot (tinsn
->opcode
, fmt
, slot
))
10691 cur_vinsn
.slots
[slot
] = *tinsn
;
10695 cur_vinsn
.slots
[slot
].opcode
=
10696 xtensa_format_slot_nop_opcode (isa
, fmt
, slot
);
10697 cur_vinsn
.slots
[slot
].ntok
= 0;
10699 vinsn_to_insnbuf (&cur_vinsn
, immed_instr
, fragP
, TRUE
);
10700 xtensa_insnbuf_to_chars (isa
, cur_vinsn
.insnbuf
,
10701 (unsigned char *) immed_instr
, 0);
10702 fragP
->tc_frag_data
.is_insn
= TRUE
;
10703 size
= xtensa_format_length (isa
, fmt
);
10704 if (!opcode_fits_format_slot (tinsn
->opcode
, fmt
, slot
))
10706 xg_emit_insn_to_buf
10707 (tinsn
, immed_instr
+ size
, fragP
,
10708 immed_instr
- fragP
->fr_literal
+ size
, TRUE
);
10709 size
+= xg_get_single_size (tinsn
->opcode
);
10714 size
= xg_get_single_size (tinsn
->opcode
);
10715 xg_emit_insn_to_buf (tinsn
, immed_instr
, fragP
,
10716 immed_instr
- fragP
->fr_literal
, TRUE
);
10718 immed_instr
+= size
;
10719 total_size
+= size
;
10724 diff
= total_size
- old_size
;
10725 gas_assert (diff
>= 0);
10728 gas_assert (diff
<= fragP
->fr_var
);
10729 fragP
->fr_var
-= diff
;
10730 fragP
->fr_fix
+= diff
;
10733 /* Check for undefined immediates in LOOP instructions. */
10737 sym
= orig_tinsn
.tok
[1].X_add_symbol
;
10738 if (sym
!= NULL
&& !S_IS_DEFINED (sym
))
10740 as_bad (_("unresolved loop target symbol: %s"), S_GET_NAME (sym
));
10743 sym
= orig_tinsn
.tok
[1].X_op_symbol
;
10744 if (sym
!= NULL
&& !S_IS_DEFINED (sym
))
10746 as_bad (_("unresolved loop target symbol: %s"), S_GET_NAME (sym
));
10751 if (expanded
&& xtensa_opcode_is_loop (isa
, orig_tinsn
.opcode
) == 1)
10752 convert_frag_immed_finish_loop (segP
, fragP
, &orig_tinsn
);
10754 if (expanded
&& is_direct_call_opcode (orig_tinsn
.opcode
))
10756 /* Add an expansion note on the expanded instruction. */
10757 fix_new_exp_in_seg (now_seg
, 0, fragP
, fr_opcode
- fragP
->fr_literal
, 4,
10758 &orig_tinsn
.tok
[0], TRUE
,
10759 BFD_RELOC_XTENSA_ASM_EXPAND
);
10764 /* Add a new fix expression into the desired segment. We have to
10765 switch to that segment to do this. */
10768 fix_new_exp_in_seg (segT new_seg
,
10769 subsegT new_subseg
,
10775 bfd_reloc_code_real_type r_type
)
10778 segT seg
= now_seg
;
10779 subsegT subseg
= now_subseg
;
10781 gas_assert (new_seg
!= 0);
10782 subseg_set (new_seg
, new_subseg
);
10784 new_fix
= fix_new_exp (frag
, where
, size
, exp
, pcrel
, r_type
);
10785 subseg_set (seg
, subseg
);
10790 /* Relax a loop instruction so that it can span loop >256 bytes.
10796 addi as, as, lo8 (label-.L1)
10797 addmi as, as, mid8 (label-.L1)
10808 convert_frag_immed_finish_loop (segT segP
, fragS
*fragP
, TInsn
*tinsn
)
10813 unsigned long target
;
10814 static xtensa_insnbuf insnbuf
= NULL
;
10815 unsigned int loop_length
, loop_length_hi
, loop_length_lo
;
10816 xtensa_isa isa
= xtensa_default_isa
;
10817 addressT loop_offset
;
10818 addressT addi_offset
= 9;
10819 addressT addmi_offset
= 12;
10824 insnbuf
= xtensa_insnbuf_alloc (isa
);
10826 /* Get the loop offset. */
10827 loop_offset
= get_expanded_loop_offset (tinsn
->opcode
);
10829 /* Validate that there really is a LOOP at the loop_offset. Because
10830 loops are not bundleable, we can assume that the instruction will be
10832 tinsn_from_chars (&loop_insn
, fragP
->fr_opcode
+ loop_offset
, 0);
10833 tinsn_immed_from_frag (&loop_insn
, fragP
, 0);
10835 gas_assert (xtensa_opcode_is_loop (isa
, loop_insn
.opcode
) == 1);
10836 addi_offset
+= loop_offset
;
10837 addmi_offset
+= loop_offset
;
10839 gas_assert (tinsn
->ntok
== 2);
10840 if (tinsn
->tok
[1].X_op
== O_constant
)
10841 target
= tinsn
->tok
[1].X_add_number
;
10842 else if (tinsn
->tok
[1].X_op
== O_symbol
)
10844 /* Find the fragment. */
10845 symbolS
*sym
= tinsn
->tok
[1].X_add_symbol
;
10846 gas_assert (S_GET_SEGMENT (sym
) == segP
10847 || S_GET_SEGMENT (sym
) == absolute_section
);
10848 target
= (S_GET_VALUE (sym
) + tinsn
->tok
[1].X_add_number
);
10852 as_bad (_("invalid expression evaluation type %d"), tinsn
->tok
[1].X_op
);
10856 loop_length
= target
- (fragP
->fr_address
+ fragP
->fr_fix
);
10857 loop_length_hi
= loop_length
& ~0x0ff;
10858 loop_length_lo
= loop_length
& 0x0ff;
10859 if (loop_length_lo
>= 128)
10861 loop_length_lo
-= 256;
10862 loop_length_hi
+= 256;
10865 /* Because addmi sign-extends the immediate, 'loop_length_hi' can be at most
10866 32512. If the loop is larger than that, then we just fail. */
10867 if (loop_length_hi
> 32512)
10868 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
10869 _("loop too long for LOOP instruction"));
10871 tinsn_from_chars (&addi_insn
, fragP
->fr_opcode
+ addi_offset
, 0);
10872 gas_assert (addi_insn
.opcode
== xtensa_addi_opcode
);
10874 tinsn_from_chars (&addmi_insn
, fragP
->fr_opcode
+ addmi_offset
, 0);
10875 gas_assert (addmi_insn
.opcode
== xtensa_addmi_opcode
);
10877 set_expr_const (&addi_insn
.tok
[2], loop_length_lo
);
10878 tinsn_to_insnbuf (&addi_insn
, insnbuf
);
10880 fragP
->tc_frag_data
.is_insn
= TRUE
;
10881 xtensa_insnbuf_to_chars
10882 (isa
, insnbuf
, (unsigned char *) fragP
->fr_opcode
+ addi_offset
, 0);
10884 set_expr_const (&addmi_insn
.tok
[2], loop_length_hi
);
10885 tinsn_to_insnbuf (&addmi_insn
, insnbuf
);
10886 xtensa_insnbuf_to_chars
10887 (isa
, insnbuf
, (unsigned char *) fragP
->fr_opcode
+ addmi_offset
, 0);
10889 /* Walk through all of the frags from here to the loop end
10890 and mark them as no_transform to keep them from being modified
10891 by the linker. If we ever have a relocation for the
10892 addi/addmi of the difference of two symbols we can remove this. */
10895 for (next_fragP
= fragP
; next_fragP
!= NULL
;
10896 next_fragP
= next_fragP
->fr_next
)
10898 next_fragP
->tc_frag_data
.is_no_transform
= TRUE
;
10899 if (next_fragP
->tc_frag_data
.is_loop_target
)
10901 if (target_count
== 2)
10907 /* A map that keeps information on a per-subsegment basis. This is
10908 maintained during initial assembly, but is invalid once the
10909 subsegments are smashed together. I.E., it cannot be used during
10912 typedef struct subseg_map_struct
10920 float total_freq
; /* fall-through + branch target frequency */
10921 float target_freq
; /* branch target frequency alone */
10923 struct subseg_map_struct
*next
;
10927 static subseg_map
*sseg_map
= NULL
;
10929 static subseg_map
*
10930 get_subseg_info (segT seg
, subsegT subseg
)
10932 subseg_map
*subseg_e
;
10934 for (subseg_e
= sseg_map
; subseg_e
; subseg_e
= subseg_e
->next
)
10936 if (seg
== subseg_e
->seg
&& subseg
== subseg_e
->subseg
)
10943 static subseg_map
*
10944 add_subseg_info (segT seg
, subsegT subseg
)
10946 subseg_map
*subseg_e
= XNEW (subseg_map
);
10947 memset (subseg_e
, 0, sizeof (subseg_map
));
10948 subseg_e
->seg
= seg
;
10949 subseg_e
->subseg
= subseg
;
10950 subseg_e
->flags
= 0;
10951 /* Start off considering every branch target very important. */
10952 subseg_e
->target_freq
= 1.0;
10953 subseg_e
->total_freq
= 1.0;
10954 subseg_e
->next
= sseg_map
;
10955 sseg_map
= subseg_e
;
10961 get_last_insn_flags (segT seg
, subsegT subseg
)
10963 subseg_map
*subseg_e
= get_subseg_info (seg
, subseg
);
10965 return subseg_e
->flags
;
10971 set_last_insn_flags (segT seg
,
10976 subseg_map
*subseg_e
= get_subseg_info (seg
, subseg
);
10978 subseg_e
= add_subseg_info (seg
, subseg
);
10980 subseg_e
->flags
|= fl
;
10982 subseg_e
->flags
&= ~fl
;
10987 get_subseg_total_freq (segT seg
, subsegT subseg
)
10989 subseg_map
*subseg_e
= get_subseg_info (seg
, subseg
);
10991 return subseg_e
->total_freq
;
10997 get_subseg_target_freq (segT seg
, subsegT subseg
)
10999 subseg_map
*subseg_e
= get_subseg_info (seg
, subseg
);
11001 return subseg_e
->target_freq
;
11007 set_subseg_freq (segT seg
, subsegT subseg
, float total_f
, float target_f
)
11009 subseg_map
*subseg_e
= get_subseg_info (seg
, subseg
);
11011 subseg_e
= add_subseg_info (seg
, subseg
);
11012 subseg_e
->total_freq
= total_f
;
11013 subseg_e
->target_freq
= target_f
;
11017 /* Segment Lists and emit_state Stuff. */
11020 xtensa_move_seg_list_to_beginning (seg_list
*head
)
11025 segT literal_section
= head
->seg
;
11027 /* Move the literal section to the front of the section list. */
11028 gas_assert (literal_section
);
11029 if (literal_section
!= stdoutput
->sections
)
11031 bfd_section_list_remove (stdoutput
, literal_section
);
11032 bfd_section_list_prepend (stdoutput
, literal_section
);
11039 static void mark_literal_frags (seg_list
*);
11042 xg_promote_candidate_litpool (struct litpool_seg
*lps
,
11043 struct litpool_frag
*lp
)
11048 char label
[10 + 2 * sizeof (fragS
*)];
11050 poolbeg
= lp
->fragP
;
11052 poolbeg
->fr_subtype
= RELAX_LITERAL_POOL_BEGIN
;
11053 poolend
= poolbeg
->fr_next
;
11054 gas_assert (poolend
->fr_type
== rs_machine_dependent
&&
11055 poolend
->fr_subtype
== RELAX_LITERAL_POOL_END
);
11056 /* Create a local symbol pointing to the
11057 end of the pool. */
11058 sprintf (label
, ".L0_LT_%p", poolbeg
);
11059 lsym
= (symbolS
*)local_symbol_make (label
, lps
->seg
,
11061 poolbeg
->fr_symbol
= lsym
;
11062 /* Rest is done in xtensa_relax_frag. */
11066 xtensa_move_literals (void)
11069 frchainS
*frchain_from
, *frchain_to
;
11070 fragS
*search_frag
, *next_frag
, *literal_pool
, *insert_after
;
11071 fragS
**frag_splice
;
11074 fixS
*fix
, *next_fix
, **fix_splice
;
11076 struct litpool_seg
*lps
;
11077 const char *init_name
= INIT_SECTION_NAME
;
11078 const char *fini_name
= FINI_SECTION_NAME
;
11079 int init_name_len
= strlen(init_name
);
11080 int fini_name_len
= strlen(fini_name
);
11082 mark_literal_frags (literal_head
->next
);
11084 if (use_literal_section
)
11087 /* Assign addresses (rough estimates) to the potential literal pool locations
11088 and create new ones if the gaps are too large. */
11090 for (lps
= litpool_seg_list
.next
; lps
; lps
= lps
->next
)
11092 frchainS
*frchP
= seg_info (lps
->seg
)->frchainP
;
11093 struct litpool_frag
*lpf
= lps
->frag_list
.next
;
11096 for ( ; frchP
; frchP
= frchP
->frch_next
)
11099 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
11101 if (lpf
&& fragP
== lpf
->fragP
)
11103 gas_assert(fragP
->fr_type
== rs_machine_dependent
&&
11104 (fragP
->fr_subtype
== RELAX_LITERAL_POOL_BEGIN
||
11105 fragP
->fr_subtype
== RELAX_LITERAL_POOL_CANDIDATE_BEGIN
));
11106 /* Found a litpool location. */
11110 if (fragP
->fr_type
== rs_machine_dependent
&&
11111 fragP
->fr_subtype
== RELAX_SLOTS
)
11114 for (slot
= 0; slot
< MAX_SLOTS
; slot
++)
11116 if (fragP
->tc_frag_data
.literal_frags
[slot
])
11118 /* L32R; point its literal to the nearest litpool
11119 preferring non-"candidate" positions to avoid
11120 the jump-around. */
11121 fragS
*litfrag
= fragP
->tc_frag_data
.literal_frags
[slot
];
11122 struct litpool_frag
*lp
= lpf
->prev
;
11127 while (lp
->fragP
->fr_subtype
==
11128 RELAX_LITERAL_POOL_CANDIDATE_BEGIN
)
11131 if (lp
->fragP
== NULL
)
11133 /* End of list; have to bite the bullet.
11134 Take the nearest. */
11138 /* Does it (conservatively) reach? */
11139 if (addr
- lp
->addr
<= 128 * 1024)
11141 if (lp
->fragP
->fr_subtype
== RELAX_LITERAL_POOL_BEGIN
)
11143 /* Found a good one. */
11146 else if (lp
->prev
->fragP
&&
11147 addr
- lp
->prev
->addr
> 128 * 1024)
11149 /* This is still a "candidate" but the next one
11150 will be too far away, so revert to the nearest
11151 one, convert it and add the jump around. */
11158 /* Convert candidate and add the jump around. */
11159 if (lp
->fragP
->fr_subtype
==
11160 RELAX_LITERAL_POOL_CANDIDATE_BEGIN
)
11161 xg_promote_candidate_litpool (lps
, lp
);
11163 if (! litfrag
->tc_frag_data
.literal_frag
)
11165 /* Take earliest use of this literal to avoid
11167 litfrag
->tc_frag_data
.literal_frag
= lp
->fragP
;
11172 addr
+= fragP
->fr_fix
;
11173 if (fragP
->fr_type
== rs_fill
)
11174 addr
+= fragP
->fr_offset
;
11179 for (segment
= literal_head
->next
; segment
; segment
= segment
->next
)
11181 const char *seg_name
= segment_name (segment
->seg
);
11183 /* Keep the literals for .init and .fini in separate sections. */
11184 if ((!memcmp (seg_name
, init_name
, init_name_len
) &&
11185 !strcmp (seg_name
+ init_name_len
, ".literal")) ||
11186 (!memcmp (seg_name
, fini_name
, fini_name_len
) &&
11187 !strcmp (seg_name
+ fini_name_len
, ".literal")))
11190 frchain_from
= seg_info (segment
->seg
)->frchainP
;
11191 search_frag
= frchain_from
->frch_root
;
11192 literal_pool
= NULL
;
11194 frag_splice
= &(frchain_from
->frch_root
);
11196 while (search_frag
&& !search_frag
->tc_frag_data
.literal_frag
)
11198 gas_assert (search_frag
->fr_fix
== 0
11199 || search_frag
->fr_type
== rs_align
);
11200 search_frag
= search_frag
->fr_next
;
11205 search_frag
= frchain_from
->frch_root
;
11206 as_bad_where (search_frag
->fr_file
, search_frag
->fr_line
,
11207 _("literal pool location required for text-section-literals; specify with .literal_position"));
11211 gas_assert (search_frag
->tc_frag_data
.literal_frag
->fr_subtype
11212 == RELAX_LITERAL_POOL_BEGIN
);
11213 xtensa_switch_section_emit_state (&state
, segment
->seg
, 0);
11215 /* Make sure that all the frags in this series are closed, and
11216 that there is at least one left over of zero-size. This
11217 prevents us from making a segment with an frchain without any
11219 frag_variant (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
11220 xtensa_set_frag_assembly_state (frag_now
);
11221 frag_variant (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
11222 xtensa_set_frag_assembly_state (frag_now
);
11224 while (search_frag
!= frag_now
)
11226 next_frag
= search_frag
->fr_next
;
11227 if (search_frag
->tc_frag_data
.literal_frag
)
11229 literal_pool
= search_frag
->tc_frag_data
.literal_frag
;
11230 gas_assert (literal_pool
->fr_subtype
== RELAX_LITERAL_POOL_BEGIN
);
11231 frchain_to
= literal_pool
->tc_frag_data
.lit_frchain
;
11232 gas_assert (frchain_to
);
11235 if (search_frag
->fr_type
== rs_fill
&& search_frag
->fr_fix
== 0)
11237 /* Skip empty fill frags. */
11238 *frag_splice
= next_frag
;
11239 search_frag
= next_frag
;
11243 if (search_frag
->fr_type
== rs_align
)
11245 /* Skip alignment frags, because the pool as a whole will be
11246 aligned if used, and we don't want to force alignment if the
11248 *frag_splice
= next_frag
;
11249 search_frag
= next_frag
;
11253 /* First, move the frag out of the literal section and
11254 to the appropriate place. */
11256 /* Insert an alignment frag at start of pool. */
11257 if (literal_pool
->fr_next
->fr_type
== rs_machine_dependent
&&
11258 literal_pool
->fr_next
->fr_subtype
== RELAX_LITERAL_POOL_END
)
11260 segT pool_seg
= literal_pool
->fr_next
->tc_frag_data
.lit_seg
;
11261 emit_state prev_state
;
11264 xtensa_switch_section_emit_state (&prev_state
, pool_seg
, 0);
11265 prev_frag
= frag_now
;
11266 frag_variant (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
11267 align_frag
= frag_now
;
11268 frag_align (2, 0, 0);
11269 /* Splice it into the right place. */
11270 prev_frag
->fr_next
= align_frag
->fr_next
;
11271 align_frag
->fr_next
= literal_pool
->fr_next
;
11272 literal_pool
->fr_next
= align_frag
;
11273 /* Insert after this one. */
11274 literal_pool
->tc_frag_data
.literal_frag
= align_frag
;
11275 xtensa_restore_emit_state (&prev_state
);
11277 insert_after
= literal_pool
->tc_frag_data
.literal_frag
;
11278 dest_seg
= insert_after
->fr_next
->tc_frag_data
.lit_seg
;
11279 /* Skip align frag. */
11280 if (insert_after
->fr_next
->fr_type
== rs_align
)
11282 insert_after
= insert_after
->fr_next
;
11285 *frag_splice
= next_frag
;
11286 search_frag
->fr_next
= insert_after
->fr_next
;
11287 insert_after
->fr_next
= search_frag
;
11288 search_frag
->tc_frag_data
.lit_seg
= dest_seg
;
11289 literal_pool
->tc_frag_data
.literal_frag
= search_frag
;
11291 /* Now move any fixups associated with this frag to the
11293 fix
= frchain_from
->fix_root
;
11294 fix_splice
= &(frchain_from
->fix_root
);
11297 next_fix
= fix
->fx_next
;
11298 if (fix
->fx_frag
== search_frag
)
11300 *fix_splice
= next_fix
;
11301 fix
->fx_next
= frchain_to
->fix_root
;
11302 frchain_to
->fix_root
= fix
;
11303 if (frchain_to
->fix_tail
== NULL
)
11304 frchain_to
->fix_tail
= fix
;
11307 fix_splice
= &(fix
->fx_next
);
11310 search_frag
= next_frag
;
11313 if (frchain_from
->fix_root
!= NULL
)
11315 frchain_from
= seg_info (segment
->seg
)->frchainP
;
11316 as_warn (_("fixes not all moved from %s"), segment
->seg
->name
);
11318 gas_assert (frchain_from
->fix_root
== NULL
);
11320 frchain_from
->fix_tail
= NULL
;
11321 xtensa_restore_emit_state (&state
);
11324 /* Now fix up the SEGMENT value for all the literal symbols. */
11325 for (lit
= literal_syms
; lit
; lit
= lit
->next
)
11327 symbolS
*lit_sym
= lit
->sym
;
11328 segT dseg
= symbol_get_frag (lit_sym
)->tc_frag_data
.lit_seg
;
11330 S_SET_SEGMENT (lit_sym
, dseg
);
11335 /* Walk over all the frags for segments in a list and mark them as
11336 containing literals. As clunky as this is, we can't rely on frag_var
11337 and frag_variant to get called in all situations. */
11340 mark_literal_frags (seg_list
*segment
)
11342 frchainS
*frchain_from
;
11343 fragS
*search_frag
;
11347 frchain_from
= seg_info (segment
->seg
)->frchainP
;
11348 search_frag
= frchain_from
->frch_root
;
11349 while (search_frag
)
11351 search_frag
->tc_frag_data
.is_literal
= TRUE
;
11352 search_frag
= search_frag
->fr_next
;
11354 segment
= segment
->next
;
11360 xtensa_reorder_seg_list (seg_list
*head
, segT after
)
11362 /* Move all of the sections in the section list to come
11363 after "after" in the gnu segment list. */
11368 segT literal_section
= head
->seg
;
11370 /* Move the literal section after "after". */
11371 gas_assert (literal_section
);
11372 if (literal_section
!= after
)
11374 bfd_section_list_remove (stdoutput
, literal_section
);
11375 bfd_section_list_insert_after (stdoutput
, after
, literal_section
);
11383 /* Push all the literal segments to the end of the gnu list. */
11386 xtensa_reorder_segments (void)
11393 for (sec
= stdoutput
->sections
; sec
!= NULL
; sec
= sec
->next
)
11399 /* Now that we have the last section, push all the literal
11400 sections to the end. */
11401 xtensa_reorder_seg_list (literal_head
, last_sec
);
11403 /* Now perform the final error check. */
11404 for (sec
= stdoutput
->sections
; sec
!= NULL
; sec
= sec
->next
)
11406 gas_assert (new_count
== old_count
);
11410 /* Change the emit state (seg, subseg, and frag related stuff) to the
11411 correct location. Return a emit_state which can be passed to
11412 xtensa_restore_emit_state to return to current fragment. */
11415 xtensa_switch_to_literal_fragment (emit_state
*result
)
11417 if (directive_state
[directive_absolute_literals
])
11419 segT lit4_seg
= cache_literal_section (TRUE
);
11420 xtensa_switch_section_emit_state (result
, lit4_seg
, 0);
11423 xtensa_switch_to_non_abs_literal_fragment (result
);
11425 /* Do a 4-byte align here. */
11426 frag_align (2, 0, 0);
11427 record_alignment (now_seg
, 2);
11432 xtensa_switch_to_non_abs_literal_fragment (emit_state
*result
)
11434 fragS
*pool_location
= get_literal_pool_location (now_seg
);
11436 bfd_boolean is_init
=
11437 (now_seg
&& !strcmp (segment_name (now_seg
), INIT_SECTION_NAME
));
11438 bfd_boolean is_fini
=
11439 (now_seg
&& !strcmp (segment_name (now_seg
), FINI_SECTION_NAME
));
11441 if (pool_location
== NULL
11442 && !use_literal_section
11443 && !is_init
&& ! is_fini
)
11445 if (!auto_litpools
)
11447 as_bad (_("literal pool location required for text-section-literals; specify with .literal_position"));
11449 xtensa_maybe_create_literal_pool_frag (TRUE
, TRUE
);
11450 pool_location
= get_literal_pool_location (now_seg
);
11453 lit_seg
= cache_literal_section (FALSE
);
11454 xtensa_switch_section_emit_state (result
, lit_seg
, 0);
11456 if (!use_literal_section
11457 && !is_init
&& !is_fini
11458 && get_literal_pool_location (now_seg
) != pool_location
)
11460 /* Close whatever frag is there. */
11461 frag_variant (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
11462 xtensa_set_frag_assembly_state (frag_now
);
11463 frag_now
->tc_frag_data
.literal_frag
= pool_location
;
11464 frag_variant (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
11465 xtensa_set_frag_assembly_state (frag_now
);
11470 /* Call this function before emitting data into the literal section.
11471 This is a helper function for xtensa_switch_to_literal_fragment.
11472 This is similar to a .section new_now_seg subseg. */
11475 xtensa_switch_section_emit_state (emit_state
*state
,
11477 subsegT new_now_subseg
)
11479 state
->name
= now_seg
->name
;
11480 state
->now_seg
= now_seg
;
11481 state
->now_subseg
= now_subseg
;
11482 state
->generating_literals
= generating_literals
;
11483 generating_literals
++;
11484 subseg_set (new_now_seg
, new_now_subseg
);
11488 /* Use to restore the emitting into the normal place. */
11491 xtensa_restore_emit_state (emit_state
*state
)
11493 generating_literals
= state
->generating_literals
;
11494 subseg_set (state
->now_seg
, state
->now_subseg
);
11498 /* Predicate function used to look up a section in a particular group. */
11501 match_section_group (bfd
*abfd ATTRIBUTE_UNUSED
, asection
*sec
, void *inf
)
11503 const char *gname
= inf
;
11504 const char *group_name
= elf_group_name (sec
);
11506 return (group_name
== gname
11507 || (group_name
!= NULL
11509 && strcmp (group_name
, gname
) == 0));
11513 /* Get the literal section to be used for the current text section.
11514 The result may be cached in the default_lit_sections structure. */
11517 cache_literal_section (bfd_boolean use_abs_literals
)
11519 const char *text_name
, *group_name
= 0;
11520 const char *base_name
, *suffix
;
11523 segT seg
, current_section
;
11524 int current_subsec
;
11525 bfd_boolean linkonce
= FALSE
;
11527 /* Save the current section/subsection. */
11528 current_section
= now_seg
;
11529 current_subsec
= now_subseg
;
11531 /* Clear the cached values if they are no longer valid. */
11532 if (now_seg
!= default_lit_sections
.current_text_seg
)
11534 default_lit_sections
.current_text_seg
= now_seg
;
11535 default_lit_sections
.lit_seg
= NULL
;
11536 default_lit_sections
.lit4_seg
= NULL
;
11539 /* Check if the literal section is already cached. */
11540 if (use_abs_literals
)
11541 pcached
= &default_lit_sections
.lit4_seg
;
11543 pcached
= &default_lit_sections
.lit_seg
;
11548 text_name
= default_lit_sections
.lit_prefix
;
11549 if (! text_name
|| ! *text_name
)
11551 text_name
= segment_name (current_section
);
11552 group_name
= elf_group_name (current_section
);
11553 linkonce
= (current_section
->flags
& SEC_LINK_ONCE
) != 0;
11556 base_name
= use_abs_literals
? ".lit4" : ".literal";
11559 name
= concat (base_name
, ".", group_name
, (char *) NULL
);
11561 else if (strncmp (text_name
, ".gnu.linkonce.", linkonce_len
) == 0)
11563 suffix
= strchr (text_name
+ linkonce_len
, '.');
11565 name
= concat (".gnu.linkonce", base_name
, suffix
? suffix
: "",
11571 /* If the section name begins or ends with ".text", then replace
11572 that portion instead of appending an additional suffix. */
11573 size_t len
= strlen (text_name
);
11575 && (strcmp (text_name
+ len
- 5, ".text") == 0
11576 || strncmp (text_name
, ".text", 5) == 0))
11579 name
= XNEWVEC (char, len
+ strlen (base_name
) + 1);
11580 if (strncmp (text_name
, ".text", 5) == 0)
11582 strcpy (name
, base_name
);
11583 strcat (name
, text_name
+ 5);
11587 strcpy (name
, text_name
);
11588 strcpy (name
+ len
, base_name
);
11592 /* Canonicalize section names to allow renaming literal sections.
11593 The group name, if any, came from the current text section and
11594 has already been canonicalized. */
11595 name
= tc_canonicalize_symbol_name (name
);
11597 seg
= bfd_get_section_by_name_if (stdoutput
, name
, match_section_group
,
11598 (void *) group_name
);
11603 seg
= subseg_force_new (name
, 0);
11605 if (! use_abs_literals
)
11607 /* Add the newly created literal segment to the list. */
11608 seg_list
*n
= XNEW (seg_list
);
11610 n
->next
= literal_head
->next
;
11611 literal_head
->next
= n
;
11614 flags
= (SEC_HAS_CONTENTS
| SEC_READONLY
| SEC_ALLOC
| SEC_LOAD
11615 | (linkonce
? (SEC_LINK_ONCE
| SEC_LINK_DUPLICATES_DISCARD
) : 0)
11616 | (use_abs_literals
? SEC_DATA
: SEC_CODE
));
11618 elf_group_name (seg
) = group_name
;
11620 bfd_set_section_flags (stdoutput
, seg
, flags
);
11621 bfd_set_section_alignment (stdoutput
, seg
, 2);
11625 subseg_set (current_section
, current_subsec
);
11630 /* Property Tables Stuff. */
11632 #define XTENSA_INSN_SEC_NAME ".xt.insn"
11633 #define XTENSA_LIT_SEC_NAME ".xt.lit"
11634 #define XTENSA_PROP_SEC_NAME ".xt.prop"
11636 typedef bfd_boolean (*frag_predicate
) (const fragS
*);
11637 typedef void (*frag_flags_fn
) (const fragS
*, frag_flags
*);
11639 static bfd_boolean
get_frag_is_literal (const fragS
*);
11640 static void xtensa_create_property_segments
11641 (frag_predicate
, frag_predicate
, const char *, xt_section_type
);
11642 static void xtensa_create_xproperty_segments
11643 (frag_flags_fn
, const char *, xt_section_type
);
11644 static bfd_boolean
exclude_section_from_property_tables (segT
);
11645 static bfd_boolean
section_has_property (segT
, frag_predicate
);
11646 static bfd_boolean
section_has_xproperty (segT
, frag_flags_fn
);
11647 static void add_xt_block_frags
11648 (segT
, xtensa_block_info
**, frag_predicate
, frag_predicate
);
11649 static bfd_boolean
xtensa_frag_flags_is_empty (const frag_flags
*);
11650 static void xtensa_frag_flags_init (frag_flags
*);
11651 static void get_frag_property_flags (const fragS
*, frag_flags
*);
11652 static flagword
frag_flags_to_number (const frag_flags
*);
11653 static void add_xt_prop_frags (segT
, xtensa_block_info
**, frag_flags_fn
);
11655 /* Set up property tables after relaxation. */
11658 xtensa_post_relax_hook (void)
11660 xtensa_move_seg_list_to_beginning (literal_head
);
11662 xtensa_find_unmarked_state_frags ();
11663 xtensa_mark_frags_for_org ();
11664 xtensa_mark_difference_of_two_symbols ();
11666 xtensa_create_property_segments (get_frag_is_literal
,
11668 XTENSA_LIT_SEC_NAME
,
11670 xtensa_create_xproperty_segments (get_frag_property_flags
,
11671 XTENSA_PROP_SEC_NAME
,
11674 if (warn_unaligned_branch_targets
)
11675 bfd_map_over_sections (stdoutput
, xtensa_find_unaligned_branch_targets
, 0);
11676 bfd_map_over_sections (stdoutput
, xtensa_find_unaligned_loops
, 0);
11680 /* This function is only meaningful after xtensa_move_literals. */
11683 get_frag_is_literal (const fragS
*fragP
)
11685 gas_assert (fragP
!= NULL
);
11686 return fragP
->tc_frag_data
.is_literal
;
11691 xtensa_create_property_segments (frag_predicate property_function
,
11692 frag_predicate end_property_function
,
11693 const char *section_name_base
,
11694 xt_section_type sec_type
)
11698 /* Walk over all of the current segments.
11699 Walk over each fragment
11700 For each non-empty fragment,
11701 Build a property record (append where possible). */
11703 for (seclist
= &stdoutput
->sections
;
11704 seclist
&& *seclist
;
11705 seclist
= &(*seclist
)->next
)
11707 segT sec
= *seclist
;
11709 if (exclude_section_from_property_tables (sec
))
11712 if (section_has_property (sec
, property_function
))
11714 segment_info_type
*xt_seg_info
;
11715 xtensa_block_info
**xt_blocks
;
11716 segT prop_sec
= xtensa_make_property_section (sec
, section_name_base
);
11718 prop_sec
->output_section
= prop_sec
;
11719 subseg_set (prop_sec
, 0);
11720 xt_seg_info
= seg_info (prop_sec
);
11721 xt_blocks
= &xt_seg_info
->tc_segment_info_data
.blocks
[sec_type
];
11723 /* Walk over all of the frchains here and add new sections. */
11724 add_xt_block_frags (sec
, xt_blocks
, property_function
,
11725 end_property_function
);
11729 /* Now we fill them out.... */
11731 for (seclist
= &stdoutput
->sections
;
11732 seclist
&& *seclist
;
11733 seclist
= &(*seclist
)->next
)
11735 segment_info_type
*seginfo
;
11736 xtensa_block_info
*block
;
11737 segT sec
= *seclist
;
11739 seginfo
= seg_info (sec
);
11740 block
= seginfo
->tc_segment_info_data
.blocks
[sec_type
];
11744 xtensa_block_info
*cur_block
;
11746 bfd_size_type rec_size
;
11748 for (cur_block
= block
; cur_block
; cur_block
= cur_block
->next
)
11751 rec_size
= num_recs
* 8;
11752 bfd_set_section_size (stdoutput
, sec
, rec_size
);
11759 subseg_set (sec
, 0);
11760 frag_data
= frag_more (rec_size
);
11762 for (i
= 0; i
< num_recs
; i
++)
11766 /* Write the fixup. */
11767 gas_assert (cur_block
);
11768 fix
= fix_new (frag_now
, i
* 8, 4,
11769 section_symbol (cur_block
->sec
),
11771 FALSE
, BFD_RELOC_32
);
11772 fix
->fx_file
= "<internal>";
11775 /* Write the length. */
11776 md_number_to_chars (&frag_data
[4 + i
* 8],
11777 cur_block
->size
, 4);
11778 cur_block
= cur_block
->next
;
11780 frag_wane (frag_now
);
11782 frag_wane (frag_now
);
11790 xtensa_create_xproperty_segments (frag_flags_fn flag_fn
,
11791 const char *section_name_base
,
11792 xt_section_type sec_type
)
11796 /* Walk over all of the current segments.
11797 Walk over each fragment.
11798 For each fragment that has instructions,
11799 build an instruction record (append where possible). */
11801 for (seclist
= &stdoutput
->sections
;
11802 seclist
&& *seclist
;
11803 seclist
= &(*seclist
)->next
)
11805 segT sec
= *seclist
;
11807 if (exclude_section_from_property_tables (sec
))
11810 if (section_has_xproperty (sec
, flag_fn
))
11812 segment_info_type
*xt_seg_info
;
11813 xtensa_block_info
**xt_blocks
;
11814 segT prop_sec
= xtensa_make_property_section (sec
, section_name_base
);
11816 prop_sec
->output_section
= prop_sec
;
11817 subseg_set (prop_sec
, 0);
11818 xt_seg_info
= seg_info (prop_sec
);
11819 xt_blocks
= &xt_seg_info
->tc_segment_info_data
.blocks
[sec_type
];
11821 /* Walk over all of the frchains here and add new sections. */
11822 add_xt_prop_frags (sec
, xt_blocks
, flag_fn
);
11826 /* Now we fill them out.... */
11828 for (seclist
= &stdoutput
->sections
;
11829 seclist
&& *seclist
;
11830 seclist
= &(*seclist
)->next
)
11832 segment_info_type
*seginfo
;
11833 xtensa_block_info
*block
;
11834 segT sec
= *seclist
;
11836 seginfo
= seg_info (sec
);
11837 block
= seginfo
->tc_segment_info_data
.blocks
[sec_type
];
11841 xtensa_block_info
*cur_block
;
11843 bfd_size_type rec_size
;
11845 for (cur_block
= block
; cur_block
; cur_block
= cur_block
->next
)
11848 rec_size
= num_recs
* (8 + 4);
11849 bfd_set_section_size (stdoutput
, sec
, rec_size
);
11850 /* elf_section_data (sec)->this_hdr.sh_entsize = 12; */
11857 subseg_set (sec
, 0);
11858 frag_data
= frag_more (rec_size
);
11860 for (i
= 0; i
< num_recs
; i
++)
11864 /* Write the fixup. */
11865 gas_assert (cur_block
);
11866 fix
= fix_new (frag_now
, i
* 12, 4,
11867 section_symbol (cur_block
->sec
),
11869 FALSE
, BFD_RELOC_32
);
11870 fix
->fx_file
= "<internal>";
11873 /* Write the length. */
11874 md_number_to_chars (&frag_data
[4 + i
* 12],
11875 cur_block
->size
, 4);
11876 md_number_to_chars (&frag_data
[8 + i
* 12],
11877 frag_flags_to_number (&cur_block
->flags
),
11878 sizeof (flagword
));
11879 cur_block
= cur_block
->next
;
11881 frag_wane (frag_now
);
11883 frag_wane (frag_now
);
11891 exclude_section_from_property_tables (segT sec
)
11893 flagword flags
= bfd_get_section_flags (stdoutput
, sec
);
11895 /* Sections that don't contribute to the memory footprint are excluded. */
11896 if ((flags
& SEC_DEBUGGING
)
11897 || !(flags
& SEC_ALLOC
)
11898 || (flags
& SEC_MERGE
))
11901 /* Linker cie and fde optimizations mess up property entries for
11902 eh_frame sections, but there is nothing inside them relevant to
11903 property tables anyway. */
11904 if (strcmp (sec
->name
, ".eh_frame") == 0)
11912 section_has_property (segT sec
, frag_predicate property_function
)
11914 segment_info_type
*seginfo
= seg_info (sec
);
11917 if (seginfo
&& seginfo
->frchainP
)
11919 for (fragP
= seginfo
->frchainP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
11921 if (property_function (fragP
)
11922 && (fragP
->fr_type
!= rs_fill
|| fragP
->fr_fix
!= 0))
11931 section_has_xproperty (segT sec
, frag_flags_fn property_function
)
11933 segment_info_type
*seginfo
= seg_info (sec
);
11936 if (seginfo
&& seginfo
->frchainP
)
11938 for (fragP
= seginfo
->frchainP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
11940 frag_flags prop_flags
;
11941 property_function (fragP
, &prop_flags
);
11942 if (!xtensa_frag_flags_is_empty (&prop_flags
))
11950 /* Two types of block sections exist right now: literal and insns. */
11953 add_xt_block_frags (segT sec
,
11954 xtensa_block_info
**xt_block
,
11955 frag_predicate property_function
,
11956 frag_predicate end_property_function
)
11960 /* Build it if needed. */
11961 while (*xt_block
!= NULL
)
11962 xt_block
= &(*xt_block
)->next
;
11963 /* We are either at NULL at the beginning or at the end. */
11965 /* Walk through the frags. */
11966 if (seg_info (sec
)->frchainP
)
11968 for (fragP
= seg_info (sec
)->frchainP
->frch_root
;
11970 fragP
= fragP
->fr_next
)
11972 if (property_function (fragP
)
11973 && (fragP
->fr_type
!= rs_fill
|| fragP
->fr_fix
!= 0))
11975 if (*xt_block
!= NULL
)
11977 if ((*xt_block
)->offset
+ (*xt_block
)->size
11978 == fragP
->fr_address
)
11979 (*xt_block
)->size
+= fragP
->fr_fix
;
11981 xt_block
= &((*xt_block
)->next
);
11983 if (*xt_block
== NULL
)
11985 xtensa_block_info
*new_block
= XNEW (xtensa_block_info
);
11986 new_block
->sec
= sec
;
11987 new_block
->offset
= fragP
->fr_address
;
11988 new_block
->size
= fragP
->fr_fix
;
11989 new_block
->next
= NULL
;
11990 xtensa_frag_flags_init (&new_block
->flags
);
11991 *xt_block
= new_block
;
11993 if (end_property_function
11994 && end_property_function (fragP
))
11996 xt_block
= &((*xt_block
)->next
);
12004 /* Break the encapsulation of add_xt_prop_frags here. */
12007 xtensa_frag_flags_is_empty (const frag_flags
*prop_flags
)
12009 if (prop_flags
->is_literal
12010 || prop_flags
->is_insn
12011 || prop_flags
->is_data
12012 || prop_flags
->is_unreachable
)
12019 xtensa_frag_flags_init (frag_flags
*prop_flags
)
12021 memset (prop_flags
, 0, sizeof (frag_flags
));
12026 get_frag_property_flags (const fragS
*fragP
, frag_flags
*prop_flags
)
12028 xtensa_frag_flags_init (prop_flags
);
12029 if (fragP
->tc_frag_data
.is_literal
)
12030 prop_flags
->is_literal
= TRUE
;
12031 if (fragP
->tc_frag_data
.is_specific_opcode
12032 || fragP
->tc_frag_data
.is_no_transform
)
12034 prop_flags
->is_no_transform
= TRUE
;
12035 if (xtensa_frag_flags_is_empty (prop_flags
))
12036 prop_flags
->is_data
= TRUE
;
12038 if (fragP
->tc_frag_data
.is_unreachable
)
12039 prop_flags
->is_unreachable
= TRUE
;
12040 else if (fragP
->tc_frag_data
.is_insn
)
12042 prop_flags
->is_insn
= TRUE
;
12043 if (fragP
->tc_frag_data
.is_loop_target
)
12044 prop_flags
->insn
.is_loop_target
= TRUE
;
12045 if (fragP
->tc_frag_data
.is_branch_target
)
12046 prop_flags
->insn
.is_branch_target
= TRUE
;
12047 if (fragP
->tc_frag_data
.is_no_density
)
12048 prop_flags
->insn
.is_no_density
= TRUE
;
12049 if (fragP
->tc_frag_data
.use_absolute_literals
)
12050 prop_flags
->insn
.is_abslit
= TRUE
;
12052 if (fragP
->tc_frag_data
.is_align
)
12054 prop_flags
->is_align
= TRUE
;
12055 prop_flags
->alignment
= fragP
->tc_frag_data
.alignment
;
12056 if (xtensa_frag_flags_is_empty (prop_flags
))
12057 prop_flags
->is_data
= TRUE
;
12063 frag_flags_to_number (const frag_flags
*prop_flags
)
12066 if (prop_flags
->is_literal
)
12067 num
|= XTENSA_PROP_LITERAL
;
12068 if (prop_flags
->is_insn
)
12069 num
|= XTENSA_PROP_INSN
;
12070 if (prop_flags
->is_data
)
12071 num
|= XTENSA_PROP_DATA
;
12072 if (prop_flags
->is_unreachable
)
12073 num
|= XTENSA_PROP_UNREACHABLE
;
12074 if (prop_flags
->insn
.is_loop_target
)
12075 num
|= XTENSA_PROP_INSN_LOOP_TARGET
;
12076 if (prop_flags
->insn
.is_branch_target
)
12078 num
|= XTENSA_PROP_INSN_BRANCH_TARGET
;
12079 num
= SET_XTENSA_PROP_BT_ALIGN (num
, prop_flags
->insn
.bt_align_priority
);
12082 if (prop_flags
->insn
.is_no_density
)
12083 num
|= XTENSA_PROP_INSN_NO_DENSITY
;
12084 if (prop_flags
->is_no_transform
)
12085 num
|= XTENSA_PROP_NO_TRANSFORM
;
12086 if (prop_flags
->insn
.is_no_reorder
)
12087 num
|= XTENSA_PROP_INSN_NO_REORDER
;
12088 if (prop_flags
->insn
.is_abslit
)
12089 num
|= XTENSA_PROP_INSN_ABSLIT
;
12091 if (prop_flags
->is_align
)
12093 num
|= XTENSA_PROP_ALIGN
;
12094 num
= SET_XTENSA_PROP_ALIGNMENT (num
, prop_flags
->alignment
);
12102 xtensa_frag_flags_combinable (const frag_flags
*prop_flags_1
,
12103 const frag_flags
*prop_flags_2
)
12105 /* Cannot combine with an end marker. */
12107 if (prop_flags_1
->is_literal
!= prop_flags_2
->is_literal
)
12109 if (prop_flags_1
->is_insn
!= prop_flags_2
->is_insn
)
12111 if (prop_flags_1
->is_data
!= prop_flags_2
->is_data
)
12114 if (prop_flags_1
->is_insn
)
12116 /* Properties of the beginning of the frag. */
12117 if (prop_flags_2
->insn
.is_loop_target
)
12119 if (prop_flags_2
->insn
.is_branch_target
)
12121 if (prop_flags_1
->insn
.is_no_density
!=
12122 prop_flags_2
->insn
.is_no_density
)
12124 if (prop_flags_1
->is_no_transform
!=
12125 prop_flags_2
->is_no_transform
)
12127 if (prop_flags_1
->insn
.is_no_reorder
!=
12128 prop_flags_2
->insn
.is_no_reorder
)
12130 if (prop_flags_1
->insn
.is_abslit
!=
12131 prop_flags_2
->insn
.is_abslit
)
12135 if (prop_flags_1
->is_align
)
12143 xt_block_aligned_size (const xtensa_block_info
*xt_block
)
12146 unsigned align_bits
;
12148 if (!xt_block
->flags
.is_align
)
12149 return xt_block
->size
;
12151 end_addr
= xt_block
->offset
+ xt_block
->size
;
12152 align_bits
= xt_block
->flags
.alignment
;
12153 end_addr
= ((end_addr
+ ((1 << align_bits
) -1)) >> align_bits
) << align_bits
;
12154 return end_addr
- xt_block
->offset
;
12159 xtensa_xt_block_combine (xtensa_block_info
*xt_block
,
12160 const xtensa_block_info
*xt_block_2
)
12162 if (xt_block
->sec
!= xt_block_2
->sec
)
12164 if (xt_block
->offset
+ xt_block_aligned_size (xt_block
)
12165 != xt_block_2
->offset
)
12168 if (xt_block_2
->size
== 0
12169 && (!xt_block_2
->flags
.is_unreachable
12170 || xt_block
->flags
.is_unreachable
))
12172 if (xt_block_2
->flags
.is_align
12173 && xt_block
->flags
.is_align
)
12175 /* Nothing needed. */
12176 if (xt_block
->flags
.alignment
>= xt_block_2
->flags
.alignment
)
12181 if (xt_block_2
->flags
.is_align
)
12183 /* Push alignment to previous entry. */
12184 xt_block
->flags
.is_align
= xt_block_2
->flags
.is_align
;
12185 xt_block
->flags
.alignment
= xt_block_2
->flags
.alignment
;
12190 if (!xtensa_frag_flags_combinable (&xt_block
->flags
,
12191 &xt_block_2
->flags
))
12194 xt_block
->size
+= xt_block_2
->size
;
12196 if (xt_block_2
->flags
.is_align
)
12198 xt_block
->flags
.is_align
= TRUE
;
12199 xt_block
->flags
.alignment
= xt_block_2
->flags
.alignment
;
12207 add_xt_prop_frags (segT sec
,
12208 xtensa_block_info
**xt_block
,
12209 frag_flags_fn property_function
)
12213 /* Build it if needed. */
12214 while (*xt_block
!= NULL
)
12216 xt_block
= &(*xt_block
)->next
;
12218 /* We are either at NULL at the beginning or at the end. */
12220 /* Walk through the frags. */
12221 if (seg_info (sec
)->frchainP
)
12223 for (fragP
= seg_info (sec
)->frchainP
->frch_root
; fragP
;
12224 fragP
= fragP
->fr_next
)
12226 xtensa_block_info tmp_block
;
12227 tmp_block
.sec
= sec
;
12228 tmp_block
.offset
= fragP
->fr_address
;
12229 tmp_block
.size
= fragP
->fr_fix
;
12230 tmp_block
.next
= NULL
;
12231 property_function (fragP
, &tmp_block
.flags
);
12233 if (!xtensa_frag_flags_is_empty (&tmp_block
.flags
))
12234 /* && fragP->fr_fix != 0) */
12236 if ((*xt_block
) == NULL
12237 || !xtensa_xt_block_combine (*xt_block
, &tmp_block
))
12239 xtensa_block_info
*new_block
;
12240 if ((*xt_block
) != NULL
)
12241 xt_block
= &(*xt_block
)->next
;
12242 new_block
= XNEW (xtensa_block_info
);
12243 *new_block
= tmp_block
;
12244 *xt_block
= new_block
;
12252 /* op_placement_info_table */
12254 /* op_placement_info makes it easier to determine which
12255 ops can go in which slots. */
12258 init_op_placement_info_table (void)
12260 xtensa_isa isa
= xtensa_default_isa
;
12261 xtensa_insnbuf ibuf
= xtensa_insnbuf_alloc (isa
);
12262 xtensa_opcode opcode
;
12265 int num_opcodes
= xtensa_isa_num_opcodes (isa
);
12267 op_placement_table
= XNEWVEC (op_placement_info
, num_opcodes
);
12268 gas_assert (xtensa_isa_num_formats (isa
) < MAX_FORMATS
);
12270 for (opcode
= 0; opcode
< num_opcodes
; opcode
++)
12272 op_placement_info
*opi
= &op_placement_table
[opcode
];
12273 /* FIXME: Make tinsn allocation dynamic. */
12274 if (xtensa_opcode_num_operands (isa
, opcode
) > MAX_INSN_ARGS
)
12275 as_fatal (_("too many operands in instruction"));
12276 opi
->narrowest
= XTENSA_UNDEFINED
;
12277 opi
->narrowest_size
= 0x7F;
12278 opi
->narrowest_slot
= 0;
12280 opi
->num_formats
= 0;
12282 for (fmt
= 0; fmt
< xtensa_isa_num_formats (isa
); fmt
++)
12284 opi
->slots
[fmt
] = 0;
12285 for (slot
= 0; slot
< xtensa_format_num_slots (isa
, fmt
); slot
++)
12287 if (xtensa_opcode_encode (isa
, fmt
, slot
, ibuf
, opcode
) == 0)
12289 int fmt_length
= xtensa_format_length (isa
, fmt
);
12291 set_bit (fmt
, opi
->formats
);
12292 set_bit (slot
, opi
->slots
[fmt
]);
12293 if (fmt_length
< opi
->narrowest_size
12294 || (fmt_length
== opi
->narrowest_size
12295 && (xtensa_format_num_slots (isa
, fmt
)
12296 < xtensa_format_num_slots (isa
,
12299 opi
->narrowest
= fmt
;
12300 opi
->narrowest_size
= fmt_length
;
12301 opi
->narrowest_slot
= slot
;
12306 opi
->num_formats
++;
12309 xtensa_insnbuf_free (isa
, ibuf
);
12314 opcode_fits_format_slot (xtensa_opcode opcode
, xtensa_format fmt
, int slot
)
12316 return bit_is_set (slot
, op_placement_table
[opcode
].slots
[fmt
]);
12320 /* If the opcode is available in a single slot format, return its size. */
12323 xg_get_single_size (xtensa_opcode opcode
)
12325 return op_placement_table
[opcode
].narrowest_size
;
12329 static xtensa_format
12330 xg_get_single_format (xtensa_opcode opcode
)
12332 return op_placement_table
[opcode
].narrowest
;
12337 xg_get_single_slot (xtensa_opcode opcode
)
12339 return op_placement_table
[opcode
].narrowest_slot
;
12343 /* Instruction Stack Functions (from "xtensa-istack.h"). */
12346 istack_init (IStack
*stack
)
12353 istack_empty (IStack
*stack
)
12355 return (stack
->ninsn
== 0);
12360 istack_full (IStack
*stack
)
12362 return (stack
->ninsn
== MAX_ISTACK
);
12366 /* Return a pointer to the top IStack entry.
12367 It is an error to call this if istack_empty () is TRUE. */
12370 istack_top (IStack
*stack
)
12372 int rec
= stack
->ninsn
- 1;
12373 gas_assert (!istack_empty (stack
));
12374 return &stack
->insn
[rec
];
12378 /* Add a new TInsn to an IStack.
12379 It is an error to call this if istack_full () is TRUE. */
12382 istack_push (IStack
*stack
, TInsn
*insn
)
12384 int rec
= stack
->ninsn
;
12385 gas_assert (!istack_full (stack
));
12386 stack
->insn
[rec
] = *insn
;
12391 /* Clear space for the next TInsn on the IStack and return a pointer
12392 to it. It is an error to call this if istack_full () is TRUE. */
12395 istack_push_space (IStack
*stack
)
12397 int rec
= stack
->ninsn
;
12399 gas_assert (!istack_full (stack
));
12400 insn
= &stack
->insn
[rec
];
12407 /* Remove the last pushed instruction. It is an error to call this if
12408 istack_empty () returns TRUE. */
12411 istack_pop (IStack
*stack
)
12413 int rec
= stack
->ninsn
- 1;
12414 gas_assert (!istack_empty (stack
));
12416 tinsn_init (&stack
->insn
[rec
]);
12420 /* TInsn functions. */
12423 tinsn_init (TInsn
*dst
)
12425 memset (dst
, 0, sizeof (TInsn
));
12429 /* Return TRUE if ANY of the operands in the insn are symbolic. */
12432 tinsn_has_symbolic_operands (const TInsn
*insn
)
12435 int n
= insn
->ntok
;
12437 gas_assert (insn
->insn_type
== ITYPE_INSN
);
12439 for (i
= 0; i
< n
; ++i
)
12441 switch (insn
->tok
[i
].X_op
)
12455 tinsn_has_invalid_symbolic_operands (const TInsn
*insn
)
12457 xtensa_isa isa
= xtensa_default_isa
;
12459 int n
= insn
->ntok
;
12461 gas_assert (insn
->insn_type
== ITYPE_INSN
);
12463 for (i
= 0; i
< n
; ++i
)
12465 switch (insn
->tok
[i
].X_op
)
12473 /* Errors for these types are caught later. */
12478 /* Symbolic immediates are only allowed on the last immediate
12479 operand. At this time, CONST16 is the only opcode where we
12480 support non-PC-relative relocations. */
12481 if (i
!= get_relaxable_immed (insn
->opcode
)
12482 || (xtensa_operand_is_PCrelative (isa
, insn
->opcode
, i
) != 1
12483 && insn
->opcode
!= xtensa_const16_opcode
))
12485 as_bad (_("invalid symbolic operand"));
12494 /* For assembly code with complex expressions (e.g. subtraction),
12495 we have to build them in the literal pool so that
12496 their results are calculated correctly after relaxation.
12497 The relaxation only handles expressions that
12498 boil down to SYMBOL + OFFSET. */
12501 tinsn_has_complex_operands (const TInsn
*insn
)
12504 int n
= insn
->ntok
;
12505 gas_assert (insn
->insn_type
== ITYPE_INSN
);
12506 for (i
= 0; i
< n
; ++i
)
12508 switch (insn
->tok
[i
].X_op
)
12524 /* Encode a TInsn opcode and its constant operands into slotbuf.
12525 Return TRUE if there is a symbol in the immediate field. This
12526 function assumes that:
12527 1) The number of operands are correct.
12528 2) The insn_type is ITYPE_INSN.
12529 3) The opcode can be encoded in the specified format and slot.
12530 4) Operands are either O_constant or O_symbol, and all constants fit. */
12533 tinsn_to_slotbuf (xtensa_format fmt
,
12536 xtensa_insnbuf slotbuf
)
12538 xtensa_isa isa
= xtensa_default_isa
;
12539 xtensa_opcode opcode
= tinsn
->opcode
;
12540 bfd_boolean has_fixup
= FALSE
;
12541 int noperands
= xtensa_opcode_num_operands (isa
, opcode
);
12544 gas_assert (tinsn
->insn_type
== ITYPE_INSN
);
12545 if (noperands
!= tinsn
->ntok
)
12546 as_fatal (_("operand number mismatch"));
12548 if (xtensa_opcode_encode (isa
, fmt
, slot
, slotbuf
, opcode
))
12550 as_bad (_("cannot encode opcode \"%s\" in the given format \"%s\""),
12551 xtensa_opcode_name (isa
, opcode
), xtensa_format_name (isa
, fmt
));
12555 for (i
= 0; i
< noperands
; i
++)
12557 expressionS
*exp
= &tinsn
->tok
[i
];
12560 const char *file_name
;
12566 if (xtensa_operand_is_visible (isa
, opcode
, i
) == 0)
12568 /* The register number has already been checked in
12569 expression_maybe_register, so we don't need to check here. */
12570 opnd_value
= exp
->X_add_number
;
12571 (void) xtensa_operand_encode (isa
, opcode
, i
, &opnd_value
);
12572 rc
= xtensa_operand_set_field (isa
, opcode
, i
, fmt
, slot
, slotbuf
,
12575 as_warn (_("xtensa-isa failure: %s"), xtensa_isa_error_msg (isa
));
12579 if (xtensa_operand_is_visible (isa
, opcode
, i
) == 0)
12581 file_name
= as_where (&line
);
12582 /* It is a constant and we called this function
12583 then we have to try to fit it. */
12584 xtensa_insnbuf_set_operand (slotbuf
, fmt
, slot
, opcode
, i
,
12585 exp
->X_add_number
, file_name
, line
);
12598 /* Encode a single TInsn into an insnbuf. If the opcode can only be encoded
12599 into a multi-slot instruction, fill the other slots with NOPs.
12600 Return TRUE if there is a symbol in the immediate field. See also the
12601 assumptions listed for tinsn_to_slotbuf. */
12604 tinsn_to_insnbuf (TInsn
*tinsn
, xtensa_insnbuf insnbuf
)
12606 static xtensa_insnbuf slotbuf
= 0;
12607 static vliw_insn vinsn
;
12608 xtensa_isa isa
= xtensa_default_isa
;
12609 bfd_boolean has_fixup
= FALSE
;
12614 slotbuf
= xtensa_insnbuf_alloc (isa
);
12615 xg_init_vinsn (&vinsn
);
12618 xg_clear_vinsn (&vinsn
);
12620 bundle_tinsn (tinsn
, &vinsn
);
12622 xtensa_format_encode (isa
, vinsn
.format
, insnbuf
);
12624 for (i
= 0; i
< vinsn
.num_slots
; i
++)
12626 /* Only one slot may have a fix-up because the rest contains NOPs. */
12628 tinsn_to_slotbuf (vinsn
.format
, i
, &vinsn
.slots
[i
], vinsn
.slotbuf
[i
]);
12629 xtensa_format_set_slot (isa
, vinsn
.format
, i
, insnbuf
, vinsn
.slotbuf
[i
]);
12636 /* Check the instruction arguments. Return TRUE on failure. */
12639 tinsn_check_arguments (const TInsn
*insn
)
12641 xtensa_isa isa
= xtensa_default_isa
;
12642 xtensa_opcode opcode
= insn
->opcode
;
12643 xtensa_regfile t1_regfile
, t2_regfile
;
12644 int t1_reg
, t2_reg
;
12645 int t1_base_reg
, t1_last_reg
;
12646 int t2_base_reg
, t2_last_reg
;
12647 char t1_inout
, t2_inout
;
12650 if (opcode
== XTENSA_UNDEFINED
)
12652 as_bad (_("invalid opcode"));
12656 if (xtensa_opcode_num_operands (isa
, opcode
) > insn
->ntok
)
12658 as_bad (_("too few operands"));
12662 if (xtensa_opcode_num_operands (isa
, opcode
) < insn
->ntok
)
12664 as_bad (_("too many operands"));
12668 /* Check registers. */
12669 for (j
= 0; j
< insn
->ntok
; j
++)
12671 if (xtensa_operand_is_register (isa
, insn
->opcode
, j
) != 1)
12674 t2_regfile
= xtensa_operand_regfile (isa
, insn
->opcode
, j
);
12675 t2_base_reg
= insn
->tok
[j
].X_add_number
;
12677 = t2_base_reg
+ xtensa_operand_num_regs (isa
, insn
->opcode
, j
);
12679 for (i
= 0; i
< insn
->ntok
; i
++)
12684 if (xtensa_operand_is_register (isa
, insn
->opcode
, i
) != 1)
12687 t1_regfile
= xtensa_operand_regfile (isa
, insn
->opcode
, i
);
12689 if (t1_regfile
!= t2_regfile
)
12692 t1_inout
= xtensa_operand_inout (isa
, insn
->opcode
, i
);
12693 t2_inout
= xtensa_operand_inout (isa
, insn
->opcode
, j
);
12695 t1_base_reg
= insn
->tok
[i
].X_add_number
;
12696 t1_last_reg
= (t1_base_reg
12697 + xtensa_operand_num_regs (isa
, insn
->opcode
, i
));
12699 for (t1_reg
= t1_base_reg
; t1_reg
< t1_last_reg
; t1_reg
++)
12701 for (t2_reg
= t2_base_reg
; t2_reg
< t2_last_reg
; t2_reg
++)
12703 if (t1_reg
!= t2_reg
)
12706 if (t1_inout
!= 'i' && t2_inout
!= 'i')
12708 as_bad (_("multiple writes to the same register"));
12719 /* Load an instruction from its encoded form. */
12722 tinsn_from_chars (TInsn
*tinsn
, char *f
, int slot
)
12726 xg_init_vinsn (&vinsn
);
12727 vinsn_from_chars (&vinsn
, f
);
12729 *tinsn
= vinsn
.slots
[slot
];
12730 xg_free_vinsn (&vinsn
);
12735 tinsn_from_insnbuf (TInsn
*tinsn
,
12736 xtensa_insnbuf slotbuf
,
12741 xtensa_isa isa
= xtensa_default_isa
;
12743 /* Find the immed. */
12744 tinsn_init (tinsn
);
12745 tinsn
->insn_type
= ITYPE_INSN
;
12746 tinsn
->is_specific_opcode
= FALSE
; /* must not be specific */
12747 tinsn
->opcode
= xtensa_opcode_decode (isa
, fmt
, slot
, slotbuf
);
12748 tinsn
->ntok
= xtensa_opcode_num_operands (isa
, tinsn
->opcode
);
12749 for (i
= 0; i
< tinsn
->ntok
; i
++)
12751 set_expr_const (&tinsn
->tok
[i
],
12752 xtensa_insnbuf_get_operand (slotbuf
, fmt
, slot
,
12753 tinsn
->opcode
, i
));
12758 /* Read the value of the relaxable immed from the fr_symbol and fr_offset. */
12761 tinsn_immed_from_frag (TInsn
*tinsn
, fragS
*fragP
, int slot
)
12763 xtensa_opcode opcode
= tinsn
->opcode
;
12766 if (fragP
->tc_frag_data
.slot_symbols
[slot
])
12768 opnum
= get_relaxable_immed (opcode
);
12769 gas_assert (opnum
>= 0);
12770 set_expr_symbol_offset (&tinsn
->tok
[opnum
],
12771 fragP
->tc_frag_data
.slot_symbols
[slot
],
12772 fragP
->tc_frag_data
.slot_offsets
[slot
]);
12774 tinsn
->extra_arg
= fragP
->tc_frag_data
.free_reg
[slot
];
12779 get_num_stack_text_bytes (IStack
*istack
)
12782 int text_bytes
= 0;
12784 for (i
= 0; i
< istack
->ninsn
; i
++)
12786 TInsn
*tinsn
= &istack
->insn
[i
];
12787 if (tinsn
->insn_type
== ITYPE_INSN
)
12788 text_bytes
+= xg_get_single_size (tinsn
->opcode
);
12795 get_num_stack_literal_bytes (IStack
*istack
)
12800 for (i
= 0; i
< istack
->ninsn
; i
++)
12802 TInsn
*tinsn
= &istack
->insn
[i
];
12803 if (tinsn
->insn_type
== ITYPE_LITERAL
&& tinsn
->ntok
== 1)
12810 /* vliw_insn functions. */
12813 xg_init_vinsn (vliw_insn
*v
)
12816 xtensa_isa isa
= xtensa_default_isa
;
12818 xg_clear_vinsn (v
);
12820 v
->insnbuf
= xtensa_insnbuf_alloc (isa
);
12821 if (v
->insnbuf
== NULL
)
12822 as_fatal (_("out of memory"));
12824 for (i
= 0; i
< config_max_slots
; i
++)
12826 v
->slotbuf
[i
] = xtensa_insnbuf_alloc (isa
);
12827 if (v
->slotbuf
[i
] == NULL
)
12828 as_fatal (_("out of memory"));
12834 xg_clear_vinsn (vliw_insn
*v
)
12838 memset (v
, 0, offsetof (vliw_insn
, slots
)
12839 + sizeof(TInsn
) * config_max_slots
);
12841 v
->format
= XTENSA_UNDEFINED
;
12843 v
->inside_bundle
= FALSE
;
12845 if (xt_saved_debug_type
!= DEBUG_NONE
)
12846 debug_type
= xt_saved_debug_type
;
12848 for (i
= 0; i
< config_max_slots
; i
++)
12849 v
->slots
[i
].opcode
= XTENSA_UNDEFINED
;
12854 xg_copy_vinsn (vliw_insn
*dst
, vliw_insn
*src
)
12857 offsetof(vliw_insn
, slots
) + src
->num_slots
* sizeof(TInsn
));
12858 dst
->insnbuf
= src
->insnbuf
;
12859 memcpy (dst
->slotbuf
, src
->slotbuf
, src
->num_slots
* sizeof(xtensa_insnbuf
));
12864 vinsn_has_specific_opcodes (vliw_insn
*v
)
12868 for (i
= 0; i
< v
->num_slots
; i
++)
12870 if (v
->slots
[i
].is_specific_opcode
)
12878 xg_free_vinsn (vliw_insn
*v
)
12881 xtensa_insnbuf_free (xtensa_default_isa
, v
->insnbuf
);
12882 for (i
= 0; i
< config_max_slots
; i
++)
12883 xtensa_insnbuf_free (xtensa_default_isa
, v
->slotbuf
[i
]);
12887 /* Encode a vliw_insn into an insnbuf. Return TRUE if there are any symbolic
12888 operands. See also the assumptions listed for tinsn_to_slotbuf. */
12891 vinsn_to_insnbuf (vliw_insn
*vinsn
,
12894 bfd_boolean record_fixup
)
12896 xtensa_isa isa
= xtensa_default_isa
;
12897 xtensa_format fmt
= vinsn
->format
;
12898 xtensa_insnbuf insnbuf
= vinsn
->insnbuf
;
12900 bfd_boolean has_fixup
= FALSE
;
12902 xtensa_format_encode (isa
, fmt
, insnbuf
);
12904 for (slot
= 0; slot
< vinsn
->num_slots
; slot
++)
12906 TInsn
*tinsn
= &vinsn
->slots
[slot
];
12907 expressionS
*extra_arg
= &tinsn
->extra_arg
;
12908 bfd_boolean tinsn_has_fixup
=
12909 tinsn_to_slotbuf (vinsn
->format
, slot
, tinsn
,
12910 vinsn
->slotbuf
[slot
]);
12912 xtensa_format_set_slot (isa
, fmt
, slot
,
12913 insnbuf
, vinsn
->slotbuf
[slot
]);
12914 if (extra_arg
->X_op
!= O_illegal
&& extra_arg
->X_op
!= O_register
)
12916 if (vinsn
->num_slots
!= 1)
12917 as_bad (_("TLS relocation not allowed in FLIX bundle"));
12918 else if (record_fixup
)
12919 /* Instructions that generate TLS relocations should always be
12920 relaxed in the front-end. If "record_fixup" is set, then this
12921 function is being called during back-end relaxation, so flag
12922 the unexpected behavior as an error. */
12923 as_bad (_("unexpected TLS relocation"));
12925 fix_new (fragP
, frag_offset
- fragP
->fr_literal
,
12926 xtensa_format_length (isa
, fmt
),
12927 extra_arg
->X_add_symbol
, extra_arg
->X_add_number
,
12928 FALSE
, map_operator_to_reloc (extra_arg
->X_op
, FALSE
));
12930 if (tinsn_has_fixup
)
12933 xtensa_opcode opcode
= tinsn
->opcode
;
12934 int noperands
= xtensa_opcode_num_operands (isa
, opcode
);
12937 for (i
= 0; i
< noperands
; i
++)
12939 expressionS
* exp
= &tinsn
->tok
[i
];
12945 if (get_relaxable_immed (opcode
) == i
)
12947 /* Add a fix record for the instruction, except if this
12948 function is being called prior to relaxation, i.e.,
12949 if record_fixup is false, and the instruction might
12950 be relaxed later. */
12952 || tinsn
->is_specific_opcode
12953 || !xg_is_relaxable_insn (tinsn
, 0))
12955 xg_add_opcode_fix (tinsn
, i
, fmt
, slot
, exp
, fragP
,
12956 frag_offset
- fragP
->fr_literal
);
12960 if (exp
->X_op
!= O_symbol
)
12961 as_bad (_("invalid operand"));
12962 tinsn
->symbol
= exp
->X_add_symbol
;
12963 tinsn
->offset
= exp
->X_add_number
;
12967 as_bad (_("symbolic operand not allowed"));
12975 as_bad (_("expression too complex"));
12987 vinsn_from_chars (vliw_insn
*vinsn
, char *f
)
12989 static xtensa_insnbuf insnbuf
= NULL
;
12990 static xtensa_insnbuf slotbuf
= NULL
;
12993 xtensa_isa isa
= xtensa_default_isa
;
12997 insnbuf
= xtensa_insnbuf_alloc (isa
);
12998 slotbuf
= xtensa_insnbuf_alloc (isa
);
13001 xtensa_insnbuf_from_chars (isa
, insnbuf
, (unsigned char *) f
, 0);
13002 fmt
= xtensa_format_decode (isa
, insnbuf
);
13003 if (fmt
== XTENSA_UNDEFINED
)
13004 as_fatal (_("cannot decode instruction format"));
13005 vinsn
->format
= fmt
;
13006 vinsn
->num_slots
= xtensa_format_num_slots (isa
, fmt
);
13008 for (i
= 0; i
< vinsn
->num_slots
; i
++)
13010 TInsn
*tinsn
= &vinsn
->slots
[i
];
13011 xtensa_format_get_slot (isa
, fmt
, i
, insnbuf
, slotbuf
);
13012 tinsn_from_insnbuf (tinsn
, slotbuf
, fmt
, i
);
13017 /* Expression utilities. */
13019 /* Return TRUE if the expression is an integer constant. */
13022 expr_is_const (const expressionS
*s
)
13024 return (s
->X_op
== O_constant
);
13028 /* Get the expression constant.
13029 Calling this is illegal if expr_is_const () returns TRUE. */
13032 get_expr_const (const expressionS
*s
)
13034 gas_assert (expr_is_const (s
));
13035 return s
->X_add_number
;
13039 /* Set the expression to a constant value. */
13042 set_expr_const (expressionS
*s
, offsetT val
)
13044 s
->X_op
= O_constant
;
13045 s
->X_add_number
= val
;
13046 s
->X_add_symbol
= NULL
;
13047 s
->X_op_symbol
= NULL
;
13052 expr_is_register (const expressionS
*s
)
13054 return (s
->X_op
== O_register
);
13058 /* Get the expression constant.
13059 Calling this is illegal if expr_is_const () returns TRUE. */
13062 get_expr_register (const expressionS
*s
)
13064 gas_assert (expr_is_register (s
));
13065 return s
->X_add_number
;
13069 /* Set the expression to a symbol + constant offset. */
13072 set_expr_symbol_offset (expressionS
*s
, symbolS
*sym
, offsetT offset
)
13074 s
->X_op
= O_symbol
;
13075 s
->X_add_symbol
= sym
;
13076 s
->X_op_symbol
= NULL
; /* unused */
13077 s
->X_add_number
= offset
;
13081 /* Return TRUE if the two expressions are equal. */
13084 expr_is_equal (expressionS
*s1
, expressionS
*s2
)
13086 if (s1
->X_op
!= s2
->X_op
)
13088 if (s1
->X_add_symbol
!= s2
->X_add_symbol
)
13090 if (s1
->X_op_symbol
!= s2
->X_op_symbol
)
13092 if (s1
->X_add_number
!= s2
->X_add_number
)
13099 copy_expr (expressionS
*dst
, const expressionS
*src
)
13101 memcpy (dst
, src
, sizeof (expressionS
));
13105 /* Support for the "--rename-section" option. */
13107 struct rename_section_struct
13109 const char *old_name
;
13111 struct rename_section_struct
*next
;
13114 static struct rename_section_struct
*section_rename
;
13117 /* Parse the string "oldname=new_name(:oldname2=new_name2)*" and add
13118 entries to the section_rename list. Note: Specifying multiple
13119 renamings separated by colons is not documented and is retained only
13120 for backward compatibility. */
13123 build_section_rename (const char *arg
)
13125 struct rename_section_struct
*r
;
13126 char *this_arg
= NULL
;
13127 char *next_arg
= NULL
;
13129 for (this_arg
= xstrdup (arg
); this_arg
!= NULL
; this_arg
= next_arg
)
13131 char *old_name
, *new_name
;
13135 next_arg
= strchr (this_arg
, ':');
13143 old_name
= this_arg
;
13144 new_name
= strchr (this_arg
, '=');
13146 if (*old_name
== '\0')
13148 as_warn (_("ignoring extra '-rename-section' delimiter ':'"));
13151 if (!new_name
|| new_name
[1] == '\0')
13153 as_warn (_("ignoring invalid '-rename-section' specification: '%s'"),
13160 /* Check for invalid section renaming. */
13161 for (r
= section_rename
; r
!= NULL
; r
= r
->next
)
13163 if (strcmp (r
->old_name
, old_name
) == 0)
13164 as_bad (_("section %s renamed multiple times"), old_name
);
13165 if (strcmp (r
->new_name
, new_name
) == 0)
13166 as_bad (_("multiple sections remapped to output section %s"),
13171 r
= XNEW (struct rename_section_struct
);
13172 r
->old_name
= xstrdup (old_name
);
13173 r
->new_name
= xstrdup (new_name
);
13174 r
->next
= section_rename
;
13175 section_rename
= r
;
13181 xtensa_section_rename (const char *name
)
13183 struct rename_section_struct
*r
= section_rename
;
13185 for (r
= section_rename
; r
!= NULL
; r
= r
->next
)
13187 if (strcmp (r
->old_name
, name
) == 0)
13188 return r
->new_name
;
13191 return (char *) name
;