1 /* tc-xtensa.c -- Assemble Xtensa instructions.
2 Copyright 2003 Free Software Foundation, Inc.
4 This file is part of GAS, the GNU Assembler.
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330, Boston,
19 MA 02111-1307, USA. */
24 #include "safe-ctype.h"
25 #include "tc-xtensa.h"
28 #include "xtensa-relax.h"
29 #include "xtensa-istack.h"
30 #include "struc-symbol.h"
31 #include "xtensa-config.h"
34 #define uint32 unsigned int
37 #define int32 signed int
42 There are 3 forms for instructions,
43 1) the MEMORY format -- this is the encoding 2 or 3 byte instruction
44 2) the TInsn -- handles instructions/labels and literals;
45 all operands are assumed to be expressions
46 3) the IStack -- a stack of TInsn. this allows us to
47 reason about the generated expansion instructions
49 Naming conventions (used somewhat inconsistently):
50 The xtensa_ functions are exported
51 The xg_ functions are internal
53 We also have a couple of different extensibility mechanisms.
54 1) The idiom replacement:
55 This is used when a line is first parsed to
56 replace an instruction pattern with another instruction
57 It is currently limited to replacements of instructions
58 with constant operands.
59 2) The xtensa-relax.c mechanism that has stronger instruction
60 replacement patterns. When an instruction's immediate field
61 does not fit the next instruction sequence is attempted.
62 In addition, "narrow" opcodes are supported this way. */
65 /* Define characters with special meanings to GAS. */
66 const char comment_chars
[] = "#";
67 const char line_comment_chars
[] = "#";
68 const char line_separator_chars
[] = ";";
69 const char EXP_CHARS
[] = "eE";
70 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
73 /* Flag to indicate whether the hardware supports the density option.
74 If not, enabling density instructions (via directives or --density flag)
78 bfd_boolean density_supported
= XCHAL_HAVE_DENSITY
;
80 bfd_boolean density_supported
= TRUE
;
83 #define XTENSA_FETCH_WIDTH 4
85 /* Flags for properties of the last instruction in a segment. */
86 #define FLAG_IS_A0_WRITER 0x1
87 #define FLAG_IS_BAD_LOOPEND 0x2
90 /* We define a special segment names ".literal" to place literals
91 into. The .fini and .init sections are special because they
92 contain code that is moved together by the linker. We give them
93 their own special .fini.literal and .init.literal sections. */
95 #define LITERAL_SECTION_NAME xtensa_section_rename (".literal")
96 #define FINI_SECTION_NAME xtensa_section_rename (".fini")
97 #define INIT_SECTION_NAME xtensa_section_rename (".init")
98 #define FINI_LITERAL_SECTION_NAME xtensa_section_rename (".fini.literal")
99 #define INIT_LITERAL_SECTION_NAME xtensa_section_rename (".init.literal")
102 /* This type is used for the directive_stack to keep track of the
103 state of the literal collection pools. */
105 typedef struct lit_state_struct
107 const char *lit_seg_name
;
108 const char *init_lit_seg_name
;
109 const char *fini_lit_seg_name
;
115 static lit_state default_lit_sections
;
118 /* We keep lists of literal segments. The seg_list type is the node
119 for such a list. The *_literal_head locals are the heads of the
120 various lists. All of these lists have a dummy node at the start. */
122 typedef struct seg_list_struct
124 struct seg_list_struct
*next
;
128 static seg_list literal_head_h
;
129 static seg_list
*literal_head
= &literal_head_h
;
130 static seg_list init_literal_head_h
;
131 static seg_list
*init_literal_head
= &init_literal_head_h
;
132 static seg_list fini_literal_head_h
;
133 static seg_list
*fini_literal_head
= &fini_literal_head_h
;
136 /* Global flag to indicate when we are emitting literals. */
137 int generating_literals
= 0;
140 /* Structure for saving the current state before emitting literals. */
141 typedef struct emit_state_struct
146 int generating_literals
;
161 directive_literal_prefix
167 bfd_boolean can_be_negated
;
170 const directive_infoS directive_info
[] =
179 {"literal_prefix", FALSE
}
182 bfd_boolean directive_state
[] =
186 #if STATIC_LIBISA && !XCHAL_HAVE_DENSITY
193 FALSE
, /* freeregs */
194 FALSE
, /* longcalls */
195 FALSE
/* literal_prefix */
199 enum xtensa_relax_statesE
201 RELAX_ALIGN_NEXT_OPCODE
,
202 /* Use the first opcode of the next fragment to determine the
203 alignment requirements. This is ONLY used for LOOPS
206 RELAX_DESIRE_ALIGN_IF_TARGET
,
207 /* These are placed in front of labels. They will all be converted
208 to RELAX_DESIRE_ALIGN / RELAX_LOOP_END or rs_fill of 0 before
209 relaxation begins. */
211 RELAX_ADD_NOP_IF_A0_B_RETW
,
212 /* These are placed in front of conditional branches. It will be
213 turned into a NOP (using a1) if the branch is immediately
214 followed by a RETW or RETW.N. Otherwise it will be turned into
215 an rs_fill of 0 before relaxation begins. */
217 RELAX_ADD_NOP_IF_PRE_LOOP_END
,
218 /* These are placed after JX instructions. It will be turned into a
219 NOP if there is one instruction before a loop end label.
220 Otherwise it will be turned into an rs_fill of 0 before
221 relaxation begins. This is used to avoid a hardware TIE
222 interlock issue prior to T1040. */
224 RELAX_ADD_NOP_IF_SHORT_LOOP
,
225 /* These are placed after LOOP instructions. It will be turned into
226 a NOP when: (1) there are less than 3 instructions in the loop;
227 we place 2 of these in a row to add up to 2 NOPS in short loops;
228 or (2) The instructions in the loop do not include a branch or
229 jump. Otherwise it will be turned into an rs_fill of 0 before
230 relaxation begins. This is used to avoid hardware bug
233 RELAX_ADD_NOP_IF_CLOSE_LOOP_END
,
234 /* These are placed after LOOP instructions. It will be turned into
235 a NOP if there are less than 12 bytes to the end of some other
236 loop's end. Otherwise it will be turned into an rs_fill of 0
237 before relaxation begins. This is used to avoid hardware bug
241 /* The next fragment like its first instruction to NOT cross a
245 /* This will be turned into a NOP or NOP.N if the previous
246 instruction is expanded to negate a loop. */
248 RELAX_LOOP_END_ADD_NOP
,
249 /* When the code density option is available, this will generate a
250 NOP.N marked RELAX_NARROW. Otherwise, it will create an rs_fill
251 fragment with a NOP in it. */
254 /* Another fragment could generate an expansion here but has not yet. */
257 /* Expansion has been generated by an instruction that generates a
258 literal. However, the stretch has NOT been reported yet in this
262 /* Expansion has been generated by an instruction that generates a
265 RELAX_LITERAL_POOL_BEGIN
,
266 RELAX_LITERAL_POOL_END
,
267 /* Technically these are not relaxations at all, but mark a location
268 to store literals later. Note that fr_var stores the frchain for
269 BEGIN frags and fr_var stores now_seg for END frags. */
272 /* The last instruction in this fragment (at->fr_opcode) can be
273 freely replaced with a single wider instruction if a future
274 alignment desires or needs it. */
277 /* The last instruction in this fragment (at->fr_opcode) contains
278 the value defined by fr_symbol (fr_offset = 0). If the value
279 does not fit, use the specified expansion. This is similar to
280 "NARROW", except that these may not be expanded in order to align
284 /* The last instruction in this fragment (at->fr_opcode) contains a
285 literal. It has already been expanded at least 1 step. */
288 /* The last instruction in this fragment (at->fr_opcode) contains a
289 literal. It has already been expanded at least 2 steps. */
292 /* This is used as a stopper to bound the number of steps that
294 #define RELAX_IMMED_MAXSTEPS (RELAX_IMMED_STEP2 - RELAX_IMMED)
297 typedef bfd_boolean (*frag_predicate
) (const fragS
*);
300 /* Directive functions. */
302 static bfd_boolean use_generics
304 static bfd_boolean use_longcalls
306 static bfd_boolean code_density_available
308 static bfd_boolean can_relax
310 static void directive_push
311 PARAMS ((directiveE
, bfd_boolean
, const void *));
312 static void directive_pop
313 PARAMS ((directiveE
*, bfd_boolean
*, const char **,
314 unsigned int *, const void **));
315 static void directive_balance
317 static bfd_boolean inside_directive
318 PARAMS ((directiveE
));
319 static void get_directive
320 PARAMS ((directiveE
*, bfd_boolean
*));
321 static void xtensa_begin_directive
323 static void xtensa_end_directive
325 static void xtensa_literal_prefix
326 PARAMS ((char const *, int));
327 static void xtensa_literal_position
329 static void xtensa_literal_pseudo
332 /* Parsing and Idiom Translation Functions. */
334 static const char *expression_end
335 PARAMS ((const char *));
336 static unsigned tc_get_register
337 PARAMS ((const char *));
338 static void expression_maybe_register
339 PARAMS ((xtensa_operand
, expressionS
*));
340 static int tokenize_arguments
341 PARAMS ((char **, char *));
342 static bfd_boolean parse_arguments
343 PARAMS ((TInsn
*, int, char **));
344 static int xg_translate_idioms
345 PARAMS ((char **, int *, char **));
346 static int xg_translate_sysreg_op
347 PARAMS ((char **, int *, char **));
348 static void xg_reverse_shift_count
350 static int xg_arg_is_constant
351 PARAMS ((char *, offsetT
*));
352 static void xg_replace_opname
353 PARAMS ((char **, char *));
354 static int xg_check_num_args
355 PARAMS ((int *, int, char *, char **));
357 /* Functions for dealing with the Xtensa ISA. */
359 static bfd_boolean operand_is_immed
360 PARAMS ((xtensa_operand
));
361 static bfd_boolean operand_is_pcrel_label
362 PARAMS ((xtensa_operand
));
363 static int get_relaxable_immed
364 PARAMS ((xtensa_opcode
));
365 static xtensa_opcode get_opcode_from_buf
366 PARAMS ((const char *));
367 static bfd_boolean is_direct_call_opcode
368 PARAMS ((xtensa_opcode
));
369 static bfd_boolean is_call_opcode
370 PARAMS ((xtensa_opcode
));
371 static bfd_boolean is_entry_opcode
372 PARAMS ((xtensa_opcode
));
373 static bfd_boolean is_loop_opcode
374 PARAMS ((xtensa_opcode
));
375 static bfd_boolean is_the_loop_opcode
376 PARAMS ((xtensa_opcode
));
377 static bfd_boolean is_jx_opcode
378 PARAMS ((xtensa_opcode
));
379 static bfd_boolean is_windowed_return_opcode
380 PARAMS ((xtensa_opcode
));
381 static bfd_boolean is_conditional_branch_opcode
382 PARAMS ((xtensa_opcode
));
383 static bfd_boolean is_branch_or_jump_opcode
384 PARAMS ((xtensa_opcode
));
385 static bfd_reloc_code_real_type opnum_to_reloc
387 static int reloc_to_opnum
388 PARAMS ((bfd_reloc_code_real_type
));
389 static void xtensa_insnbuf_set_operand
390 PARAMS ((xtensa_insnbuf
, xtensa_opcode
, xtensa_operand
, int32
,
391 const char *, unsigned int));
392 static uint32 xtensa_insnbuf_get_operand
393 PARAMS ((xtensa_insnbuf
, xtensa_opcode
, int));
394 static void xtensa_insnbuf_set_immediate_field
395 PARAMS ((xtensa_opcode
, xtensa_insnbuf
, int32
, const char *,
397 static bfd_boolean is_negatable_branch
400 /* Functions for Internal Lists of Symbols. */
401 static void xtensa_define_label
402 PARAMS ((symbolS
*));
403 static void add_target_symbol
404 PARAMS ((symbolS
*, bfd_boolean
));
405 static symbolS
*xtensa_find_label
406 PARAMS ((fragS
*, offsetT
, bfd_boolean
));
407 static void map_over_defined_symbols
408 PARAMS ((void (*fn
) (symbolS
*)));
409 static bfd_boolean is_loop_target_label
410 PARAMS ((symbolS
*));
411 static void xtensa_mark_target_fragments
414 /* Various Other Internal Functions. */
416 static bfd_boolean is_unique_insn_expansion
417 PARAMS ((TransitionRule
*));
418 static int xg_get_insn_size
420 static int xg_get_build_instr_size
421 PARAMS ((BuildInstr
*));
422 static bfd_boolean xg_is_narrow_insn
424 static bfd_boolean xg_is_single_relaxable_insn
426 static int xg_get_max_narrow_insn_size
427 PARAMS ((xtensa_opcode
));
428 static int xg_get_max_insn_widen_size
429 PARAMS ((xtensa_opcode
));
430 static int xg_get_max_insn_widen_literal_size
431 PARAMS ((xtensa_opcode
));
432 static bfd_boolean xg_is_relaxable_insn
433 PARAMS ((TInsn
*, int));
434 static symbolS
*get_special_literal_symbol
436 static symbolS
*get_special_label_symbol
438 static bfd_boolean xg_build_to_insn
439 PARAMS ((TInsn
*, TInsn
*, BuildInstr
*));
440 static bfd_boolean xg_build_to_stack
441 PARAMS ((IStack
*, TInsn
*, BuildInstr
*));
442 static bfd_boolean xg_expand_to_stack
443 PARAMS ((IStack
*, TInsn
*, int));
444 static bfd_boolean xg_expand_narrow
445 PARAMS ((TInsn
*, TInsn
*));
446 static bfd_boolean xg_immeds_fit
447 PARAMS ((const TInsn
*));
448 static bfd_boolean xg_symbolic_immeds_fit
449 PARAMS ((const TInsn
*, segT
, fragS
*, offsetT
, long));
450 static bfd_boolean xg_check_operand
451 PARAMS ((int32
, xtensa_operand
));
452 static int is_dnrange
453 PARAMS ((fragS
*, symbolS
*, long));
454 static int xg_assembly_relax
455 PARAMS ((IStack
*, TInsn
*, segT
, fragS
*, offsetT
, int, long));
456 static void xg_force_frag_space
458 static void xg_finish_frag
459 PARAMS ((char *, enum xtensa_relax_statesE
, int, bfd_boolean
));
460 static bfd_boolean is_branch_jmp_to_next
461 PARAMS ((TInsn
*, fragS
*));
462 static void xg_add_branch_and_loop_targets
464 static bfd_boolean xg_instruction_matches_rule
465 PARAMS ((TInsn
*, TransitionRule
*));
466 static TransitionRule
*xg_instruction_match
468 static bfd_boolean xg_build_token_insn
469 PARAMS ((BuildInstr
*, TInsn
*, TInsn
*));
470 static bfd_boolean xg_simplify_insn
471 PARAMS ((TInsn
*, TInsn
*));
472 static bfd_boolean xg_expand_assembly_insn
473 PARAMS ((IStack
*, TInsn
*));
474 static symbolS
*xg_assemble_literal
476 static void xg_assemble_literal_space
478 static symbolS
*xtensa_create_literal_symbol
479 PARAMS ((segT
, fragS
*));
480 static bfd_boolean get_is_linkonce_section
481 PARAMS ((bfd
*, segT
));
482 static bfd_boolean xg_emit_insn
483 PARAMS ((TInsn
*, bfd_boolean
));
484 static bfd_boolean xg_emit_insn_to_buf
485 PARAMS ((TInsn
*, char *, fragS
*, offsetT
, bfd_boolean
));
486 static bfd_boolean xg_add_opcode_fix
487 PARAMS ((xtensa_opcode
, int, expressionS
*, fragS
*, offsetT
));
488 static void xg_resolve_literals
489 PARAMS ((TInsn
*, symbolS
*));
490 static void xg_resolve_labels
491 PARAMS ((TInsn
*, symbolS
*));
492 static void xg_assemble_tokens
494 static bfd_boolean is_register_writer
495 PARAMS ((const TInsn
*, const char *, int));
496 static bfd_boolean is_bad_loopend_opcode
497 PARAMS ((const TInsn
*));
498 static bfd_boolean is_unaligned_label
499 PARAMS ((symbolS
*));
500 static fragS
*next_non_empty_frag
501 PARAMS ((const fragS
*));
502 static xtensa_opcode next_frag_opcode
503 PARAMS ((const fragS
*));
504 static void update_next_frag_nop_state
506 static bfd_boolean next_frag_is_branch_target
507 PARAMS ((const fragS
*));
508 static bfd_boolean next_frag_is_loop_target
509 PARAMS ((const fragS
*));
510 static addressT next_frag_pre_opcode_bytes
511 PARAMS ((const fragS
*));
512 static bfd_boolean is_next_frag_target
513 PARAMS ((const fragS
*, const fragS
*));
514 static void xtensa_mark_literal_pool_location
516 static void xtensa_move_labels
517 PARAMS ((fragS
*, valueT
, fragS
*, valueT
));
518 static void assemble_nop
519 PARAMS ((size_t, char *));
520 static addressT get_expanded_loop_offset
521 PARAMS ((xtensa_opcode
));
522 static fragS
*get_literal_pool_location
524 static void set_literal_pool_location
525 PARAMS ((segT
, fragS
*));
527 /* Helpers for xtensa_end(). */
529 static void xtensa_cleanup_align_frags
531 static void xtensa_fix_target_frags
533 static bfd_boolean frag_can_negate_branch
535 static void xtensa_fix_a0_b_retw_frags
537 static bfd_boolean next_instrs_are_b_retw
539 static void xtensa_fix_b_j_loop_end_frags
541 static bfd_boolean next_instr_is_loop_end
543 static void xtensa_fix_close_loop_end_frags
545 static size_t min_bytes_to_other_loop_end
546 PARAMS ((fragS
*, fragS
*, offsetT
, size_t));
547 static size_t unrelaxed_frag_min_size
549 static void xtensa_fix_short_loop_frags
551 static size_t count_insns_to_loop_end
552 PARAMS ((fragS
*, bfd_boolean
, size_t));
553 static size_t unrelaxed_frag_min_insn_count
555 static bfd_boolean branch_before_loop_end
557 static bfd_boolean unrelaxed_frag_has_b_j
559 static void xtensa_sanity_check
561 static bfd_boolean is_empty_loop
562 PARAMS ((const TInsn
*, fragS
*));
563 static bfd_boolean is_local_forward_loop
564 PARAMS ((const TInsn
*, fragS
*));
566 /* Alignment Functions. */
568 static size_t get_text_align_power
570 static addressT get_text_align_max_fill_size
571 PARAMS ((int, bfd_boolean
, bfd_boolean
));
572 static addressT get_text_align_fill_size
573 PARAMS ((addressT
, int, int, bfd_boolean
, bfd_boolean
));
574 static size_t get_text_align_nop_count
575 PARAMS ((size_t, bfd_boolean
));
576 static size_t get_text_align_nth_nop_size
577 PARAMS ((size_t, size_t, bfd_boolean
));
578 static addressT get_noop_aligned_address
579 PARAMS ((fragS
*, addressT
));
580 static addressT get_widen_aligned_address
581 PARAMS ((fragS
*, addressT
));
583 /* Helpers for xtensa_relax_frag(). */
585 static long relax_frag_text_align
586 PARAMS ((fragS
*, long));
587 static long relax_frag_add_nop
589 static long relax_frag_narrow
590 PARAMS ((fragS
*, long));
591 static bfd_boolean future_alignment_required
592 PARAMS ((fragS
*, long));
593 static long relax_frag_immed
594 PARAMS ((segT
, fragS
*, long, int, int *));
596 /* Helpers for md_convert_frag(). */
598 static void convert_frag_align_next_opcode
600 static void convert_frag_narrow
602 static void convert_frag_immed
603 PARAMS ((segT
, fragS
*, int));
604 static fixS
*fix_new_exp_in_seg
605 PARAMS ((segT
, subsegT
, fragS
*, int, int, expressionS
*, int,
606 bfd_reloc_code_real_type
));
607 static void convert_frag_immed_finish_loop
608 PARAMS ((segT
, fragS
*, TInsn
*));
609 static offsetT get_expression_value
610 PARAMS ((segT
, expressionS
*));
612 /* Flags for the Last Instruction in Each Subsegment. */
614 static unsigned get_last_insn_flags
615 PARAMS ((segT
, subsegT
));
616 static void set_last_insn_flags
617 PARAMS ((segT
, subsegT
, unsigned, bfd_boolean
));
619 /* Segment list functions. */
621 static void xtensa_remove_section
623 static void xtensa_insert_section
624 PARAMS ((segT
, segT
));
625 static void xtensa_move_seg_list_to_beginning
626 PARAMS ((seg_list
*));
627 static void xtensa_move_literals
629 static void xtensa_move_frag_symbol
630 PARAMS ((symbolS
*));
631 static void xtensa_move_frag_symbols
633 static void xtensa_reorder_seg_list
634 PARAMS ((seg_list
*, segT
));
635 static void xtensa_reorder_segments
637 static segT get_last_sec
639 static void xtensa_switch_to_literal_fragment
640 PARAMS ((emit_state
*));
641 static void xtensa_switch_section_emit_state
642 PARAMS ((emit_state
*, segT
, subsegT
));
643 static void xtensa_restore_emit_state
644 PARAMS ((emit_state
*));
645 static void cache_literal_section
646 PARAMS ((seg_list
*, const char *, segT
*));
647 static segT retrieve_literal_seg
648 PARAMS ((seg_list
*, const char *));
649 static segT seg_present
650 PARAMS ((const char *));
651 static void add_seg_list
652 PARAMS ((seg_list
*, segT
));
654 /* Property Table (e.g., ".xt.insn" and ".xt.lit") Functions. */
656 static void xtensa_create_property_segments
657 PARAMS ((frag_predicate
, const char *, xt_section_type
));
658 static segment_info_type
*retrieve_segment_info
660 static segT retrieve_xtensa_section
662 static bfd_boolean section_has_property
663 PARAMS ((segT sec
, frag_predicate
));
664 static void add_xt_block_frags
665 PARAMS ((segT
, segT
, xtensa_block_info
**, frag_predicate
));
666 static bfd_boolean get_frag_is_literal
667 PARAMS ((const fragS
*));
668 static bfd_boolean get_frag_is_insn
669 PARAMS ((const fragS
*));
671 /* Import from elf32-xtensa.c in BFD library. */
672 extern char *xtensa_get_property_section_name
673 PARAMS ((bfd
*, asection
*, const char *));
675 /* TInsn and IStack functions. */
676 static bfd_boolean tinsn_has_symbolic_operands
677 PARAMS ((const TInsn
*));
678 static bfd_boolean tinsn_has_invalid_symbolic_operands
679 PARAMS ((const TInsn
*));
680 static bfd_boolean tinsn_has_complex_operands
681 PARAMS ((const TInsn
*));
682 static bfd_boolean tinsn_to_insnbuf
683 PARAMS ((TInsn
*, xtensa_insnbuf
));
684 static bfd_boolean tinsn_check_arguments
685 PARAMS ((const TInsn
*));
686 static void tinsn_from_chars
687 PARAMS ((TInsn
*, char *));
688 static void tinsn_immed_from_frag
689 PARAMS ((TInsn
*, fragS
*));
690 static int get_num_stack_text_bytes
692 static int get_num_stack_literal_bytes
695 /* Expression Utilities. */
696 bfd_boolean expr_is_const
697 PARAMS ((const expressionS
*));
698 offsetT get_expr_const
699 PARAMS ((const expressionS
*));
701 PARAMS ((expressionS
*, offsetT
));
702 void set_expr_symbol_offset
703 PARAMS ((expressionS
*, symbolS
*, offsetT
));
704 bfd_boolean expr_is_equal
705 PARAMS ((expressionS
*, expressionS
*));
706 static void copy_expr
707 PARAMS ((expressionS
*, const expressionS
*));
709 #ifdef XTENSA_SECTION_RENAME
710 static void build_section_rename
711 PARAMS ((const char *));
712 static void add_section_rename
713 PARAMS ((char *, char *));
717 /* ISA imported from bfd. */
718 extern xtensa_isa xtensa_default_isa
;
720 extern int target_big_endian
;
722 static xtensa_opcode xtensa_addi_opcode
;
723 static xtensa_opcode xtensa_addmi_opcode
;
724 static xtensa_opcode xtensa_call0_opcode
;
725 static xtensa_opcode xtensa_call4_opcode
;
726 static xtensa_opcode xtensa_call8_opcode
;
727 static xtensa_opcode xtensa_call12_opcode
;
728 static xtensa_opcode xtensa_callx0_opcode
;
729 static xtensa_opcode xtensa_callx4_opcode
;
730 static xtensa_opcode xtensa_callx8_opcode
;
731 static xtensa_opcode xtensa_callx12_opcode
;
732 static xtensa_opcode xtensa_entry_opcode
;
733 static xtensa_opcode xtensa_isync_opcode
;
734 static xtensa_opcode xtensa_j_opcode
;
735 static xtensa_opcode xtensa_jx_opcode
;
736 static xtensa_opcode xtensa_loop_opcode
;
737 static xtensa_opcode xtensa_loopnez_opcode
;
738 static xtensa_opcode xtensa_loopgtz_opcode
;
739 static xtensa_opcode xtensa_nop_n_opcode
;
740 static xtensa_opcode xtensa_or_opcode
;
741 static xtensa_opcode xtensa_ret_opcode
;
742 static xtensa_opcode xtensa_ret_n_opcode
;
743 static xtensa_opcode xtensa_retw_opcode
;
744 static xtensa_opcode xtensa_retw_n_opcode
;
745 static xtensa_opcode xtensa_rsr_opcode
;
746 static xtensa_opcode xtensa_waiti_opcode
;
749 /* Command-line Options. */
751 bfd_boolean use_literal_section
= TRUE
;
752 static bfd_boolean align_targets
= TRUE
;
753 static bfd_boolean align_only_targets
= FALSE
;
754 static bfd_boolean software_a0_b_retw_interlock
= TRUE
;
755 static bfd_boolean has_a0_b_retw
= FALSE
;
756 static bfd_boolean workaround_a0_b_retw
= TRUE
;
758 static bfd_boolean software_avoid_b_j_loop_end
= TRUE
;
759 static bfd_boolean workaround_b_j_loop_end
= TRUE
;
760 static bfd_boolean maybe_has_b_j_loop_end
= FALSE
;
762 static bfd_boolean software_avoid_short_loop
= TRUE
;
763 static bfd_boolean workaround_short_loop
= TRUE
;
764 static bfd_boolean maybe_has_short_loop
= FALSE
;
766 static bfd_boolean software_avoid_close_loop_end
= TRUE
;
767 static bfd_boolean workaround_close_loop_end
= TRUE
;
768 static bfd_boolean maybe_has_close_loop_end
= FALSE
;
770 /* When avoid_short_loops is true, all loops with early exits must
771 have at least 3 instructions. avoid_all_short_loops is a modifier
772 to the avoid_short_loop flag. In addition to the avoid_short_loop
773 actions, all straightline loopgtz and loopnez must have at least 3
776 static bfd_boolean software_avoid_all_short_loops
= TRUE
;
777 static bfd_boolean workaround_all_short_loops
= TRUE
;
779 /* This is on a per-instruction basis. */
780 static bfd_boolean specific_opcode
= FALSE
;
784 option_density
= OPTION_MD_BASE
,
793 option_text_section_literals
,
794 option_no_text_section_literals
,
796 option_align_targets
,
797 option_no_align_targets
,
799 option_align_only_targets
,
800 option_no_align_only_targets
,
805 option_workaround_a0_b_retw
,
806 option_no_workaround_a0_b_retw
,
808 option_workaround_b_j_loop_end
,
809 option_no_workaround_b_j_loop_end
,
811 option_workaround_short_loop
,
812 option_no_workaround_short_loop
,
814 option_workaround_all_short_loops
,
815 option_no_workaround_all_short_loops
,
817 option_workaround_close_loop_end
,
818 option_no_workaround_close_loop_end
,
820 option_no_workarounds
,
822 #ifdef XTENSA_SECTION_RENAME
823 option_literal_section_name
,
824 option_text_section_name
,
825 option_data_section_name
,
826 option_bss_section_name
,
827 option_rename_section_name
,
834 const char *md_shortopts
= "";
836 struct option md_longopts
[] =
838 {"density", no_argument
, NULL
, option_density
},
839 {"no-density", no_argument
, NULL
, option_no_density
},
840 /* At least as early as alameda, --[no-]relax didn't work as
841 documented, so as of albany, --[no-]relax is equivalent to
842 --[no-]generics. Both of these will be deprecated in
844 {"relax", no_argument
, NULL
, option_generics
},
845 {"no-relax", no_argument
, NULL
, option_no_generics
},
846 {"generics", no_argument
, NULL
, option_generics
},
847 {"no-generics", no_argument
, NULL
, option_no_generics
},
848 {"text-section-literals", no_argument
, NULL
, option_text_section_literals
},
849 {"no-text-section-literals", no_argument
, NULL
,
850 option_no_text_section_literals
},
851 /* This option was changed from -align-target to -target-align
852 because it conflicted with the "-al" option. */
853 {"target-align", no_argument
, NULL
, option_align_targets
},
854 {"no-target-align", no_argument
, NULL
,
855 option_no_align_targets
},
857 /* This option should do a better job aligning targets because
858 it will only attempt to align targets that are the target of a
860 { "target-align-only", no_argument
, NULL
, option_align_only_targets
},
861 { "no-target-align-only", no_argument
, NULL
, option_no_align_only_targets
},
863 {"longcalls", no_argument
, NULL
, option_longcalls
},
864 {"no-longcalls", no_argument
, NULL
, option_no_longcalls
},
866 {"no-workaround-a0-b-retw", no_argument
, NULL
,
867 option_no_workaround_a0_b_retw
},
868 {"workaround-a0-b-retw", no_argument
, NULL
, option_workaround_a0_b_retw
},
870 {"no-workaround-b-j-loop-end", no_argument
, NULL
,
871 option_no_workaround_b_j_loop_end
},
872 {"workaround-b-j-loop-end", no_argument
, NULL
,
873 option_workaround_b_j_loop_end
},
875 {"no-workaround-short-loops", no_argument
, NULL
,
876 option_no_workaround_short_loop
},
877 {"workaround-short-loops", no_argument
, NULL
, option_workaround_short_loop
},
879 {"no-workaround-all-short-loops", no_argument
, NULL
,
880 option_no_workaround_all_short_loops
},
881 {"workaround-all-short-loop", no_argument
, NULL
,
882 option_workaround_all_short_loops
},
884 {"no-workaround-close-loop-end", no_argument
, NULL
,
885 option_no_workaround_close_loop_end
},
886 {"workaround-close-loop-end", no_argument
, NULL
,
887 option_workaround_close_loop_end
},
889 {"no-workarounds", no_argument
, NULL
, option_no_workarounds
},
891 #ifdef XTENSA_SECTION_RENAME
892 {"literal-section-name", required_argument
, NULL
,
893 option_literal_section_name
},
894 {"text-section-name", required_argument
, NULL
,
895 option_text_section_name
},
896 {"data-section-name", required_argument
, NULL
,
897 option_data_section_name
},
898 {"rename-section", required_argument
, NULL
,
899 option_rename_section_name
},
900 {"bss-section-name", required_argument
, NULL
,
901 option_bss_section_name
},
902 #endif /* XTENSA_SECTION_RENAME */
904 {NULL
, no_argument
, NULL
, 0}
907 size_t md_longopts_size
= sizeof md_longopts
;
911 md_parse_option (c
, arg
)
918 if (!density_supported
)
920 as_bad (_("'--density' option not supported in this Xtensa "
924 directive_state
[directive_density
] = TRUE
;
926 case option_no_density
:
927 directive_state
[directive_density
] = FALSE
;
929 case option_generics
:
930 directive_state
[directive_generics
] = TRUE
;
932 case option_no_generics
:
933 directive_state
[directive_generics
] = FALSE
;
935 case option_longcalls
:
936 directive_state
[directive_longcalls
] = TRUE
;
938 case option_no_longcalls
:
939 directive_state
[directive_longcalls
] = FALSE
;
941 case option_text_section_literals
:
942 use_literal_section
= FALSE
;
944 case option_no_text_section_literals
:
945 use_literal_section
= TRUE
;
947 case option_workaround_a0_b_retw
:
948 workaround_a0_b_retw
= TRUE
;
949 software_a0_b_retw_interlock
= TRUE
;
951 case option_no_workaround_a0_b_retw
:
952 workaround_a0_b_retw
= FALSE
;
953 software_a0_b_retw_interlock
= FALSE
;
955 case option_workaround_b_j_loop_end
:
956 workaround_b_j_loop_end
= TRUE
;
957 software_avoid_b_j_loop_end
= TRUE
;
959 case option_no_workaround_b_j_loop_end
:
960 workaround_b_j_loop_end
= FALSE
;
961 software_avoid_b_j_loop_end
= FALSE
;
964 case option_workaround_short_loop
:
965 workaround_short_loop
= TRUE
;
966 software_avoid_short_loop
= TRUE
;
968 case option_no_workaround_short_loop
:
969 workaround_short_loop
= FALSE
;
970 software_avoid_short_loop
= FALSE
;
973 case option_workaround_all_short_loops
:
974 workaround_all_short_loops
= TRUE
;
975 software_avoid_all_short_loops
= TRUE
;
977 case option_no_workaround_all_short_loops
:
978 workaround_all_short_loops
= FALSE
;
979 software_avoid_all_short_loops
= FALSE
;
982 case option_workaround_close_loop_end
:
983 workaround_close_loop_end
= TRUE
;
984 software_avoid_close_loop_end
= TRUE
;
986 case option_no_workaround_close_loop_end
:
987 workaround_close_loop_end
= FALSE
;
988 software_avoid_close_loop_end
= FALSE
;
991 case option_no_workarounds
:
992 workaround_a0_b_retw
= FALSE
;
993 software_a0_b_retw_interlock
= FALSE
;
994 workaround_b_j_loop_end
= FALSE
;
995 software_avoid_b_j_loop_end
= FALSE
;
996 workaround_short_loop
= FALSE
;
997 software_avoid_short_loop
= FALSE
;
998 workaround_all_short_loops
= FALSE
;
999 software_avoid_all_short_loops
= FALSE
;
1000 workaround_close_loop_end
= FALSE
;
1001 software_avoid_close_loop_end
= FALSE
;
1004 case option_align_targets
:
1005 align_targets
= TRUE
;
1007 case option_no_align_targets
:
1008 align_targets
= FALSE
;
1011 case option_align_only_targets
:
1012 align_only_targets
= TRUE
;
1014 case option_no_align_only_targets
:
1015 align_only_targets
= FALSE
;
1018 #ifdef XTENSA_SECTION_RENAME
1019 case option_literal_section_name
:
1020 add_section_rename (".literal", arg
);
1021 as_warn (_("'--literal-section-name' is deprecated; "
1022 "use '--rename-section .literal=NEWNAME'"));
1025 case option_text_section_name
:
1026 add_section_rename (".text", arg
);
1027 as_warn (_("'--text-section-name' is deprecated; "
1028 "use '--rename-section .text=NEWNAME'"));
1031 case option_data_section_name
:
1032 add_section_rename (".data", arg
);
1033 as_warn (_("'--data-section-name' is deprecated; "
1034 "use '--rename-section .data=NEWNAME'"));
1037 case option_bss_section_name
:
1038 add_section_rename (".bss", arg
);
1039 as_warn (_("'--bss-section-name' is deprecated; "
1040 "use '--rename-section .bss=NEWNAME'"));
1043 case option_rename_section_name
:
1044 build_section_rename (arg
);
1046 #endif /* XTENSA_SECTION_RENAME */
1049 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1050 should be emitted or not. FIXME: Not implemented. */
1060 md_show_usage (stream
)
1063 fputs ("\nXtensa options:\n"
1064 "--[no-]density [Do not] emit density instructions\n"
1065 "--[no-]relax [Do not] perform branch relaxation\n"
1066 "--[no-]generics [Do not] transform instructions\n"
1067 "--[no-]longcalls [Do not] emit 32-bit call sequences\n"
1068 "--[no-]target-align [Do not] try to align branch targets\n"
1069 "--[no-]text-section-literals\n"
1070 " [Do not] put literals in the text section\n"
1071 "--no-workarounds Do not use any Xtensa workarounds\n"
1072 #ifdef XTENSA_SECTION_RENAME
1073 "--rename-section old=new(:old1=new1)*\n"
1074 " Rename section 'old' to 'new'\n"
1075 "\nThe following Xtensa options are deprecated\n"
1076 "--literal-section-name Name of literal section (default .literal)\n"
1077 "--text-section-name Name of text section (default .text)\n"
1078 "--data-section-name Name of data section (default .data)\n"
1079 "--bss-section-name Name of bss section (default .bss)\n"
1085 /* Directive data and functions. */
1087 typedef struct state_stackS_struct
1089 directiveE directive
;
1090 bfd_boolean negated
;
1091 bfd_boolean old_state
;
1095 struct state_stackS_struct
*prev
;
1098 state_stackS
*directive_state_stack
;
1100 const pseudo_typeS md_pseudo_table
[] =
1102 {"align", s_align_bytes
, 0}, /* Defaulting is invalid (0) */
1103 {"literal_position", xtensa_literal_position
, 0},
1104 {"frame", s_ignore
, 0}, /* formerly used for STABS debugging */
1106 {"begin", xtensa_begin_directive
, 0},
1107 {"end", xtensa_end_directive
, 0},
1108 {"literal", xtensa_literal_pseudo
, 0},
1116 return directive_state
[directive_generics
];
1123 return directive_state
[directive_longcalls
];
1128 code_density_available ()
1130 return directive_state
[directive_density
];
1137 return use_generics ();
1142 directive_push (directive
, negated
, datum
)
1143 directiveE directive
;
1144 bfd_boolean negated
;
1149 state_stackS
*stack
= (state_stackS
*) xmalloc (sizeof (state_stackS
));
1151 as_where (&file
, &line
);
1153 stack
->directive
= directive
;
1154 stack
->negated
= negated
;
1155 stack
->old_state
= directive_state
[directive
];
1158 stack
->datum
= datum
;
1159 stack
->prev
= directive_state_stack
;
1160 directive_state_stack
= stack
;
1162 directive_state
[directive
] = !negated
;
1166 directive_pop (directive
, negated
, file
, line
, datum
)
1167 directiveE
*directive
;
1168 bfd_boolean
*negated
;
1173 state_stackS
*top
= directive_state_stack
;
1175 if (!directive_state_stack
)
1177 as_bad (_("unmatched end directive"));
1178 *directive
= directive_none
;
1182 directive_state
[directive_state_stack
->directive
] = top
->old_state
;
1183 *directive
= top
->directive
;
1184 *negated
= top
->negated
;
1187 *datum
= top
->datum
;
1188 directive_state_stack
= top
->prev
;
1194 directive_balance ()
1196 while (directive_state_stack
)
1198 directiveE directive
;
1199 bfd_boolean negated
;
1204 directive_pop (&directive
, &negated
, &file
, &line
, &datum
);
1205 as_warn_where ((char *) file
, line
,
1206 _(".begin directive with no matching .end directive"));
1212 inside_directive (dir
)
1215 state_stackS
*top
= directive_state_stack
;
1217 while (top
&& top
->directive
!= dir
)
1220 return (top
!= NULL
);
1225 get_directive (directive
, negated
)
1226 directiveE
*directive
;
1227 bfd_boolean
*negated
;
1232 if (strncmp (input_line_pointer
, "no-", 3) != 0)
1237 input_line_pointer
+= 3;
1240 len
= strspn (input_line_pointer
,
1241 "abcdefghijklmnopqrstuvwxyz_/0123456789.");
1243 for (i
= 0; i
< sizeof (directive_info
) / sizeof (*directive_info
); ++i
)
1245 if (strncmp (input_line_pointer
, directive_info
[i
].name
, len
) == 0)
1247 input_line_pointer
+= len
;
1248 *directive
= (directiveE
) i
;
1249 if (*negated
&& !directive_info
[i
].can_be_negated
)
1250 as_bad (_("directive %s can't be negated"),
1251 directive_info
[i
].name
);
1256 as_bad (_("unknown directive"));
1257 *directive
= (directiveE
) XTENSA_UNDEFINED
;
1262 xtensa_begin_directive (ignore
)
1263 int ignore ATTRIBUTE_UNUSED
;
1265 directiveE directive
;
1266 bfd_boolean negated
;
1271 get_directive (&directive
, &negated
);
1272 if (directive
== (directiveE
) XTENSA_UNDEFINED
)
1274 discard_rest_of_line ();
1280 case directive_literal
:
1281 state
= (emit_state
*) xmalloc (sizeof (emit_state
));
1282 xtensa_switch_to_literal_fragment (state
);
1283 directive_push (directive_literal
, negated
, state
);
1286 case directive_literal_prefix
:
1287 /* Check to see if the current fragment is a literal
1288 fragment. If it is, then this operation is not allowed. */
1289 if (frag_now
->tc_frag_data
.is_literal
)
1291 as_bad (_("cannot set literal_prefix inside literal fragment"));
1295 /* Allocate the literal state for this section and push
1296 onto the directive stack. */
1297 ls
= xmalloc (sizeof (lit_state
));
1300 *ls
= default_lit_sections
;
1302 directive_push (directive_literal_prefix
, negated
, ls
);
1304 /* Parse the new prefix from the input_line_pointer. */
1306 len
= strspn (input_line_pointer
,
1307 "ABCDEFGHIJKLMNOPQRSTUVWXYZ"
1308 "abcdefghijklmnopqrstuvwxyz_/0123456789.$");
1310 /* Process the new prefix. */
1311 xtensa_literal_prefix (input_line_pointer
, len
);
1313 /* Skip the name in the input line. */
1314 input_line_pointer
+= len
;
1317 case directive_freeregs
:
1318 /* This information is currently unused, but we'll accept the statement
1319 and just discard the rest of the line. This won't check the syntax,
1320 but it will accept every correct freeregs directive. */
1321 input_line_pointer
+= strcspn (input_line_pointer
, "\n");
1322 directive_push (directive_freeregs
, negated
, 0);
1325 case directive_density
:
1326 if (!density_supported
&& !negated
)
1328 as_warn (_("Xtensa density option not supported; ignored"));
1334 directive_push (directive
, negated
, 0);
1338 demand_empty_rest_of_line ();
1343 xtensa_end_directive (ignore
)
1344 int ignore ATTRIBUTE_UNUSED
;
1346 directiveE begin_directive
, end_directive
;
1347 bfd_boolean begin_negated
, end_negated
;
1353 get_directive (&end_directive
, &end_negated
);
1354 if (end_directive
== (directiveE
) XTENSA_UNDEFINED
)
1356 discard_rest_of_line ();
1360 if (end_directive
== directive_density
&& !density_supported
&& !end_negated
)
1362 as_warn (_("Xtensa density option not supported; ignored"));
1363 demand_empty_rest_of_line ();
1367 directive_pop (&begin_directive
, &begin_negated
, &file
, &line
,
1368 (const void **) &state
);
1370 if (begin_directive
!= directive_none
)
1372 if (begin_directive
!= end_directive
|| begin_negated
!= end_negated
)
1374 as_bad (_("does not match begin %s%s at %s:%d"),
1375 begin_negated
? "no-" : "",
1376 directive_info
[begin_directive
].name
, file
, line
);
1380 switch (end_directive
)
1382 case directive_literal
:
1383 frag_var (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
1384 xtensa_restore_emit_state (state
);
1388 case directive_freeregs
:
1391 case directive_literal_prefix
:
1392 /* Restore the default collection sections from saved state. */
1393 s
= (lit_state
*) state
;
1396 if (use_literal_section
)
1397 default_lit_sections
= *s
;
1399 /* free the state storage */
1409 demand_empty_rest_of_line ();
1413 /* Place an aligned literal fragment at the current location. */
1416 xtensa_literal_position (ignore
)
1417 int ignore ATTRIBUTE_UNUSED
;
1419 if (inside_directive (directive_literal
))
1420 as_warn (_(".literal_position inside literal directive; ignoring"));
1421 else if (!use_literal_section
)
1422 xtensa_mark_literal_pool_location ();
1424 demand_empty_rest_of_line ();
1428 /* Support .literal label, value@plt + offset. */
1431 xtensa_literal_pseudo (ignored
)
1432 int ignored ATTRIBUTE_UNUSED
;
1435 char *p
, *base_name
;
1440 /* If we are using text-section literals, then this is the right value... */
1443 base_name
= input_line_pointer
;
1445 xtensa_switch_to_literal_fragment (&state
);
1447 /* ...but if we aren't using text-section-literals, then we
1448 need to put them in the section we just switched to. */
1449 if (use_literal_section
)
1452 /* All literals are aligned to four-byte boundaries
1453 which is handled by switch to literal fragment. */
1454 /* frag_align (2, 0, 0); */
1456 c
= get_symbol_end ();
1457 /* Just after name is now '\0'. */
1458 p
= input_line_pointer
;
1462 if (*input_line_pointer
!= ',' && *input_line_pointer
!= ':')
1464 as_bad (_("expected comma or colon after symbol name; "
1465 "rest of line ignored"));
1466 ignore_rest_of_line ();
1467 xtensa_restore_emit_state (&state
);
1476 input_line_pointer
++; /* skip ',' or ':' */
1480 /* We only support 4-byte literals with .literal. */
1481 emit_expr (&expP
, 4);
1483 while (*input_line_pointer
== ',');
1487 demand_empty_rest_of_line ();
1489 xtensa_restore_emit_state (&state
);
1494 xtensa_literal_prefix (start
, len
)
1498 segT s_now
; /* Storage for the current seg and subseg. */
1500 char *name
; /* Pointer to the name itself. */
1503 if (!use_literal_section
)
1506 /* Store away the current section and subsection. */
1508 ss_now
= now_subseg
;
1510 /* Get a null-terminated copy of the name. */
1511 name
= xmalloc (len
+ 1);
1514 strncpy (name
, start
, len
);
1517 /* Allocate the sections (interesting note: the memory pointing to
1518 the name is actually used for the name by the new section). */
1519 newname
= xmalloc (len
+ strlen (".literal") + 1);
1520 strcpy (newname
, name
);
1521 strcpy (newname
+ len
, ".literal");
1523 /* Note that retrieve_literal_seg does not create a segment if
1524 it already exists. */
1525 default_lit_sections
.lit_seg
= NULL
; /* retrieved on demand */
1527 /* Canonicalizing section names allows renaming literal
1528 sections to occur correctly. */
1529 default_lit_sections
.lit_seg_name
=
1530 tc_canonicalize_symbol_name (newname
);
1534 /* Restore the current section and subsection and set the
1535 generation into the old segment. */
1536 subseg_set (s_now
, ss_now
);
1540 /* Parsing and Idiom Translation. */
1543 expression_end (name
)
1565 #define ERROR_REG_NUM ((unsigned) -1)
1568 tc_get_register (prefix
)
1572 const char *next_expr
;
1573 const char *old_line_pointer
;
1576 old_line_pointer
= input_line_pointer
;
1578 if (*input_line_pointer
== '$')
1579 ++input_line_pointer
;
1581 /* Accept "sp" as a synonym for "a1". */
1582 if (input_line_pointer
[0] == 's' && input_line_pointer
[1] == 'p'
1583 && expression_end (input_line_pointer
+ 2))
1585 input_line_pointer
+= 2;
1586 return 1; /* AR[1] */
1589 while (*input_line_pointer
++ == *prefix
++)
1591 --input_line_pointer
;
1596 as_bad (_("bad register name: %s"), old_line_pointer
);
1597 return ERROR_REG_NUM
;
1600 if (!ISDIGIT ((unsigned char) *input_line_pointer
))
1602 as_bad (_("bad register number: %s"), input_line_pointer
);
1603 return ERROR_REG_NUM
;
1608 while (ISDIGIT ((int) *input_line_pointer
))
1609 reg
= reg
* 10 + *input_line_pointer
++ - '0';
1611 if (!(next_expr
= expression_end (input_line_pointer
)))
1613 as_bad (_("bad register name: %s"), old_line_pointer
);
1614 return ERROR_REG_NUM
;
1617 input_line_pointer
= (char *) next_expr
;
1623 #define PLT_SUFFIX "@PLT"
1624 #define plt_suffix "@plt"
1627 expression_maybe_register (opnd
, tok
)
1628 xtensa_operand opnd
;
1631 char *kind
= xtensa_operand_kind (opnd
);
1633 if ((strlen (kind
) == 1)
1634 && (*kind
== 'l' || *kind
== 'L' || *kind
== 'i' || *kind
== 'r'))
1636 segT t
= expression (tok
);
1637 if (t
== absolute_section
&& operand_is_pcrel_label (opnd
))
1639 assert (tok
->X_op
== O_constant
);
1640 tok
->X_op
= O_symbol
;
1641 tok
->X_add_symbol
= &abs_symbol
;
1643 if (tok
->X_op
== O_symbol
1644 && (!strncmp (input_line_pointer
, PLT_SUFFIX
,
1645 strlen (PLT_SUFFIX
) - 1)
1646 || !strncmp (input_line_pointer
, plt_suffix
,
1647 strlen (plt_suffix
) - 1)))
1649 symbol_get_tc (tok
->X_add_symbol
)->plt
= 1;
1650 input_line_pointer
+= strlen (plt_suffix
);
1655 unsigned reg
= tc_get_register (kind
);
1657 if (reg
!= ERROR_REG_NUM
) /* Already errored */
1660 if ((xtensa_operand_encode (opnd
, &buf
) != xtensa_encode_result_ok
)
1661 || (reg
!= xtensa_operand_decode (opnd
, buf
)))
1662 as_bad (_("register number out of range"));
1665 tok
->X_op
= O_register
;
1666 tok
->X_add_symbol
= 0;
1667 tok
->X_add_number
= reg
;
1672 /* Split up the arguments for an opcode or pseudo-op. */
1675 tokenize_arguments (args
, str
)
1679 char *old_input_line_pointer
;
1680 bfd_boolean saw_comma
= FALSE
;
1681 bfd_boolean saw_arg
= FALSE
;
1683 char *arg_end
, *arg
;
1686 /* Save and restore input_line_pointer around this function. */
1687 old_input_line_pointer
= input_line_pointer
;
1688 input_line_pointer
= str
;
1690 while (*input_line_pointer
)
1693 switch (*input_line_pointer
)
1699 input_line_pointer
++;
1700 if (saw_comma
|| !saw_arg
)
1706 if (!saw_comma
&& saw_arg
)
1709 arg_end
= input_line_pointer
+ 1;
1710 while (!expression_end (arg_end
))
1713 arg_len
= arg_end
- input_line_pointer
;
1714 arg
= (char *) xmalloc (arg_len
+ 1);
1715 args
[num_args
] = arg
;
1717 strncpy (arg
, input_line_pointer
, arg_len
);
1718 arg
[arg_len
] = '\0';
1720 input_line_pointer
= arg_end
;
1731 input_line_pointer
= old_input_line_pointer
;
1735 input_line_pointer
= old_input_line_pointer
;
1740 /* Parse the arguments to an opcode. Return true on error. */
1743 parse_arguments (insn
, num_args
, arg_strings
)
1748 expressionS
*tok
= insn
->tok
;
1749 xtensa_opcode opcode
= insn
->opcode
;
1750 bfd_boolean had_error
= TRUE
;
1751 xtensa_isa isa
= xtensa_default_isa
;
1753 int opcode_operand_count
;
1754 int actual_operand_count
= 0;
1755 xtensa_operand opnd
= NULL
;
1756 char *old_input_line_pointer
;
1758 if (insn
->insn_type
== ITYPE_LITERAL
)
1759 opcode_operand_count
= 1;
1761 opcode_operand_count
= xtensa_num_operands (isa
, opcode
);
1763 memset (tok
, 0, sizeof (*tok
) * MAX_INSN_ARGS
);
1765 /* Save and restore input_line_pointer around this function. */
1766 old_input_line_pointer
= input_line_pointer
;
1768 for (n
= 0; n
< num_args
; n
++)
1770 input_line_pointer
= arg_strings
[n
];
1772 if (actual_operand_count
>= opcode_operand_count
)
1774 as_warn (_("too many arguments"));
1777 assert (actual_operand_count
< MAX_INSN_ARGS
);
1779 opnd
= xtensa_get_operand (isa
, opcode
, actual_operand_count
);
1780 expression_maybe_register (opnd
, tok
);
1782 if (tok
->X_op
== O_illegal
|| tok
->X_op
== O_absent
)
1784 actual_operand_count
++;
1788 insn
->ntok
= tok
- insn
->tok
;
1792 input_line_pointer
= old_input_line_pointer
;
1798 xg_reverse_shift_count (cnt_argp
)
1801 char *cnt_arg
, *new_arg
;
1802 cnt_arg
= *cnt_argp
;
1804 /* replace the argument with "31-(argument)" */
1805 new_arg
= (char *) xmalloc (strlen (cnt_arg
) + 6);
1806 sprintf (new_arg
, "31-(%s)", cnt_arg
);
1809 *cnt_argp
= new_arg
;
1813 /* If "arg" is a constant expression, return non-zero with the value
1817 xg_arg_is_constant (arg
, valp
)
1822 char *save_ptr
= input_line_pointer
;
1824 input_line_pointer
= arg
;
1826 input_line_pointer
= save_ptr
;
1828 if (exp
.X_op
== O_constant
)
1830 *valp
= exp
.X_add_number
;
1839 xg_replace_opname (popname
, newop
)
1844 *popname
= (char *) xmalloc (strlen (newop
) + 1);
1845 strcpy (*popname
, newop
);
1850 xg_check_num_args (pnum_args
, expected_num
, opname
, arg_strings
)
1856 int num_args
= *pnum_args
;
1858 if (num_args
< expected_num
)
1860 as_bad (_("not enough operands (%d) for '%s'; expected %d"),
1861 num_args
, opname
, expected_num
);
1865 if (num_args
> expected_num
)
1867 as_warn (_("too many operands (%d) for '%s'; expected %d"),
1868 num_args
, opname
, expected_num
);
1869 while (num_args
-- > expected_num
)
1871 free (arg_strings
[num_args
]);
1872 arg_strings
[num_args
] = 0;
1874 *pnum_args
= expected_num
;
1883 xg_translate_sysreg_op (popname
, pnum_args
, arg_strings
)
1888 char *opname
, *new_opname
;
1890 bfd_boolean has_underbar
= FALSE
;
1895 has_underbar
= TRUE
;
1899 /* Opname == [rw]ur... */
1901 if (opname
[3] == '\0')
1903 /* If the register is not specified as part of the opcode,
1904 then get it from the operand and move it to the opcode. */
1906 if (xg_check_num_args (pnum_args
, 2, opname
, arg_strings
))
1909 if (!xg_arg_is_constant (arg_strings
[1], &val
))
1911 as_bad (_("register number for `%s' is not a constant"), opname
);
1914 if ((unsigned) val
> 255)
1916 as_bad (_("register number (%ld) for `%s' is out of range"),
1921 /* Remove the last argument, which is now part of the opcode. */
1922 free (arg_strings
[1]);
1926 /* Translate the opcode. */
1927 new_opname
= (char *) xmalloc (8);
1928 sprintf (new_opname
, "%s%cur%u", (has_underbar
? "_" : ""),
1929 opname
[0], (unsigned) val
);
1931 *popname
= new_opname
;
1938 /* If the instruction is an idiom (i.e., a built-in macro), translate it.
1939 Returns non-zero if an error was found. */
1942 xg_translate_idioms (popname
, pnum_args
, arg_strings
)
1947 char *opname
= *popname
;
1948 bfd_boolean has_underbar
= FALSE
;
1952 has_underbar
= TRUE
;
1956 if (strcmp (opname
, "mov") == 0)
1958 if (!has_underbar
&& code_density_available ())
1959 xg_replace_opname (popname
, "mov.n");
1962 if (xg_check_num_args (pnum_args
, 2, opname
, arg_strings
))
1964 xg_replace_opname (popname
, (has_underbar
? "_or" : "or"));
1965 arg_strings
[2] = (char *) xmalloc (strlen (arg_strings
[1]) + 1);
1966 strcpy (arg_strings
[2], arg_strings
[1]);
1972 if (strcmp (opname
, "bbsi.l") == 0)
1974 if (xg_check_num_args (pnum_args
, 3, opname
, arg_strings
))
1976 xg_replace_opname (popname
, (has_underbar
? "_bbsi" : "bbsi"));
1977 if (target_big_endian
)
1978 xg_reverse_shift_count (&arg_strings
[1]);
1982 if (strcmp (opname
, "bbci.l") == 0)
1984 if (xg_check_num_args (pnum_args
, 3, opname
, arg_strings
))
1986 xg_replace_opname (popname
, (has_underbar
? "_bbci" : "bbci"));
1987 if (target_big_endian
)
1988 xg_reverse_shift_count (&arg_strings
[1]);
1992 if (strcmp (opname
, "nop") == 0)
1994 if (!has_underbar
&& code_density_available ())
1995 xg_replace_opname (popname
, "nop.n");
1998 if (xg_check_num_args (pnum_args
, 0, opname
, arg_strings
))
2000 xg_replace_opname (popname
, (has_underbar
? "_or" : "or"));
2001 arg_strings
[0] = (char *) xmalloc (3);
2002 arg_strings
[1] = (char *) xmalloc (3);
2003 arg_strings
[2] = (char *) xmalloc (3);
2004 strcpy (arg_strings
[0], "a1");
2005 strcpy (arg_strings
[1], "a1");
2006 strcpy (arg_strings
[2], "a1");
2012 if ((opname
[0] == 'r' || opname
[0] == 'w')
2014 && opname
[2] == 'r')
2015 return xg_translate_sysreg_op (popname
, pnum_args
, arg_strings
);
2018 /* WIDENING DENSITY OPCODES
2020 questionable relaxations (widening) from old "tai" idioms:
2030 Note: this incomplete list was imported to match the "tai"
2031 behavior; other density opcodes are not handled.
2033 The xtensa-relax code may know how to do these but it doesn't do
2034 anything when these density opcodes appear inside a no-density
2035 region. Somehow GAS should either print an error when that happens
2036 or do the widening. The old "tai" behavior was to do the widening.
2037 For now, I'll make it widen but print a warning.
2039 FIXME: GAS needs to detect density opcodes inside no-density
2040 regions and treat them as errors. This code should be removed
2041 when that is done. */
2045 && density_supported
2046 && !code_density_available ())
2048 if (strcmp (opname
, "add.n") == 0)
2049 xg_replace_opname (popname
, "add");
2051 else if (strcmp (opname
, "beqz.n") == 0)
2052 xg_replace_opname (popname
, "beqz");
2054 else if (strcmp (opname
, "ret.n") == 0)
2055 xg_replace_opname (popname
, "ret");
2057 else if (strcmp (opname
, "retw.n") == 0)
2058 xg_replace_opname (popname
, "retw");
2060 else if (strcmp (opname
, "movi.n") == 0)
2061 xg_replace_opname (popname
, "movi");
2063 else if (strcmp (opname
, "mov.n") == 0)
2065 if (xg_check_num_args (pnum_args
, 2, opname
, arg_strings
))
2067 xg_replace_opname (popname
, "or");
2068 arg_strings
[2] = (char *) xmalloc (strlen (arg_strings
[1]) + 1);
2069 strcpy (arg_strings
[2], arg_strings
[1]);
2073 else if (strcmp (opname
, "nop.n") == 0)
2075 if (xg_check_num_args (pnum_args
, 0, opname
, arg_strings
))
2077 xg_replace_opname (popname
, "or");
2078 arg_strings
[0] = (char *) xmalloc (3);
2079 arg_strings
[1] = (char *) xmalloc (3);
2080 arg_strings
[2] = (char *) xmalloc (3);
2081 strcpy (arg_strings
[0], "a1");
2082 strcpy (arg_strings
[1], "a1");
2083 strcpy (arg_strings
[2], "a1");
2092 /* Functions for dealing with the Xtensa ISA. */
2094 /* Return true if the given operand is an immed or target instruction,
2095 i.e., has a reloc associated with it. Currently, this is only true
2096 if the operand kind is "i, "l" or "L". */
2099 operand_is_immed (opnd
)
2100 xtensa_operand opnd
;
2102 const char *opkind
= xtensa_operand_kind (opnd
);
2103 if (opkind
[0] == '\0' || opkind
[1] != '\0')
2116 /* Return true if the given operand is a pc-relative label. This is
2117 true for "l", "L", and "r" operand kinds. */
2120 operand_is_pcrel_label (opnd
)
2121 xtensa_operand opnd
;
2123 const char *opkind
= xtensa_operand_kind (opnd
);
2124 if (opkind
[0] == '\0' || opkind
[1] != '\0')
2137 /* Currently the assembler only allows us to use a single target per
2138 fragment. Because of this, only one operand for a given
2139 instruction may be symbolic. If there is an operand of kind "lrL",
2140 the last one is chosen. Otherwise, the result is the number of the
2141 last operand of type "i", and if there are none of those, we fail
2145 get_relaxable_immed (opcode
)
2146 xtensa_opcode opcode
;
2148 int last_immed
= -1;
2150 xtensa_operand operand
;
2152 if (opcode
== XTENSA_UNDEFINED
)
2155 noperands
= xtensa_num_operands (xtensa_default_isa
, opcode
);
2156 for (opi
= noperands
- 1; opi
>= 0; opi
--)
2158 operand
= xtensa_get_operand (xtensa_default_isa
, opcode
, opi
);
2159 if (operand_is_pcrel_label (operand
))
2161 if (last_immed
== -1 && operand_is_immed (operand
))
2169 get_opcode_from_buf (buf
)
2172 static xtensa_insnbuf insnbuf
= NULL
;
2173 xtensa_opcode opcode
;
2174 xtensa_isa isa
= xtensa_default_isa
;
2176 insnbuf
= xtensa_insnbuf_alloc (isa
);
2178 xtensa_insnbuf_from_chars (isa
, insnbuf
, buf
);
2179 opcode
= xtensa_decode_insn (isa
, insnbuf
);
2185 is_direct_call_opcode (opcode
)
2186 xtensa_opcode opcode
;
2188 if (opcode
== XTENSA_UNDEFINED
)
2191 return (opcode
== xtensa_call0_opcode
2192 || opcode
== xtensa_call4_opcode
2193 || opcode
== xtensa_call8_opcode
2194 || opcode
== xtensa_call12_opcode
);
2199 is_call_opcode (opcode
)
2200 xtensa_opcode opcode
;
2202 if (is_direct_call_opcode (opcode
))
2205 if (opcode
== XTENSA_UNDEFINED
)
2208 return (opcode
== xtensa_callx0_opcode
2209 || opcode
== xtensa_callx4_opcode
2210 || opcode
== xtensa_callx8_opcode
2211 || opcode
== xtensa_callx12_opcode
);
2215 /* Return true if the opcode is an entry opcode. This is used because
2216 "entry" adds an implicit ".align 4" and also the entry instruction
2217 has an extra check for an operand value. */
2220 is_entry_opcode (opcode
)
2221 xtensa_opcode opcode
;
2223 if (opcode
== XTENSA_UNDEFINED
)
2226 return (opcode
== xtensa_entry_opcode
);
2230 /* Return true if it is one of the loop opcodes. Loops are special
2231 because they need automatic alignment and they have a relaxation so
2232 complex that we hard-coded it. */
2235 is_loop_opcode (opcode
)
2236 xtensa_opcode opcode
;
2238 if (opcode
== XTENSA_UNDEFINED
)
2241 return (opcode
== xtensa_loop_opcode
2242 || opcode
== xtensa_loopnez_opcode
2243 || opcode
== xtensa_loopgtz_opcode
);
2248 is_the_loop_opcode (opcode
)
2249 xtensa_opcode opcode
;
2251 if (opcode
== XTENSA_UNDEFINED
)
2254 return (opcode
== xtensa_loop_opcode
);
2259 is_jx_opcode (opcode
)
2260 xtensa_opcode opcode
;
2262 if (opcode
== XTENSA_UNDEFINED
)
2265 return (opcode
== xtensa_jx_opcode
);
2269 /* Return true if the opcode is a retw or retw.n.
2270 Needed to add nops to avoid a hardware interlock issue. */
2273 is_windowed_return_opcode (opcode
)
2274 xtensa_opcode opcode
;
2276 if (opcode
== XTENSA_UNDEFINED
)
2279 return (opcode
== xtensa_retw_opcode
|| opcode
== xtensa_retw_n_opcode
);
2283 /* Return true if the opcode type is "l" and the opcode is NOT a jump. */
2286 is_conditional_branch_opcode (opcode
)
2287 xtensa_opcode opcode
;
2289 xtensa_isa isa
= xtensa_default_isa
;
2292 if (opcode
== xtensa_j_opcode
&& opcode
!= XTENSA_UNDEFINED
)
2295 num_ops
= xtensa_num_operands (isa
, opcode
);
2296 for (i
= 0; i
< num_ops
; i
++)
2298 xtensa_operand operand
= xtensa_get_operand (isa
, opcode
, i
);
2299 if (strcmp (xtensa_operand_kind (operand
), "l") == 0)
2306 /* Return true if the given opcode is a conditional branch
2307 instruction, i.e., currently this is true if the instruction
2308 is a jx or has an operand with 'l' type and is not a loop. */
2311 is_branch_or_jump_opcode (opcode
)
2312 xtensa_opcode opcode
;
2316 if (opcode
== XTENSA_UNDEFINED
)
2319 if (is_loop_opcode (opcode
))
2322 if (is_jx_opcode (opcode
))
2325 op_count
= xtensa_num_operands (xtensa_default_isa
, opcode
);
2326 for (opn
= 0; opn
< op_count
; opn
++)
2328 xtensa_operand opnd
=
2329 xtensa_get_operand (xtensa_default_isa
, opcode
, opn
);
2330 const char *opkind
= xtensa_operand_kind (opnd
);
2331 if (opkind
&& opkind
[0] == 'l' && opkind
[1] == '\0')
2338 /* Convert from operand numbers to BFD relocation type code.
2339 Return BFD_RELOC_NONE on failure. */
2341 bfd_reloc_code_real_type
2342 opnum_to_reloc (opnum
)
2348 return BFD_RELOC_XTENSA_OP0
;
2350 return BFD_RELOC_XTENSA_OP1
;
2352 return BFD_RELOC_XTENSA_OP2
;
2356 return BFD_RELOC_NONE
;
2360 /* Convert from BFD relocation type code to operand number.
2361 Return -1 on failure. */
2364 reloc_to_opnum (reloc
)
2365 bfd_reloc_code_real_type reloc
;
2369 case BFD_RELOC_XTENSA_OP0
:
2371 case BFD_RELOC_XTENSA_OP1
:
2373 case BFD_RELOC_XTENSA_OP2
:
2383 xtensa_insnbuf_set_operand (insnbuf
, opcode
, operand
, value
, file
, line
)
2384 xtensa_insnbuf insnbuf
;
2385 xtensa_opcode opcode
;
2386 xtensa_operand operand
;
2391 xtensa_encode_result encode_result
;
2392 uint32 valbuf
= value
;
2394 encode_result
= xtensa_operand_encode (operand
, &valbuf
);
2396 switch (encode_result
)
2398 case xtensa_encode_result_ok
:
2400 case xtensa_encode_result_align
:
2401 as_bad_where ((char *) file
, line
,
2402 _("operand %d not properly aligned for '%s'"),
2403 value
, xtensa_opcode_name (xtensa_default_isa
, opcode
));
2405 case xtensa_encode_result_not_in_table
:
2406 as_bad_where ((char *) file
, line
,
2407 _("operand %d not in immediate table for '%s'"),
2408 value
, xtensa_opcode_name (xtensa_default_isa
, opcode
));
2410 case xtensa_encode_result_too_high
:
2411 as_bad_where ((char *) file
, line
,
2412 _("operand %d too large for '%s'"), value
,
2413 xtensa_opcode_name (xtensa_default_isa
, opcode
));
2415 case xtensa_encode_result_too_low
:
2416 as_bad_where ((char *) file
, line
,
2417 _("operand %d too small for '%s'"), value
,
2418 xtensa_opcode_name (xtensa_default_isa
, opcode
));
2420 case xtensa_encode_result_not_ok
:
2421 as_bad_where ((char *) file
, line
,
2422 _("operand %d is invalid for '%s'"), value
,
2423 xtensa_opcode_name (xtensa_default_isa
, opcode
));
2429 xtensa_operand_set_field (operand
, insnbuf
, valbuf
);
2434 xtensa_insnbuf_get_operand (insnbuf
, opcode
, opnum
)
2435 xtensa_insnbuf insnbuf
;
2436 xtensa_opcode opcode
;
2439 xtensa_operand op
= xtensa_get_operand (xtensa_default_isa
, opcode
, opnum
);
2440 return xtensa_operand_decode (op
, xtensa_operand_get_field (op
, insnbuf
));
2445 xtensa_insnbuf_set_immediate_field (opcode
, insnbuf
, value
, file
, line
)
2446 xtensa_opcode opcode
;
2447 xtensa_insnbuf insnbuf
;
2452 xtensa_isa isa
= xtensa_default_isa
;
2453 int last_opnd
= xtensa_num_operands (isa
, opcode
) - 1;
2454 xtensa_operand operand
= xtensa_get_operand (isa
, opcode
, last_opnd
);
2455 xtensa_insnbuf_set_operand (insnbuf
, opcode
, operand
, value
, file
, line
);
2460 is_negatable_branch (insn
)
2463 xtensa_isa isa
= xtensa_default_isa
;
2465 int num_ops
= xtensa_num_operands (isa
, insn
->opcode
);
2467 for (i
= 0; i
< num_ops
; i
++)
2469 xtensa_operand opnd
= xtensa_get_operand (isa
, insn
->opcode
, i
);
2470 char *kind
= xtensa_operand_kind (opnd
);
2471 if (strlen (kind
) == 1 && *kind
== 'l')
2478 /* Lists for recording various properties of symbols. */
2480 typedef struct symbol_consS_struct
2483 /* These are used for the target taken. */
2484 int is_loop_target
:1;
2485 int is_branch_target
:1;
2488 struct symbol_consS_struct
*rest
;
2491 symbol_consS
*defined_symbols
= 0;
2492 symbol_consS
*branch_targets
= 0;
2496 xtensa_define_label (sym
)
2499 symbol_consS
*cons
= (symbol_consS
*) xmalloc (sizeof (symbol_consS
));
2502 cons
->is_branch_target
= 0;
2503 cons
->is_loop_target
= 0;
2504 cons
->is_literal
= generating_literals
? 1 : 0;
2506 cons
->rest
= defined_symbols
;
2507 defined_symbols
= cons
;
2512 add_target_symbol (sym
, is_loop
)
2514 bfd_boolean is_loop
;
2516 symbol_consS
*cons
, *sym_e
;
2518 for (sym_e
= branch_targets
; sym_e
; sym_e
= sym_e
->rest
)
2520 if (sym_e
->first
== sym
)
2523 sym_e
->is_loop_target
= 1;
2525 sym_e
->is_branch_target
= 1;
2530 cons
= (symbol_consS
*) xmalloc (sizeof (symbol_consS
));
2532 cons
->is_branch_target
= (is_loop
? 0 : 1);
2533 cons
->is_loop_target
= (is_loop
? 1 : 0);
2534 cons
->rest
= branch_targets
;
2535 branch_targets
= cons
;
2539 /* Find the symbol at a given position. (Note: the "loops_ok"
2540 argument is provided to allow ignoring labels that define loop
2541 ends. This fixes a bug where the NOPs to align a loop opcode were
2542 included in a previous zero-cost loop:
2561 This argument is used to prevent moving the NOP to before the
2562 loop-end label, which is what you want in this special case.) */
2565 xtensa_find_label (fragP
, offset
, loops_ok
)
2568 bfd_boolean loops_ok
;
2570 symbol_consS
*consP
;
2572 for (consP
= defined_symbols
; consP
; consP
= consP
->rest
)
2574 symbolS
*symP
= consP
->first
;
2576 if (S_GET_SEGMENT (symP
) == now_seg
2577 && symbol_get_frag (symP
) == fragP
2578 && symbol_constant_p (symP
)
2579 && S_GET_VALUE (symP
) == fragP
->fr_address
+ (unsigned) offset
2580 && (loops_ok
|| !is_loop_target_label (symP
)))
2588 map_over_defined_symbols (fn
)
2589 void (*fn
) PARAMS ((symbolS
*));
2591 symbol_consS
*sym_cons
;
2593 for (sym_cons
= defined_symbols
; sym_cons
; sym_cons
= sym_cons
->rest
)
2594 fn (sym_cons
->first
);
2599 is_loop_target_label (sym
)
2602 symbol_consS
*sym_e
;
2604 for (sym_e
= branch_targets
; sym_e
; sym_e
= sym_e
->rest
)
2606 if (sym_e
->first
== sym
)
2607 return sym_e
->is_loop_target
;
2613 /* Walk over all of the symbols that are branch target labels and
2614 loop target labels. Mark the associated fragments for these with
2615 the appropriate flags. */
2618 xtensa_mark_target_fragments ()
2620 symbol_consS
*sym_e
;
2622 for (sym_e
= branch_targets
; sym_e
; sym_e
= sym_e
->rest
)
2624 symbolS
*sym
= sym_e
->first
;
2626 if (symbol_get_frag (sym
)
2627 && symbol_constant_p (sym
)
2628 && S_GET_VALUE (sym
) == 0)
2630 if (sym_e
->is_branch_target
)
2631 symbol_get_frag (sym
)->tc_frag_data
.is_branch_target
= TRUE
;
2632 if (sym_e
->is_loop_target
)
2633 symbol_get_frag (sym
)->tc_frag_data
.is_loop_target
= TRUE
;
2639 /* Various Other Internal Functions. */
2642 is_unique_insn_expansion (r
)
2645 if (!r
->to_instr
|| r
->to_instr
->next
!= NULL
)
2647 if (r
->to_instr
->typ
!= INSTR_INSTR
)
2654 xg_get_insn_size (insn
)
2657 assert (insn
->insn_type
== ITYPE_INSN
);
2658 return xtensa_insn_length (xtensa_default_isa
, insn
->opcode
);
2663 xg_get_build_instr_size (insn
)
2666 assert (insn
->typ
== INSTR_INSTR
);
2667 return xtensa_insn_length (xtensa_default_isa
, insn
->opcode
);
2672 xg_is_narrow_insn (insn
)
2675 TransitionTable
*table
= xg_build_widen_table ();
2678 assert (insn
->insn_type
== ITYPE_INSN
);
2679 assert (insn
->opcode
< table
->num_opcodes
);
2681 for (l
= table
->table
[insn
->opcode
]; l
!= NULL
; l
= l
->next
)
2683 TransitionRule
*rule
= l
->rule
;
2685 if (xg_instruction_matches_rule (insn
, rule
)
2686 && is_unique_insn_expansion (rule
))
2688 /* It only generates one instruction... */
2689 assert (insn
->insn_type
== ITYPE_INSN
);
2690 /* ...and it is a larger instruction. */
2691 if (xg_get_insn_size (insn
)
2692 < xg_get_build_instr_size (rule
->to_instr
))
2700 return (num_match
== 1);
2705 xg_is_single_relaxable_insn (insn
)
2708 TransitionTable
*table
= xg_build_widen_table ();
2711 assert (insn
->insn_type
== ITYPE_INSN
);
2712 assert (insn
->opcode
< table
->num_opcodes
);
2714 for (l
= table
->table
[insn
->opcode
]; l
!= NULL
; l
= l
->next
)
2716 TransitionRule
*rule
= l
->rule
;
2718 if (xg_instruction_matches_rule (insn
, rule
)
2719 && is_unique_insn_expansion (rule
))
2721 assert (insn
->insn_type
== ITYPE_INSN
);
2722 /* ... and it is a larger instruction. */
2723 if (xg_get_insn_size (insn
)
2724 <= xg_get_build_instr_size (rule
->to_instr
))
2732 return (num_match
== 1);
2736 /* Return the largest size instruction that this instruction can
2737 expand to. Currently, in all cases, this is 3 bytes. Of course we
2738 could just calculate this once and generate a table. */
2741 xg_get_max_narrow_insn_size (opcode
)
2742 xtensa_opcode opcode
;
2744 /* Go ahead and compute it, but it better be 3. */
2745 TransitionTable
*table
= xg_build_widen_table ();
2747 int old_size
= xtensa_insn_length (xtensa_default_isa
, opcode
);
2748 assert (opcode
< table
->num_opcodes
);
2750 /* Actually we can do better. Check to see of Only one applies. */
2751 for (l
= table
->table
[opcode
]; l
!= NULL
; l
= l
->next
)
2753 TransitionRule
*rule
= l
->rule
;
2755 /* If it only generates one instruction. */
2756 if (is_unique_insn_expansion (rule
))
2758 int new_size
= xtensa_insn_length (xtensa_default_isa
,
2759 rule
->to_instr
->opcode
);
2760 if (new_size
> old_size
)
2762 assert (new_size
== 3);
2771 /* Return the maximum number of bytes this opcode can expand to. */
2774 xg_get_max_insn_widen_size (opcode
)
2775 xtensa_opcode opcode
;
2777 TransitionTable
*table
= xg_build_widen_table ();
2779 int max_size
= xtensa_insn_length (xtensa_default_isa
, opcode
);
2781 assert (opcode
< table
->num_opcodes
);
2783 for (l
= table
->table
[opcode
]; l
!= NULL
; l
= l
->next
)
2785 TransitionRule
*rule
= l
->rule
;
2786 BuildInstr
*build_list
;
2791 build_list
= rule
->to_instr
;
2792 if (is_unique_insn_expansion (rule
))
2794 assert (build_list
->typ
== INSTR_INSTR
);
2795 this_size
= xg_get_max_insn_widen_size (build_list
->opcode
);
2798 for (; build_list
!= NULL
; build_list
= build_list
->next
)
2800 switch (build_list
->typ
)
2803 this_size
+= xtensa_insn_length (xtensa_default_isa
,
2804 build_list
->opcode
);
2807 case INSTR_LITERAL_DEF
:
2808 case INSTR_LABEL_DEF
:
2813 if (this_size
> max_size
)
2814 max_size
= this_size
;
2820 /* Return the maximum number of literal bytes this opcode can generate. */
2823 xg_get_max_insn_widen_literal_size (opcode
)
2824 xtensa_opcode opcode
;
2826 TransitionTable
*table
= xg_build_widen_table ();
2830 assert (opcode
< table
->num_opcodes
);
2832 for (l
= table
->table
[opcode
]; l
!= NULL
; l
= l
->next
)
2834 TransitionRule
*rule
= l
->rule
;
2835 BuildInstr
*build_list
;
2840 build_list
= rule
->to_instr
;
2841 if (is_unique_insn_expansion (rule
))
2843 assert (build_list
->typ
== INSTR_INSTR
);
2844 this_size
= xg_get_max_insn_widen_literal_size (build_list
->opcode
);
2847 for (; build_list
!= NULL
; build_list
= build_list
->next
)
2849 switch (build_list
->typ
)
2851 case INSTR_LITERAL_DEF
:
2852 /* hard coded 4-byte literal. */
2856 case INSTR_LABEL_DEF
:
2861 if (this_size
> max_size
)
2862 max_size
= this_size
;
2869 xg_is_relaxable_insn (insn
, lateral_steps
)
2873 int steps_taken
= 0;
2874 TransitionTable
*table
= xg_build_widen_table ();
2877 assert (insn
->insn_type
== ITYPE_INSN
);
2878 assert (insn
->opcode
< table
->num_opcodes
);
2880 for (l
= table
->table
[insn
->opcode
]; l
!= NULL
; l
= l
->next
)
2882 TransitionRule
*rule
= l
->rule
;
2884 if (xg_instruction_matches_rule (insn
, rule
))
2886 if (steps_taken
== lateral_steps
)
2896 get_special_literal_symbol ()
2898 static symbolS
*sym
= NULL
;
2901 sym
= symbol_find_or_make ("SPECIAL_LITERAL0\001");
2907 get_special_label_symbol ()
2909 static symbolS
*sym
= NULL
;
2912 sym
= symbol_find_or_make ("SPECIAL_LABEL0\001");
2917 /* Return true on success. */
2920 xg_build_to_insn (targ
, insn
, bi
)
2928 memset (targ
, 0, sizeof (TInsn
));
2933 targ
->opcode
= bi
->opcode
;
2934 targ
->insn_type
= ITYPE_INSN
;
2935 targ
->is_specific_opcode
= FALSE
;
2937 for (; op
!= NULL
; op
= op
->next
)
2939 int op_num
= op
->op_num
;
2940 int op_data
= op
->op_data
;
2942 assert (op
->op_num
< MAX_INSN_ARGS
);
2944 if (targ
->ntok
<= op_num
)
2945 targ
->ntok
= op_num
+ 1;
2950 set_expr_const (&targ
->tok
[op_num
], op_data
);
2953 assert (op_data
< insn
->ntok
);
2954 copy_expr (&targ
->tok
[op_num
], &insn
->tok
[op_data
]);
2957 sym
= get_special_literal_symbol ();
2958 set_expr_symbol_offset (&targ
->tok
[op_num
], sym
, 0);
2961 sym
= get_special_label_symbol ();
2962 set_expr_symbol_offset (&targ
->tok
[op_num
], sym
, 0);
2965 /* currently handles:
2968 OP_OPERAND_F32MINUS */
2969 if (xg_has_userdef_op_fn (op
->typ
))
2971 assert (op_data
< insn
->ntok
);
2972 if (expr_is_const (&insn
->tok
[op_data
]))
2975 copy_expr (&targ
->tok
[op_num
], &insn
->tok
[op_data
]);
2976 val
= xg_apply_userdef_op_fn (op
->typ
,
2979 targ
->tok
[op_num
].X_add_number
= val
;
2982 return FALSE
; /* We cannot use a relocation for this. */
2991 case INSTR_LITERAL_DEF
:
2993 targ
->opcode
= XTENSA_UNDEFINED
;
2994 targ
->insn_type
= ITYPE_LITERAL
;
2995 targ
->is_specific_opcode
= FALSE
;
2996 for (; op
!= NULL
; op
= op
->next
)
2998 int op_num
= op
->op_num
;
2999 int op_data
= op
->op_data
;
3000 assert (op
->op_num
< MAX_INSN_ARGS
);
3002 if (targ
->ntok
<= op_num
)
3003 targ
->ntok
= op_num
+ 1;
3008 assert (op_data
< insn
->ntok
);
3009 copy_expr (&targ
->tok
[op_num
], &insn
->tok
[op_data
]);
3021 case INSTR_LABEL_DEF
:
3023 targ
->opcode
= XTENSA_UNDEFINED
;
3024 targ
->insn_type
= ITYPE_LABEL
;
3025 targ
->is_specific_opcode
= FALSE
;
3026 /* Literal with no ops. is a label? */
3027 assert (op
== NULL
);
3038 /* Return true on success. */
3041 xg_build_to_stack (istack
, insn
, bi
)
3046 for (; bi
!= NULL
; bi
= bi
->next
)
3048 TInsn
*next_insn
= istack_push_space (istack
);
3050 if (!xg_build_to_insn (next_insn
, insn
, bi
))
3057 /* Return true on valid expansion. */
3060 xg_expand_to_stack (istack
, insn
, lateral_steps
)
3065 int stack_size
= istack
->ninsn
;
3066 int steps_taken
= 0;
3067 TransitionTable
*table
= xg_build_widen_table ();
3070 assert (insn
->insn_type
== ITYPE_INSN
);
3071 assert (insn
->opcode
< table
->num_opcodes
);
3073 for (l
= table
->table
[insn
->opcode
]; l
!= NULL
; l
= l
->next
)
3075 TransitionRule
*rule
= l
->rule
;
3077 if (xg_instruction_matches_rule (insn
, rule
))
3079 if (lateral_steps
== steps_taken
)
3083 /* This is it. Expand the rule to the stack. */
3084 if (!xg_build_to_stack (istack
, insn
, rule
->to_instr
))
3087 /* Check to see if it fits. */
3088 for (i
= stack_size
; i
< istack
->ninsn
; i
++)
3090 TInsn
*insn
= &istack
->insn
[i
];
3092 if (insn
->insn_type
== ITYPE_INSN
3093 && !tinsn_has_symbolic_operands (insn
)
3094 && !xg_immeds_fit (insn
))
3096 istack
->ninsn
= stack_size
;
3110 xg_expand_narrow (targ
, insn
)
3114 TransitionTable
*table
= xg_build_widen_table ();
3117 assert (insn
->insn_type
== ITYPE_INSN
);
3118 assert (insn
->opcode
< table
->num_opcodes
);
3120 for (l
= table
->table
[insn
->opcode
]; l
!= NULL
; l
= l
->next
)
3122 TransitionRule
*rule
= l
->rule
;
3123 if (xg_instruction_matches_rule (insn
, rule
)
3124 && is_unique_insn_expansion (rule
))
3126 /* Is it a larger instruction? */
3127 if (xg_get_insn_size (insn
)
3128 <= xg_get_build_instr_size (rule
->to_instr
))
3130 xg_build_to_insn (targ
, insn
, rule
->to_instr
);
3139 /* Assumes: All immeds are constants. Check that all constants fit
3140 into their immeds; return false if not. */
3143 xg_immeds_fit (insn
)
3149 assert (insn
->insn_type
== ITYPE_INSN
);
3150 for (i
= 0; i
< n
; ++i
)
3152 const expressionS
*expr
= &insn
->tok
[i
];
3153 xtensa_operand opnd
= xtensa_get_operand (xtensa_default_isa
,
3155 if (!operand_is_immed (opnd
))
3163 if (xg_check_operand (expr
->X_add_number
, opnd
))
3168 /* The symbol should have a fixup associated with it. */
3177 /* This should only be called after we have an initial
3178 estimate of the addresses. */
3181 xg_symbolic_immeds_fit (insn
, pc_seg
, pc_frag
, pc_offset
, stretch
)
3189 offsetT target
, pc
, new_offset
;
3193 assert (insn
->insn_type
== ITYPE_INSN
);
3195 for (i
= 0; i
< n
; ++i
)
3197 const expressionS
*expr
= &insn
->tok
[i
];
3198 xtensa_operand opnd
= xtensa_get_operand (xtensa_default_isa
,
3200 if (!operand_is_immed (opnd
))
3207 if (xg_check_operand (expr
->X_add_number
, opnd
))
3212 /* We only allow symbols for pc-relative stuff.
3213 If pc_frag == 0, then we don't have frag locations yet. */
3217 /* If it is PC-relative and the symbol is in the same segment as
3219 if (!xtensa_operand_isPCRelative (opnd
)
3220 || S_GET_SEGMENT (expr
->X_add_symbol
) != pc_seg
)
3223 symbolP
= expr
->X_add_symbol
;
3224 target
= S_GET_VALUE (symbolP
) + expr
->X_add_number
;
3225 pc
= pc_frag
->fr_address
+ pc_offset
;
3227 /* If frag has yet to be reached on this pass, assume it
3228 will move by STRETCH just as we did. If this is not so,
3229 it will be because some frag between grows, and that will
3230 force another pass. Beware zero-length frags. There
3231 should be a faster way to do this. */
3233 if (stretch
&& is_dnrange (pc_frag
, symbolP
, stretch
))
3236 new_offset
= xtensa_operand_do_reloc (opnd
, target
, pc
);
3237 if (xg_check_operand (new_offset
, opnd
))
3242 /* The symbol should have a fixup associated with it. */
3251 /* This will check to see if the value can be converted into the
3252 operand type. It will return true if it does not fit. */
3255 xg_check_operand (value
, operand
)
3257 xtensa_operand operand
;
3259 uint32 valbuf
= value
;
3260 return (xtensa_operand_encode (operand
, &valbuf
) != xtensa_encode_result_ok
);
3264 /* Check if a symbol is pointing to somewhere after
3265 the start frag, given that the segment has stretched
3266 by stretch during relaxation.
3268 This is more complicated than it might appear at first blush
3269 because of the stretching that goes on. Here is how the check
3272 If the symbol and the frag are in the same segment, then
3273 the symbol could be down range. Note that this function
3274 assumes that start_frag is in now_seg.
3276 If the symbol is pointing to a frag with an address greater than
3277 than the start_frag's address, then it _could_ be down range.
3279 The problem comes because target_frag may or may not have had
3280 stretch bytes added to its address already, depending on if it is
3281 before or after start frag. (And if we knew that, then we wouldn't
3282 need this function.) start_frag has definitely already had stretch
3283 bytes added to its address.
3285 If target_frag's address hasn't been adjusted yet, then to
3286 determine if it comes after start_frag, we need to subtract
3287 stretch from start_frag's address.
3289 If target_frag's address has been adjusted, then it might have
3290 been adjusted such that it comes after start_frag's address minus
3293 So, in that case, we scan for it down stream to within
3294 stretch bytes. We could search to the end of the fr_chain, but
3295 that ends up taking too much time (over a minute on some gnu
3299 is_dnrange (start_frag
, sym
, stretch
)
3304 if (S_GET_SEGMENT (sym
) == now_seg
)
3306 fragS
*cur_frag
= symbol_get_frag (sym
);
3308 if (cur_frag
->fr_address
>= start_frag
->fr_address
- stretch
)
3310 int distance
= stretch
;
3312 while (cur_frag
&& distance
>= 0)
3314 distance
-= cur_frag
->fr_fix
;
3315 if (cur_frag
== start_frag
)
3317 cur_frag
= cur_frag
->fr_next
;
3326 /* Relax the assembly instruction at least "min_steps".
3327 Return the number of steps taken. */
3330 xg_assembly_relax (istack
, insn
, pc_seg
, pc_frag
, pc_offset
, min_steps
,
3335 fragS
*pc_frag
; /* If pc_frag == 0, then no pc-relative. */
3336 offsetT pc_offset
; /* Offset in fragment. */
3337 int min_steps
; /* Minimum number of conversion steps. */
3338 long stretch
; /* Number of bytes stretched so far. */
3340 int steps_taken
= 0;
3342 /* assert (has no symbolic operands)
3343 Some of its immeds don't fit.
3344 Try to build a relaxed version.
3345 This may go through a couple of stages
3346 of single instruction transformations before
3349 TInsn single_target
;
3351 int lateral_steps
= 0;
3352 int istack_size
= istack
->ninsn
;
3354 if (xg_symbolic_immeds_fit (insn
, pc_seg
, pc_frag
, pc_offset
, stretch
)
3355 && steps_taken
>= min_steps
)
3357 istack_push (istack
, insn
);
3360 tinsn_copy (¤t_insn
, insn
);
3362 /* Walk through all of the single instruction expansions. */
3363 while (xg_is_single_relaxable_insn (¤t_insn
))
3365 int error_val
= xg_expand_narrow (&single_target
, ¤t_insn
);
3367 assert (!error_val
);
3369 if (xg_symbolic_immeds_fit (&single_target
, pc_seg
, pc_frag
, pc_offset
,
3373 if (steps_taken
>= min_steps
)
3375 istack_push (istack
, &single_target
);
3379 tinsn_copy (¤t_insn
, &single_target
);
3382 /* Now check for a multi-instruction expansion. */
3383 while (xg_is_relaxable_insn (¤t_insn
, lateral_steps
))
3385 if (xg_symbolic_immeds_fit (¤t_insn
, pc_seg
, pc_frag
, pc_offset
,
3388 if (steps_taken
>= min_steps
)
3390 istack_push (istack
, ¤t_insn
);
3395 if (xg_expand_to_stack (istack
, ¤t_insn
, lateral_steps
))
3397 if (steps_taken
>= min_steps
)
3401 istack
->ninsn
= istack_size
;
3404 /* It's not going to work -- use the original. */
3405 istack_push (istack
, insn
);
3411 xg_force_frag_space (size
)
3414 /* This may have the side effect of creating a new fragment for the
3415 space to go into. I just do not like the name of the "frag"
3422 xg_finish_frag (last_insn
, state
, max_growth
, is_insn
)
3424 enum xtensa_relax_statesE state
;
3426 bfd_boolean is_insn
;
3428 /* Finish off this fragment so that it has at LEAST the desired
3429 max_growth. If it doesn't fit in this fragment, close this one
3430 and start a new one. In either case, return a pointer to the
3431 beginning of the growth area. */
3434 xg_force_frag_space (max_growth
);
3436 old_frag
= frag_now
;
3438 frag_now
->fr_opcode
= last_insn
;
3440 frag_now
->tc_frag_data
.is_insn
= TRUE
;
3442 frag_var (rs_machine_dependent
, max_growth
, max_growth
,
3443 state
, frag_now
->fr_symbol
, frag_now
->fr_offset
, last_insn
);
3445 /* Just to make sure that we did not split it up. */
3446 assert (old_frag
->fr_next
== frag_now
);
3451 is_branch_jmp_to_next (insn
, fragP
)
3455 xtensa_isa isa
= xtensa_default_isa
;
3457 int num_ops
= xtensa_num_operands (isa
, insn
->opcode
);
3462 if (is_loop_opcode (insn
->opcode
))
3465 for (i
= 0; i
< num_ops
; i
++)
3467 xtensa_operand opnd
= xtensa_get_operand (isa
, insn
->opcode
, i
);
3468 char *kind
= xtensa_operand_kind (opnd
);
3469 if (strlen (kind
) == 1 && *kind
== 'l')
3475 if (target_op
== -1)
3478 if (insn
->ntok
<= target_op
)
3481 if (insn
->tok
[target_op
].X_op
!= O_symbol
)
3484 sym
= insn
->tok
[target_op
].X_add_symbol
;
3488 if (insn
->tok
[target_op
].X_add_number
!= 0)
3491 target_frag
= symbol_get_frag (sym
);
3492 if (target_frag
== NULL
)
3495 if (is_next_frag_target (fragP
->fr_next
, target_frag
)
3496 && S_GET_VALUE (sym
) == target_frag
->fr_address
)
3504 xg_add_branch_and_loop_targets (insn
)
3507 xtensa_isa isa
= xtensa_default_isa
;
3508 int num_ops
= xtensa_num_operands (isa
, insn
->opcode
);
3510 if (is_loop_opcode (insn
->opcode
))
3513 xtensa_operand opnd
= xtensa_get_operand (isa
, insn
->opcode
, i
);
3514 char *kind
= xtensa_operand_kind (opnd
);
3515 if (strlen (kind
) == 1 && *kind
== 'l')
3516 if (insn
->tok
[i
].X_op
== O_symbol
)
3517 add_target_symbol (insn
->tok
[i
].X_add_symbol
, TRUE
);
3521 /* Currently, we do not add branch targets. This is an optimization
3522 for later that tries to align only branch targets, not just any
3523 label in a text section. */
3525 if (align_only_targets
)
3529 for (i
= 0; i
< insn
->ntok
&& i
< num_ops
; i
++)
3531 xtensa_operand opnd
= xtensa_get_operand (isa
, insn
->opcode
, i
);
3532 char *kind
= xtensa_operand_kind (opnd
);
3533 if (strlen (kind
) == 1 && *kind
== 'l'
3534 && insn
->tok
[i
].X_op
== O_symbol
)
3535 add_target_symbol (insn
->tok
[i
].X_add_symbol
, FALSE
);
3541 /* Return the transition rule that matches or NULL if none matches. */
3544 xg_instruction_matches_rule (insn
, rule
)
3546 TransitionRule
*rule
;
3548 PreconditionList
*condition_l
;
3550 if (rule
->opcode
!= insn
->opcode
)
3553 for (condition_l
= rule
->conditions
;
3554 condition_l
!= NULL
;
3555 condition_l
= condition_l
->next
)
3559 Precondition
*cond
= condition_l
->precond
;
3564 /* The expression must be the constant. */
3565 assert (cond
->op_num
< insn
->ntok
);
3566 exp1
= &insn
->tok
[cond
->op_num
];
3567 if (!expr_is_const (exp1
))
3572 if (get_expr_const (exp1
) != cond
->op_data
)
3576 if (get_expr_const (exp1
) == cond
->op_data
)
3583 assert (cond
->op_num
< insn
->ntok
);
3584 assert (cond
->op_data
< insn
->ntok
);
3585 exp1
= &insn
->tok
[cond
->op_num
];
3586 exp2
= &insn
->tok
[cond
->op_data
];
3591 if (!expr_is_equal (exp1
, exp2
))
3595 if (expr_is_equal (exp1
, exp2
))
3612 xg_instruction_match (insn
)
3615 TransitionTable
*table
= xg_build_simplify_table ();
3617 assert (insn
->opcode
< table
->num_opcodes
);
3619 /* Walk through all of the possible transitions. */
3620 for (l
= table
->table
[insn
->opcode
]; l
!= NULL
; l
= l
->next
)
3622 TransitionRule
*rule
= l
->rule
;
3623 if (xg_instruction_matches_rule (insn
, rule
))
3630 /* Return false if no error. */
3633 xg_build_token_insn (instr_spec
, old_insn
, new_insn
)
3634 BuildInstr
*instr_spec
;
3641 switch (instr_spec
->typ
)
3644 new_insn
->insn_type
= ITYPE_INSN
;
3645 new_insn
->opcode
= instr_spec
->opcode
;
3646 new_insn
->is_specific_opcode
= FALSE
;
3648 case INSTR_LITERAL_DEF
:
3649 new_insn
->insn_type
= ITYPE_LITERAL
;
3650 new_insn
->opcode
= XTENSA_UNDEFINED
;
3651 new_insn
->is_specific_opcode
= FALSE
;
3653 case INSTR_LABEL_DEF
:
3654 as_bad (_("INSTR_LABEL_DEF not supported yet"));
3658 for (b_op
= instr_spec
->ops
; b_op
!= NULL
; b_op
= b_op
->next
)
3661 const expressionS
*src_exp
;
3667 /* The expression must be the constant. */
3668 assert (b_op
->op_num
< MAX_INSN_ARGS
);
3669 exp
= &new_insn
->tok
[b_op
->op_num
];
3670 set_expr_const (exp
, b_op
->op_data
);
3674 assert (b_op
->op_num
< MAX_INSN_ARGS
);
3675 assert (b_op
->op_data
< (unsigned) old_insn
->ntok
);
3676 src_exp
= &old_insn
->tok
[b_op
->op_data
];
3677 exp
= &new_insn
->tok
[b_op
->op_num
];
3678 copy_expr (exp
, src_exp
);
3683 as_bad (_("can't handle generation of literal/labels yet"));
3687 as_bad (_("can't handle undefined OP TYPE"));
3692 new_insn
->ntok
= num_ops
;
3697 /* Return true if it was simplified. */
3700 xg_simplify_insn (old_insn
, new_insn
)
3704 TransitionRule
*rule
= xg_instruction_match (old_insn
);
3705 BuildInstr
*insn_spec
;
3709 insn_spec
= rule
->to_instr
;
3710 /* There should only be one. */
3711 assert (insn_spec
!= NULL
);
3712 assert (insn_spec
->next
== NULL
);
3713 if (insn_spec
->next
!= NULL
)
3716 xg_build_token_insn (insn_spec
, old_insn
, new_insn
);
3722 /* xg_expand_assembly_insn: (1) Simplify the instruction, i.e., l32i ->
3723 l32i.n. (2) Check the number of operands. (3) Place the instruction
3724 tokens into the stack or if we can relax it at assembly time, place
3725 multiple instructions/literals onto the stack. Return false if no
3729 xg_expand_assembly_insn (istack
, orig_insn
)
3735 memset (&new_insn
, 0, sizeof (TInsn
));
3737 /* On return, we will be using the "use_tokens" with "use_ntok".
3738 This will reduce things like addi to addi.n. */
3739 if (code_density_available () && !orig_insn
->is_specific_opcode
)
3741 if (xg_simplify_insn (orig_insn
, &new_insn
))
3742 orig_insn
= &new_insn
;
3745 noperands
= xtensa_num_operands (xtensa_default_isa
, orig_insn
->opcode
);
3746 if (orig_insn
->ntok
< noperands
)
3748 as_bad (_("found %d operands for '%s': Expected %d"),
3750 xtensa_opcode_name (xtensa_default_isa
, orig_insn
->opcode
),
3754 if (orig_insn
->ntok
> noperands
)
3755 as_warn (_("found too many (%d) operands for '%s': Expected %d"),
3757 xtensa_opcode_name (xtensa_default_isa
, orig_insn
->opcode
),
3760 /* If there are not enough operands, we will assert above. If there
3761 are too many, just cut out the extras here. */
3763 orig_insn
->ntok
= noperands
;
3767 Instructions with all constant immeds:
3768 Assemble them and relax the instruction if possible.
3769 Give error if not possible; no fixup needed.
3771 Instructions with symbolic immeds:
3772 Assemble them with a Fix up (that may cause instruction expansion).
3773 Also close out the fragment if the fixup may cause instruction expansion.
3775 There are some other special cases where we need alignment.
3776 1) before certain instructions with required alignment (OPCODE_ALIGN)
3777 2) before labels that have jumps (LABEL_ALIGN)
3778 3) after call instructions (RETURN_ALIGN)
3779 Multiple of these may be possible on the same fragment.
3780 If so, make sure to satisfy the required alignment.
3781 Then try to get the desired alignment. */
3783 if (tinsn_has_invalid_symbolic_operands (orig_insn
))
3786 if (orig_insn
->is_specific_opcode
|| !can_relax ())
3788 istack_push (istack
, orig_insn
);
3792 if (tinsn_has_symbolic_operands (orig_insn
))
3794 if (tinsn_has_complex_operands (orig_insn
))
3795 xg_assembly_relax (istack
, orig_insn
, 0, 0, 0, 0, 0);
3797 istack_push (istack
, orig_insn
);
3801 if (xg_immeds_fit (orig_insn
))
3802 istack_push (istack
, orig_insn
);
3804 xg_assembly_relax (istack
, orig_insn
, 0, 0, 0, 0, 0);
3808 for (i
= 0; i
< istack
->ninsn
; i
++)
3810 if (xg_simplify_insn (&new_insn
, &istack
->insn
[i
]))
3811 istack
->insn
[i
] = new_insn
;
3819 /* Currently all literals that are generated here are 32-bit L32R targets. */
3822 xg_assemble_literal (insn
)
3823 /* const */ TInsn
*insn
;
3826 symbolS
*lit_sym
= NULL
;
3828 /* size = 4 for L32R. It could easily be larger when we move to
3829 larger constants. Add a parameter later. */
3830 offsetT litsize
= 4;
3831 offsetT litalign
= 2; /* 2^2 = 4 */
3832 expressionS saved_loc
;
3833 set_expr_symbol_offset (&saved_loc
, frag_now
->fr_symbol
, frag_now_fix ());
3835 assert (insn
->insn_type
== ITYPE_LITERAL
);
3836 assert (insn
->ntok
= 1); /* must be only one token here */
3838 xtensa_switch_to_literal_fragment (&state
);
3840 /* Force a 4-byte align here. Note that this opens a new frag, so all
3841 literals done with this function have a frag to themselves. That's
3842 important for the way text section literals work. */
3843 frag_align (litalign
, 0, 0);
3845 emit_expr (&insn
->tok
[0], litsize
);
3847 assert (frag_now
->tc_frag_data
.literal_frag
== NULL
);
3848 frag_now
->tc_frag_data
.literal_frag
= get_literal_pool_location (now_seg
);
3849 frag_now
->fr_symbol
= xtensa_create_literal_symbol (now_seg
, frag_now
);
3850 lit_sym
= frag_now
->fr_symbol
;
3851 frag_now
->tc_frag_data
.is_literal
= TRUE
;
3854 xtensa_restore_emit_state (&state
);
3860 xg_assemble_literal_space (size
)
3861 /* const */ int size
;
3864 /* We might have to do something about this alignment. It only
3865 takes effect if something is placed here. */
3866 offsetT litalign
= 2; /* 2^2 = 4 */
3867 fragS
*lit_saved_frag
;
3869 expressionS saved_loc
;
3871 assert (size
% 4 == 0);
3872 set_expr_symbol_offset (&saved_loc
, frag_now
->fr_symbol
, frag_now_fix ());
3874 xtensa_switch_to_literal_fragment (&state
);
3876 /* Force a 4-byte align here. */
3877 frag_align (litalign
, 0, 0);
3879 xg_force_frag_space (size
);
3881 lit_saved_frag
= frag_now
;
3882 frag_now
->tc_frag_data
.literal_frag
= get_literal_pool_location (now_seg
);
3883 frag_now
->tc_frag_data
.is_literal
= TRUE
;
3884 frag_now
->fr_symbol
= xtensa_create_literal_symbol (now_seg
, frag_now
);
3885 xg_finish_frag (0, RELAX_LITERAL
, size
, FALSE
);
3888 xtensa_restore_emit_state (&state
);
3889 frag_now
->tc_frag_data
.literal_frag
= lit_saved_frag
;
3894 xtensa_create_literal_symbol (sec
, frag
)
3898 static int lit_num
= 0;
3899 static char name
[256];
3902 sprintf (name
, ".L_lit_sym%d", lit_num
);
3904 /* Create a local symbol. If it is in a linkonce section, we have to
3905 be careful to make sure that if it is used in a relocation that the
3906 symbol will be in the output file. */
3907 if (get_is_linkonce_section (stdoutput
, sec
))
3909 symbolP
= symbol_new (name
, sec
, 0, frag
);
3910 S_CLEAR_EXTERNAL (symbolP
);
3911 /* symbolP->local = 1; */
3914 symbolP
= symbol_new (name
, sec
, 0, frag
);
3916 frag
->tc_frag_data
.is_literal
= TRUE
;
3922 /* Return true if the section flags are marked linkonce
3923 or the name is .gnu.linkonce*. */
3926 get_is_linkonce_section (abfd
, sec
)
3927 bfd
*abfd ATTRIBUTE_UNUSED
;
3930 flagword flags
, link_once_flags
;
3932 flags
= bfd_get_section_flags (abfd
, sec
);
3933 link_once_flags
= (flags
& SEC_LINK_ONCE
);
3935 /* Flags might not be set yet. */
3936 if (!link_once_flags
)
3938 static size_t len
= sizeof ".gnu.linkonce.t.";
3940 if (strncmp (segment_name (sec
), ".gnu.linkonce.t.", len
- 1) == 0)
3941 link_once_flags
= SEC_LINK_ONCE
;
3943 return (link_once_flags
!= 0);
3947 /* Emit an instruction to the current fragment. If record_fix is true,
3948 then this instruction will not change and we can go ahead and record
3949 the fixup. If record_fix is false, then the instruction may change
3950 and we are going to close out this fragment. Go ahead and set the
3951 fr_symbol and fr_offset instead of adding a fixup. */
3954 xg_emit_insn (t_insn
, record_fix
)
3956 bfd_boolean record_fix
;
3958 bfd_boolean ok
= TRUE
;
3959 xtensa_isa isa
= xtensa_default_isa
;
3960 xtensa_opcode opcode
= t_insn
->opcode
;
3961 bfd_boolean has_fixup
= FALSE
;
3967 static xtensa_insnbuf insnbuf
= NULL
;
3969 /* Use a static pointer to the insn buffer so we don't have to call
3970 malloc each time through. */
3972 insnbuf
= xtensa_insnbuf_alloc (xtensa_default_isa
);
3974 has_fixup
= tinsn_to_insnbuf (t_insn
, insnbuf
);
3976 noperands
= xtensa_num_operands (isa
, opcode
);
3977 assert (noperands
== t_insn
->ntok
);
3979 byte_count
= xtensa_insn_length (isa
, opcode
);
3981 /* This should NEVER cause us to jump into a new frag;
3982 we've already reserved space. */
3983 old_size
= frag_now_fix ();
3984 f
= frag_more (byte_count
);
3985 assert (oldfrag
== frag_now
);
3987 /* This needs to generate a record that lists the parts that are
3989 if (!frag_now
->tc_frag_data
.is_insn
)
3991 /* If we are at the beginning of a fragment, switch this
3992 fragment to an instruction fragment. */
3993 if (now_seg
!= absolute_section
&& old_size
!= 0)
3994 as_warn (_("instruction fragment may contain data"));
3995 frag_now
->tc_frag_data
.is_insn
= TRUE
;
3998 xtensa_insnbuf_to_chars (isa
, insnbuf
, f
);
4000 /* Now spit out the opcode fixup.... */
4004 for (i
= 0; i
< noperands
; ++i
)
4006 expressionS
*expr
= &t_insn
->tok
[i
];
4010 if (get_relaxable_immed (opcode
) == i
)
4014 if (!xg_add_opcode_fix (opcode
, i
, expr
, frag_now
,
4015 f
- frag_now
->fr_literal
))
4020 /* Write it to the fr_offset, fr_symbol. */
4021 frag_now
->fr_symbol
= expr
->X_add_symbol
;
4022 frag_now
->fr_offset
= expr
->X_add_number
;
4027 as_bad (_("invalid operand %d on '%s'"),
4028 i
, xtensa_opcode_name (isa
, opcode
));
4038 as_bad (_("invalid expression for operand %d on '%s'"),
4039 i
, xtensa_opcode_name (isa
, opcode
));
4050 xg_emit_insn_to_buf (t_insn
, buf
, fragP
, offset
, build_fix
)
4055 bfd_boolean build_fix
;
4057 static xtensa_insnbuf insnbuf
= NULL
;
4058 bfd_boolean has_symbolic_immed
= FALSE
;
4059 bfd_boolean ok
= TRUE
;
4061 insnbuf
= xtensa_insnbuf_alloc (xtensa_default_isa
);
4063 has_symbolic_immed
= tinsn_to_insnbuf (t_insn
, insnbuf
);
4064 if (has_symbolic_immed
&& build_fix
)
4067 int opnum
= get_relaxable_immed (t_insn
->opcode
);
4068 expressionS
*exp
= &t_insn
->tok
[opnum
];
4070 if (!xg_add_opcode_fix (t_insn
->opcode
,
4071 opnum
, exp
, fragP
, offset
))
4074 fragP
->tc_frag_data
.is_insn
= TRUE
;
4075 xtensa_insnbuf_to_chars (xtensa_default_isa
, insnbuf
, buf
);
4080 /* Put in a fixup record based on the opcode.
4081 Return true on success. */
4084 xg_add_opcode_fix (opcode
, opnum
, expr
, fragP
, offset
)
4085 xtensa_opcode opcode
;
4091 bfd_reloc_code_real_type reloc
;
4092 reloc_howto_type
*howto
;
4096 reloc
= opnum_to_reloc (opnum
);
4097 if (reloc
== BFD_RELOC_NONE
)
4099 as_bad (_("invalid relocation operand %i on '%s'"),
4100 opnum
, xtensa_opcode_name (xtensa_default_isa
, opcode
));
4104 howto
= bfd_reloc_type_lookup (stdoutput
, reloc
);
4108 as_bad (_("undefined symbol for opcode \"%s\"."),
4109 xtensa_opcode_name (xtensa_default_isa
, opcode
));
4113 insn_length
= xtensa_insn_length (xtensa_default_isa
, opcode
);
4114 the_fix
= fix_new_exp (fragP
, offset
, insn_length
, expr
,
4115 howto
->pc_relative
, reloc
);
4117 if (expr
->X_add_symbol
&&
4118 (S_IS_EXTERNAL (expr
->X_add_symbol
) || S_IS_WEAK (expr
->X_add_symbol
)))
4119 the_fix
->fx_plt
= TRUE
;
4126 xg_resolve_literals (insn
, lit_sym
)
4130 symbolS
*sym
= get_special_literal_symbol ();
4134 assert (insn
->insn_type
== ITYPE_INSN
);
4135 for (i
= 0; i
< insn
->ntok
; i
++)
4136 if (insn
->tok
[i
].X_add_symbol
== sym
)
4137 insn
->tok
[i
].X_add_symbol
= lit_sym
;
4143 xg_resolve_labels (insn
, label_sym
)
4147 symbolS
*sym
= get_special_label_symbol ();
4149 /* assert(!insn->is_literal); */
4150 for (i
= 0; i
< insn
->ntok
; i
++)
4151 if (insn
->tok
[i
].X_add_symbol
== sym
)
4152 insn
->tok
[i
].X_add_symbol
= label_sym
;
4158 xg_assemble_tokens (insn
)
4159 /*const */ TInsn
*insn
;
4161 /* By the time we get here, there's not too much left to do.
4162 1) Check our assumptions.
4163 2) Check if the current instruction is "narrow".
4164 If so, then finish the frag, create another one.
4165 We could also go back to change some previous
4166 "narrow" frags into no-change ones if we have more than
4167 MAX_NARROW_ALIGNMENT of them without alignment restrictions
4171 1) It has constant operands and doesn't fit.
4172 Go ahead and assemble it so it will fail.
4173 2) It has constant operands that fit.
4174 If narrow and !is_specific_opcode,
4175 assemble it and put in a relocation
4178 3) It has a symbolic immediate operand
4179 a) Find the worst-case relaxation required
4180 b) Find the worst-case literal pool space required.
4181 Insert appropriate alignment & space in the literal.
4183 Add the relocation. */
4185 assert (insn
->insn_type
== ITYPE_INSN
);
4187 if (!tinsn_has_symbolic_operands (insn
))
4189 if (xg_is_narrow_insn (insn
) && !insn
->is_specific_opcode
)
4191 /* assemble it but add max required space */
4192 int max_size
= xg_get_max_narrow_insn_size (insn
->opcode
);
4193 int min_size
= xg_get_insn_size (insn
);
4195 assert (max_size
== 3);
4196 /* make sure we have enough space to widen it */
4197 xg_force_frag_space (max_size
);
4198 /* Output the instruction. It may cause an error if some
4199 operands do not fit. */
4200 last_insn
= frag_more (0);
4201 if (xg_emit_insn (insn
, TRUE
))
4202 as_warn (_("instruction with constant operands does not fit"));
4203 xg_finish_frag (last_insn
, RELAX_NARROW
, max_size
- min_size
, TRUE
);
4207 /* Assemble it. No relocation needed. */
4208 int max_size
= xg_get_insn_size (insn
);
4209 xg_force_frag_space (max_size
);
4210 if (xg_emit_insn (insn
, FALSE
))
4211 as_warn (_("instruction with constant operands does not "
4212 "fit without widening"));
4213 /* frag_more (max_size); */
4215 /* Special case for jx. If the jx is the next to last
4216 instruction in a loop, we will add a NOP after it. This
4217 avoids a hardware issue that could occur if the jx jumped
4218 to the next instruction. */
4219 if (software_avoid_b_j_loop_end
4220 && is_jx_opcode (insn
->opcode
))
4222 maybe_has_b_j_loop_end
= TRUE
;
4223 /* add 2 of these */
4224 frag_now
->tc_frag_data
.is_insn
= TRUE
;
4225 frag_var (rs_machine_dependent
, 4, 4,
4226 RELAX_ADD_NOP_IF_PRE_LOOP_END
,
4227 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
4233 /* Need to assemble it with space for the relocation. */
4234 if (!insn
->is_specific_opcode
)
4236 /* Assemble it but add max required space. */
4238 int min_size
= xg_get_insn_size (insn
);
4239 int max_size
= xg_get_max_insn_widen_size (insn
->opcode
);
4240 int max_literal_size
=
4241 xg_get_max_insn_widen_literal_size (insn
->opcode
);
4244 symbolS
*immed_sym
= xg_get_insn_immed_symbol (insn
);
4245 set_frag_segment (frag_now
, now_seg
);
4248 /* Make sure we have enough space to widen the instruction.
4249 This may open a new fragment. */
4250 xg_force_frag_space (max_size
);
4251 if (max_literal_size
!= 0)
4252 xg_assemble_literal_space (max_literal_size
);
4254 /* Output the instruction. It may cause an error if some
4255 operands do not fit. Emit the incomplete instruction. */
4256 last_insn
= frag_more (0);
4257 xg_emit_insn (insn
, FALSE
);
4259 xg_finish_frag (last_insn
, RELAX_IMMED
, max_size
- min_size
, TRUE
);
4261 /* Special cases for loops:
4262 close_loop_end should be inserted AFTER short_loop.
4263 Make sure that CLOSE loops are processed BEFORE short_loops
4264 when converting them. */
4266 /* "short_loop": add a NOP if the loop is < 4 bytes. */
4267 if (software_avoid_short_loop
4268 && is_loop_opcode (insn
->opcode
))
4270 maybe_has_short_loop
= TRUE
;
4271 frag_now
->tc_frag_data
.is_insn
= TRUE
;
4272 frag_var (rs_machine_dependent
, 4, 4,
4273 RELAX_ADD_NOP_IF_SHORT_LOOP
,
4274 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
4275 frag_now
->tc_frag_data
.is_insn
= TRUE
;
4276 frag_var (rs_machine_dependent
, 4, 4,
4277 RELAX_ADD_NOP_IF_SHORT_LOOP
,
4278 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
4281 /* "close_loop_end": Add up to 12 bytes of NOPs to keep a
4282 loop at least 12 bytes away from another loop's loop
4284 if (software_avoid_close_loop_end
4285 && is_loop_opcode (insn
->opcode
))
4287 maybe_has_close_loop_end
= TRUE
;
4288 frag_now
->tc_frag_data
.is_insn
= TRUE
;
4289 frag_var (rs_machine_dependent
, 12, 12,
4290 RELAX_ADD_NOP_IF_CLOSE_LOOP_END
,
4291 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
4296 /* Assemble it in place. No expansion will be required,
4297 but we'll still need a relocation record. */
4298 int max_size
= xg_get_insn_size (insn
);
4299 xg_force_frag_space (max_size
);
4300 if (xg_emit_insn (insn
, TRUE
))
4301 as_warn (_("instruction's constant operands do not fit"));
4307 /* Return true if the instruction can write to the specified
4308 integer register. */
4311 is_register_writer (insn
, regset
, regnum
)
4318 xtensa_isa isa
= xtensa_default_isa
;
4320 num_ops
= xtensa_num_operands (isa
, insn
->opcode
);
4322 for (i
= 0; i
< num_ops
; i
++)
4324 xtensa_operand operand
= xtensa_get_operand (isa
, insn
->opcode
, i
);
4325 char inout
= xtensa_operand_inout (operand
);
4327 if (inout
== '>' || inout
== '=')
4329 if (strcmp (xtensa_operand_kind (operand
), regset
) == 0)
4331 if ((insn
->tok
[i
].X_op
== O_register
)
4332 && (insn
->tok
[i
].X_add_number
== regnum
))
4342 is_bad_loopend_opcode (tinsn
)
4343 const TInsn
* tinsn
;
4345 xtensa_opcode opcode
= tinsn
->opcode
;
4347 if (opcode
== XTENSA_UNDEFINED
)
4350 if (opcode
== xtensa_call0_opcode
4351 || opcode
== xtensa_callx0_opcode
4352 || opcode
== xtensa_call4_opcode
4353 || opcode
== xtensa_callx4_opcode
4354 || opcode
== xtensa_call8_opcode
4355 || opcode
== xtensa_callx8_opcode
4356 || opcode
== xtensa_call12_opcode
4357 || opcode
== xtensa_callx12_opcode
4358 || opcode
== xtensa_isync_opcode
4359 || opcode
== xtensa_ret_opcode
4360 || opcode
== xtensa_ret_n_opcode
4361 || opcode
== xtensa_retw_opcode
4362 || opcode
== xtensa_retw_n_opcode
4363 || opcode
== xtensa_waiti_opcode
)
4366 /* An RSR of LCOUNT is illegal as the last opcode in a loop. */
4367 if (opcode
== xtensa_rsr_opcode
4369 && tinsn
->tok
[1].X_op
== O_constant
4370 && tinsn
->tok
[1].X_add_number
== 2)
4377 /* Labels that begin with ".Ln" or ".LM" are unaligned.
4378 This allows the debugger to add unaligned labels.
4379 Also, the assembler generates stabs labels that need
4380 not be aligned: FAKE_LABEL_NAME . {"F", "L", "endfunc"}. */
4383 is_unaligned_label (sym
)
4386 const char *name
= S_GET_NAME (sym
);
4387 static size_t fake_size
= 0;
4391 && name
[1] == 'L' && (name
[2] == 'n' || name
[2] == 'M'))
4394 /* FAKE_LABEL_NAME followed by "F", "L" or "endfunc" */
4396 fake_size
= strlen (FAKE_LABEL_NAME
);
4399 && strncmp (FAKE_LABEL_NAME
, name
, fake_size
) == 0
4400 && (name
[fake_size
] == 'F'
4401 || name
[fake_size
] == 'L'
4402 || (name
[fake_size
] == 'e'
4403 && strncmp ("endfunc", name
+fake_size
, 7) == 0)))
4411 next_non_empty_frag (fragP
)
4414 fragS
*next_fragP
= fragP
->fr_next
;
4416 /* Sometimes an empty will end up here due storage allocation issues.
4417 So we have to skip until we find something legit. */
4418 while (next_fragP
&& next_fragP
->fr_fix
== 0)
4419 next_fragP
= next_fragP
->fr_next
;
4421 if (next_fragP
== NULL
|| next_fragP
->fr_fix
== 0)
4429 next_frag_opcode (fragP
)
4430 const fragS
* fragP
;
4432 const fragS
*next_fragP
= next_non_empty_frag (fragP
);
4433 static xtensa_insnbuf insnbuf
= NULL
;
4434 xtensa_isa isa
= xtensa_default_isa
;
4437 insnbuf
= xtensa_insnbuf_alloc (isa
);
4439 if (next_fragP
== NULL
)
4440 return XTENSA_UNDEFINED
;
4442 xtensa_insnbuf_from_chars (isa
, insnbuf
, next_fragP
->fr_literal
);
4443 return xtensa_decode_insn (isa
, insnbuf
);
4447 /* Return true if the target frag is one of the next non-empty frags. */
4450 is_next_frag_target (fragP
, target
)
4452 const fragS
*target
;
4457 for (; fragP
; fragP
= fragP
->fr_next
)
4459 if (fragP
== target
)
4461 if (fragP
->fr_fix
!= 0)
4463 if (fragP
->fr_type
== rs_fill
&& fragP
->fr_offset
!= 0)
4465 if ((fragP
->fr_type
== rs_align
|| fragP
->fr_type
== rs_align_code
)
4466 && ((fragP
->fr_address
% (1 << fragP
->fr_offset
)) != 0))
4468 if (fragP
->fr_type
== rs_space
)
4475 /* If the next legit fragment is an end-of-loop marker,
4476 switch its state so it will instantiate a NOP. */
4479 update_next_frag_nop_state (fragP
)
4482 fragS
*next_fragP
= fragP
->fr_next
;
4484 while (next_fragP
&& next_fragP
->fr_fix
== 0)
4486 if (next_fragP
->fr_type
== rs_machine_dependent
4487 && next_fragP
->fr_subtype
== RELAX_LOOP_END
)
4489 next_fragP
->fr_subtype
= RELAX_LOOP_END_ADD_NOP
;
4492 next_fragP
= next_fragP
->fr_next
;
4498 next_frag_is_branch_target (fragP
)
4501 /* Sometimes an empty will end up here due storage allocation issues,
4502 so we have to skip until we find something legit. */
4503 for (fragP
= fragP
->fr_next
; fragP
; fragP
= fragP
->fr_next
)
4505 if (fragP
->tc_frag_data
.is_branch_target
)
4507 if (fragP
->fr_fix
!= 0)
4515 next_frag_is_loop_target (fragP
)
4518 /* Sometimes an empty will end up here due storage allocation issues.
4519 So we have to skip until we find something legit. */
4520 for (fragP
= fragP
->fr_next
; fragP
; fragP
= fragP
->fr_next
)
4522 if (fragP
->tc_frag_data
.is_loop_target
)
4524 if (fragP
->fr_fix
!= 0)
4532 next_frag_pre_opcode_bytes (fragp
)
4535 const fragS
*next_fragp
= fragp
->fr_next
;
4537 xtensa_opcode next_opcode
= next_frag_opcode (fragp
);
4538 if (!is_loop_opcode (next_opcode
))
4541 /* Sometimes an empty will end up here due storage allocation issues.
4542 So we have to skip until we find something legit. */
4543 while (next_fragp
->fr_fix
== 0)
4544 next_fragp
= next_fragp
->fr_next
;
4546 if (next_fragp
->fr_type
!= rs_machine_dependent
)
4549 /* There is some implicit knowledge encoded in here.
4550 The LOOP instructions that are NOT RELAX_IMMED have
4552 if (next_fragp
->fr_subtype
> RELAX_IMMED
)
4553 return get_expanded_loop_offset (next_opcode
);
4559 /* Mark a location where we can later insert literal frags. Update
4560 the section's literal_pool_loc, so subsequent literals can be
4561 placed nearest to their use. */
4564 xtensa_mark_literal_pool_location ()
4566 /* Any labels pointing to the current location need
4567 to be adjusted to after the literal pool. */
4569 fragS
*pool_location
;
4571 frag_align (2, 0, 0);
4573 /* We stash info in the fr_var of these frags
4574 so we can later move the literal's fixes into this
4575 frchain's fix list. We can use fr_var because fr_var's
4576 interpretation depends solely on the fr_type and subtype. */
4577 pool_location
= frag_now
;
4578 frag_variant (rs_machine_dependent
, 0, (int) frchain_now
,
4579 RELAX_LITERAL_POOL_BEGIN
, NULL
, 0, NULL
);
4580 frag_variant (rs_machine_dependent
, 0, (int) now_seg
,
4581 RELAX_LITERAL_POOL_END
, NULL
, 0, NULL
);
4583 /* Now put a frag into the literal pool that points to this location. */
4584 set_literal_pool_location (now_seg
, pool_location
);
4585 xtensa_switch_to_literal_fragment (&s
);
4587 /* Close whatever frag is there. */
4588 frag_variant (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
4589 frag_now
->tc_frag_data
.literal_frag
= pool_location
;
4590 frag_variant (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
4591 xtensa_restore_emit_state (&s
);
4596 xtensa_move_labels (old_frag
, old_offset
, new_frag
, new_offset
)
4599 fragS
*new_frag ATTRIBUTE_UNUSED
;
4604 /* Repeat until there are no more.... */
4605 for (old_sym
= xtensa_find_label (old_frag
, old_offset
, TRUE
);
4607 old_sym
= xtensa_find_label (old_frag
, old_offset
, TRUE
))
4609 S_SET_VALUE (old_sym
, (valueT
) new_offset
);
4610 symbol_set_frag (old_sym
, frag_now
);
4615 /* Assemble a NOP of the requested size in the buffer. User must have
4616 allocated "buf" with at least "size" bytes. */
4619 assemble_nop (size
, buf
)
4623 static xtensa_insnbuf insnbuf
= NULL
;
4626 insnbuf
= xtensa_insnbuf_alloc (xtensa_default_isa
);
4628 tinsn_init (&t_insn
);
4632 t_insn
.opcode
= xtensa_nop_n_opcode
;
4634 if (t_insn
.opcode
== XTENSA_UNDEFINED
)
4635 as_fatal (_("opcode 'NOP.N' unavailable in this configuration"));
4636 tinsn_to_insnbuf (&t_insn
, insnbuf
);
4637 xtensa_insnbuf_to_chars (xtensa_default_isa
, insnbuf
, buf
);
4641 t_insn
.opcode
= xtensa_or_opcode
;
4642 assert (t_insn
.opcode
!= XTENSA_UNDEFINED
);
4643 if (t_insn
.opcode
== XTENSA_UNDEFINED
)
4644 as_fatal (_("opcode 'OR' unavailable in this configuration"));
4645 set_expr_const (&t_insn
.tok
[0], 1);
4646 set_expr_const (&t_insn
.tok
[1], 1);
4647 set_expr_const (&t_insn
.tok
[2], 1);
4649 tinsn_to_insnbuf (&t_insn
, insnbuf
);
4650 xtensa_insnbuf_to_chars (xtensa_default_isa
, insnbuf
, buf
);
4654 as_fatal (_("invalid %d-byte NOP requested"), size
);
4659 /* Return the number of bytes for the offset of the expanded loop
4660 instruction. This should be incorporated into the relaxation
4661 specification but is hard-coded here. This is used to auto-align
4662 the loop instruction. It is invalid to call this function if the
4663 configuration does not have loops or if the opcode is not a loop
4667 get_expanded_loop_offset (opcode
)
4668 xtensa_opcode opcode
;
4670 /* This is the OFFSET of the loop instruction in the expanded loop.
4671 This MUST correspond directly to the specification of the loop
4672 expansion. It will be validated on fragment conversion. */
4673 if (opcode
== XTENSA_UNDEFINED
)
4674 as_fatal (_("get_expanded_loop_offset: undefined opcode"));
4675 if (opcode
== xtensa_loop_opcode
)
4677 if (opcode
== xtensa_loopnez_opcode
)
4679 if (opcode
== xtensa_loopgtz_opcode
)
4681 as_fatal (_("get_expanded_loop_offset: invalid opcode"));
4687 get_literal_pool_location (seg
)
4690 return seg_info (seg
)->tc_segment_info_data
.literal_pool_loc
;
4695 set_literal_pool_location (seg
, literal_pool_loc
)
4697 fragS
*literal_pool_loc
;
4699 seg_info (seg
)->tc_segment_info_data
.literal_pool_loc
= literal_pool_loc
;
4703 /* External Functions and Other GAS Hooks. */
4706 xtensa_target_format ()
4708 return (target_big_endian
? "elf32-xtensa-be" : "elf32-xtensa-le");
4713 xtensa_file_arch_init (abfd
)
4716 bfd_set_private_flags (abfd
, 0x100 | 0x200);
4721 md_number_to_chars (buf
, val
, n
)
4726 if (target_big_endian
)
4727 number_to_chars_bigendian (buf
, val
, n
);
4729 number_to_chars_littleendian (buf
, val
, n
);
4733 /* This function is called once, at assembler startup time. It should
4734 set up all the tables, etc. that the MD part of the assembler will
4740 segT current_section
= now_seg
;
4741 int current_subsec
= now_subseg
;
4745 isa
= xtensa_isa_init ();
4747 /* ISA was already initialized by xtensa_init(). */
4748 isa
= xtensa_default_isa
;
4751 /* Set up the .literal, .fini.literal and .init.literal sections. */
4752 memset (&default_lit_sections
, 0, sizeof (default_lit_sections
));
4753 default_lit_sections
.init_lit_seg_name
= INIT_LITERAL_SECTION_NAME
;
4754 default_lit_sections
.fini_lit_seg_name
= FINI_LITERAL_SECTION_NAME
;
4755 default_lit_sections
.lit_seg_name
= LITERAL_SECTION_NAME
;
4757 subseg_set (current_section
, current_subsec
);
4759 xtensa_addi_opcode
= xtensa_opcode_lookup (isa
, "addi");
4760 xtensa_addmi_opcode
= xtensa_opcode_lookup (isa
, "addmi");
4761 xtensa_call0_opcode
= xtensa_opcode_lookup (isa
, "call0");
4762 xtensa_call4_opcode
= xtensa_opcode_lookup (isa
, "call4");
4763 xtensa_call8_opcode
= xtensa_opcode_lookup (isa
, "call8");
4764 xtensa_call12_opcode
= xtensa_opcode_lookup (isa
, "call12");
4765 xtensa_callx0_opcode
= xtensa_opcode_lookup (isa
, "callx0");
4766 xtensa_callx4_opcode
= xtensa_opcode_lookup (isa
, "callx4");
4767 xtensa_callx8_opcode
= xtensa_opcode_lookup (isa
, "callx8");
4768 xtensa_callx12_opcode
= xtensa_opcode_lookup (isa
, "callx12");
4769 xtensa_entry_opcode
= xtensa_opcode_lookup (isa
, "entry");
4770 xtensa_isync_opcode
= xtensa_opcode_lookup (isa
, "isync");
4771 xtensa_j_opcode
= xtensa_opcode_lookup (isa
, "j");
4772 xtensa_jx_opcode
= xtensa_opcode_lookup (isa
, "jx");
4773 xtensa_loop_opcode
= xtensa_opcode_lookup (isa
, "loop");
4774 xtensa_loopnez_opcode
= xtensa_opcode_lookup (isa
, "loopnez");
4775 xtensa_loopgtz_opcode
= xtensa_opcode_lookup (isa
, "loopgtz");
4776 xtensa_nop_n_opcode
= xtensa_opcode_lookup (isa
, "nop.n");
4777 xtensa_or_opcode
= xtensa_opcode_lookup (isa
, "or");
4778 xtensa_ret_opcode
= xtensa_opcode_lookup (isa
, "ret");
4779 xtensa_ret_n_opcode
= xtensa_opcode_lookup (isa
, "ret.n");
4780 xtensa_retw_opcode
= xtensa_opcode_lookup (isa
, "retw");
4781 xtensa_retw_n_opcode
= xtensa_opcode_lookup (isa
, "retw.n");
4782 xtensa_rsr_opcode
= xtensa_opcode_lookup (isa
, "rsr");
4783 xtensa_waiti_opcode
= xtensa_opcode_lookup (isa
, "waiti");
4787 /* tc_frob_label hook */
4790 xtensa_frob_label (sym
)
4793 xtensa_define_label (sym
);
4794 if (is_loop_target_label (sym
)
4795 && (get_last_insn_flags (now_seg
, now_subseg
)
4796 & FLAG_IS_BAD_LOOPEND
) != 0)
4797 as_bad (_("invalid last instruction for a zero-overhead loop"));
4799 /* No target aligning in the absolute section. */
4800 if (now_seg
!= absolute_section
4802 && !is_unaligned_label (sym
)
4803 && !frag_now
->tc_frag_data
.is_literal
)
4805 fragS
*old_frag
= frag_now
;
4806 offsetT old_offset
= frag_now_fix ();
4807 /* frag_now->tc_frag_data.is_insn = TRUE; */
4808 frag_var (rs_machine_dependent
, 4, 4,
4809 RELAX_DESIRE_ALIGN_IF_TARGET
,
4810 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
4811 xtensa_move_labels (old_frag
, old_offset
, frag_now
, 0);
4812 /* Once we know whether or not the label is a branch target
4813 We will suppress some of these alignments. */
4818 /* md_flush_pending_output hook */
4821 xtensa_flush_pending_output ()
4823 /* If there is a non-zero instruction fragment, close it. */
4824 if (frag_now_fix () != 0 && frag_now
->tc_frag_data
.is_insn
)
4826 frag_wane (frag_now
);
4829 frag_now
->tc_frag_data
.is_insn
= FALSE
;
4837 xtensa_isa isa
= xtensa_default_isa
;
4840 bfd_boolean has_underbar
= FALSE
;
4841 char *arg_strings
[MAX_INSN_ARGS
];
4843 IStack istack
; /* Put instructions into here. */
4844 TInsn orig_insn
; /* Original instruction from the input. */
4846 symbolS
*lit_sym
= NULL
;
4848 if (frag_now
->tc_frag_data
.is_literal
)
4850 static bfd_boolean reported
= 0;
4852 as_bad (_("cannot assemble '%s' into a literal fragment"), str
);
4859 istack_init (&istack
);
4860 tinsn_init (&orig_insn
);
4862 /* Split off the opcode. */
4863 opnamelen
= strspn (str
, "abcdefghijklmnopqrstuvwxyz_/0123456789.");
4864 opname
= xmalloc (opnamelen
+ 1);
4865 memcpy (opname
, str
, opnamelen
);
4866 opname
[opnamelen
] = '\0';
4868 num_args
= tokenize_arguments (arg_strings
, str
+ opnamelen
);
4871 as_bad (_("syntax error"));
4875 if (xg_translate_idioms (&opname
, &num_args
, arg_strings
))
4878 /* Check for an underbar prefix. */
4881 has_underbar
= TRUE
;
4885 orig_insn
.insn_type
= ITYPE_INSN
;
4887 orig_insn
.is_specific_opcode
= (has_underbar
|| !use_generics ());
4888 specific_opcode
= orig_insn
.is_specific_opcode
;
4890 orig_insn
.opcode
= xtensa_opcode_lookup (isa
, opname
);
4891 if (orig_insn
.opcode
== XTENSA_UNDEFINED
)
4893 as_bad (_("unknown opcode %s"), opname
);
4897 if (frag_now_fix () != 0 && !frag_now
->tc_frag_data
.is_insn
)
4899 frag_wane (frag_now
);
4903 if (software_a0_b_retw_interlock
)
4905 if ((get_last_insn_flags (now_seg
, now_subseg
) & FLAG_IS_A0_WRITER
) != 0
4906 && is_conditional_branch_opcode (orig_insn
.opcode
))
4908 has_a0_b_retw
= TRUE
;
4910 /* Mark this fragment with the special RELAX_ADD_NOP_IF_A0_B_RETW.
4911 After the first assembly pass we will check all of them and
4912 add a nop if needed. */
4913 frag_now
->tc_frag_data
.is_insn
= TRUE
;
4914 frag_var (rs_machine_dependent
, 4, 4,
4915 RELAX_ADD_NOP_IF_A0_B_RETW
,
4916 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
4917 frag_now
->tc_frag_data
.is_insn
= TRUE
;
4918 frag_var (rs_machine_dependent
, 4, 4,
4919 RELAX_ADD_NOP_IF_A0_B_RETW
,
4920 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
4924 /* Special case: The call instructions should be marked "specific opcode"
4925 to keep them from expanding. */
4926 if (!use_longcalls () && is_direct_call_opcode (orig_insn
.opcode
))
4927 orig_insn
.is_specific_opcode
= TRUE
;
4929 /* Parse the arguments. */
4930 if (parse_arguments (&orig_insn
, num_args
, arg_strings
))
4932 as_bad (_("syntax error"));
4936 /* Free the opcode and argument strings, now that they've been parsed. */
4937 free (has_underbar
? opname
- 1 : opname
);
4939 while (num_args
-- > 0)
4940 free (arg_strings
[num_args
]);
4942 /* Check for the right number and type of arguments. */
4943 if (tinsn_check_arguments (&orig_insn
))
4946 /* See if the instruction implies an aligned section. */
4947 if (is_entry_opcode (orig_insn
.opcode
) || is_loop_opcode (orig_insn
.opcode
))
4948 record_alignment (now_seg
, 2);
4950 xg_add_branch_and_loop_targets (&orig_insn
);
4952 /* Special cases for instructions that force an alignment... */
4953 if (!orig_insn
.is_specific_opcode
&& is_loop_opcode (orig_insn
.opcode
))
4955 fragS
*old_frag
= frag_now
;
4956 offsetT old_offset
= frag_now_fix ();
4957 symbolS
*old_sym
= NULL
;
4960 frag_now
->tc_frag_data
.is_insn
= TRUE
;
4961 frag_now
->tc_frag_data
.is_no_density
= !code_density_available ();
4962 max_fill
= get_text_align_max_fill_size
4963 (get_text_align_power (XTENSA_FETCH_WIDTH
),
4964 TRUE
, frag_now
->tc_frag_data
.is_no_density
);
4965 frag_var (rs_machine_dependent
, max_fill
, max_fill
,
4966 RELAX_ALIGN_NEXT_OPCODE
, frag_now
->fr_symbol
,
4967 frag_now
->fr_offset
, NULL
);
4969 /* Repeat until there are no more. */
4970 while ((old_sym
= xtensa_find_label (old_frag
, old_offset
, FALSE
)))
4972 S_SET_VALUE (old_sym
, (valueT
) 0);
4973 symbol_set_frag (old_sym
, frag_now
);
4977 /* Special-case for "entry" instruction. */
4978 if (is_entry_opcode (orig_insn
.opcode
))
4980 /* Check that the second opcode (#1) is >= 16. */
4981 if (orig_insn
.ntok
>= 2)
4983 expressionS
*exp
= &orig_insn
.tok
[1];
4987 if (exp
->X_add_number
< 16)
4988 as_warn (_("entry instruction with stack decrement < 16"));
4992 as_warn (_("entry instruction with non-constant decrement"));
4996 if (!orig_insn
.is_specific_opcode
)
4998 fragS
*label_target
= frag_now
;
4999 offsetT label_offset
= frag_now_fix ();
5001 xtensa_mark_literal_pool_location ();
5003 /* Automatically align ENTRY instructions. */
5004 xtensa_move_labels (label_target
, label_offset
, frag_now
, 0);
5005 frag_align (2, 0, 0);
5009 if (software_a0_b_retw_interlock
)
5010 set_last_insn_flags (now_seg
, now_subseg
, FLAG_IS_A0_WRITER
,
5011 is_register_writer (&orig_insn
, "a", 0));
5013 set_last_insn_flags (now_seg
, now_subseg
, FLAG_IS_BAD_LOOPEND
,
5014 is_bad_loopend_opcode (&orig_insn
));
5017 assemble_tokens (opcode, tok, ntok);
5018 expand the tokens from the orig_insn into the
5019 stack of instructions that will not expand
5020 unless required at relaxation time. */
5021 if (xg_expand_assembly_insn (&istack
, &orig_insn
))
5024 for (i
= 0; i
< istack
.ninsn
; i
++)
5026 TInsn
*insn
= &istack
.insn
[i
];
5027 if (insn
->insn_type
== ITYPE_LITERAL
)
5029 assert (lit_sym
== NULL
);
5030 lit_sym
= xg_assemble_literal (insn
);
5035 xg_resolve_literals (insn
, lit_sym
);
5036 xg_assemble_tokens (insn
);
5040 /* Now, if the original opcode was a call... */
5041 if (align_targets
&& is_call_opcode (orig_insn
.opcode
))
5043 frag_now
->tc_frag_data
.is_insn
= TRUE
;
5044 frag_var (rs_machine_dependent
, 4, 4,
5046 frag_now
->fr_symbol
,
5047 frag_now
->fr_offset
,
5053 /* TC_CONS_FIX_NEW hook: Check for "@PLT" suffix on symbol references.
5054 If found, use an XTENSA_PLT reloc for 4-byte values. Otherwise, this
5055 is the same as the standard code in read.c. */
5058 xtensa_cons_fix_new (frag
, where
, size
, exp
)
5064 bfd_reloc_code_real_type r
;
5065 bfd_boolean plt
= FALSE
;
5067 if (*input_line_pointer
== '@')
5069 if (!strncmp (input_line_pointer
, PLT_SUFFIX
, strlen (PLT_SUFFIX
) - 1)
5070 && !strncmp (input_line_pointer
, plt_suffix
,
5071 strlen (plt_suffix
) - 1))
5073 as_bad (_("undefined @ suffix '%s', expected '%s'"),
5074 input_line_pointer
, plt_suffix
);
5075 ignore_rest_of_line ();
5079 input_line_pointer
+= strlen (plt_suffix
);
5092 r
= plt
? BFD_RELOC_XTENSA_PLT
: BFD_RELOC_32
;
5098 as_bad (_("unsupported BFD relocation size %u"), size
);
5102 fix_new_exp (frag
, where
, size
, exp
, 0, r
);
5106 /* TC_FRAG_INIT hook */
5109 xtensa_frag_init (frag
)
5112 frag
->tc_frag_data
.is_no_density
= !code_density_available ();
5117 md_undefined_symbol (name
)
5118 char *name ATTRIBUTE_UNUSED
;
5124 /* Round up a section size to the appropriate boundary. */
5127 md_section_align (segment
, size
)
5128 segT segment ATTRIBUTE_UNUSED
;
5131 return size
; /* Byte alignment is fine. */
5136 md_pcrel_from (fixP
)
5140 static xtensa_insnbuf insnbuf
= NULL
;
5142 xtensa_operand operand
;
5143 xtensa_opcode opcode
;
5144 xtensa_isa isa
= xtensa_default_isa
;
5145 valueT addr
= fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
5150 if (fixP
->fx_r_type
== BFD_RELOC_XTENSA_ASM_EXPAND
)
5154 insnbuf
= xtensa_insnbuf_alloc (isa
);
5156 insn_p
= &fixP
->fx_frag
->fr_literal
[fixP
->fx_where
];
5157 xtensa_insnbuf_from_chars (isa
, insnbuf
, insn_p
);
5158 opcode
= xtensa_decode_insn (isa
, insnbuf
);
5160 opnum
= reloc_to_opnum (fixP
->fx_r_type
);
5163 as_fatal (_("invalid operand relocation for '%s' instruction"),
5164 xtensa_opcode_name (isa
, opcode
));
5165 if (opnum
>= xtensa_num_operands (isa
, opcode
))
5166 as_fatal (_("invalid relocation for operand %d in '%s' instruction"),
5167 opnum
, xtensa_opcode_name (isa
, opcode
));
5168 operand
= xtensa_get_operand (isa
, opcode
, opnum
);
5171 as_warn_where (fixP
->fx_file
,
5173 _("invalid relocation type %d for %s instruction"),
5174 fixP
->fx_r_type
, xtensa_opcode_name (isa
, opcode
));
5178 if (!operand_is_pcrel_label (operand
))
5180 as_bad_where (fixP
->fx_file
,
5182 _("invalid relocation for operand %d of '%s'"),
5183 opnum
, xtensa_opcode_name (isa
, opcode
));
5186 if (!xtensa_operand_isPCRelative (operand
))
5188 as_warn_where (fixP
->fx_file
,
5190 _("non-PCREL relocation operand %d for '%s': %s"),
5191 opnum
, xtensa_opcode_name (isa
, opcode
),
5192 bfd_get_reloc_code_name (fixP
->fx_r_type
));
5196 return 0 - xtensa_operand_do_reloc (operand
, 0, addr
);
5200 /* tc_symbol_new_hook */
5203 xtensa_symbol_new_hook (symbolP
)
5206 symbol_get_tc (symbolP
)->plt
= 0;
5210 /* tc_fix_adjustable hook */
5213 xtensa_fix_adjustable (fixP
)
5216 /* We need the symbol name for the VTABLE entries. */
5217 if (fixP
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
5218 || fixP
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
5226 md_apply_fix3 (fixP
, valP
, seg
)
5229 segT seg ATTRIBUTE_UNUSED
;
5231 if (fixP
->fx_pcrel
== 0 && fixP
->fx_addsy
== 0)
5233 /* This happens when the relocation is within the current section.
5234 It seems this implies a PCREL operation. We'll catch it and error
5237 char *const fixpos
= fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
;
5238 static xtensa_insnbuf insnbuf
= NULL
;
5239 xtensa_opcode opcode
;
5242 switch (fixP
->fx_r_type
)
5244 case BFD_RELOC_XTENSA_ASM_EXPAND
:
5248 case BFD_RELOC_XTENSA_ASM_SIMPLIFY
:
5249 as_bad (_("unhandled local relocation fix %s"),
5250 bfd_get_reloc_code_name (fixP
->fx_r_type
));
5256 /* The only one we support that isn't an instruction field. */
5257 md_number_to_chars (fixpos
, *valP
, fixP
->fx_size
);
5261 case BFD_RELOC_XTENSA_OP0
:
5262 case BFD_RELOC_XTENSA_OP1
:
5263 case BFD_RELOC_XTENSA_OP2
:
5264 isa
= xtensa_default_isa
;
5266 insnbuf
= xtensa_insnbuf_alloc (isa
);
5268 xtensa_insnbuf_from_chars (isa
, insnbuf
, fixpos
);
5269 opcode
= xtensa_decode_insn (isa
, insnbuf
);
5270 if (opcode
== XTENSA_UNDEFINED
)
5271 as_fatal (_("undecodable FIX"));
5273 xtensa_insnbuf_set_immediate_field (opcode
, insnbuf
, *valP
,
5274 fixP
->fx_file
, fixP
->fx_line
);
5276 fixP
->fx_frag
->tc_frag_data
.is_insn
= TRUE
;
5277 xtensa_insnbuf_to_chars (isa
, insnbuf
, fixpos
);
5281 case BFD_RELOC_VTABLE_INHERIT
:
5282 case BFD_RELOC_VTABLE_ENTRY
:
5287 as_bad (_("unhandled local relocation fix %s"),
5288 bfd_get_reloc_code_name (fixP
->fx_r_type
));
5295 md_atof (type
, litP
, sizeP
)
5301 LITTLENUM_TYPE words
[4];
5317 return "bad call to md_atof";
5320 t
= atof_ieee (input_line_pointer
, type
, words
);
5322 input_line_pointer
= t
;
5326 for (i
= prec
- 1; i
>= 0; i
--)
5329 if (target_big_endian
)
5330 idx
= (prec
- 1 - i
);
5332 md_number_to_chars (litP
, (valueT
) words
[idx
], 2);
5341 md_estimate_size_before_relax (fragP
, seg
)
5343 segT seg ATTRIBUTE_UNUSED
;
5345 return fragP
->tc_frag_data
.text_expansion
;
5349 /* Translate internal representation of relocation info to BFD target
5353 tc_gen_reloc (section
, fixp
)
5354 asection
*section ATTRIBUTE_UNUSED
;
5359 reloc
= (arelent
*) xmalloc (sizeof (arelent
));
5360 reloc
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
5361 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
5362 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
5364 /* Make sure none of our internal relocations make it this far.
5365 They'd better have been fully resolved by this point. */
5366 assert ((int) fixp
->fx_r_type
> 0);
5368 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
5369 if (reloc
->howto
== NULL
)
5371 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
5372 _("cannot represent `%s' relocation in object file"),
5373 bfd_get_reloc_code_name (fixp
->fx_r_type
));
5377 if (!fixp
->fx_pcrel
!= !reloc
->howto
->pc_relative
)
5379 as_fatal (_("internal error? cannot generate `%s' relocation"),
5380 bfd_get_reloc_code_name (fixp
->fx_r_type
));
5382 assert (!fixp
->fx_pcrel
== !reloc
->howto
->pc_relative
);
5384 reloc
->addend
= fixp
->fx_offset
;
5386 switch (fixp
->fx_r_type
)
5388 case BFD_RELOC_XTENSA_OP0
:
5389 case BFD_RELOC_XTENSA_OP1
:
5390 case BFD_RELOC_XTENSA_OP2
:
5391 case BFD_RELOC_XTENSA_ASM_EXPAND
:
5393 case BFD_RELOC_XTENSA_PLT
:
5394 case BFD_RELOC_VTABLE_INHERIT
:
5395 case BFD_RELOC_VTABLE_ENTRY
:
5398 case BFD_RELOC_XTENSA_ASM_SIMPLIFY
:
5399 as_warn (_("emitting simplification relocation"));
5403 as_warn (_("emitting unknown relocation"));
5413 directive_balance ();
5414 xtensa_move_literals ();
5416 xtensa_reorder_segments ();
5417 xtensa_mark_target_fragments ();
5418 xtensa_cleanup_align_frags ();
5419 xtensa_fix_target_frags ();
5420 if (software_a0_b_retw_interlock
&& has_a0_b_retw
)
5421 xtensa_fix_a0_b_retw_frags ();
5422 if (software_avoid_b_j_loop_end
&& maybe_has_b_j_loop_end
)
5423 xtensa_fix_b_j_loop_end_frags ();
5425 /* "close_loop_end" should be processed BEFORE "short_loop". */
5426 if (software_avoid_close_loop_end
&& maybe_has_close_loop_end
)
5427 xtensa_fix_close_loop_end_frags ();
5429 if (software_avoid_short_loop
&& maybe_has_short_loop
)
5430 xtensa_fix_short_loop_frags ();
5432 xtensa_sanity_check ();
5437 xtensa_cleanup_align_frags ()
5441 for (frchP
= frchain_root
; frchP
; frchP
= frchP
->frch_next
)
5445 /* Walk over all of the fragments in a subsection. */
5446 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
5448 if ((fragP
->fr_type
== rs_align
5449 || fragP
->fr_type
== rs_align_code
5450 || (fragP
->fr_type
== rs_machine_dependent
5451 && (fragP
->fr_subtype
== RELAX_DESIRE_ALIGN
5452 || fragP
->fr_subtype
== RELAX_DESIRE_ALIGN_IF_TARGET
)))
5453 && fragP
->fr_fix
== 0)
5455 fragS
* next
= fragP
->fr_next
;
5458 && next
->fr_type
== rs_machine_dependent
5459 && next
->fr_subtype
== RELAX_DESIRE_ALIGN_IF_TARGET
)
5462 next
= next
->fr_next
;
5470 /* Re-process all of the fragments looking to convert all of the
5471 RELAX_DESIRE_ALIGN_IF_TARGET fragments. If there is a branch
5472 target in the next fragment, convert this to RELAX_DESIRE_ALIGN.
5473 If the next fragment starts with a loop target, AND the previous
5474 fragment can be expanded to negate the branch, convert this to a
5475 RELAX_LOOP_END. Otherwise, convert to a .fill 0. */
5478 xtensa_fix_target_frags ()
5482 /* When this routine is called, all of the subsections are still intact
5483 so we walk over subsections instead of sections. */
5484 for (frchP
= frchain_root
; frchP
; frchP
= frchP
->frch_next
)
5486 bfd_boolean prev_frag_can_negate_branch
= FALSE
;
5489 /* Walk over all of the fragments in a subsection. */
5490 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
5492 if (fragP
->fr_type
== rs_machine_dependent
5493 && fragP
->fr_subtype
== RELAX_DESIRE_ALIGN_IF_TARGET
)
5495 if (next_frag_is_loop_target (fragP
))
5497 if (prev_frag_can_negate_branch
)
5498 fragP
->fr_subtype
= RELAX_LOOP_END
;
5501 if (!align_only_targets
||
5502 next_frag_is_branch_target (fragP
))
5503 fragP
->fr_subtype
= RELAX_DESIRE_ALIGN
;
5508 else if (!align_only_targets
5509 || next_frag_is_branch_target (fragP
))
5510 fragP
->fr_subtype
= RELAX_DESIRE_ALIGN
;
5514 if (fragP
->fr_fix
!= 0)
5515 prev_frag_can_negate_branch
= FALSE
;
5516 if (frag_can_negate_branch (fragP
))
5517 prev_frag_can_negate_branch
= TRUE
;
5524 frag_can_negate_branch (fragP
)
5527 if (fragP
->fr_type
== rs_machine_dependent
5528 && fragP
->fr_subtype
== RELAX_IMMED
)
5531 tinsn_from_chars (&t_insn
, fragP
->fr_opcode
);
5532 if (is_negatable_branch (&t_insn
))
5539 /* Re-process all of the fragments looking to convert all of the
5540 RELAX_ADD_NOP_IF_A0_B_RETW. If the next instruction is a
5541 conditional branch or a retw/retw.n, convert this frag to one that
5542 will generate a NOP. In any case close it off with a .fill 0. */
5545 xtensa_fix_a0_b_retw_frags ()
5549 /* When this routine is called, all of the subsections are still intact
5550 so we walk over subsections instead of sections. */
5551 for (frchP
= frchain_root
; frchP
; frchP
= frchP
->frch_next
)
5555 /* Walk over all of the fragments in a subsection. */
5556 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
5558 if (fragP
->fr_type
== rs_machine_dependent
5559 && fragP
->fr_subtype
== RELAX_ADD_NOP_IF_A0_B_RETW
)
5561 if (next_instrs_are_b_retw (fragP
))
5562 relax_frag_add_nop (fragP
);
5572 next_instrs_are_b_retw (fragP
)
5575 xtensa_opcode opcode
;
5576 const fragS
*next_fragP
= next_non_empty_frag (fragP
);
5577 static xtensa_insnbuf insnbuf
= NULL
;
5578 xtensa_isa isa
= xtensa_default_isa
;
5582 insnbuf
= xtensa_insnbuf_alloc (isa
);
5584 if (next_fragP
== NULL
)
5587 /* Check for the conditional branch. */
5588 xtensa_insnbuf_from_chars (isa
, insnbuf
, &next_fragP
->fr_literal
[offset
]);
5589 opcode
= xtensa_decode_insn (isa
, insnbuf
);
5591 if (!is_conditional_branch_opcode (opcode
))
5594 offset
+= xtensa_insn_length (isa
, opcode
);
5595 if (offset
== next_fragP
->fr_fix
)
5597 next_fragP
= next_non_empty_frag (next_fragP
);
5600 if (next_fragP
== NULL
)
5603 /* Check for the retw/retw.n. */
5604 xtensa_insnbuf_from_chars (isa
, insnbuf
, &next_fragP
->fr_literal
[offset
]);
5605 opcode
= xtensa_decode_insn (isa
, insnbuf
);
5607 if (is_windowed_return_opcode (opcode
))
5613 /* Re-process all of the fragments looking to convert all of the
5614 RELAX_ADD_NOP_IF_PRE_LOOP_END. If there is one instruction and a
5615 loop end label, convert this frag to one that will generate a NOP.
5616 In any case close it off with a .fill 0. */
5619 xtensa_fix_b_j_loop_end_frags ()
5623 /* When this routine is called, all of the subsections are still intact
5624 so we walk over subsections instead of sections. */
5625 for (frchP
= frchain_root
; frchP
; frchP
= frchP
->frch_next
)
5629 /* Walk over all of the fragments in a subsection. */
5630 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
5632 if (fragP
->fr_type
== rs_machine_dependent
5633 && fragP
->fr_subtype
== RELAX_ADD_NOP_IF_PRE_LOOP_END
)
5635 if (next_instr_is_loop_end (fragP
))
5636 relax_frag_add_nop (fragP
);
5646 next_instr_is_loop_end (fragP
)
5649 const fragS
*next_fragP
;
5651 if (next_frag_is_loop_target (fragP
))
5654 next_fragP
= next_non_empty_frag (fragP
);
5655 if (next_fragP
== NULL
)
5658 if (!next_frag_is_loop_target (next_fragP
))
5661 /* If the size is >= 3 then there is more than one instruction here.
5662 The hardware bug will not fire. */
5663 if (next_fragP
->fr_fix
> 3)
5670 /* Re-process all of the fragments looking to convert all of the
5671 RELAX_ADD_NOP_IF_CLOSE_LOOP_END. If there is an loop end that is
5672 not MY loop's loop end within 12 bytes, add enough nops here to
5673 make it at least 12 bytes away. In any case close it off with a
5677 xtensa_fix_close_loop_end_frags ()
5681 /* When this routine is called, all of the subsections are still intact
5682 so we walk over subsections instead of sections. */
5683 for (frchP
= frchain_root
; frchP
; frchP
= frchP
->frch_next
)
5687 fragS
*current_target
= NULL
;
5688 offsetT current_offset
= 0;
5690 /* Walk over all of the fragments in a subsection. */
5691 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
5693 if (fragP
->fr_type
== rs_machine_dependent
5694 && fragP
->fr_subtype
== RELAX_IMMED
)
5696 /* Read it. If the instruction is a loop, get the target. */
5697 xtensa_opcode opcode
= get_opcode_from_buf (fragP
->fr_opcode
);
5698 if (is_loop_opcode (opcode
))
5702 tinsn_from_chars (&t_insn
, fragP
->fr_opcode
);
5703 tinsn_immed_from_frag (&t_insn
, fragP
);
5705 /* Get the current fragment target. */
5706 if (fragP
->fr_symbol
)
5708 current_target
= symbol_get_frag (fragP
->fr_symbol
);
5709 current_offset
= fragP
->fr_offset
;
5715 && fragP
->fr_type
== rs_machine_dependent
5716 && fragP
->fr_subtype
== RELAX_ADD_NOP_IF_CLOSE_LOOP_END
)
5719 size_t bytes_added
= 0;
5721 #define REQUIRED_LOOP_DIVIDING_BYTES 12
5722 /* Max out at 12. */
5723 min_bytes
= min_bytes_to_other_loop_end
5724 (fragP
->fr_next
, current_target
, current_offset
,
5725 REQUIRED_LOOP_DIVIDING_BYTES
);
5727 if (min_bytes
< REQUIRED_LOOP_DIVIDING_BYTES
)
5729 while (min_bytes
+ bytes_added
5730 < REQUIRED_LOOP_DIVIDING_BYTES
)
5734 if (fragP
->fr_var
< length
)
5735 as_warn (_("fr_var %lu < length %d; ignoring"),
5736 fragP
->fr_var
, length
);
5739 assemble_nop (length
,
5740 fragP
->fr_literal
+ fragP
->fr_fix
);
5741 fragP
->fr_fix
+= length
;
5742 fragP
->fr_var
-= length
;
5744 bytes_added
+= length
;
5755 min_bytes_to_other_loop_end (fragP
, current_target
, current_offset
, max_size
)
5757 fragS
*current_target
;
5758 offsetT current_offset
;
5762 fragS
*current_fragP
;
5764 for (current_fragP
= fragP
;
5766 current_fragP
= current_fragP
->fr_next
)
5768 if (current_fragP
->tc_frag_data
.is_loop_target
5769 && current_fragP
!= current_target
)
5770 return offset
+ current_offset
;
5772 offset
+= unrelaxed_frag_min_size (current_fragP
);
5774 if (offset
+ current_offset
>= max_size
)
5782 unrelaxed_frag_min_size (fragP
)
5785 size_t size
= fragP
->fr_fix
;
5788 if (fragP
->fr_type
== rs_fill
)
5789 size
+= fragP
->fr_offset
;
5795 /* Re-process all of the fragments looking to convert all
5796 of the RELAX_ADD_NOP_IF_SHORT_LOOP. If:
5799 1) the instruction size count to the loop end label
5800 is too short (<= 2 instructions),
5801 2) loop has a jump or branch in it
5804 1) software_avoid_all_short_loops is true
5805 2) The generating loop was a 'loopgtz' or 'loopnez'
5806 3) the instruction size count to the loop end label is too short
5808 then convert this frag (and maybe the next one) to generate a NOP.
5809 In any case close it off with a .fill 0. */
5812 xtensa_fix_short_loop_frags ()
5816 /* When this routine is called, all of the subsections are still intact
5817 so we walk over subsections instead of sections. */
5818 for (frchP
= frchain_root
; frchP
; frchP
= frchP
->frch_next
)
5821 fragS
*current_target
= NULL
;
5822 offsetT current_offset
= 0;
5823 xtensa_opcode current_opcode
= XTENSA_UNDEFINED
;
5825 /* Walk over all of the fragments in a subsection. */
5826 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
5828 /* check on the current loop */
5829 if (fragP
->fr_type
== rs_machine_dependent
5830 && fragP
->fr_subtype
== RELAX_IMMED
)
5832 /* Read it. If the instruction is a loop, get the target. */
5833 xtensa_opcode opcode
= get_opcode_from_buf (fragP
->fr_opcode
);
5834 if (is_loop_opcode (opcode
))
5838 tinsn_from_chars (&t_insn
, fragP
->fr_opcode
);
5839 tinsn_immed_from_frag (&t_insn
, fragP
);
5841 /* Get the current fragment target. */
5842 if (fragP
->fr_symbol
)
5844 current_target
= symbol_get_frag (fragP
->fr_symbol
);
5845 current_offset
= fragP
->fr_offset
;
5846 current_opcode
= opcode
;
5851 if (fragP
->fr_type
== rs_machine_dependent
5852 && fragP
->fr_subtype
== RELAX_ADD_NOP_IF_SHORT_LOOP
)
5855 count_insns_to_loop_end (fragP
->fr_next
, TRUE
, 3);
5857 && (branch_before_loop_end (fragP
->fr_next
)
5858 || (software_avoid_all_short_loops
5859 && current_opcode
!= XTENSA_UNDEFINED
5860 && !is_the_loop_opcode (current_opcode
))))
5861 relax_frag_add_nop (fragP
);
5871 count_insns_to_loop_end (base_fragP
, count_relax_add
, max_count
)
5873 bfd_boolean count_relax_add
;
5876 fragS
*fragP
= NULL
;
5877 size_t insn_count
= 0;
5881 for (; fragP
&& !fragP
->tc_frag_data
.is_loop_target
; fragP
= fragP
->fr_next
)
5883 insn_count
+= unrelaxed_frag_min_insn_count (fragP
);
5884 if (insn_count
>= max_count
)
5887 if (count_relax_add
)
5889 if (fragP
->fr_type
== rs_machine_dependent
5890 && fragP
->fr_subtype
== RELAX_ADD_NOP_IF_SHORT_LOOP
)
5892 /* In order to add the appropriate number of
5893 NOPs, we count an instruction for downstream
5896 if (insn_count
>= max_count
)
5906 unrelaxed_frag_min_insn_count (fragP
)
5909 size_t insn_count
= 0;
5912 if (!fragP
->tc_frag_data
.is_insn
)
5915 /* Decode the fixed instructions. */
5916 while (offset
< fragP
->fr_fix
)
5918 xtensa_opcode opcode
= get_opcode_from_buf (fragP
->fr_literal
+ offset
);
5919 if (opcode
== XTENSA_UNDEFINED
)
5921 as_fatal (_("undecodable instruction in instruction frag"));
5924 offset
+= xtensa_insn_length (xtensa_default_isa
, opcode
);
5933 branch_before_loop_end (base_fragP
)
5938 for (fragP
= base_fragP
;
5939 fragP
&& !fragP
->tc_frag_data
.is_loop_target
;
5940 fragP
= fragP
->fr_next
)
5942 if (unrelaxed_frag_has_b_j (fragP
))
5950 unrelaxed_frag_has_b_j (fragP
)
5953 size_t insn_count
= 0;
5956 if (!fragP
->tc_frag_data
.is_insn
)
5959 /* Decode the fixed instructions. */
5960 while (offset
< fragP
->fr_fix
)
5962 xtensa_opcode opcode
= get_opcode_from_buf (fragP
->fr_literal
+ offset
);
5963 if (opcode
== XTENSA_UNDEFINED
)
5965 as_fatal (_("undecodable instruction in instruction frag"));
5968 if (is_branch_or_jump_opcode (opcode
))
5970 offset
+= xtensa_insn_length (xtensa_default_isa
, opcode
);
5976 /* Checks to be made after initial assembly but before relaxation. */
5979 xtensa_sanity_check ()
5986 as_where (&file_name
, &line
);
5987 for (frchP
= frchain_root
; frchP
; frchP
= frchP
->frch_next
)
5991 /* Walk over all of the fragments in a subsection. */
5992 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
5994 /* Currently we only check for empty loops here. */
5995 if (fragP
->fr_type
== rs_machine_dependent
5996 && fragP
->fr_subtype
== RELAX_IMMED
)
5998 static xtensa_insnbuf insnbuf
= NULL
;
6001 if (fragP
->fr_opcode
!= NULL
)
6004 insnbuf
= xtensa_insnbuf_alloc (xtensa_default_isa
);
6005 tinsn_from_chars (&t_insn
, fragP
->fr_opcode
);
6006 tinsn_immed_from_frag (&t_insn
, fragP
);
6008 if (is_loop_opcode (t_insn
.opcode
))
6010 if (is_empty_loop (&t_insn
, fragP
))
6012 new_logical_line (fragP
->fr_file
, fragP
->fr_line
);
6013 as_bad (_("invalid empty loop"));
6015 if (!is_local_forward_loop (&t_insn
, fragP
))
6017 new_logical_line (fragP
->fr_file
, fragP
->fr_line
);
6018 as_bad (_("loop target does not follow "
6019 "loop instruction in section"));
6026 new_logical_line (file_name
, line
);
6030 #define LOOP_IMMED_OPN 1
6032 /* Return true if the loop target is the next non-zero fragment. */
6035 is_empty_loop (insn
, fragP
)
6039 const expressionS
*expr
;
6043 if (insn
->insn_type
!= ITYPE_INSN
)
6046 if (!is_loop_opcode (insn
->opcode
))
6049 if (insn
->ntok
<= LOOP_IMMED_OPN
)
6052 expr
= &insn
->tok
[LOOP_IMMED_OPN
];
6054 if (expr
->X_op
!= O_symbol
)
6057 symbolP
= expr
->X_add_symbol
;
6061 if (symbol_get_frag (symbolP
) == NULL
)
6064 if (S_GET_VALUE (symbolP
) != 0)
6067 /* Walk through the zero-size fragments from this one. If we find
6068 the target fragment, then this is a zero-size loop. */
6069 for (next_fragP
= fragP
->fr_next
;
6071 next_fragP
= next_fragP
->fr_next
)
6073 if (next_fragP
== symbol_get_frag (symbolP
))
6075 if (next_fragP
->fr_fix
!= 0)
6083 is_local_forward_loop (insn
, fragP
)
6087 const expressionS
*expr
;
6091 if (insn
->insn_type
!= ITYPE_INSN
)
6094 if (!is_loop_opcode (insn
->opcode
))
6097 if (insn
->ntok
<= LOOP_IMMED_OPN
)
6100 expr
= &insn
->tok
[LOOP_IMMED_OPN
];
6102 if (expr
->X_op
!= O_symbol
)
6105 symbolP
= expr
->X_add_symbol
;
6109 if (symbol_get_frag (symbolP
) == NULL
)
6112 /* Walk through fragments until we find the target.
6113 If we do not find the target, then this is an invalid loop. */
6114 for (next_fragP
= fragP
->fr_next
;
6116 next_fragP
= next_fragP
->fr_next
)
6117 if (next_fragP
== symbol_get_frag (symbolP
))
6124 /* Alignment Functions. */
6127 get_text_align_power (target_size
)
6131 for (i
= 0; i
< sizeof (size_t); i
++)
6133 if (target_size
<= (1 << i
))
6136 as_fatal (_("get_text_align_power: argument too large"));
6142 get_text_align_max_fill_size (align_pow
, use_nops
, use_no_density
)
6144 bfd_boolean use_nops
;
6145 bfd_boolean use_no_density
;
6148 return (1 << align_pow
);
6150 return 3 * (1 << align_pow
);
6152 return 1 + (1 << align_pow
);
6156 /* get_text_align_fill_size ()
6160 target_size = size of next instruction
6161 align_pow = get_text_align_power (target_size).
6165 address = current address + loop instruction size;
6166 target_size = 3 (for 2 or 3 byte target)
6167 = 8 (for 8 byte target)
6168 align_pow = get_text_align_power (target_size);
6170 use_no_density = set appropriately
6172 address = current address + loop instruction size;
6174 align_pow = get_text_align_power (target_size);
6176 use_no_density = 0. */
6179 get_text_align_fill_size (address
, align_pow
, target_size
,
6180 use_nops
, use_no_density
)
6184 bfd_boolean use_nops
;
6185 bfd_boolean use_no_density
;
6189 align_pow: log2 (required alignment).
6191 target_size: alignment must allow the new_address and
6192 new_address+target_size-1.
6194 use_nops: if true, then we can only use 2 or 3 byte nops.
6196 use_no_density: if use_nops and use_no_density, we can only use
6199 Usually, for non-zero target_size, the align_pow is the power of 2
6200 that is greater than or equal to the target_size. This handles the
6201 2-byte, 3-byte and 8-byte instructions. */
6203 size_t alignment
= (1 << align_pow
);
6206 /* This is the easy case. */
6208 mod
= address
% alignment
;
6210 mod
= alignment
- mod
;
6211 assert ((address
+ mod
) % alignment
== 0);
6215 /* This is the slightly harder case. */
6216 assert ((int) alignment
>= target_size
);
6217 assert (target_size
> 0);
6218 if (!use_no_density
)
6221 for (i
= 0; i
< alignment
* 2; i
++)
6225 if ((address
+ i
) >> align_pow
==
6226 (address
+ i
+ target_size
- 1) >> align_pow
)
6234 /* Can only fill multiples of 3. */
6235 for (i
= 0; i
<= alignment
* 3; i
+= 3)
6237 if ((address
+ i
) >> align_pow
==
6238 (address
+ i
+ target_size
- 1) >> align_pow
)
6247 /* This will assert if it is not possible. */
6250 get_text_align_nop_count (fill_size
, use_no_density
)
6252 bfd_boolean use_no_density
;
6257 assert (fill_size
% 3 == 0);
6258 return (fill_size
/ 3);
6261 assert (fill_size
!= 1); /* Bad argument. */
6263 while (fill_size
> 1)
6265 size_t insn_size
= 3;
6266 if (fill_size
== 2 || fill_size
== 4)
6268 fill_size
-= insn_size
;
6271 assert (fill_size
!= 1); /* Bad algorithm. */
6277 get_text_align_nth_nop_size (fill_size
, n
, use_no_density
)
6280 bfd_boolean use_no_density
;
6284 assert (get_text_align_nop_count (fill_size
, use_no_density
) > n
);
6289 while (fill_size
> 1)
6291 size_t insn_size
= 3;
6292 if (fill_size
== 2 || fill_size
== 4)
6294 fill_size
-= insn_size
;
6304 /* For the given fragment, find the appropriate address
6305 for it to begin at if we are using NOPs to align it. */
6308 get_noop_aligned_address (fragP
, address
)
6312 static xtensa_insnbuf insnbuf
= NULL
;
6313 size_t fill_size
= 0;
6316 insnbuf
= xtensa_insnbuf_alloc (xtensa_default_isa
);
6318 switch (fragP
->fr_type
)
6320 case rs_machine_dependent
:
6321 if (fragP
->fr_subtype
== RELAX_ALIGN_NEXT_OPCODE
)
6323 /* The rule is: get next fragment's FIRST instruction. Find
6324 the smallest number of bytes that need to be added to
6325 ensure that the next fragment's FIRST instruction will fit
6328 E.G., 2 bytes : 0, 1, 2 mod 4
6331 If the FIRST instruction MIGHT be relaxed,
6332 assume that it will become a 3 byte instruction. */
6334 int target_insn_size
;
6335 xtensa_opcode opcode
= next_frag_opcode (fragP
);
6336 addressT pre_opcode_bytes
;
6338 if (opcode
== XTENSA_UNDEFINED
)
6340 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
6341 _("invalid opcode for RELAX_ALIGN_NEXT_OPCODE"));
6342 as_fatal (_("cannot continue"));
6345 target_insn_size
= xtensa_insn_length (xtensa_default_isa
, opcode
);
6347 pre_opcode_bytes
= next_frag_pre_opcode_bytes (fragP
);
6349 if (is_loop_opcode (opcode
))
6351 /* next_fragP should be the loop. */
6352 const fragS
*next_fragP
= next_non_empty_frag (fragP
);
6353 xtensa_opcode next_opcode
= next_frag_opcode (next_fragP
);
6356 pre_opcode_bytes
+= target_insn_size
;
6358 /* For loops, the alignment depends on the size of the
6359 instruction following the loop, not the loop instruction. */
6360 if (next_opcode
== XTENSA_UNDEFINED
)
6361 target_insn_size
= 3;
6365 xtensa_insn_length (xtensa_default_isa
, next_opcode
);
6367 if (target_insn_size
== 2)
6368 target_insn_size
= 3; /* ISA specifies this. */
6371 /* If it was 8, then we'll need a larger alignment
6373 alignment
= get_text_align_power (target_insn_size
);
6375 /* Is Now_seg valid */
6376 record_alignment (now_seg
, alignment
);
6379 as_fatal (_("expected loop opcode in relax align next target"));
6381 fill_size
= get_text_align_fill_size
6382 (address
+ pre_opcode_bytes
,
6383 get_text_align_power (target_insn_size
),
6384 target_insn_size
, TRUE
, fragP
->tc_frag_data
.is_no_density
);
6390 fill_size
= get_text_align_fill_size
6391 (address
, fragP
->fr_offset
, 1, TRUE
,
6392 fragP
->tc_frag_data
.is_no_density
);
6396 as_fatal (_("expected align_code or RELAX_ALIGN_NEXT_OPCODE"));
6399 return address
+ fill_size
;
6403 /* 3 mechanisms for relaxing an alignment:
6405 Align to a power of 2.
6406 Align so the next fragment's instruction does not cross a word boundary.
6407 Align the current instruction so that if the next instruction
6408 were 3 bytes, it would not cross a word boundary.
6412 zeros - This is easy; always insert zeros.
6413 nops - 3 and 2 byte instructions
6417 >=5 : 3 byte instruction + fn(n-3)
6418 widening - widen previous instructions. */
6421 get_widen_aligned_address (fragP
, address
)
6425 addressT align_pow
, new_address
, loop_insn_offset
;
6428 xtensa_opcode opcode
, next_opcode
;
6429 static xtensa_insnbuf insnbuf
= NULL
;
6432 insnbuf
= xtensa_insnbuf_alloc (xtensa_default_isa
);
6434 if (fragP
->fr_type
== rs_align
|| fragP
->fr_type
== rs_align_code
)
6436 align_pow
= fragP
->fr_offset
;
6437 new_address
= ((address
+ ((1 << align_pow
) - 1))
6438 << align_pow
) >> align_pow
;
6442 if (fragP
->fr_type
== rs_machine_dependent
)
6444 switch (fragP
->fr_subtype
)
6446 case RELAX_DESIRE_ALIGN
:
6448 /* The rule is: get the next fragment's FIRST instruction.
6449 Find the smallest number of bytes needed to be added
6450 in order to ensure that the next fragment is FIRST
6451 instruction will fit in a single word.
6452 i.e. 2 bytes : 0, 1, 2. mod 4
6454 If the FIRST instruction MIGHT be relaxed,
6455 assume that it will become a 3-byte instruction. */
6458 /* Check to see if it might be 2 bytes. */
6459 next_opcode
= next_frag_opcode (fragP
);
6460 if (next_opcode
!= XTENSA_UNDEFINED
6461 && xtensa_insn_length (xtensa_default_isa
, next_opcode
) == 2)
6464 assert (insn_size
<= 4);
6465 for (new_address
= address
; new_address
< address
+ 4; new_address
++)
6467 if (new_address
>> 2 == (new_address
+ insn_size
- 1) >> 2)
6470 as_bad (_("internal error aligning"));
6473 case RELAX_ALIGN_NEXT_OPCODE
:
6474 /* The rule is: get next fragment's FIRST instruction.
6475 Find the smallest number of bytes needed to be added
6476 in order to ensure that the next fragment's FIRST
6477 instruction will fit in a single word.
6478 i.e. 2 bytes : 0, 1, 2. mod 4
6480 If the FIRST instruction MIGHT be relaxed,
6481 assume that it will become a 3 byte instruction. */
6483 opcode
= next_frag_opcode (fragP
);
6484 if (opcode
== XTENSA_UNDEFINED
)
6486 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
6487 _("invalid opcode for RELAX_ALIGN_NEXT_OPCODE"));
6488 as_fatal (_("cannot continue"));
6490 insn_size
= xtensa_insn_length (xtensa_default_isa
, opcode
);
6491 assert (insn_size
<= 4);
6492 assert (is_loop_opcode (opcode
));
6494 loop_insn_offset
= 0;
6495 next_frag
= next_non_empty_frag (fragP
);
6497 /* If the loop has been expanded then the loop
6498 instruction could be at an offset from this fragment. */
6499 if (next_frag
->fr_subtype
!= RELAX_IMMED
)
6500 loop_insn_offset
= get_expanded_loop_offset (opcode
);
6502 for (new_address
= address
; new_address
< address
+ 4; new_address
++)
6504 if ((new_address
+ loop_insn_offset
+ insn_size
) >> 2 ==
6505 (new_address
+ loop_insn_offset
+ insn_size
+ 2) >> 2)
6508 as_bad (_("internal error aligning"));
6512 as_bad (_("internal error aligning"));
6516 as_bad (_("internal error aligning"));
6521 /* md_relax_frag Hook and Helper Functions. */
6523 /* Return the number of bytes added to this fragment, given that the
6524 input has been stretched already by "stretch". */
6527 xtensa_relax_frag (fragP
, stretch
, stretched_p
)
6532 int unreported
= fragP
->tc_frag_data
.unreported_expansion
;
6533 long new_stretch
= 0;
6537 as_where (&file_name
, &line
);
6538 new_logical_line (fragP
->fr_file
, fragP
->fr_line
);
6540 fragP
->tc_frag_data
.unreported_expansion
= 0;
6542 switch (fragP
->fr_subtype
)
6544 case RELAX_ALIGN_NEXT_OPCODE
:
6545 /* Always convert. */
6546 new_stretch
= relax_frag_text_align (fragP
, stretch
);
6549 case RELAX_LOOP_END
:
6553 case RELAX_LOOP_END_ADD_NOP
:
6554 /* Add a NOP and switch to .fill 0. */
6555 new_stretch
= relax_frag_add_nop (fragP
);
6558 case RELAX_DESIRE_ALIGN
:
6559 /* We REALLY want to change the relaxation order here. This
6560 should do NOTHING. The narrowing before it will either align
6565 case RELAX_LITERAL_FINAL
:
6568 case RELAX_LITERAL_NR
:
6570 fragP
->fr_subtype
= RELAX_LITERAL_FINAL
;
6571 assert (unreported
== lit_size
);
6572 memset (&fragP
->fr_literal
[fragP
->fr_fix
], 0, 4);
6573 fragP
->fr_var
-= lit_size
;
6574 fragP
->fr_fix
+= lit_size
;
6579 new_stretch
= relax_frag_narrow (fragP
, stretch
);
6583 case RELAX_IMMED_STEP1
:
6584 case RELAX_IMMED_STEP2
:
6585 /* Place the immediate. */
6586 new_stretch
= relax_frag_immed (now_seg
, fragP
, stretch
,
6587 fragP
->fr_subtype
- RELAX_IMMED
,
6591 case RELAX_LITERAL_POOL_BEGIN
:
6592 case RELAX_LITERAL_POOL_END
:
6593 /* No relaxation required. */
6597 as_bad (_("bad relaxation state"));
6600 new_logical_line (file_name
, line
);
6606 relax_frag_text_align (fragP
, stretch
)
6610 addressT old_address
, old_next_address
, old_size
;
6611 addressT new_address
, new_next_address
, new_size
;
6614 /* Overview of the relaxation procedure for alignment
6615 inside an executable section:
6617 The old size is stored in the tc_frag_data.text_expansion field.
6619 Calculate the new address, fix up the text_expansion and
6620 return the growth. */
6622 /* Calculate the old address of this fragment and the next fragment. */
6623 old_address
= fragP
->fr_address
- stretch
;
6624 old_next_address
= (fragP
->fr_address
- stretch
+ fragP
->fr_fix
+
6625 fragP
->tc_frag_data
.text_expansion
);
6626 old_size
= old_next_address
- old_address
;
6628 /* Calculate the new address of this fragment and the next fragment. */
6629 new_address
= fragP
->fr_address
;
6631 get_noop_aligned_address (fragP
, fragP
->fr_address
+ fragP
->fr_fix
);
6632 new_size
= new_next_address
- new_address
;
6634 growth
= new_size
- old_size
;
6636 /* Fix up the text_expansion field and return the new growth. */
6637 fragP
->tc_frag_data
.text_expansion
+= growth
;
6642 /* Add a NOP (i.e., "or a1, a1, a1"). Use the 3-byte one because we
6643 don't know about the availability of density yet. TODO: When the
6644 flags are stored per fragment, use NOP.N when possible. */
6647 relax_frag_add_nop (fragP
)
6650 static xtensa_insnbuf insnbuf
= NULL
;
6652 char *nop_buf
= fragP
->fr_literal
+ fragP
->fr_fix
;
6655 insnbuf
= xtensa_insnbuf_alloc (xtensa_default_isa
);
6657 tinsn_init (&t_insn
);
6658 t_insn
.opcode
= xtensa_or_opcode
;
6659 assert (t_insn
.opcode
!= XTENSA_UNDEFINED
);
6662 set_expr_const (&t_insn
.tok
[0], 1);
6663 set_expr_const (&t_insn
.tok
[1], 1);
6664 set_expr_const (&t_insn
.tok
[2], 1);
6666 tinsn_to_insnbuf (&t_insn
, insnbuf
);
6667 fragP
->tc_frag_data
.is_insn
= TRUE
;
6668 xtensa_insnbuf_to_chars (xtensa_default_isa
, insnbuf
, nop_buf
);
6670 length
= xtensa_insn_length (xtensa_default_isa
, t_insn
.opcode
);
6671 if (fragP
->fr_var
< length
)
6673 as_warn (_("fr_var (%ld) < length (%d); ignoring"),
6674 fragP
->fr_var
, length
);
6679 fragP
->fr_fix
+= length
;
6680 fragP
->fr_var
-= length
;
6687 relax_frag_narrow (fragP
, stretch
)
6691 /* Overview of the relaxation procedure for alignment inside an
6692 executable section: Find the number of widenings required and the
6693 number of nop bytes required. Store the number of bytes ALREADY
6694 widened. If there are enough instructions to widen (must go back
6695 ONLY through NARROW fragments), mark each of the fragments as TO BE
6696 widened, recalculate the fragment addresses. */
6698 assert (fragP
->fr_type
== rs_machine_dependent
6699 && fragP
->fr_subtype
== RELAX_NARROW
);
6701 if (!future_alignment_required (fragP
, 0))
6703 /* If already expanded but no longer needed because of a prior
6704 stretch, it is SAFE to unexpand because the next fragment will
6705 NEVER start at an address > the previous time through the
6707 if (fragP
->tc_frag_data
.text_expansion
)
6711 fragP
->tc_frag_data
.text_expansion
= 0;
6714 /* Otherwise we have to live with this bad choice. */
6720 if (fragP
->tc_frag_data
.text_expansion
== 0)
6722 fragP
->tc_frag_data
.text_expansion
= 1;
6731 future_alignment_required (fragP
, stretch
)
6735 long address
= fragP
->fr_address
+ stretch
;
6737 addressT aligned_address
;
6738 offsetT desired_diff
;
6742 /* Limit this to a small search. */
6745 address
+= fragP
->fr_fix
;
6747 switch (fragP
->fr_type
)
6750 address
+= fragP
->fr_offset
* fragP
->fr_var
;
6753 case rs_machine_dependent
:
6754 switch (fragP
->fr_subtype
)
6757 /* address += fragP->fr_fix; */
6762 address
+= (/* fragP->fr_fix + */
6763 fragP
->tc_frag_data
.text_expansion
);
6766 case RELAX_ALIGN_NEXT_OPCODE
:
6767 case RELAX_DESIRE_ALIGN
:
6768 /* address += fragP->fr_fix; */
6769 aligned_address
= get_widen_aligned_address (fragP
, address
);
6770 desired_diff
= aligned_address
- address
;
6771 assert (desired_diff
>= 0);
6772 /* If there are enough wideners in between do it. */
6773 /* return (num_widens == desired_diff); */
6774 if (num_widens
== desired_diff
)
6776 if (fragP
->fr_subtype
== RELAX_ALIGN_NEXT_OPCODE
)
6788 fragP
= fragP
->fr_next
;
6796 relax_frag_immed (segP
, fragP
, stretch
, min_steps
, stretched_p
)
6803 static xtensa_insnbuf insnbuf
= NULL
;
6806 bfd_boolean negatable_branch
= FALSE
;
6807 bfd_boolean branch_jmp_to_next
= FALSE
;
6809 offsetT frag_offset
;
6812 int num_text_bytes
, num_literal_bytes
;
6813 int literal_diff
, text_diff
;
6815 assert (fragP
->fr_opcode
!= NULL
);
6818 insnbuf
= xtensa_insnbuf_alloc (xtensa_default_isa
);
6820 tinsn_from_chars (&t_insn
, fragP
->fr_opcode
);
6821 tinsn_immed_from_frag (&t_insn
, fragP
);
6823 negatable_branch
= is_negatable_branch (&t_insn
);
6825 old_size
= xtensa_insn_length (xtensa_default_isa
, t_insn
.opcode
);
6827 if (software_avoid_b_j_loop_end
)
6828 branch_jmp_to_next
= is_branch_jmp_to_next (&t_insn
, fragP
);
6830 /* Special case: replace a branch to the next instruction with a NOP.
6831 This is required to work around a hardware bug in T1040.0 and also
6832 serves as an optimization. */
6834 if (branch_jmp_to_next
6835 && ((old_size
== 2) || (old_size
== 3))
6836 && !next_frag_is_loop_target (fragP
))
6839 /* Here is the fun stuff: Get the immediate field from this
6840 instruction. If it fits, we are done. If not, find the next
6841 instruction sequence that fits. */
6843 frag_offset
= fragP
->fr_opcode
- fragP
->fr_literal
;
6844 istack_init (&istack
);
6845 num_steps
= xg_assembly_relax (&istack
, &t_insn
, segP
, fragP
, frag_offset
,
6846 min_steps
, stretch
);
6847 if (num_steps
< min_steps
)
6849 as_fatal (_("internal error: relaxation failed"));
6853 if (num_steps
> RELAX_IMMED_MAXSTEPS
)
6855 as_fatal (_("internal error: relaxation requires too many steps"));
6859 fragP
->fr_subtype
= (int) RELAX_IMMED
+ num_steps
;
6861 /* Figure out the number of bytes needed. */
6863 num_text_bytes
= get_num_stack_text_bytes (&istack
) - old_size
;
6864 num_literal_bytes
= get_num_stack_literal_bytes (&istack
);
6865 literal_diff
= num_literal_bytes
- fragP
->tc_frag_data
.literal_expansion
;
6866 text_diff
= num_text_bytes
- fragP
->tc_frag_data
.text_expansion
;
6868 /* It MUST get larger. If not, we could get an infinite loop. */
6869 know (num_text_bytes
>= 0);
6870 know (literal_diff
>= 0 && text_diff
>= 0);
6872 fragP
->tc_frag_data
.text_expansion
= num_text_bytes
;
6873 fragP
->tc_frag_data
.literal_expansion
= num_literal_bytes
;
6875 /* Find the associated expandable literal for this. */
6876 if (literal_diff
!= 0)
6878 lit_fragP
= fragP
->tc_frag_data
.literal_frag
;
6881 assert (literal_diff
== 4);
6882 lit_fragP
->tc_frag_data
.unreported_expansion
+= literal_diff
;
6884 /* We expect that the literal section state has NOT been
6886 assert (lit_fragP
->fr_type
== rs_machine_dependent
6887 && lit_fragP
->fr_subtype
== RELAX_LITERAL
);
6888 lit_fragP
->fr_subtype
= RELAX_LITERAL_NR
;
6890 /* We need to mark this section for another iteration
6896 /* This implicitly uses the assumption that a branch is negated
6897 when the size of the output increases by at least 2 bytes. */
6899 if (negatable_branch
&& num_text_bytes
>= 2)
6901 /* If next frag is a loop end, then switch it to add a NOP. */
6902 update_next_frag_nop_state (fragP
);
6909 /* md_convert_frag Hook and Helper Functions. */
6912 md_convert_frag (abfd
, sec
, fragp
)
6913 bfd
*abfd ATTRIBUTE_UNUSED
;
6920 as_where (&file_name
, &line
);
6921 new_logical_line (fragp
->fr_file
, fragp
->fr_line
);
6923 switch (fragp
->fr_subtype
)
6925 case RELAX_ALIGN_NEXT_OPCODE
:
6926 /* Always convert. */
6927 convert_frag_align_next_opcode (fragp
);
6930 case RELAX_DESIRE_ALIGN
:
6931 /* Do nothing. If not aligned already, too bad. */
6935 case RELAX_LITERAL_FINAL
:
6939 /* No conversion. */
6940 convert_frag_narrow (fragp
);
6944 case RELAX_IMMED_STEP1
:
6945 case RELAX_IMMED_STEP2
:
6946 /* Place the immediate. */
6947 convert_frag_immed (sec
, fragp
, fragp
->fr_subtype
- RELAX_IMMED
);
6950 case RELAX_LITERAL_NR
:
6951 if (use_literal_section
)
6953 /* This should have been handled during relaxation. When
6954 relaxing a code segment, literals sometimes need to be
6955 added to the corresponding literal segment. If that
6956 literal segment has already been relaxed, then we end up
6957 in this situation. Marking the literal segments as data
6958 would make this happen less often (since GAS always relaxes
6959 code before data), but we could still get into trouble if
6960 there are instructions in a segment that is not marked as
6961 containing code. Until we can implement a better solution,
6962 cheat and adjust the addresses of all the following frags.
6963 This could break subsequent alignments, but the linker's
6964 literal coalescing will do that anyway. */
6967 fragp
->fr_subtype
= RELAX_LITERAL_FINAL
;
6968 assert (fragp
->tc_frag_data
.unreported_expansion
== 4);
6969 memset (&fragp
->fr_literal
[fragp
->fr_fix
], 0, 4);
6972 for (f
= fragp
->fr_next
; f
; f
= f
->fr_next
)
6976 as_bad (_("invalid relaxation fragment result"));
6981 new_logical_line (file_name
, line
);
6986 convert_frag_align_next_opcode (fragp
)
6989 char *nop_buf
; /* Location for Writing. */
6992 bfd_boolean use_no_density
= fragp
->tc_frag_data
.is_no_density
;
6993 addressT aligned_address
;
6994 size_t fill_size
, nop_count
;
6996 aligned_address
= get_noop_aligned_address (fragp
, fragp
->fr_address
+
6998 fill_size
= aligned_address
- (fragp
->fr_address
+ fragp
->fr_fix
);
6999 nop_count
= get_text_align_nop_count (fill_size
, use_no_density
);
7000 nop_buf
= fragp
->fr_literal
+ fragp
->fr_fix
;
7002 for (i
= 0; i
< nop_count
; i
++)
7005 nop_size
= get_text_align_nth_nop_size (fill_size
, i
, use_no_density
);
7007 assemble_nop (nop_size
, nop_buf
);
7008 nop_buf
+= nop_size
;
7011 fragp
->fr_fix
+= fill_size
;
7012 fragp
->fr_var
-= fill_size
;
7017 convert_frag_narrow (fragP
)
7020 static xtensa_insnbuf insnbuf
= NULL
;
7021 TInsn t_insn
, single_target
;
7022 int size
, old_size
, diff
, error_val
;
7023 offsetT frag_offset
;
7025 if (fragP
->tc_frag_data
.text_expansion
== 0)
7027 /* No conversion. */
7032 assert (fragP
->fr_opcode
!= NULL
);
7035 insnbuf
= xtensa_insnbuf_alloc (xtensa_default_isa
);
7037 tinsn_from_chars (&t_insn
, fragP
->fr_opcode
);
7038 tinsn_immed_from_frag (&t_insn
, fragP
);
7040 /* Just convert it to a wide form.... */
7042 old_size
= xtensa_insn_length (xtensa_default_isa
, t_insn
.opcode
);
7044 tinsn_init (&single_target
);
7045 frag_offset
= fragP
->fr_opcode
- fragP
->fr_literal
;
7047 error_val
= xg_expand_narrow (&single_target
, &t_insn
);
7049 as_bad (_("unable to widen instruction"));
7051 size
= xtensa_insn_length (xtensa_default_isa
, single_target
.opcode
);
7052 xg_emit_insn_to_buf (&single_target
, fragP
->fr_opcode
,
7053 fragP
, frag_offset
, TRUE
);
7055 diff
= size
- old_size
;
7057 assert (diff
<= fragP
->fr_var
);
7058 fragP
->fr_var
-= diff
;
7059 fragP
->fr_fix
+= diff
;
7067 convert_frag_immed (segP
, fragP
, min_steps
)
7072 char *immed_instr
= fragP
->fr_opcode
;
7073 static xtensa_insnbuf insnbuf
= NULL
;
7075 bfd_boolean expanded
= FALSE
;
7076 char *fr_opcode
= fragP
->fr_opcode
;
7077 bfd_boolean branch_jmp_to_next
= FALSE
;
7080 assert (fragP
->fr_opcode
!= NULL
);
7083 insnbuf
= xtensa_insnbuf_alloc (xtensa_default_isa
);
7085 tinsn_from_chars (&orig_t_insn
, fragP
->fr_opcode
);
7086 tinsn_immed_from_frag (&orig_t_insn
, fragP
);
7088 /* Here is the fun stuff: Get the immediate field from this
7089 instruction. If it fits, we're done. If not, find the next
7090 instruction sequence that fits. */
7092 if (software_avoid_b_j_loop_end
)
7093 branch_jmp_to_next
= is_branch_jmp_to_next (&orig_t_insn
, fragP
);
7095 if (branch_jmp_to_next
&& !next_frag_is_loop_target (fragP
))
7097 /* Conversion just inserts a NOP and marks the fix as completed. */
7098 size
= xtensa_insn_length (xtensa_default_isa
, orig_t_insn
.opcode
);
7099 assemble_nop (size
, fragP
->fr_opcode
);
7106 symbolS
*lit_sym
= NULL
;
7110 symbolS
*gen_label
= NULL
;
7111 offsetT frag_offset
;
7113 /* It does not fit. Find something that does and
7114 convert immediately. */
7115 frag_offset
= fragP
->fr_opcode
- fragP
->fr_literal
;
7116 istack_init (&istack
);
7117 xg_assembly_relax (&istack
, &orig_t_insn
,
7118 segP
, fragP
, frag_offset
, min_steps
, 0);
7120 old_size
= xtensa_insn_length (xtensa_default_isa
, orig_t_insn
.opcode
);
7122 /* Assemble this right inline. */
7124 /* First, create the mapping from a label name to the REAL label. */
7126 for (i
= 0; i
< istack
.ninsn
; i
++)
7128 TInsn
*t_insn
= &istack
.insn
[i
];
7132 switch (t_insn
->insn_type
)
7135 if (lit_sym
!= NULL
)
7136 as_bad (_("multiple literals in expansion"));
7137 /* First find the appropriate space in the literal pool. */
7138 lit_frag
= fragP
->tc_frag_data
.literal_frag
;
7139 if (lit_frag
== NULL
)
7140 as_bad (_("no registered fragment for literal"));
7141 if (t_insn
->ntok
!= 1)
7142 as_bad (_("number of literal tokens != 1"));
7144 /* Set the literal symbol and add a fixup. */
7145 lit_sym
= lit_frag
->fr_symbol
;
7149 assert (gen_label
== NULL
);
7150 gen_label
= symbol_new (FAKE_LABEL_NAME
, now_seg
,
7151 fragP
->fr_opcode
- fragP
->fr_literal
+
7156 size
= xtensa_insn_length (xtensa_default_isa
, t_insn
->opcode
);
7163 for (i
= 0; i
< istack
.ninsn
; i
++)
7165 TInsn
*t_insn
= &istack
.insn
[i
];
7170 switch (t_insn
->insn_type
)
7173 lit_frag
= fragP
->tc_frag_data
.literal_frag
;
7174 /* already checked */
7175 assert (lit_frag
!= NULL
);
7176 assert (lit_sym
!= NULL
);
7177 assert (t_insn
->ntok
== 1);
7179 target_seg
= S_GET_SEGMENT (lit_sym
);
7180 assert (target_seg
);
7181 fix_new_exp_in_seg (target_seg
, 0, lit_frag
, 0, 4,
7182 &t_insn
->tok
[0], FALSE
, BFD_RELOC_32
);
7189 xg_resolve_labels (t_insn
, gen_label
);
7190 xg_resolve_literals (t_insn
, lit_sym
);
7191 size
= xtensa_insn_length (xtensa_default_isa
, t_insn
->opcode
);
7193 xg_emit_insn_to_buf (t_insn
, immed_instr
, fragP
,
7194 immed_instr
- fragP
->fr_literal
, TRUE
);
7195 immed_instr
+= size
;
7200 diff
= total_size
- old_size
;
7204 assert (diff
<= fragP
->fr_var
);
7205 fragP
->fr_var
-= diff
;
7206 fragP
->fr_fix
+= diff
;
7212 /* Check for undefined immediates in LOOP instructions. */
7213 if (is_loop_opcode (orig_t_insn
.opcode
))
7216 sym
= orig_t_insn
.tok
[1].X_add_symbol
;
7217 if (sym
!= NULL
&& !S_IS_DEFINED (sym
))
7219 as_bad (_("unresolved loop target symbol: %s"), S_GET_NAME (sym
));
7222 sym
= orig_t_insn
.tok
[1].X_op_symbol
;
7223 if (sym
!= NULL
&& !S_IS_DEFINED (sym
))
7225 as_bad (_("unresolved loop target symbol: %s"), S_GET_NAME (sym
));
7230 if (expanded
&& is_loop_opcode (orig_t_insn
.opcode
))
7231 convert_frag_immed_finish_loop (segP
, fragP
, &orig_t_insn
);
7233 if (expanded
&& is_direct_call_opcode (orig_t_insn
.opcode
))
7235 /* Add an expansion note on the expanded instruction. */
7236 fix_new_exp_in_seg (now_seg
, 0, fragP
, fr_opcode
- fragP
->fr_literal
, 4,
7237 &orig_t_insn
.tok
[0], TRUE
,
7238 BFD_RELOC_XTENSA_ASM_EXPAND
);
7244 /* Add a new fix expression into the desired segment. We have to
7245 switch to that segment to do this. */
7248 fix_new_exp_in_seg (new_seg
, new_subseg
,
7249 frag
, where
, size
, exp
, pcrel
, r_type
)
7257 bfd_reloc_code_real_type r_type
;
7261 subsegT subseg
= now_subseg
;
7262 assert (new_seg
!= 0);
7263 subseg_set (new_seg
, new_subseg
);
7265 if (r_type
== BFD_RELOC_32
7266 && exp
->X_add_symbol
7267 && symbol_get_tc (exp
->X_add_symbol
)->plt
== 1)
7269 r_type
= BFD_RELOC_XTENSA_PLT
;
7272 new_fix
= fix_new_exp (frag
, where
, size
, exp
, pcrel
, r_type
);
7273 subseg_set (seg
, subseg
);
7278 /* Relax a loop instruction so that it can span loop >256 bytes. */
7284 addi as, as, lo8(label-.L1)
7285 addmi as, as, mid8(label-.L1)
7295 convert_frag_immed_finish_loop (segP
, fragP
, t_insn
)
7303 unsigned long target
;
7304 static xtensa_insnbuf insnbuf
= NULL
;
7305 unsigned int loop_length
, loop_length_hi
, loop_length_lo
;
7306 xtensa_isa isa
= xtensa_default_isa
;
7307 addressT loop_offset
;
7308 addressT addi_offset
= 9;
7309 addressT addmi_offset
= 12;
7312 insnbuf
= xtensa_insnbuf_alloc (isa
);
7314 /* Get the loop offset. */
7315 loop_offset
= get_expanded_loop_offset (t_insn
->opcode
);
7316 /* Validate that there really is a LOOP at the loop_offset. */
7317 tinsn_from_chars (&loop_insn
, fragP
->fr_opcode
+ loop_offset
);
7319 if (!is_loop_opcode (loop_insn
.opcode
))
7321 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
7322 _("loop relaxation specification does not correspond"));
7325 addi_offset
+= loop_offset
;
7326 addmi_offset
+= loop_offset
;
7328 assert (t_insn
->ntok
== 2);
7329 target
= get_expression_value (segP
, &t_insn
->tok
[1]);
7332 know (symbolP
->sy_frag
);
7333 know (!(S_GET_SEGMENT (symbolP
) == absolute_section
)
7334 || symbol_get_frag (symbolP
) == &zero_address_frag
);
7336 loop_length
= target
- (fragP
->fr_address
+ fragP
->fr_fix
);
7337 loop_length_hi
= loop_length
& ~0x0ff;
7338 loop_length_lo
= loop_length
& 0x0ff;
7339 if (loop_length_lo
>= 128)
7341 loop_length_lo
-= 256;
7342 loop_length_hi
+= 256;
7345 /* Because addmi sign-extends the immediate, 'loop_length_hi' can be at most
7346 32512. If the loop is larger than that, then we just fail. */
7347 if (loop_length_hi
> 32512)
7348 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
7349 _("loop too long for LOOP instruction"));
7351 tinsn_from_chars (&addi_insn
, fragP
->fr_opcode
+ addi_offset
);
7352 assert (addi_insn
.opcode
== xtensa_addi_opcode
);
7354 tinsn_from_chars (&addmi_insn
, fragP
->fr_opcode
+ addmi_offset
);
7355 assert (addmi_insn
.opcode
== xtensa_addmi_opcode
);
7357 set_expr_const (&addi_insn
.tok
[2], loop_length_lo
);
7358 tinsn_to_insnbuf (&addi_insn
, insnbuf
);
7360 fragP
->tc_frag_data
.is_insn
= TRUE
;
7361 xtensa_insnbuf_to_chars (isa
, insnbuf
, fragP
->fr_opcode
+ addi_offset
);
7363 set_expr_const (&addmi_insn
.tok
[2], loop_length_hi
);
7364 tinsn_to_insnbuf (&addmi_insn
, insnbuf
);
7365 xtensa_insnbuf_to_chars (isa
, insnbuf
, fragP
->fr_opcode
+ addmi_offset
);
7370 get_expression_value (segP
, exp
)
7374 if (exp
->X_op
== O_constant
)
7375 return exp
->X_add_number
;
7376 if (exp
->X_op
== O_symbol
)
7378 /* Find the fragment. */
7379 symbolS
*sym
= exp
->X_add_symbol
;
7381 assert (S_GET_SEGMENT (sym
) == segP
7382 || S_GET_SEGMENT (sym
) == absolute_section
);
7384 return (S_GET_VALUE (sym
) + exp
->X_add_number
);
7386 as_bad (_("invalid expression evaluation type %d"), exp
->X_op
);
7391 /* A map that keeps information on a per-subsegment basis. This is
7392 maintained during initial assembly, but is invalid once the
7393 subsegments are smashed together. I.E., it cannot be used during
7396 typedef struct subseg_map_struct
7405 struct subseg_map_struct
*next
;
7408 static subseg_map
*sseg_map
= NULL
;
7412 get_last_insn_flags (seg
, subseg
)
7416 subseg_map
*subseg_e
;
7418 for (subseg_e
= sseg_map
; subseg_e
!= NULL
; subseg_e
= subseg_e
->next
)
7419 if (seg
== subseg_e
->seg
&& subseg
== subseg_e
->subseg
)
7420 return subseg_e
->flags
;
7427 set_last_insn_flags (seg
, subseg
, fl
, val
)
7433 subseg_map
*subseg_e
;
7435 for (subseg_e
= sseg_map
; subseg_e
; subseg_e
= subseg_e
->next
)
7436 if (seg
== subseg_e
->seg
&& subseg
== subseg_e
->subseg
)
7441 subseg_e
= (subseg_map
*) xmalloc (sizeof (subseg_map
));
7442 memset (subseg_e
, 0, sizeof (subseg_map
));
7443 subseg_e
->seg
= seg
;
7444 subseg_e
->subseg
= subseg
;
7445 subseg_e
->flags
= 0;
7446 subseg_e
->next
= sseg_map
;
7447 sseg_map
= subseg_e
;
7451 subseg_e
->flags
|= fl
;
7453 subseg_e
->flags
&= ~fl
;
7457 /* Segment Lists and emit_state Stuff. */
7459 /* Remove the segment from the global sections list. */
7462 xtensa_remove_section (sec
)
7465 /* Handle brain-dead bfd_section_list_remove macro, which
7466 expect the address of the prior section's "next" field, not
7467 just the address of the section to remove. */
7469 segT
*ps_next_ptr
= &stdoutput
->sections
;
7470 while (*ps_next_ptr
!= sec
&& *ps_next_ptr
!= NULL
)
7471 ps_next_ptr
= &(*ps_next_ptr
)->next
;
7473 assert (*ps_next_ptr
!= NULL
);
7475 bfd_section_list_remove (stdoutput
, ps_next_ptr
);
7480 xtensa_insert_section (after_sec
, sec
)
7484 segT
*after_sec_next
;
7485 if (after_sec
== NULL
)
7486 after_sec_next
= &stdoutput
->sections
;
7488 after_sec_next
= &after_sec
->next
;
7490 bfd_section_list_insert (stdoutput
, after_sec_next
, sec
);
7495 xtensa_move_seg_list_to_beginning (head
)
7501 segT literal_section
= head
->seg
;
7503 /* Move the literal section to the front of the section list. */
7504 assert (literal_section
);
7505 xtensa_remove_section (literal_section
);
7506 xtensa_insert_section (NULL
, literal_section
);
7514 xtensa_move_literals ()
7517 frchainS
*frchain_from
, *frchain_to
;
7518 fragS
*search_frag
, *next_frag
, *last_frag
, *literal_pool
, *insert_after
;
7519 fragS
**frag_splice
;
7522 fixS
*fix
, *next_fix
, **fix_splice
;
7524 /* As clunky as this is, we can't rely on frag_var
7525 and frag_variant to get called in all situations. */
7527 segment
= literal_head
->next
;
7530 frchain_from
= seg_info (segment
->seg
)->frchainP
;
7531 search_frag
= frchain_from
->frch_root
;
7534 search_frag
->tc_frag_data
.is_literal
= TRUE
;
7535 search_frag
= search_frag
->fr_next
;
7537 segment
= segment
->next
;
7540 if (use_literal_section
)
7543 segment
= literal_head
->next
;
7546 frchain_from
= seg_info (segment
->seg
)->frchainP
;
7547 search_frag
= frchain_from
->frch_root
;
7548 literal_pool
= NULL
;
7550 frag_splice
= &(frchain_from
->frch_root
);
7552 while (!search_frag
->tc_frag_data
.literal_frag
)
7554 assert (search_frag
->fr_fix
== 0
7555 || search_frag
->fr_type
== rs_align
);
7556 search_frag
= search_frag
->fr_next
;
7559 assert (search_frag
->tc_frag_data
.literal_frag
->fr_subtype
7560 == RELAX_LITERAL_POOL_BEGIN
);
7561 xtensa_switch_section_emit_state (&state
, segment
->seg
, 0);
7563 /* Make sure that all the frags in this series are closed, and
7564 that there is at least one left over of zero-size. This
7565 prevents us from making a segment with an frchain without any
7567 frag_variant (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
7568 last_frag
= frag_now
;
7569 frag_variant (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
7571 while (search_frag
!= frag_now
)
7573 next_frag
= search_frag
->fr_next
;
7575 /* First, move the frag out of the literal section and
7576 to the appropriate place. */
7577 if (search_frag
->tc_frag_data
.literal_frag
)
7579 literal_pool
= search_frag
->tc_frag_data
.literal_frag
;
7580 assert (literal_pool
->fr_subtype
== RELAX_LITERAL_POOL_BEGIN
);
7581 /* Note that we set this fr_var to be a fix
7582 chain when we created the literal pool location
7583 as RELAX_LITERAL_POOL_BEGIN. */
7584 frchain_to
= (frchainS
*) literal_pool
->fr_var
;
7586 insert_after
= literal_pool
;
7588 while (insert_after
->fr_next
->fr_subtype
!= RELAX_LITERAL_POOL_END
)
7589 insert_after
= insert_after
->fr_next
;
7591 dest_seg
= (segT
) insert_after
->fr_next
->fr_var
;
7593 *frag_splice
= next_frag
;
7594 search_frag
->fr_next
= insert_after
->fr_next
;
7595 insert_after
->fr_next
= search_frag
;
7596 search_frag
->tc_frag_data
.lit_seg
= dest_seg
;
7598 /* Now move any fixups associated with this frag to the
7600 fix
= frchain_from
->fix_root
;
7601 fix_splice
= &(frchain_from
->fix_root
);
7604 next_fix
= fix
->fx_next
;
7605 if (fix
->fx_frag
== search_frag
)
7607 *fix_splice
= next_fix
;
7608 fix
->fx_next
= frchain_to
->fix_root
;
7609 frchain_to
->fix_root
= fix
;
7610 if (frchain_to
->fix_tail
== NULL
)
7611 frchain_to
->fix_tail
= fix
;
7614 fix_splice
= &(fix
->fx_next
);
7617 search_frag
= next_frag
;
7620 if (frchain_from
->fix_root
!= NULL
)
7622 frchain_from
= seg_info (segment
->seg
)->frchainP
;
7623 as_warn (_("fixes not all moved from %s"), segment
->seg
->name
);
7625 assert (frchain_from
->fix_root
== NULL
);
7627 frchain_from
->fix_tail
= NULL
;
7628 xtensa_restore_emit_state (&state
);
7629 segment
= segment
->next
;
7632 xtensa_move_frag_symbols ();
7637 xtensa_move_frag_symbol (sym
)
7640 fragS
*frag
= symbol_get_frag (sym
);
7642 if (frag
->tc_frag_data
.lit_seg
!= (segT
) 0)
7643 S_SET_SEGMENT (sym
, frag
->tc_frag_data
.lit_seg
);
7648 xtensa_move_frag_symbols ()
7652 /* Although you might think that only one of these lists should be
7653 searched, it turns out that the difference of the two sets
7654 (either way) is not empty. They do overlap quite a bit,
7657 for (symbolP
= symbol_rootP
; symbolP
; symbolP
= symbolP
->sy_next
)
7658 xtensa_move_frag_symbol (symbolP
);
7660 map_over_defined_symbols (xtensa_move_frag_symbol
);
7665 xtensa_reorder_seg_list (head
, after
)
7669 /* Move all of the sections in the section list to come
7670 after "after" in the gnu segment list. */
7675 segT literal_section
= head
->seg
;
7677 /* Move the literal section after "after". */
7678 assert (literal_section
);
7679 if (literal_section
!= after
)
7681 xtensa_remove_section (literal_section
);
7682 xtensa_insert_section (after
, literal_section
);
7690 /* Push all the literal segments to the end of the gnu list. */
7693 xtensa_reorder_segments ()
7700 for (sec
= stdoutput
->sections
; sec
!= NULL
; sec
= sec
->next
)
7703 /* Now that we have the last section, push all the literal
7704 sections to the end. */
7705 last_sec
= get_last_sec ();
7706 xtensa_reorder_seg_list (literal_head
, last_sec
);
7707 xtensa_reorder_seg_list (init_literal_head
, last_sec
);
7708 xtensa_reorder_seg_list (fini_literal_head
, last_sec
);
7710 /* Now perform the final error check. */
7711 for (sec
= stdoutput
->sections
; sec
!= NULL
; sec
= sec
->next
)
7713 assert (new_count
== old_count
);
7720 segT last_sec
= stdoutput
->sections
;
7721 while (last_sec
->next
!= NULL
)
7722 last_sec
= last_sec
->next
;
7728 /* Change the emit state (seg, subseg, and frag related stuff) to the
7729 correct location. Return a emit_state which can be passed to
7730 xtensa_restore_emit_state to return to current fragment. */
7733 xtensa_switch_to_literal_fragment (result
)
7736 /* When we mark a literal pool location, we want to put a frag in
7737 the literal pool that points to it. But to do that, we want to
7738 switch_to_literal_fragment. But literal sections don't have
7739 literal pools, so their location is always null, so we would
7740 recurse forever. This is kind of hacky, but it works. */
7742 static bfd_boolean recursive
= FALSE
;
7743 fragS
*pool_location
= get_literal_pool_location (now_seg
);
7744 bfd_boolean is_init
=
7745 (now_seg
&& !strcmp (segment_name (now_seg
), INIT_SECTION_NAME
));
7747 bfd_boolean is_fini
=
7748 (now_seg
&& !strcmp (segment_name (now_seg
), FINI_SECTION_NAME
));
7751 if (pool_location
== NULL
7752 && !use_literal_section
7754 && !is_init
&& ! is_fini
)
7756 as_warn (_("inlining literal pool; "
7757 "specify location with .literal_position."));
7759 xtensa_mark_literal_pool_location ();
7763 /* Special case: If we are in the ".fini" or ".init" section, then
7764 we will ALWAYS be generating to the ".fini.literal" and
7765 ".init.literal" sections. */
7769 cache_literal_section (init_literal_head
,
7770 default_lit_sections
.init_lit_seg_name
,
7771 &default_lit_sections
.init_lit_seg
);
7772 xtensa_switch_section_emit_state (result
,
7773 default_lit_sections
.init_lit_seg
, 0);
7777 cache_literal_section (fini_literal_head
,
7778 default_lit_sections
.fini_lit_seg_name
,
7779 &default_lit_sections
.fini_lit_seg
);
7780 xtensa_switch_section_emit_state (result
,
7781 default_lit_sections
.fini_lit_seg
, 0);
7785 cache_literal_section (literal_head
,
7786 default_lit_sections
.lit_seg_name
,
7787 &default_lit_sections
.lit_seg
);
7788 xtensa_switch_section_emit_state (result
,
7789 default_lit_sections
.lit_seg
, 0);
7792 if (!use_literal_section
&&
7793 !is_init
&& !is_fini
&&
7794 get_literal_pool_location (now_seg
) != pool_location
)
7796 /* Close whatever frag is there. */
7797 frag_variant (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
7798 frag_now
->tc_frag_data
.literal_frag
= pool_location
;
7799 frag_variant (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
7802 /* Do a 4 byte align here. */
7803 frag_align (2, 0, 0);
7807 /* Call this function before emitting data into the literal section.
7808 This is a helper function for xtensa_switch_to_literal_fragment.
7809 This is similar to a .section new_now_seg subseg. */
7812 xtensa_switch_section_emit_state (state
, new_now_seg
, new_now_subseg
)
7815 subsegT new_now_subseg
;
7817 state
->name
= now_seg
->name
;
7818 state
->now_seg
= now_seg
;
7819 state
->now_subseg
= now_subseg
;
7820 state
->generating_literals
= generating_literals
;
7821 generating_literals
++;
7822 subseg_new (segment_name (new_now_seg
), new_now_subseg
);
7826 /* Use to restore the emitting into the normal place. */
7829 xtensa_restore_emit_state (state
)
7832 generating_literals
= state
->generating_literals
;
7833 subseg_new (state
->name
, state
->now_subseg
);
7837 /* Get a segment of a given name. If the segment is already
7838 present, return it; otherwise, create a new one. */
7841 cache_literal_section (head
, name
, seg
)
7846 segT current_section
= now_seg
;
7847 int current_subsec
= now_subseg
;
7851 *seg
= retrieve_literal_seg (head
, name
);
7852 subseg_set (current_section
, current_subsec
);
7856 /* Get a segment of a given name. If the segment is already
7857 present, return it; otherwise, create a new one. */
7860 retrieve_literal_seg (head
, name
)
7868 ret
= seg_present (name
);
7871 ret
= subseg_new (name
, (subsegT
) 0);
7872 add_seg_list (head
, ret
);
7873 bfd_set_section_flags (stdoutput
, ret
, SEC_HAS_CONTENTS
|
7874 SEC_READONLY
| SEC_ALLOC
| SEC_LOAD
| SEC_CODE
);
7875 bfd_set_section_alignment (stdoutput
, ret
, 2);
7882 /* Return a segment of a given name if it is present. */
7889 seg
= stdoutput
->sections
;
7893 if (!strcmp (segment_name (seg
), name
))
7902 /* Add a segment to a segment list. */
7905 add_seg_list (head
, seg
)
7910 n
= (seg_list
*) xmalloc (sizeof (seg_list
));
7914 n
->next
= head
->next
;
7919 /* Set up Property Tables after Relaxation. */
7921 #define XTENSA_INSN_SEC_NAME ".xt.insn"
7922 #define XTENSA_LIT_SEC_NAME ".xt.lit"
7925 xtensa_post_relax_hook ()
7927 xtensa_move_seg_list_to_beginning (literal_head
);
7928 xtensa_move_seg_list_to_beginning (init_literal_head
);
7929 xtensa_move_seg_list_to_beginning (fini_literal_head
);
7931 xtensa_create_property_segments (get_frag_is_insn
,
7932 XTENSA_INSN_SEC_NAME
,
7934 if (use_literal_section
)
7935 xtensa_create_property_segments (get_frag_is_literal
,
7936 XTENSA_LIT_SEC_NAME
,
7942 get_frag_is_literal (fragP
)
7945 assert (fragP
!= NULL
);
7946 return (fragP
->tc_frag_data
.is_literal
);
7951 get_frag_is_insn (fragP
)
7954 assert (fragP
!= NULL
);
7955 return (fragP
->tc_frag_data
.is_insn
);
7960 xtensa_create_property_segments (property_function
, section_name_base
,
7962 frag_predicate property_function
;
7963 const char * section_name_base
;
7964 xt_section_type sec_type
;
7968 /* Walk over all of the current segments.
7969 Walk over each fragment
7970 For each fragment that has instructions
7971 Build an instruction record (append where possible). */
7973 for (seclist
= &stdoutput
->sections
;
7974 seclist
&& *seclist
;
7975 seclist
= &(*seclist
)->next
)
7977 segT sec
= *seclist
;
7978 if (section_has_property (sec
, property_function
))
7980 char * property_section_name
=
7981 xtensa_get_property_section_name (stdoutput
, sec
,
7983 segT insn_sec
= retrieve_xtensa_section (property_section_name
);
7984 segment_info_type
*xt_seg_info
= retrieve_segment_info (insn_sec
);
7985 xtensa_block_info
** xt_blocks
=
7986 &xt_seg_info
->tc_segment_info_data
.blocks
[sec_type
];
7987 /* Walk over all of the frchains here and add new sections. */
7988 add_xt_block_frags (sec
, insn_sec
, xt_blocks
, property_function
);
7992 /* Now we fill them out.... */
7994 for (seclist
= &stdoutput
->sections
;
7995 seclist
&& *seclist
;
7996 seclist
= &(*seclist
)->next
)
7998 segment_info_type
*seginfo
;
7999 xtensa_block_info
*block
;
8000 segT sec
= *seclist
;
8001 seginfo
= seg_info (sec
);
8002 block
= seginfo
->tc_segment_info_data
.blocks
[sec_type
];
8006 xtensa_block_info
*cur_block
;
8007 /* This is a section with some data. */
8008 size_t num_recs
= 0;
8011 for (cur_block
= block
; cur_block
; cur_block
= cur_block
->next
)
8014 rec_size
= num_recs
* 8;
8015 bfd_set_section_size (stdoutput
, sec
, rec_size
);
8017 /* In order to make this work with the assembler, we have to
8018 build some frags and then build the "fixups" for it. It
8019 would be easier to just set the contents then set the
8024 /* Allocate a fragment and leak it. */
8032 frag_size
= sizeof (fragS
) + rec_size
;
8033 fragP
= (fragS
*) xmalloc (frag_size
);
8035 memset (fragP
, 0, frag_size
);
8036 fragP
->fr_address
= 0;
8037 fragP
->fr_next
= NULL
;
8038 fragP
->fr_fix
= rec_size
;
8040 fragP
->fr_type
= rs_fill
;
8041 /* the rest are zeros */
8043 frchainP
= seginfo
->frchainP
;
8044 frchainP
->frch_root
= fragP
;
8045 frchainP
->frch_last
= fragP
;
8047 fixes
= (fixS
*) xmalloc (sizeof (fixS
) * num_recs
);
8048 memset (fixes
, 0, sizeof (fixS
) * num_recs
);
8050 seginfo
->fix_root
= fixes
;
8051 seginfo
->fix_tail
= &fixes
[num_recs
- 1];
8053 frag_data
= &fragP
->fr_literal
[0];
8054 for (i
= 0; i
< num_recs
; i
++)
8056 fixS
*fix
= &fixes
[i
];
8059 /* Write the fixup. */
8060 if (i
!= num_recs
- 1)
8061 fix
->fx_next
= &fixes
[i
+ 1];
8063 fix
->fx_next
= NULL
;
8066 fix
->fx_frag
= fragP
;
8067 fix
->fx_where
= i
* 8;
8068 fix
->fx_addsy
= section_symbol (cur_block
->sec
);
8069 fix
->fx_offset
= cur_block
->offset
;
8070 fix
->fx_r_type
= BFD_RELOC_32
;
8071 fix
->fx_file
= "Internal Assembly";
8074 /* Write the length. */
8075 md_number_to_chars (&frag_data
[4 + 8 * i
],
8076 cur_block
->size
, 4);
8077 cur_block
= cur_block
->next
;
8086 retrieve_segment_info (seg
)
8089 segment_info_type
*seginfo
;
8090 seginfo
= (segment_info_type
*) bfd_get_section_userdata (stdoutput
, seg
);
8095 seginfo
= (segment_info_type
*) xmalloc (sizeof (*seginfo
));
8096 memset ((PTR
) seginfo
, 0, sizeof (*seginfo
));
8097 seginfo
->fix_root
= NULL
;
8098 seginfo
->fix_tail
= NULL
;
8099 seginfo
->bfd_section
= seg
;
8101 /* We will not be dealing with these, only our special ones. */
8103 if (seg
== bfd_abs_section_ptr
)
8104 abs_seg_info
= seginfo
;
8105 else if (seg
== bfd_und_section_ptr
)
8106 und_seg_info
= seginfo
;
8109 bfd_set_section_userdata (stdoutput
, seg
, (PTR
) seginfo
);
8111 seg_fix_rootP
= &segment_info
[seg
].fix_root
;
8112 seg_fix_tailP
= &segment_info
[seg
].fix_tail
;
8115 frchainP
= (frchainS
*) xmalloc (sizeof (frchainS
));
8116 frchainP
->frch_root
= NULL
;
8117 frchainP
->frch_last
= NULL
;
8118 frchainP
->frch_next
= NULL
;
8119 frchainP
->frch_seg
= seg
;
8120 frchainP
->frch_subseg
= 0;
8121 frchainP
->fix_root
= NULL
;
8122 frchainP
->fix_tail
= NULL
;
8123 /* Do not init the objstack. */
8124 /* obstack_begin (&frchainP->frch_obstack, chunksize); */
8125 /* frchainP->frch_frag_now = fragP; */
8126 frchainP
->frch_frag_now
= NULL
;
8128 seginfo
->frchainP
= frchainP
;
8136 retrieve_xtensa_section (sec_name
)
8139 bfd
*abfd
= stdoutput
;
8140 flagword flags
, out_flags
, link_once_flags
;
8143 flags
= bfd_get_section_flags (abfd
, now_seg
);
8144 link_once_flags
= (flags
& SEC_LINK_ONCE
);
8145 if (link_once_flags
)
8146 link_once_flags
|= (flags
& SEC_LINK_DUPLICATES
);
8147 out_flags
= (SEC_RELOC
| SEC_HAS_CONTENTS
| SEC_READONLY
| link_once_flags
);
8149 s
= bfd_make_section_old_way (abfd
, sec_name
);
8151 as_bad (_("could not create section %s"), sec_name
);
8152 if (!bfd_set_section_flags (abfd
, s
, out_flags
))
8153 as_bad (_("invalid flag combination on section %s"), sec_name
);
8160 section_has_property (sec
, property_function
)
8162 frag_predicate property_function
;
8164 segment_info_type
*seginfo
= seg_info (sec
);
8167 if (seginfo
&& seginfo
->frchainP
)
8169 for (fragP
= seginfo
->frchainP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
8171 if (property_function (fragP
)
8172 && (fragP
->fr_type
!= rs_fill
|| fragP
->fr_fix
!= 0))
8180 /* Two types of block sections exist right now: literal and insns. */
8183 add_xt_block_frags (sec
, xt_block_sec
, xt_block
, property_function
)
8186 xtensa_block_info
**xt_block
;
8187 frag_predicate property_function
;
8189 segment_info_type
*seg_info
;
8190 segment_info_type
*xt_seg_info
;
8194 xt_seg_info
= retrieve_segment_info (xt_block_sec
);
8195 seg_info
= retrieve_segment_info (sec
);
8197 /* Build it if needed. */
8198 while (*xt_block
!= NULL
)
8199 xt_block
= &(*xt_block
)->next
;
8200 /* We are either at NULL at the beginning or at the end. */
8202 /* Walk through the frags. */
8205 if (seg_info
->frchainP
)
8207 for (fragP
= seg_info
->frchainP
->frch_root
;
8209 fragP
= fragP
->fr_next
)
8211 if (property_function (fragP
)
8212 && (fragP
->fr_type
!= rs_fill
|| fragP
->fr_fix
!= 0))
8214 if (*xt_block
!= NULL
)
8216 if ((*xt_block
)->offset
+ (*xt_block
)->size
8217 == fragP
->fr_address
)
8218 (*xt_block
)->size
+= fragP
->fr_fix
;
8220 xt_block
= &((*xt_block
)->next
);
8222 if (*xt_block
== NULL
)
8224 xtensa_block_info
*new_block
= (xtensa_block_info
*)
8225 xmalloc (sizeof (xtensa_block_info
));
8226 new_block
->sec
= sec
;
8227 new_block
->offset
= fragP
->fr_address
;
8228 new_block
->size
= fragP
->fr_fix
;
8229 new_block
->next
= NULL
;
8230 *xt_block
= new_block
;
8238 /* Instruction Stack Functions (from "xtensa-istack.h"). */
8244 memset (stack
, 0, sizeof (IStack
));
8250 istack_empty (stack
)
8253 return (stack
->ninsn
== 0);
8261 return (stack
->ninsn
== MAX_ISTACK
);
8265 /* Return a pointer to the top IStack entry.
8266 It is an error to call this if istack_empty () is true. */
8272 int rec
= stack
->ninsn
- 1;
8273 assert (!istack_empty (stack
));
8274 return &stack
->insn
[rec
];
8278 /* Add a new TInsn to an IStack.
8279 It is an error to call this if istack_full () is true. */
8282 istack_push (stack
, insn
)
8286 int rec
= stack
->ninsn
;
8287 assert (!istack_full (stack
));
8288 tinsn_copy (&stack
->insn
[rec
], insn
);
8293 /* Clear space for the next TInsn on the IStack and return a pointer
8294 to it. It is an error to call this if istack_full () is true. */
8297 istack_push_space (stack
)
8300 int rec
= stack
->ninsn
;
8302 assert (!istack_full (stack
));
8303 insn
= &stack
->insn
[rec
];
8304 memset (insn
, 0, sizeof (TInsn
));
8310 /* Remove the last pushed instruction. It is an error to call this if
8311 istack_empty () returns true. */
8317 int rec
= stack
->ninsn
- 1;
8318 assert (!istack_empty (stack
));
8320 memset (&stack
->insn
[rec
], 0, sizeof (TInsn
));
8324 /* TInsn functions. */
8330 memset (dst
, 0, sizeof (TInsn
));
8335 tinsn_copy (dst
, src
)
8340 memcpy (dst
, src
, sizeof (TInsn
));
8344 /* Get the ``num''th token of the TInsn.
8345 It is illegal to call this if num > insn->ntoks. */
8348 tinsn_get_tok (insn
, num
)
8352 assert (num
< insn
->ntok
);
8353 return &insn
->tok
[num
];
8357 /* Return true if ANY of the operands in the insn are symbolic. */
8360 tinsn_has_symbolic_operands (insn
)
8366 assert (insn
->insn_type
== ITYPE_INSN
);
8368 for (i
= 0; i
< n
; ++i
)
8370 switch (insn
->tok
[i
].X_op
)
8384 tinsn_has_invalid_symbolic_operands (insn
)
8390 assert (insn
->insn_type
== ITYPE_INSN
);
8392 for (i
= 0; i
< n
; ++i
)
8394 switch (insn
->tok
[i
].X_op
)
8400 if (i
== get_relaxable_immed (insn
->opcode
))
8402 as_bad (_("invalid symbolic operand %d on '%s'"),
8403 i
, xtensa_opcode_name (xtensa_default_isa
, insn
->opcode
));
8411 /* For assembly code with complex expressions (e.g. subtraction),
8412 we have to build them in the literal pool so that
8413 their results are calculated correctly after relaxation.
8414 The relaxation only handles expressions that
8415 boil down to SYMBOL + OFFSET. */
8418 tinsn_has_complex_operands (insn
)
8423 assert (insn
->insn_type
== ITYPE_INSN
);
8424 for (i
= 0; i
< n
; ++i
)
8426 switch (insn
->tok
[i
].X_op
)
8440 /* Convert the constant operands in the t_insn to insnbuf.
8441 Return true if there is a symbol in the immediate field.
8443 Before this is called,
8444 1) the number of operands are correct
8445 2) the t_insn is a ITYPE_INSN
8446 3) ONLY the relaxable_ is built
8447 4) All operands are O_constant, O_symbol. All constants fit
8448 The return value tells whether there are any remaining O_symbols. */
8451 tinsn_to_insnbuf (t_insn
, insnbuf
)
8453 xtensa_insnbuf insnbuf
;
8455 xtensa_isa isa
= xtensa_default_isa
;
8456 xtensa_opcode opcode
= t_insn
->opcode
;
8457 bfd_boolean has_fixup
= FALSE
;
8458 int noperands
= xtensa_num_operands (isa
, opcode
);
8464 assert (t_insn
->insn_type
== ITYPE_INSN
);
8465 if (noperands
!= t_insn
->ntok
)
8466 as_fatal (_("operand number mismatch"));
8468 xtensa_encode_insn (isa
, opcode
, insnbuf
);
8470 for (i
= 0; i
< noperands
; ++i
)
8472 expressionS
*expr
= &t_insn
->tok
[i
];
8473 xtensa_operand operand
= xtensa_get_operand (isa
, opcode
, i
);
8477 /* The register number has already been checked in
8478 expression_maybe_register, so we don't need to check here. */
8479 opnd_value
= expr
->X_add_number
;
8480 (void) xtensa_operand_encode (operand
, &opnd_value
);
8481 xtensa_operand_set_field (operand
, insnbuf
, opnd_value
);
8485 as_where (&file_name
, &line
);
8486 /* It is a constant and we called this function,
8487 then we have to try to fit it. */
8488 xtensa_insnbuf_set_operand (insnbuf
, opcode
, operand
,
8489 expr
->X_add_number
, file_name
, line
);
8502 /* Check the instruction arguments. Return true on failure. */
8505 tinsn_check_arguments (insn
)
8508 xtensa_isa isa
= xtensa_default_isa
;
8509 xtensa_opcode opcode
= insn
->opcode
;
8511 if (opcode
== XTENSA_UNDEFINED
)
8513 as_bad (_("invalid opcode"));
8517 if (xtensa_num_operands (isa
, opcode
) > insn
->ntok
)
8519 as_bad (_("too few operands"));
8523 if (xtensa_num_operands (isa
, opcode
) < insn
->ntok
)
8525 as_bad (_("too many operands"));
8532 /* Load an instruction from its encoded form. */
8535 tinsn_from_chars (t_insn
, f
)
8539 static xtensa_insnbuf insnbuf
= NULL
;
8541 xtensa_opcode opcode
;
8542 xtensa_isa isa
= xtensa_default_isa
;
8545 insnbuf
= xtensa_insnbuf_alloc (isa
);
8547 xtensa_insnbuf_from_chars (isa
, insnbuf
, f
);
8548 opcode
= xtensa_decode_insn (isa
, insnbuf
);
8550 /* Find the immed. */
8551 tinsn_init (t_insn
);
8552 t_insn
->insn_type
= ITYPE_INSN
;
8553 t_insn
->is_specific_opcode
= FALSE
; /* Must not be specific. */
8554 t_insn
->opcode
= opcode
;
8555 t_insn
->ntok
= xtensa_num_operands (isa
, opcode
);
8556 for (i
= 0; i
< t_insn
->ntok
; i
++)
8558 set_expr_const (&t_insn
->tok
[i
],
8559 xtensa_insnbuf_get_operand (insnbuf
, opcode
, i
));
8564 /* Read the value of the relaxable immed from the fr_symbol and fr_offset. */
8567 tinsn_immed_from_frag (t_insn
, fragP
)
8571 xtensa_opcode opcode
= t_insn
->opcode
;
8574 if (fragP
->fr_symbol
)
8576 opnum
= get_relaxable_immed (opcode
);
8577 set_expr_symbol_offset (&t_insn
->tok
[opnum
],
8578 fragP
->fr_symbol
, fragP
->fr_offset
);
8584 get_num_stack_text_bytes (istack
)
8590 for (i
= 0; i
< istack
->ninsn
; i
++)
8592 TInsn
*t_insn
= &istack
->insn
[i
];
8593 if (t_insn
->insn_type
== ITYPE_INSN
)
8594 text_bytes
+= xg_get_insn_size (t_insn
);
8601 get_num_stack_literal_bytes (istack
)
8607 for (i
= 0; i
< istack
->ninsn
; i
++)
8609 TInsn
*t_insn
= &istack
->insn
[i
];
8611 if (t_insn
->insn_type
== ITYPE_LITERAL
&& t_insn
->ntok
== 1)
8618 /* Expression utilities. */
8620 /* Return true if the expression is an integer constant. */
8624 const expressionS
*s
;
8626 return (s
->X_op
== O_constant
);
8630 /* Get the expression constant.
8631 Calling this is illegal if expr_is_const () returns true. */
8635 const expressionS
*s
;
8637 assert (expr_is_const (s
));
8638 return s
->X_add_number
;
8642 /* Set the expression to a constant value. */
8645 set_expr_const (s
, val
)
8649 s
->X_op
= O_constant
;
8650 s
->X_add_number
= val
;
8651 s
->X_add_symbol
= NULL
;
8652 s
->X_op_symbol
= NULL
;
8656 /* Set the expression to a symbol + constant offset. */
8659 set_expr_symbol_offset (s
, sym
, offset
)
8665 s
->X_add_symbol
= sym
;
8666 s
->X_op_symbol
= NULL
; /* unused */
8667 s
->X_add_number
= offset
;
8672 expr_is_equal (s1
, s2
)
8676 if (s1
->X_op
!= s2
->X_op
)
8678 if (s1
->X_add_symbol
!= s2
->X_add_symbol
)
8680 if (s1
->X_op_symbol
!= s2
->X_op_symbol
)
8682 if (s1
->X_add_number
!= s2
->X_add_number
)
8689 copy_expr (dst
, src
)
8691 const expressionS
*src
;
8693 memcpy (dst
, src
, sizeof (expressionS
));
8697 /* Support for Tensilica's "--rename-section" option. */
8699 #ifdef XTENSA_SECTION_RENAME
8701 struct rename_section_struct
8705 struct rename_section_struct
*next
;
8708 static struct rename_section_struct
*section_rename
;
8711 /* Parse the string oldname=new_name:oldname2=new_name2
8712 and call add_section_rename. */
8715 build_section_rename (arg
)
8718 char *this_arg
= NULL
;
8719 char *next_arg
= NULL
;
8721 for (this_arg
= strdup (arg
); this_arg
!= NULL
; this_arg
= next_arg
)
8725 next_arg
= strchr (this_arg
, ':');
8733 char *old_name
= this_arg
;
8734 char *new_name
= strchr (this_arg
, '=');
8736 if (*old_name
== '\0')
8738 as_warn (_("ignoring extra '-rename-section' delimiter ':'"));
8741 if (!new_name
|| new_name
[1] == '\0')
8743 as_warn (_("ignoring invalid '-rename-section' "
8744 "specification: '%s'"), old_name
);
8749 add_section_rename (old_name
, new_name
);
8756 add_section_rename (old_name
, new_name
)
8760 struct rename_section_struct
*r
= section_rename
;
8762 /* Check for invalid section renaming. */
8763 for (r
= section_rename
; r
!= NULL
; r
= r
->next
)
8765 if (strcmp (r
->old_name
, old_name
) == 0)
8766 as_bad (_("section %s renamed multiple times"), old_name
);
8767 if (strcmp (r
->new_name
, new_name
) == 0)
8768 as_bad (_("multiple sections remapped to output section %s"),
8773 r
= (struct rename_section_struct
*)
8774 xmalloc (sizeof (struct rename_section_struct
));
8775 r
->old_name
= strdup (old_name
);
8776 r
->new_name
= strdup (new_name
);
8777 r
->next
= section_rename
;
8783 xtensa_section_rename (name
)
8786 struct rename_section_struct
*r
= section_rename
;
8788 for (r
= section_rename
; r
!= NULL
; r
= r
->next
)
8789 if (strcmp (r
->old_name
, name
) == 0)
8795 #endif /* XTENSA_SECTION_RENAME */