gas/doc/c-avr.texi

   1 @c Copyright 2006, 2007, 2008, 2009, 2011
   2 @c Free Software Foundation, Inc.
   3 @c This is part of the GAS manual.
   4 @c For copying conditions, see the file as.texinfo.
   5
   6 @ifset GENERIC
   7 @page
   8 @node AVR-Dependent
   9 @chapter AVR Dependent Features
  10 @end ifset
  11
  12 @ifclear GENERIC
  13 @node Machine Dependencies
  14 @chapter AVR Dependent Features
  15 @end ifclear
  16
  17 @cindex AVR support
  18 @menu
  19 * AVR Options::              Options
  20 * AVR Syntax::               Syntax
  21 * AVR Opcodes::              Opcodes
  22 @end menu
  23
  24 @node AVR Options
  25 @section Options
  26 @cindex AVR options (none)
  27 @cindex options for AVR (none)
  28
  29 @table @code
  30
  31 @cindex @code{-mmcu=} command line option, AVR
  32 @item -mmcu=@var{mcu}
  33 Specify ATMEL AVR instruction set or MCU type.
  34
  35 Instruction set avr1 is for the minimal AVR core, not supported by the C
  36 compiler, only for assembler programs (MCU types: at90s1200,
  37 attiny11, attiny12, attiny15, attiny28).
  38
  39 Instruction set avr2 (default) is for the classic AVR core with up to
  40 8K program memory space (MCU types: at90s2313, at90s2323, at90s2333, at90s2343,
  41 attiny22, attiny26, at90s4414, at90s4433, at90s4434, at90s8515, at90c8534,
  42 at90s8535).
  43
  44 Instruction set avr25 is for the classic AVR core with up to 8K program memory
  45 space plus the MOVW instruction (MCU types: attiny13, attiny13a, attiny2313,
  46 attiny2313a, attiny24, attiny24a, attiny4313, attiny44, attiny44a, attiny84,
  47 attiny84a, attiny25, attiny45, attiny85, attiny261, attiny261a, attiny461,
  48 attiny461a, attiny861, attiny861a, attiny87, attiny43u, attiny48, attiny88,
  49 at86rf401, ata6289).
  50
  51 Instruction set avr3 is for the classic AVR core with up to 128K program
  52 memory space (MCU types: at43usb355, at76c711).
  53
  54 Instruction set avr31 is for the classic AVR core with exactly 128K program
  55 memory space (MCU types: atmega103, at43usb320).
  56
  57 Instruction set avr35 is for classic AVR core plus MOVW, CALL, and JMP
  58 instructions (MCU types: attiny167, at90usb82, at90usb162, atmega8u2,
  59 atmega16u2, atmega32u2).
  60
  61 Instruction set avr4 is for the enhanced AVR core with up to 8K program
  62 memory space (MCU types: atmega48, atmega48a, atmega48p, atmega8, atmega88,
  63 atmega88a, atmega88p, atmega88pa, atmega8515, atmega8535, atmega8hva, at90pwm1,
  64 at90pwm2, at90pwm2b, at90pwm3, at90pwm3b, at90pwm81).
  65
  66 Instruction set avr5 is for the enhanced AVR core with up to 128K program
  67 memory space (MCU types: atmega16, atmega16a, atmega161, atmega162, atmega163,
  68 atmega164a, atmega164p, atmega165, atmega165a, atmega165p, atmega168,
  69 atmega168a, atmega168p, atmega169, atmega169a, atmega169p, atmega169pa,
  70 atmega32, atmega323, atmega324a, atmega324p, atmega325, atmega325a, atmega325p,
  71 atmega3250, atmega3250a, atmega3250p, atmega328, atmega328p, atmega329,
  72 atmega329a, atmega329p, atmega329pa, atmega3290, atmega3290a, atmega3290p,
  73 atmega406, atmega64, atmega640, atmega644, atmega644a, atmega644p, atmega644pa,
  74 atmega645, atmega645a, atmega645p, atmega6450, atmega6450a, atmega6450p,
  75 atmega649, atmega649a, atmega649p, atmega6490, atmega6490a, atmega6490p,
  76 atmega16hva, atmega16hva2, atmega16hvb, atmega32hvb, atmega64hve, at90can32,
  77 at90can64, at90pwm216, at90pwm316, atmega32c1, atmega64c1, atmega16m1,
  78 atmega32m1, atmega64m1, atmega16u4, atmega32u4, atmega32u6, at90usb646,
  79 at90usb647, at94k, at90scr100).
  80
  81 Instruction set avr51 is for the enhanced AVR core with exactly 128K program
  82 memory space (MCU types: atmega128, atmega1280, atmega1281, atmega1284p,
  83 atmega128rfa1, at90can128, at90usb1286, at90usb1287, m3000).
  84
  85 Instruction set avr6 is for the enhanced AVR core with a 3-byte PC (MCU types:
  86 atmega2560, atmega2561).
  87
  88 Instruction set avrxmega2 is for the XMEGA AVR core with 8K to 64K program
  89 memory space and less than 64K data space (MCU types: atxmega16a4, atxmega16d4,
  90 atxmega32d4).
  91
  92 Instruction set avrxmega3 is for the XMEGA AVR core with 8K to 64K program
  93 memory space and greater than 64K data space (MCU types: atxmega32a4).
  94
  95 Instruction set avrxmega4 is for the XMEGA AVR core with up to 64K program
  96 memory space and less than 64K data space (MCU types: atxmega64a3, atxmega64d3).
  97
  98 Instruction set avrxmega5 is for the XMEGA AVR core with up to 64K program
  99 memory space and greater than 64K data space (MCU types: atxmega64a1).
 100
 101 Instruction set avrxmega6 is for the XMEGA AVR core with up to 256K program
 102 memory space and less than 64K data space (MCU types: atxmega128a3,
 103 atxmega128d3, atxmega192a3, atxmega192d3, atxmega256a3, atxmega256a3b,
 104 atxmega192d3).
 105
 106 Instruction set avrxmega7 is for the XMEGA AVR core with up to 256K program
 107 memory space and greater than 64K data space (MCU types: atxmega128a1).
 108
 109 @cindex @code{-mall-opcodes} command line option, AVR
 110 @item -mall-opcodes
 111 Accept all AVR opcodes, even if not supported by @code{-mmcu}.
 112
 113 @cindex @code{-mno-skip-bug} command line option, AVR
 114 @item -mno-skip-bug
 115 This option disable warnings for skipping two-word instructions.
 116
 117 @cindex @code{-mno-wrap} command line option, AVR
 118 @item -mno-wrap
 119 This option reject @code{rjmp/rcall} instructions with 8K wrap-around.
 120
 121 @end table
 122
 123
 124 @node AVR Syntax
 125 @section Syntax
 126 @menu
 127 * AVR-Chars::                Special Characters
 128 * AVR-Regs::                 Register Names
 129 * AVR-Modifiers::            Relocatable Expression Modifiers
 130 @end menu
 131
 132 @node AVR-Chars
 133 @subsection Special Characters
 134
 135 @cindex line comment character, AVR
 136 @cindex AVR line comment character
 137
 138 The presence of a @samp{;} anywhere on a line indicates the start of a
 139 comment that extends to the end of that line.
 140
 141 If a @samp{#} appears as the first character of a line, the whole line
 142 is treated as a comment, but in this case the line can also be a
 143 logical line number directive (@pxref{Comments}) or a preprocessor
 144 control command (@pxref{Preprocessing}).
 145
 146 @cindex line separator, AVR
 147 @cindex statement separator, AVR
 148 @cindex AVR line separator
 149
 150 The @samp{$} character can be used instead of a newline to separate
 151 statements.
 152
 153 @node AVR-Regs
 154 @subsection Register Names
 155
 156 @cindex AVR register names
 157 @cindex register names, AVR
 158
 159 The AVR has 32 x 8-bit general purpose working registers @samp{r0},
 160 @samp{r1}, ... @samp{r31}.
 161 Six of the 32 registers can be used as three 16-bit indirect address
 162 register pointers for Data Space addressing. One of the these address
 163 pointers can also be used as an address pointer for look up tables in
 164 Flash program memory. These added function registers are the 16-bit
 165 @samp{X}, @samp{Y} and @samp{Z} - registers.
 166
 167 @smallexample
 168 X = @r{r26:r27}
 169 Y = @r{r28:r29}
 170 Z = @r{r30:r31}
 171 @end smallexample
 172
 173 @node AVR-Modifiers
 174 @subsection Relocatable Expression Modifiers
 175
 176 @cindex AVR modifiers
 177 @cindex syntax, AVR
 178
 179 The assembler supports several modifiers when using relocatable addresses
 180 in AVR instruction operands.  The general syntax is the following:
 181
 182 @smallexample
 183 modifier(relocatable-expression)
 184 @end smallexample
 185
 186 @table @code
 187 @cindex symbol modifiers
 188
 189 @item lo8
 190
 191 This modifier allows you to use bits 0 through 7 of
 192 an address expression as 8 bit relocatable expression.
 193
 194 @item hi8
 195
 196 This modifier allows you to use bits 7 through 15 of an address expression
 197 as 8 bit relocatable expression.  This is useful with, for example, the
 198 AVR @samp{ldi} instruction and @samp{lo8} modifier.
 199
 200 For example
 201
 202 @smallexample
 203 ldi r26, lo8(sym+10)
 204 ldi r27, hi8(sym+10)
 205 @end smallexample
 206
 207 @item hh8
 208
 209 This modifier allows you to use bits 16 through 23 of
 210 an address expression as 8 bit relocatable expression.
 211 Also, can be useful for loading 32 bit constants.
 212
 213 @item hlo8
 214
 215 Synonym of @samp{hh8}.
 216
 217 @item hhi8
 218
 219 This modifier allows you to use bits 24 through 31 of
 220 an expression as 8 bit expression. This is useful with, for example, the
 221 AVR @samp{ldi} instruction and @samp{lo8}, @samp{hi8}, @samp{hlo8},
 222 @samp{hhi8}, modifier.
 223
 224 For example
 225
 226 @smallexample
 227 ldi r26, lo8(285774925)
 228 ldi r27, hi8(285774925)
 229 ldi r28, hlo8(285774925)
 230 ldi r29, hhi8(285774925)
 231 ; r29,r28,r27,r26 = 285774925
 232 @end smallexample
 233
 234 @item pm_lo8
 235
 236 This modifier allows you to use bits 0 through 7 of
 237 an address expression as 8 bit relocatable expression.
 238 This modifier useful for addressing data or code from
 239 Flash/Program memory. The using of @samp{pm_lo8} similar
 240 to @samp{lo8}.
 241
 242 @item pm_hi8
 243
 244 This modifier allows you to use bits 8 through 15 of
 245 an address expression as 8 bit relocatable expression.
 246 This modifier useful for addressing data or code from
 247 Flash/Program memory.
 248
 249 @item pm_hh8
 250
 251 This modifier allows you to use bits 15 through 23 of
 252 an address expression as 8 bit relocatable expression.
 253 This modifier useful for addressing data or code from
 254 Flash/Program memory.
 255
 256 @end table
 257
 258 @node AVR Opcodes
 259 @section Opcodes
 260
 261 @cindex AVR opcode summary
 262 @cindex opcode summary, AVR
 263 @cindex mnemonics, AVR
 264 @cindex instruction summary, AVR
 265 For detailed information on the AVR machine instruction set, see
 266 @url{www.atmel.com/products/AVR}.
 267
 268 @code{@value{AS}} implements all the standard AVR opcodes.
 269 The following table summarizes the AVR opcodes, and their arguments.
 270
 271 @smallexample
 272 @i{Legend:}
 273    r   @r{any register}
 274    d   @r{`ldi' register (r16-r31)}
 275    v   @r{`movw' even register (r0, r2, ..., r28, r30)}
 276    a   @r{`fmul' register (r16-r23)}
 277    w   @r{`adiw' register (r24,r26,r28,r30)}
 278    e   @r{pointer registers (X,Y,Z)}
 279    b   @r{base pointer register and displacement ([YZ]+disp)}
 280    z   @r{Z pointer register (for [e]lpm Rd,Z[+])}
 281    M   @r{immediate value from 0 to 255}
 282    n   @r{immediate value from 0 to 255 ( n = ~M ). Relocation impossible}
 283    s   @r{immediate value from 0 to 7}
 284    P   @r{Port address value from 0 to 63. (in, out)}
 285    p   @r{Port address value from 0 to 31. (cbi, sbi, sbic, sbis)}
 286    K   @r{immediate value from 0 to 63 (used in `adiw', `sbiw')}
 287    i   @r{immediate value}
 288    l   @r{signed pc relative offset from -64 to 63}
 289    L   @r{signed pc relative offset from -2048 to 2047}
 290    h   @r{absolute code address (call, jmp)}
 291    S   @r{immediate value from 0 to 7 (S = s << 4)}
 292    ?   @r{use this opcode entry if no parameters, else use next opcode entry}
 293
 294 1001010010001000   clc
 295 1001010011011000   clh
 296 1001010011111000   cli
 297 1001010010101000   cln
 298 1001010011001000   cls
 299 1001010011101000   clt
 300 1001010010111000   clv
 301 1001010010011000   clz
 302 1001010000001000   sec
 303 1001010001011000   seh
 304 1001010001111000   sei
 305 1001010000101000   sen
 306 1001010001001000   ses
 307 1001010001101000   set
 308 1001010000111000   sev
 309 1001010000011000   sez
 310 100101001SSS1000   bclr    S
 311 100101000SSS1000   bset    S
 312 1001010100001001   icall
 313 1001010000001001   ijmp
 314 1001010111001000   lpm     ?
 315 1001000ddddd010+   lpm     r,z
 316 1001010111011000   elpm    ?
 317 1001000ddddd011+   elpm    r,z
 318 0000000000000000   nop
 319 1001010100001000   ret
 320 1001010100011000   reti
 321 1001010110001000   sleep
 322 1001010110011000   break
 323 1001010110101000   wdr
 324 1001010111101000   spm
 325 000111rdddddrrrr   adc     r,r
 326 000011rdddddrrrr   add     r,r
 327 001000rdddddrrrr   and     r,r
 328 000101rdddddrrrr   cp      r,r
 329 000001rdddddrrrr   cpc     r,r
 330 000100rdddddrrrr   cpse    r,r
 331 001001rdddddrrrr   eor     r,r
 332 001011rdddddrrrr   mov     r,r
 333 100111rdddddrrrr   mul     r,r
 334 001010rdddddrrrr   or      r,r
 335 000010rdddddrrrr   sbc     r,r
 336 000110rdddddrrrr   sub     r,r
 337 001001rdddddrrrr   clr     r
 338 000011rdddddrrrr   lsl     r
 339 000111rdddddrrrr   rol     r
 340 001000rdddddrrrr   tst     r
 341 0111KKKKddddKKKK   andi    d,M
 342 0111KKKKddddKKKK   cbr     d,n
 343 1110KKKKddddKKKK   ldi     d,M
 344 11101111dddd1111   ser     d
 345 0110KKKKddddKKKK   ori     d,M
 346 0110KKKKddddKKKK   sbr     d,M
 347 0011KKKKddddKKKK   cpi     d,M
 348 0100KKKKddddKKKK   sbci    d,M
 349 0101KKKKddddKKKK   subi    d,M
 350 1111110rrrrr0sss   sbrc    r,s
 351 1111111rrrrr0sss   sbrs    r,s
 352 1111100ddddd0sss   bld     r,s
 353 1111101ddddd0sss   bst     r,s
 354 10110PPdddddPPPP   in      r,P
 355 10111PPrrrrrPPPP   out     P,r
 356 10010110KKddKKKK   adiw    w,K
 357 10010111KKddKKKK   sbiw    w,K
 358 10011000pppppsss   cbi     p,s
 359 10011010pppppsss   sbi     p,s
 360 10011001pppppsss   sbic    p,s
 361 10011011pppppsss   sbis    p,s
 362 111101lllllll000   brcc    l
 363 111100lllllll000   brcs    l
 364 111100lllllll001   breq    l
 365 111101lllllll100   brge    l
 366 111101lllllll101   brhc    l
 367 111100lllllll101   brhs    l
 368 111101lllllll111   brid    l
 369 111100lllllll111   brie    l
 370 111100lllllll000   brlo    l
 371 111100lllllll100   brlt    l
 372 111100lllllll010   brmi    l
 373 111101lllllll001   brne    l
 374 111101lllllll010   brpl    l
 375 111101lllllll000   brsh    l
 376 111101lllllll110   brtc    l
 377 111100lllllll110   brts    l
 378 111101lllllll011   brvc    l
 379 111100lllllll011   brvs    l
 380 111101lllllllsss   brbc    s,l
 381 111100lllllllsss   brbs    s,l
 382 1101LLLLLLLLLLLL   rcall   L
 383 1100LLLLLLLLLLLL   rjmp    L
 384 1001010hhhhh111h   call    h
 385 1001010hhhhh110h   jmp     h
 386 1001010rrrrr0101   asr     r
 387 1001010rrrrr0000   com     r
 388 1001010rrrrr1010   dec     r
 389 1001010rrrrr0011   inc     r
 390 1001010rrrrr0110   lsr     r
 391 1001010rrrrr0001   neg     r
 392 1001000rrrrr1111   pop     r
 393 1001001rrrrr1111   push    r
 394 1001010rrrrr0111   ror     r
 395 1001010rrrrr0010   swap    r
 396 00000001ddddrrrr   movw    v,v
 397 00000010ddddrrrr   muls    d,d
 398 000000110ddd0rrr   mulsu   a,a
 399 000000110ddd1rrr   fmul    a,a
 400 000000111ddd0rrr   fmuls   a,a
 401 000000111ddd1rrr   fmulsu  a,a
 402 1001001ddddd0000   sts     i,r
 403 1001000ddddd0000   lds     r,i
 404 10o0oo0dddddbooo   ldd     r,b
 405 100!000dddddee-+   ld      r,e
 406 10o0oo1rrrrrbooo   std     b,r
 407 100!001rrrrree-+   st      e,r
 408 1001010100011001   eicall
 409 1001010000011001   eijmp
 410 @end smallexample