gas/doc/c-avr.texi

   1 @c Copyright 2006
   2 @c Free Software Foundation, Inc.
   3 @c This is part of the GAS manual.
   4 @c For copying conditions, see the file as.texinfo.
   5
   6 @ifset GENERIC
   7 @page
   8 @node AVR-Dependent
   9 @chapter AVR Dependent Features
  10 @end ifset
  11
  12 @ifclear GENERIC
  13 @node Machine Dependencies
  14 @chapter AVR Dependent Features
  15 @end ifclear
  16
  17 @cindex AVR support
  18 @menu
  19 * AVR Options::              Options
  20 * AVR Syntax::               Syntax
  21 * AVR Opcodes::              Opcodes
  22 @end menu
  23
  24 @node AVR Options
  25 @section Options
  26 @cindex AVR options (none)
  27 @cindex options for AVR (none)
  28
  29 @table @code
  30
  31 @cindex @code{-mmcu=} command line option, AVR
  32 @item -mmcu=@var{mcu}
  33 Specify ATMEL AVR instruction set or MCU type.
  34
  35 Instruction set avr1 is for the minimal AVR core, not supported by the C
  36 compiler, only for assembler programs (MCU types: at90s1200,
  37 attiny11, attiny12, attiny15, attiny28).
  38
  39 Instruction set avr2 (default) is for the classic AVR core with up to
  40 8K program memory space (MCU types: at90s2313, at90s2323, at90s2333, at90s2343,
  41 attiny22, attiny26, at90s4414, at90s4433, at90s4434, at90s8515, at90c8534,
  42 at90s8535).
  43
  44 Instruction set avr25 is for the classic AVR core with up to 8K program memory
  45 space plus the MOVW instruction (MCU types: attiny13, attiny13a, attiny2313,
  46 attiny24, attiny44, attiny84, attiny25, attiny45, attiny85, attiny261,
  47 attiny461, attiny861, attiny43u, attiny48, attiny88, at86rf401).
  48
  49 Instruction set avr3 is for the classic AVR core with up to 128K program
  50 memory space (MCU types: at43usb355, at76c711).
  51
  52 Instruction set avr31 is for the classic AVR core with exactly 128K program
  53 memory space (MCU types: atmega103, at43usb320).
  54
  55 Instruction set avr35 is for classic AVR core plus MOVW, CALL, and JMP
  56 instructions (MCU types: attiny167, at90usb82, at90usb162).
  57
  58 Instruction set avr4 is for the enhanced AVR core with up to 8K program
  59 memory space (MCU types: atmega48, atmega48p,atmega8, atmega88, atmega88p,
  60 atmega8515, atmega8535, atmega8hva, at90pwm1, at90pwm2, at90pwm2b,
  61 at90pwm3, at90pwm3b).
  62
  63 Instruction set avr5 is for the enhanced AVR core with up to 128K program
  64 memory space (MCU types: atmega16, atmega161, atmega162, atmega163, atmega164p,
  65 atmega165, atmega165p, atmega168, atmega168p, atmega169, atmega169p, atmega32,
  66 atmega323, atmega324p, atmega325, atmega325p, atmega3250, atmega3250p,
  67 atmega328p, atmega329, atmega329p, atmega3290, atmega3290p, atmega406, atmega64,
  68 atmega640, atmega644, atmega644p, atmega645, atmega6450, atmega649, atmega6490,
  69 atmega16hva, at90can32, at90can64, at90pwm216, at90pwm316, atmega16u4,
  70 atmega32c1, atmega32m1, atmega32u4, at90usb646, at90usb647, at94k).
  71
  72 Instruction set avr51 is for the enhanced AVR core with exactly 128K program
  73 memory space (MCU types: atmega128, atmega1280, atmega1281, atmega1284p,
  74 at90can128, at90usb1286, at90usb1287).
  75
  76 Instruction set avr6 is for the enhanced AVR core with a 3-byte PC (MCU types:
  77 atmega2560, atmega2561).
  78
  79 @cindex @code{-mall-opcodes} command line option, AVR
  80 @item -mall-opcodes
  81 Accept all AVR opcodes, even if not supported by @code{-mmcu}.
  82
  83 @cindex @code{-mno-skip-bug} command line option, AVR
  84 @item -mno-skip-bug
  85 This option disable warnings for skipping two-word instructions.
  86
  87 @cindex @code{-mno-wrap} command line option, AVR
  88 @item -mno-wrap
  89 This option reject @code{rjmp/rcall} instructions with 8K wrap-around.
  90
  91 @end table
  92
  93
  94 @node AVR Syntax
  95 @section Syntax
  96 @menu
  97 * AVR-Chars::                Special Characters
  98 * AVR-Regs::                 Register Names
  99 * AVR-Modifiers::            Relocatable Expression Modifiers
 100 @end menu
 101
 102 @node AVR-Chars
 103 @subsection Special Characters
 104
 105 @cindex line comment character, AVR
 106 @cindex AVR line comment character
 107
 108 The presence of a @samp{;} on a line indicates the start of a comment
 109 that extends to the end of the current line.  If a @samp{#} appears as
 110 the first character of a line, the whole line is treated as a comment.
 111
 112 @cindex line separator, AVR
 113 @cindex statement separator, AVR
 114 @cindex AVR line separator
 115
 116 The @samp{$} character can be used instead of a newline to separate
 117 statements.
 118
 119 @node AVR-Regs
 120 @subsection Register Names
 121
 122 @cindex AVR register names
 123 @cindex register names, AVR
 124
 125 The AVR has 32 x 8-bit general purpose working registers @samp{r0},
 126 @samp{r1}, ... @samp{r31}.
 127 Six of the 32 registers can be used as three 16-bit indirect address
 128 register pointers for Data Space addressing. One of the these address
 129 pointers can also be used as an address pointer for look up tables in
 130 Flash program memory. These added function registers are the 16-bit
 131 @samp{X}, @samp{Y} and @samp{Z} - registers.
 132
 133 @smallexample
 134 X = @r{r26:r27}
 135 Y = @r{r28:r29}
 136 Z = @r{r30:r31}
 137 @end smallexample
 138
 139 @node AVR-Modifiers
 140 @subsection Relocatable Expression Modifiers
 141
 142 @cindex AVR modifiers
 143 @cindex syntax, AVR
 144
 145 The assembler supports several modifiers when using relocatable addresses
 146 in AVR instruction operands.  The general syntax is the following:
 147
 148 @smallexample
 149 modifier(relocatable-expression)
 150 @end smallexample
 151
 152 @table @code
 153 @cindex symbol modifiers
 154
 155 @item lo8
 156
 157 This modifier allows you to use bits 0 through 7 of
 158 an address expression as 8 bit relocatable expression.
 159
 160 @item hi8
 161
 162 This modifier allows you to use bits 7 through 15 of an address expression
 163 as 8 bit relocatable expression.  This is useful with, for example, the
 164 AVR @samp{ldi} instruction and @samp{lo8} modifier.
 165
 166 For example
 167
 168 @smallexample
 169 ldi r26, lo8(sym+10)
 170 ldi r27, hi8(sym+10)
 171 @end smallexample
 172
 173 @item hh8
 174
 175 This modifier allows you to use bits 16 through 23 of
 176 an address expression as 8 bit relocatable expression.
 177 Also, can be useful for loading 32 bit constants.
 178
 179 @item hlo8
 180
 181 Synonym of @samp{hh8}.
 182
 183 @item hhi8
 184
 185 This modifier allows you to use bits 24 through 31 of
 186 an expression as 8 bit expression. This is useful with, for example, the
 187 AVR @samp{ldi} instruction and @samp{lo8}, @samp{hi8}, @samp{hlo8},
 188 @samp{hhi8}, modifier.
 189
 190 For example
 191
 192 @smallexample
 193 ldi r26, lo8(285774925)
 194 ldi r27, hi8(285774925)
 195 ldi r28, hlo8(285774925)
 196 ldi r29, hhi8(285774925)
 197 ; r29,r28,r27,r26 = 285774925
 198 @end smallexample
 199
 200 @item pm_lo8
 201
 202 This modifier allows you to use bits 0 through 7 of
 203 an address expression as 8 bit relocatable expression.
 204 This modifier useful for addressing data or code from
 205 Flash/Program memory. The using of @samp{pm_lo8} similar
 206 to @samp{lo8}.
 207
 208 @item pm_hi8
 209
 210 This modifier allows you to use bits 8 through 15 of
 211 an address expression as 8 bit relocatable expression.
 212 This modifier useful for addressing data or code from
 213 Flash/Program memory.
 214
 215 @item pm_hh8
 216
 217 This modifier allows you to use bits 15 through 23 of
 218 an address expression as 8 bit relocatable expression.
 219 This modifier useful for addressing data or code from
 220 Flash/Program memory.
 221
 222 @end table
 223
 224 @node AVR Opcodes
 225 @section Opcodes
 226
 227 @cindex AVR opcode summary
 228 @cindex opcode summary, AVR
 229 @cindex mnemonics, AVR
 230 @cindex instruction summary, AVR
 231 For detailed information on the AVR machine instruction set, see
 232 @url{www.atmel.com/products/AVR}.
 233
 234 @code{@value{AS}} implements all the standard AVR opcodes.
 235 The following table summarizes the AVR opcodes, and their arguments.
 236
 237 @smallexample
 238 @i{Legend:}
 239    r   @r{any register}
 240    d   @r{`ldi' register (r16-r31)}
 241    v   @r{`movw' even register (r0, r2, ..., r28, r30)}
 242    a   @r{`fmul' register (r16-r23)}
 243    w   @r{`adiw' register (r24,r26,r28,r30)}
 244    e   @r{pointer registers (X,Y,Z)}
 245    b   @r{base pointer register and displacement ([YZ]+disp)}
 246    z   @r{Z pointer register (for [e]lpm Rd,Z[+])}
 247    M   @r{immediate value from 0 to 255}
 248    n   @r{immediate value from 0 to 255 ( n = ~M ). Relocation impossible}
 249    s   @r{immediate value from 0 to 7}
 250    P   @r{Port address value from 0 to 63. (in, out)}
 251    p   @r{Port address value from 0 to 31. (cbi, sbi, sbic, sbis)}
 252    K   @r{immediate value from 0 to 63 (used in `adiw', `sbiw')}
 253    i   @r{immediate value}
 254    l   @r{signed pc relative offset from -64 to 63}
 255    L   @r{signed pc relative offset from -2048 to 2047}
 256    h   @r{absolute code address (call, jmp)}
 257    S   @r{immediate value from 0 to 7 (S = s << 4)}
 258    ?   @r{use this opcode entry if no parameters, else use next opcode entry}
 259
 260 1001010010001000   clc
 261 1001010011011000   clh
 262 1001010011111000   cli
 263 1001010010101000   cln
 264 1001010011001000   cls
 265 1001010011101000   clt
 266 1001010010111000   clv
 267 1001010010011000   clz
 268 1001010000001000   sec
 269 1001010001011000   seh
 270 1001010001111000   sei
 271 1001010000101000   sen
 272 1001010001001000   ses
 273 1001010001101000   set
 274 1001010000111000   sev
 275 1001010000011000   sez
 276 100101001SSS1000   bclr    S
 277 100101000SSS1000   bset    S
 278 1001010100001001   icall
 279 1001010000001001   ijmp
 280 1001010111001000   lpm     ?
 281 1001000ddddd010+   lpm     r,z
 282 1001010111011000   elpm    ?
 283 1001000ddddd011+   elpm    r,z
 284 0000000000000000   nop
 285 1001010100001000   ret
 286 1001010100011000   reti
 287 1001010110001000   sleep
 288 1001010110011000   break
 289 1001010110101000   wdr
 290 1001010111101000   spm
 291 000111rdddddrrrr   adc     r,r
 292 000011rdddddrrrr   add     r,r
 293 001000rdddddrrrr   and     r,r
 294 000101rdddddrrrr   cp      r,r
 295 000001rdddddrrrr   cpc     r,r
 296 000100rdddddrrrr   cpse    r,r
 297 001001rdddddrrrr   eor     r,r
 298 001011rdddddrrrr   mov     r,r
 299 100111rdddddrrrr   mul     r,r
 300 001010rdddddrrrr   or      r,r
 301 000010rdddddrrrr   sbc     r,r
 302 000110rdddddrrrr   sub     r,r
 303 001001rdddddrrrr   clr     r
 304 000011rdddddrrrr   lsl     r
 305 000111rdddddrrrr   rol     r
 306 001000rdddddrrrr   tst     r
 307 0111KKKKddddKKKK   andi    d,M
 308 0111KKKKddddKKKK   cbr     d,n
 309 1110KKKKddddKKKK   ldi     d,M
 310 11101111dddd1111   ser     d
 311 0110KKKKddddKKKK   ori     d,M
 312 0110KKKKddddKKKK   sbr     d,M
 313 0011KKKKddddKKKK   cpi     d,M
 314 0100KKKKddddKKKK   sbci    d,M
 315 0101KKKKddddKKKK   subi    d,M
 316 1111110rrrrr0sss   sbrc    r,s
 317 1111111rrrrr0sss   sbrs    r,s
 318 1111100ddddd0sss   bld     r,s
 319 1111101ddddd0sss   bst     r,s
 320 10110PPdddddPPPP   in      r,P
 321 10111PPrrrrrPPPP   out     P,r
 322 10010110KKddKKKK   adiw    w,K
 323 10010111KKddKKKK   sbiw    w,K
 324 10011000pppppsss   cbi     p,s
 325 10011010pppppsss   sbi     p,s
 326 10011001pppppsss   sbic    p,s
 327 10011011pppppsss   sbis    p,s
 328 111101lllllll000   brcc    l
 329 111100lllllll000   brcs    l
 330 111100lllllll001   breq    l
 331 111101lllllll100   brge    l
 332 111101lllllll101   brhc    l
 333 111100lllllll101   brhs    l
 334 111101lllllll111   brid    l
 335 111100lllllll111   brie    l
 336 111100lllllll000   brlo    l
 337 111100lllllll100   brlt    l
 338 111100lllllll010   brmi    l
 339 111101lllllll001   brne    l
 340 111101lllllll010   brpl    l
 341 111101lllllll000   brsh    l
 342 111101lllllll110   brtc    l
 343 111100lllllll110   brts    l
 344 111101lllllll011   brvc    l
 345 111100lllllll011   brvs    l
 346 111101lllllllsss   brbc    s,l
 347 111100lllllllsss   brbs    s,l
 348 1101LLLLLLLLLLLL   rcall   L
 349 1100LLLLLLLLLLLL   rjmp    L
 350 1001010hhhhh111h   call    h
 351 1001010hhhhh110h   jmp     h
 352 1001010rrrrr0101   asr     r
 353 1001010rrrrr0000   com     r
 354 1001010rrrrr1010   dec     r
 355 1001010rrrrr0011   inc     r
 356 1001010rrrrr0110   lsr     r
 357 1001010rrrrr0001   neg     r
 358 1001000rrrrr1111   pop     r
 359 1001001rrrrr1111   push    r
 360 1001010rrrrr0111   ror     r
 361 1001010rrrrr0010   swap    r
 362 00000001ddddrrrr   movw    v,v
 363 00000010ddddrrrr   muls    d,d
 364 000000110ddd0rrr   mulsu   a,a
 365 000000110ddd1rrr   fmul    a,a
 366 000000111ddd0rrr   fmuls   a,a
 367 000000111ddd1rrr   fmulsu  a,a
 368 1001001ddddd0000   sts     i,r
 369 1001000ddddd0000   lds     r,i
 370 10o0oo0dddddbooo   ldd     r,b
 371 100!000dddddee-+   ld      r,e
 372 10o0oo1rrrrrbooo   std     b,r
 373 100!001rrrrree-+   st      e,r
 374 1001010100011001   eicall
 375 1001010000011001   eijmp
 376 @end smallexample