gas/doc/c-avr.texi

   1 @c Copyright 2006
   2 @c Free Software Foundation, Inc.
   3 @c This is part of the GAS manual.
   4 @c For copying conditions, see the file as.texinfo.
   5
   6 @ifset GENERIC
   7 @page
   8 @node AVR-Dependent
   9 @chapter AVR Dependent Features
  10 @end ifset
  11
  12 @ifclear GENERIC
  13 @node Machine Dependencies
  14 @chapter AVR Dependent Features
  15 @end ifclear
  16
  17 @cindex AVR support
  18 @menu
  19 * AVR Options::              Options
  20 * AVR Syntax::               Syntax
  21 * AVR Opcodes::              Opcodes
  22 @end menu
  23
  24 @node AVR Options
  25 @section Options
  26 @cindex AVR options (none)
  27 @cindex options for AVR (none)
  28
  29 @table @code
  30
  31 @cindex @code{-mmcu=} command line option, AVR
  32 @item -mmcu=@var{mcu}
  33 Specify ATMEL AVR instruction set or MCU type.
  34
  35 Instruction set avr1 is for the minimal AVR core, not supported by the C
  36 compiler, only for assembler programs (MCU types: at90s1200,
  37 attiny11, attiny12, attiny15, attiny28).
  38
  39 Instruction set avr2 (default) is for the classic AVR core with up to
  40 8K program memory space (MCU types: at90s2313, at90s2323, at90s2333, at90s2343,
  41 attiny22, attiny26, at90s4414, at90s4433, at90s4434, at90s8515, at90c8534,
  42 at90s8535).
  43
  44 Instruction set avr25 is for the classic AVR core with up to 8K program memory
  45 space plus the MOVW instruction (MCU types: attiny13, attiny13a, attiny2313,
  46 attiny24, attiny44, attiny84, attiny25, attiny45, attiny85, attiny261,
  47 attiny461, attiny861, attiny87, attiny43u, attiny48, attiny88, at86rf401).
  48
  49 Instruction set avr3 is for the classic AVR core with up to 128K program
  50 memory space (MCU types: at43usb355, at76c711).
  51
  52 Instruction set avr31 is for the classic AVR core with exactly 128K program
  53 memory space (MCU types: atmega103, at43usb320).
  54
  55 Instruction set avr35 is for classic AVR core plus MOVW, CALL, and JMP
  56 instructions (MCU types: attiny167, attiny327, at90usb82, at90usb162).
  57
  58 Instruction set avr4 is for the enhanced AVR core with up to 8K program
  59 memory space (MCU types: atmega48, atmega48p,atmega8, atmega88, atmega88p,
  60 atmega8515, atmega8535, atmega8hva, atmega4hvd, atmega8hvd, at90pwm1,
  61 at90pwm2, at90pwm2b, at90pwm3, at90pwm3b, at90pwm81).
  62
  63 Instruction set avr5 is for the enhanced AVR core with up to 128K program
  64 memory space (MCU types: atmega16, atmega161, atmega162, atmega163, atmega164p,
  65 atmega165, atmega165p, atmega168, atmega168p, atmega169, atmega169p, atmega32,
  66 atmega323, atmega324p, atmega325, atmega325p, atmega3250, atmega3250p,
  67 atmega328p, atmega329, atmega329p, atmega3290, atmega3290p, atmega406, atmega64,
  68 atmega640, atmega644, atmega644p, atmega645, atmega6450, atmega649, atmega6490,
  69 atmega16hva, atmega16hvb, atmega32hvb, at90can32, at90can64, at90pwm216,
  70 at90pwm316, atmega32c1, atmega64c1, atmega16m1, atmega32m1, atmega64m1,
  71 atmega16u4, atmega32u4, atmega32u6, at90usb646, at90usb647, at94k, at90scr100).
  72
  73 Instruction set avr51 is for the enhanced AVR core with exactly 128K program
  74 memory space (MCU types: atmega128, atmega1280, atmega1281, atmega1284p,
  75 atmega128rfa, at90can128, at90usb1286, at90usb1287, m3000f, m3000s, m3001b).
  76
  77 Instruction set avr6 is for the enhanced AVR core with a 3-byte PC (MCU types:
  78 atmega2560, atmega2561).
  79
  80 @cindex @code{-mall-opcodes} command line option, AVR
  81 @item -mall-opcodes
  82 Accept all AVR opcodes, even if not supported by @code{-mmcu}.
  83
  84 @cindex @code{-mno-skip-bug} command line option, AVR
  85 @item -mno-skip-bug
  86 This option disable warnings for skipping two-word instructions.
  87
  88 @cindex @code{-mno-wrap} command line option, AVR
  89 @item -mno-wrap
  90 This option reject @code{rjmp/rcall} instructions with 8K wrap-around.
  91
  92 @end table
  93
  94
  95 @node AVR Syntax
  96 @section Syntax
  97 @menu
  98 * AVR-Chars::                Special Characters
  99 * AVR-Regs::                 Register Names
 100 * AVR-Modifiers::            Relocatable Expression Modifiers
 101 @end menu
 102
 103 @node AVR-Chars
 104 @subsection Special Characters
 105
 106 @cindex line comment character, AVR
 107 @cindex AVR line comment character
 108
 109 The presence of a @samp{;} on a line indicates the start of a comment
 110 that extends to the end of the current line.  If a @samp{#} appears as
 111 the first character of a line, the whole line is treated as a comment.
 112
 113 @cindex line separator, AVR
 114 @cindex statement separator, AVR
 115 @cindex AVR line separator
 116
 117 The @samp{$} character can be used instead of a newline to separate
 118 statements.
 119
 120 @node AVR-Regs
 121 @subsection Register Names
 122
 123 @cindex AVR register names
 124 @cindex register names, AVR
 125
 126 The AVR has 32 x 8-bit general purpose working registers @samp{r0},
 127 @samp{r1}, ... @samp{r31}.
 128 Six of the 32 registers can be used as three 16-bit indirect address
 129 register pointers for Data Space addressing. One of the these address
 130 pointers can also be used as an address pointer for look up tables in
 131 Flash program memory. These added function registers are the 16-bit
 132 @samp{X}, @samp{Y} and @samp{Z} - registers.
 133
 134 @smallexample
 135 X = @r{r26:r27}
 136 Y = @r{r28:r29}
 137 Z = @r{r30:r31}
 138 @end smallexample
 139
 140 @node AVR-Modifiers
 141 @subsection Relocatable Expression Modifiers
 142
 143 @cindex AVR modifiers
 144 @cindex syntax, AVR
 145
 146 The assembler supports several modifiers when using relocatable addresses
 147 in AVR instruction operands.  The general syntax is the following:
 148
 149 @smallexample
 150 modifier(relocatable-expression)
 151 @end smallexample
 152
 153 @table @code
 154 @cindex symbol modifiers
 155
 156 @item lo8
 157
 158 This modifier allows you to use bits 0 through 7 of
 159 an address expression as 8 bit relocatable expression.
 160
 161 @item hi8
 162
 163 This modifier allows you to use bits 7 through 15 of an address expression
 164 as 8 bit relocatable expression.  This is useful with, for example, the
 165 AVR @samp{ldi} instruction and @samp{lo8} modifier.
 166
 167 For example
 168
 169 @smallexample
 170 ldi r26, lo8(sym+10)
 171 ldi r27, hi8(sym+10)
 172 @end smallexample
 173
 174 @item hh8
 175
 176 This modifier allows you to use bits 16 through 23 of
 177 an address expression as 8 bit relocatable expression.
 178 Also, can be useful for loading 32 bit constants.
 179
 180 @item hlo8
 181
 182 Synonym of @samp{hh8}.
 183
 184 @item hhi8
 185
 186 This modifier allows you to use bits 24 through 31 of
 187 an expression as 8 bit expression. This is useful with, for example, the
 188 AVR @samp{ldi} instruction and @samp{lo8}, @samp{hi8}, @samp{hlo8},
 189 @samp{hhi8}, modifier.
 190
 191 For example
 192
 193 @smallexample
 194 ldi r26, lo8(285774925)
 195 ldi r27, hi8(285774925)
 196 ldi r28, hlo8(285774925)
 197 ldi r29, hhi8(285774925)
 198 ; r29,r28,r27,r26 = 285774925
 199 @end smallexample
 200
 201 @item pm_lo8
 202
 203 This modifier allows you to use bits 0 through 7 of
 204 an address expression as 8 bit relocatable expression.
 205 This modifier useful for addressing data or code from
 206 Flash/Program memory. The using of @samp{pm_lo8} similar
 207 to @samp{lo8}.
 208
 209 @item pm_hi8
 210
 211 This modifier allows you to use bits 8 through 15 of
 212 an address expression as 8 bit relocatable expression.
 213 This modifier useful for addressing data or code from
 214 Flash/Program memory.
 215
 216 @item pm_hh8
 217
 218 This modifier allows you to use bits 15 through 23 of
 219 an address expression as 8 bit relocatable expression.
 220 This modifier useful for addressing data or code from
 221 Flash/Program memory.
 222
 223 @end table
 224
 225 @node AVR Opcodes
 226 @section Opcodes
 227
 228 @cindex AVR opcode summary
 229 @cindex opcode summary, AVR
 230 @cindex mnemonics, AVR
 231 @cindex instruction summary, AVR
 232 For detailed information on the AVR machine instruction set, see
 233 @url{www.atmel.com/products/AVR}.
 234
 235 @code{@value{AS}} implements all the standard AVR opcodes.
 236 The following table summarizes the AVR opcodes, and their arguments.
 237
 238 @smallexample
 239 @i{Legend:}
 240    r   @r{any register}
 241    d   @r{`ldi' register (r16-r31)}
 242    v   @r{`movw' even register (r0, r2, ..., r28, r30)}
 243    a   @r{`fmul' register (r16-r23)}
 244    w   @r{`adiw' register (r24,r26,r28,r30)}
 245    e   @r{pointer registers (X,Y,Z)}
 246    b   @r{base pointer register and displacement ([YZ]+disp)}
 247    z   @r{Z pointer register (for [e]lpm Rd,Z[+])}
 248    M   @r{immediate value from 0 to 255}
 249    n   @r{immediate value from 0 to 255 ( n = ~M ). Relocation impossible}
 250    s   @r{immediate value from 0 to 7}
 251    P   @r{Port address value from 0 to 63. (in, out)}
 252    p   @r{Port address value from 0 to 31. (cbi, sbi, sbic, sbis)}
 253    K   @r{immediate value from 0 to 63 (used in `adiw', `sbiw')}
 254    i   @r{immediate value}
 255    l   @r{signed pc relative offset from -64 to 63}
 256    L   @r{signed pc relative offset from -2048 to 2047}
 257    h   @r{absolute code address (call, jmp)}
 258    S   @r{immediate value from 0 to 7 (S = s << 4)}
 259    ?   @r{use this opcode entry if no parameters, else use next opcode entry}
 260
 261 1001010010001000   clc
 262 1001010011011000   clh
 263 1001010011111000   cli
 264 1001010010101000   cln
 265 1001010011001000   cls
 266 1001010011101000   clt
 267 1001010010111000   clv
 268 1001010010011000   clz
 269 1001010000001000   sec
 270 1001010001011000   seh
 271 1001010001111000   sei
 272 1001010000101000   sen
 273 1001010001001000   ses
 274 1001010001101000   set
 275 1001010000111000   sev
 276 1001010000011000   sez
 277 100101001SSS1000   bclr    S
 278 100101000SSS1000   bset    S
 279 1001010100001001   icall
 280 1001010000001001   ijmp
 281 1001010111001000   lpm     ?
 282 1001000ddddd010+   lpm     r,z
 283 1001010111011000   elpm    ?
 284 1001000ddddd011+   elpm    r,z
 285 0000000000000000   nop
 286 1001010100001000   ret
 287 1001010100011000   reti
 288 1001010110001000   sleep
 289 1001010110011000   break
 290 1001010110101000   wdr
 291 1001010111101000   spm
 292 000111rdddddrrrr   adc     r,r
 293 000011rdddddrrrr   add     r,r
 294 001000rdddddrrrr   and     r,r
 295 000101rdddddrrrr   cp      r,r
 296 000001rdddddrrrr   cpc     r,r
 297 000100rdddddrrrr   cpse    r,r
 298 001001rdddddrrrr   eor     r,r
 299 001011rdddddrrrr   mov     r,r
 300 100111rdddddrrrr   mul     r,r
 301 001010rdddddrrrr   or      r,r
 302 000010rdddddrrrr   sbc     r,r
 303 000110rdddddrrrr   sub     r,r
 304 001001rdddddrrrr   clr     r
 305 000011rdddddrrrr   lsl     r
 306 000111rdddddrrrr   rol     r
 307 001000rdddddrrrr   tst     r
 308 0111KKKKddddKKKK   andi    d,M
 309 0111KKKKddddKKKK   cbr     d,n
 310 1110KKKKddddKKKK   ldi     d,M
 311 11101111dddd1111   ser     d
 312 0110KKKKddddKKKK   ori     d,M
 313 0110KKKKddddKKKK   sbr     d,M
 314 0011KKKKddddKKKK   cpi     d,M
 315 0100KKKKddddKKKK   sbci    d,M
 316 0101KKKKddddKKKK   subi    d,M
 317 1111110rrrrr0sss   sbrc    r,s
 318 1111111rrrrr0sss   sbrs    r,s
 319 1111100ddddd0sss   bld     r,s
 320 1111101ddddd0sss   bst     r,s
 321 10110PPdddddPPPP   in      r,P
 322 10111PPrrrrrPPPP   out     P,r
 323 10010110KKddKKKK   adiw    w,K
 324 10010111KKddKKKK   sbiw    w,K
 325 10011000pppppsss   cbi     p,s
 326 10011010pppppsss   sbi     p,s
 327 10011001pppppsss   sbic    p,s
 328 10011011pppppsss   sbis    p,s
 329 111101lllllll000   brcc    l
 330 111100lllllll000   brcs    l
 331 111100lllllll001   breq    l
 332 111101lllllll100   brge    l
 333 111101lllllll101   brhc    l
 334 111100lllllll101   brhs    l
 335 111101lllllll111   brid    l
 336 111100lllllll111   brie    l
 337 111100lllllll000   brlo    l
 338 111100lllllll100   brlt    l
 339 111100lllllll010   brmi    l
 340 111101lllllll001   brne    l
 341 111101lllllll010   brpl    l
 342 111101lllllll000   brsh    l
 343 111101lllllll110   brtc    l
 344 111100lllllll110   brts    l
 345 111101lllllll011   brvc    l
 346 111100lllllll011   brvs    l
 347 111101lllllllsss   brbc    s,l
 348 111100lllllllsss   brbs    s,l
 349 1101LLLLLLLLLLLL   rcall   L
 350 1100LLLLLLLLLLLL   rjmp    L
 351 1001010hhhhh111h   call    h
 352 1001010hhhhh110h   jmp     h
 353 1001010rrrrr0101   asr     r
 354 1001010rrrrr0000   com     r
 355 1001010rrrrr1010   dec     r
 356 1001010rrrrr0011   inc     r
 357 1001010rrrrr0110   lsr     r
 358 1001010rrrrr0001   neg     r
 359 1001000rrrrr1111   pop     r
 360 1001001rrrrr1111   push    r
 361 1001010rrrrr0111   ror     r
 362 1001010rrrrr0010   swap    r
 363 00000001ddddrrrr   movw    v,v
 364 00000010ddddrrrr   muls    d,d
 365 000000110ddd0rrr   mulsu   a,a
 366 000000110ddd1rrr   fmul    a,a
 367 000000111ddd0rrr   fmuls   a,a
 368 000000111ddd1rrr   fmulsu  a,a
 369 1001001ddddd0000   sts     i,r
 370 1001000ddddd0000   lds     r,i
 371 10o0oo0dddddbooo   ldd     r,b
 372 100!000dddddee-+   ld      r,e
 373 10o0oo1rrrrrbooo   std     b,r
 374 100!001rrrrree-+   st      e,r
 375 1001010100011001   eicall
 376 1001010000011001   eijmp
 377 @end smallexample