bbbcdfc5b2ee5b1937866d096fb10d0c93f4d2f5
[deliverable/binutils-gdb.git] / gas / doc / c-avr.texi
1 @c Copyright 2006
2 @c Free Software Foundation, Inc.
3 @c This is part of the GAS manual.
4 @c For copying conditions, see the file as.texinfo.
5
6 @ifset GENERIC
7 @page
8 @node AVR-Dependent
9 @chapter AVR Dependent Features
10 @end ifset
11
12 @ifclear GENERIC
13 @node Machine Dependencies
14 @chapter AVR Dependent Features
15 @end ifclear
16
17 @cindex AVR support
18 @menu
19 * AVR Options:: Options
20 * AVR Syntax:: Syntax
21 * AVR Opcodes:: Opcodes
22 @end menu
23
24 @node AVR Options
25 @section Options
26 @cindex AVR options (none)
27 @cindex options for AVR (none)
28
29 @table @code
30
31 @cindex @code{-mmcu=} command line option, AVR
32 @item -mmcu=@var{mcu}
33 Specify ATMEL AVR instruction set or MCU type.
34
35 Instruction set avr1 is for the minimal AVR core, not supported by the C
36 compiler, only for assembler programs (MCU types: at90s1200,
37 attiny11, attiny12, attiny15, attiny28).
38
39 Instruction set avr2 (default) is for the classic AVR core with up to
40 8K program memory space (MCU types: at90s2313, at90s2323, at90s2333, at90s2343,
41 attiny22, attiny26, at90s4414, at90s4433, at90s4434, at90s8515, at90c8534,
42 at90s8535).
43
44 Instruction set avr25 is for the classic AVR core with up to 8K program memory
45 space plus the MOVW instruction (MCU types: attiny13, attiny13a, attiny2313,
46 attiny24, attiny44, attiny84, attiny25, attiny45, attiny85, attiny261,
47 attiny461, attiny861, attiny87, attiny43u, attiny48, attiny88, at86rf401,
48 ata6289).
49
50 Instruction set avr3 is for the classic AVR core with up to 128K program
51 memory space (MCU types: at43usb355, at76c711).
52
53 Instruction set avr31 is for the classic AVR core with exactly 128K program
54 memory space (MCU types: atmega103, at43usb320).
55
56 Instruction set avr35 is for classic AVR core plus MOVW, CALL, and JMP
57 instructions (MCU types: attiny167, attiny327, at90usb82, at90usb162, atmega8u2,
58 atmega16u2, atmega32u2).
59
60 Instruction set avr4 is for the enhanced AVR core with up to 8K program
61 memory space (MCU types: atmega48, atmega48p,atmega8, atmega88, atmega88p,
62 atmega8515, atmega8535, atmega8hva, atmega4hvd, atmega8hvd, at90pwm1,
63 at90pwm2, at90pwm2b, at90pwm3, at90pwm3b, at90pwm81, atmega8m1, atmega8c1).
64
65 Instruction set avr5 is for the enhanced AVR core with up to 128K program
66 memory space (MCU types: atmega16, atmega161, atmega162, atmega163, atmega164p,
67 atmega165, atmega165p, atmega168, atmega168p, atmega169, atmega169p, atmega16c1,
68 atmega32, atmega323, atmega324p, atmega325, atmega325p, atmega3250, atmega3250p,
69 atmega328p, atmega329, atmega329p, atmega3290, atmega3290p, atmega406, atmega64,
70 atmega640, atmega644, atmega644p, atmega645, atmega6450, atmega649, atmega6490,
71 atmega16hva, atmega16hvb, atmega32hvb, at90can32, at90can64, at90pwm216,
72 at90pwm316, atmega32c1, atmega64c1, atmega16m1, atmega32m1, atmega64m1,
73 atmega16u4, atmega32u4, atmega32u6, at90usb646, at90usb647, at94k, at90scr100).
74
75 Instruction set avr51 is for the enhanced AVR core with exactly 128K program
76 memory space (MCU types: atmega128, atmega1280, atmega1281, atmega1284p,
77 atmega128rfa1, at90can128, at90usb1286, at90usb1287, m3000f, m3000s, m3001b).
78
79 Instruction set avr6 is for the enhanced AVR core with a 3-byte PC (MCU types:
80 atmega2560, atmega2561).
81
82 @cindex @code{-mall-opcodes} command line option, AVR
83 @item -mall-opcodes
84 Accept all AVR opcodes, even if not supported by @code{-mmcu}.
85
86 @cindex @code{-mno-skip-bug} command line option, AVR
87 @item -mno-skip-bug
88 This option disable warnings for skipping two-word instructions.
89
90 @cindex @code{-mno-wrap} command line option, AVR
91 @item -mno-wrap
92 This option reject @code{rjmp/rcall} instructions with 8K wrap-around.
93
94 @end table
95
96
97 @node AVR Syntax
98 @section Syntax
99 @menu
100 * AVR-Chars:: Special Characters
101 * AVR-Regs:: Register Names
102 * AVR-Modifiers:: Relocatable Expression Modifiers
103 @end menu
104
105 @node AVR-Chars
106 @subsection Special Characters
107
108 @cindex line comment character, AVR
109 @cindex AVR line comment character
110
111 The presence of a @samp{;} on a line indicates the start of a comment
112 that extends to the end of the current line. If a @samp{#} appears as
113 the first character of a line, the whole line is treated as a comment.
114
115 @cindex line separator, AVR
116 @cindex statement separator, AVR
117 @cindex AVR line separator
118
119 The @samp{$} character can be used instead of a newline to separate
120 statements.
121
122 @node AVR-Regs
123 @subsection Register Names
124
125 @cindex AVR register names
126 @cindex register names, AVR
127
128 The AVR has 32 x 8-bit general purpose working registers @samp{r0},
129 @samp{r1}, ... @samp{r31}.
130 Six of the 32 registers can be used as three 16-bit indirect address
131 register pointers for Data Space addressing. One of the these address
132 pointers can also be used as an address pointer for look up tables in
133 Flash program memory. These added function registers are the 16-bit
134 @samp{X}, @samp{Y} and @samp{Z} - registers.
135
136 @smallexample
137 X = @r{r26:r27}
138 Y = @r{r28:r29}
139 Z = @r{r30:r31}
140 @end smallexample
141
142 @node AVR-Modifiers
143 @subsection Relocatable Expression Modifiers
144
145 @cindex AVR modifiers
146 @cindex syntax, AVR
147
148 The assembler supports several modifiers when using relocatable addresses
149 in AVR instruction operands. The general syntax is the following:
150
151 @smallexample
152 modifier(relocatable-expression)
153 @end smallexample
154
155 @table @code
156 @cindex symbol modifiers
157
158 @item lo8
159
160 This modifier allows you to use bits 0 through 7 of
161 an address expression as 8 bit relocatable expression.
162
163 @item hi8
164
165 This modifier allows you to use bits 7 through 15 of an address expression
166 as 8 bit relocatable expression. This is useful with, for example, the
167 AVR @samp{ldi} instruction and @samp{lo8} modifier.
168
169 For example
170
171 @smallexample
172 ldi r26, lo8(sym+10)
173 ldi r27, hi8(sym+10)
174 @end smallexample
175
176 @item hh8
177
178 This modifier allows you to use bits 16 through 23 of
179 an address expression as 8 bit relocatable expression.
180 Also, can be useful for loading 32 bit constants.
181
182 @item hlo8
183
184 Synonym of @samp{hh8}.
185
186 @item hhi8
187
188 This modifier allows you to use bits 24 through 31 of
189 an expression as 8 bit expression. This is useful with, for example, the
190 AVR @samp{ldi} instruction and @samp{lo8}, @samp{hi8}, @samp{hlo8},
191 @samp{hhi8}, modifier.
192
193 For example
194
195 @smallexample
196 ldi r26, lo8(285774925)
197 ldi r27, hi8(285774925)
198 ldi r28, hlo8(285774925)
199 ldi r29, hhi8(285774925)
200 ; r29,r28,r27,r26 = 285774925
201 @end smallexample
202
203 @item pm_lo8
204
205 This modifier allows you to use bits 0 through 7 of
206 an address expression as 8 bit relocatable expression.
207 This modifier useful for addressing data or code from
208 Flash/Program memory. The using of @samp{pm_lo8} similar
209 to @samp{lo8}.
210
211 @item pm_hi8
212
213 This modifier allows you to use bits 8 through 15 of
214 an address expression as 8 bit relocatable expression.
215 This modifier useful for addressing data or code from
216 Flash/Program memory.
217
218 @item pm_hh8
219
220 This modifier allows you to use bits 15 through 23 of
221 an address expression as 8 bit relocatable expression.
222 This modifier useful for addressing data or code from
223 Flash/Program memory.
224
225 @end table
226
227 @node AVR Opcodes
228 @section Opcodes
229
230 @cindex AVR opcode summary
231 @cindex opcode summary, AVR
232 @cindex mnemonics, AVR
233 @cindex instruction summary, AVR
234 For detailed information on the AVR machine instruction set, see
235 @url{www.atmel.com/products/AVR}.
236
237 @code{@value{AS}} implements all the standard AVR opcodes.
238 The following table summarizes the AVR opcodes, and their arguments.
239
240 @smallexample
241 @i{Legend:}
242 r @r{any register}
243 d @r{`ldi' register (r16-r31)}
244 v @r{`movw' even register (r0, r2, ..., r28, r30)}
245 a @r{`fmul' register (r16-r23)}
246 w @r{`adiw' register (r24,r26,r28,r30)}
247 e @r{pointer registers (X,Y,Z)}
248 b @r{base pointer register and displacement ([YZ]+disp)}
249 z @r{Z pointer register (for [e]lpm Rd,Z[+])}
250 M @r{immediate value from 0 to 255}
251 n @r{immediate value from 0 to 255 ( n = ~M ). Relocation impossible}
252 s @r{immediate value from 0 to 7}
253 P @r{Port address value from 0 to 63. (in, out)}
254 p @r{Port address value from 0 to 31. (cbi, sbi, sbic, sbis)}
255 K @r{immediate value from 0 to 63 (used in `adiw', `sbiw')}
256 i @r{immediate value}
257 l @r{signed pc relative offset from -64 to 63}
258 L @r{signed pc relative offset from -2048 to 2047}
259 h @r{absolute code address (call, jmp)}
260 S @r{immediate value from 0 to 7 (S = s << 4)}
261 ? @r{use this opcode entry if no parameters, else use next opcode entry}
262
263 1001010010001000 clc
264 1001010011011000 clh
265 1001010011111000 cli
266 1001010010101000 cln
267 1001010011001000 cls
268 1001010011101000 clt
269 1001010010111000 clv
270 1001010010011000 clz
271 1001010000001000 sec
272 1001010001011000 seh
273 1001010001111000 sei
274 1001010000101000 sen
275 1001010001001000 ses
276 1001010001101000 set
277 1001010000111000 sev
278 1001010000011000 sez
279 100101001SSS1000 bclr S
280 100101000SSS1000 bset S
281 1001010100001001 icall
282 1001010000001001 ijmp
283 1001010111001000 lpm ?
284 1001000ddddd010+ lpm r,z
285 1001010111011000 elpm ?
286 1001000ddddd011+ elpm r,z
287 0000000000000000 nop
288 1001010100001000 ret
289 1001010100011000 reti
290 1001010110001000 sleep
291 1001010110011000 break
292 1001010110101000 wdr
293 1001010111101000 spm
294 000111rdddddrrrr adc r,r
295 000011rdddddrrrr add r,r
296 001000rdddddrrrr and r,r
297 000101rdddddrrrr cp r,r
298 000001rdddddrrrr cpc r,r
299 000100rdddddrrrr cpse r,r
300 001001rdddddrrrr eor r,r
301 001011rdddddrrrr mov r,r
302 100111rdddddrrrr mul r,r
303 001010rdddddrrrr or r,r
304 000010rdddddrrrr sbc r,r
305 000110rdddddrrrr sub r,r
306 001001rdddddrrrr clr r
307 000011rdddddrrrr lsl r
308 000111rdddddrrrr rol r
309 001000rdddddrrrr tst r
310 0111KKKKddddKKKK andi d,M
311 0111KKKKddddKKKK cbr d,n
312 1110KKKKddddKKKK ldi d,M
313 11101111dddd1111 ser d
314 0110KKKKddddKKKK ori d,M
315 0110KKKKddddKKKK sbr d,M
316 0011KKKKddddKKKK cpi d,M
317 0100KKKKddddKKKK sbci d,M
318 0101KKKKddddKKKK subi d,M
319 1111110rrrrr0sss sbrc r,s
320 1111111rrrrr0sss sbrs r,s
321 1111100ddddd0sss bld r,s
322 1111101ddddd0sss bst r,s
323 10110PPdddddPPPP in r,P
324 10111PPrrrrrPPPP out P,r
325 10010110KKddKKKK adiw w,K
326 10010111KKddKKKK sbiw w,K
327 10011000pppppsss cbi p,s
328 10011010pppppsss sbi p,s
329 10011001pppppsss sbic p,s
330 10011011pppppsss sbis p,s
331 111101lllllll000 brcc l
332 111100lllllll000 brcs l
333 111100lllllll001 breq l
334 111101lllllll100 brge l
335 111101lllllll101 brhc l
336 111100lllllll101 brhs l
337 111101lllllll111 brid l
338 111100lllllll111 brie l
339 111100lllllll000 brlo l
340 111100lllllll100 brlt l
341 111100lllllll010 brmi l
342 111101lllllll001 brne l
343 111101lllllll010 brpl l
344 111101lllllll000 brsh l
345 111101lllllll110 brtc l
346 111100lllllll110 brts l
347 111101lllllll011 brvc l
348 111100lllllll011 brvs l
349 111101lllllllsss brbc s,l
350 111100lllllllsss brbs s,l
351 1101LLLLLLLLLLLL rcall L
352 1100LLLLLLLLLLLL rjmp L
353 1001010hhhhh111h call h
354 1001010hhhhh110h jmp h
355 1001010rrrrr0101 asr r
356 1001010rrrrr0000 com r
357 1001010rrrrr1010 dec r
358 1001010rrrrr0011 inc r
359 1001010rrrrr0110 lsr r
360 1001010rrrrr0001 neg r
361 1001000rrrrr1111 pop r
362 1001001rrrrr1111 push r
363 1001010rrrrr0111 ror r
364 1001010rrrrr0010 swap r
365 00000001ddddrrrr movw v,v
366 00000010ddddrrrr muls d,d
367 000000110ddd0rrr mulsu a,a
368 000000110ddd1rrr fmul a,a
369 000000111ddd0rrr fmuls a,a
370 000000111ddd1rrr fmulsu a,a
371 1001001ddddd0000 sts i,r
372 1001000ddddd0000 lds r,i
373 10o0oo0dddddbooo ldd r,b
374 100!000dddddee-+ ld r,e
375 10o0oo1rrrrrbooo std b,r
376 100!001rrrrree-+ st e,r
377 1001010100011001 eicall
378 1001010000011001 eijmp
379 @end smallexample
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