* config/bfin-parse.y (gen_multi_instr_1): Check anomaly
[deliverable/binutils-gdb.git] / gas / doc / c-avr.texi
1 @c Copyright 2006, 2007, 2008, 2009
2 @c Free Software Foundation, Inc.
3 @c This is part of the GAS manual.
4 @c For copying conditions, see the file as.texinfo.
5
6 @ifset GENERIC
7 @page
8 @node AVR-Dependent
9 @chapter AVR Dependent Features
10 @end ifset
11
12 @ifclear GENERIC
13 @node Machine Dependencies
14 @chapter AVR Dependent Features
15 @end ifclear
16
17 @cindex AVR support
18 @menu
19 * AVR Options:: Options
20 * AVR Syntax:: Syntax
21 * AVR Opcodes:: Opcodes
22 @end menu
23
24 @node AVR Options
25 @section Options
26 @cindex AVR options (none)
27 @cindex options for AVR (none)
28
29 @table @code
30
31 @cindex @code{-mmcu=} command line option, AVR
32 @item -mmcu=@var{mcu}
33 Specify ATMEL AVR instruction set or MCU type.
34
35 Instruction set avr1 is for the minimal AVR core, not supported by the C
36 compiler, only for assembler programs (MCU types: at90s1200,
37 attiny11, attiny12, attiny15, attiny28).
38
39 Instruction set avr2 (default) is for the classic AVR core with up to
40 8K program memory space (MCU types: at90s2313, at90s2323, at90s2333, at90s2343,
41 attiny22, attiny26, at90s4414, at90s4433, at90s4434, at90s8515, at90c8534,
42 at90s8535).
43
44 Instruction set avr25 is for the classic AVR core with up to 8K program memory
45 space plus the MOVW instruction (MCU types: attiny13, attiny13a, attiny2313,
46 attiny2313a, attiny24, attiny24a, attiny4313, attiny44, attiny44a, attiny84,
47 attiny25, attiny45, attiny85, attiny261, attiny261a, attiny461, attiny861,
48 attiny861a, attiny87, attiny43u, attiny48, attiny88, at86rf401, ata6289).
49
50 Instruction set avr3 is for the classic AVR core with up to 128K program
51 memory space (MCU types: at43usb355, at76c711).
52
53 Instruction set avr31 is for the classic AVR core with exactly 128K program
54 memory space (MCU types: atmega103, at43usb320).
55
56 Instruction set avr35 is for classic AVR core plus MOVW, CALL, and JMP
57 instructions (MCU types: attiny167, attiny327, at90usb82, at90usb162, atmega8u2,
58 atmega16u2, atmega32u2).
59
60 Instruction set avr4 is for the enhanced AVR core with up to 8K program
61 memory space (MCU types: atmega48, atmega48p,atmega8, atmega88, atmega88p,
62 atmega8515, atmega8535, atmega8hva, atmega4hvd, atmega8hvd, at90pwm1,
63 at90pwm2, at90pwm2b, at90pwm3, at90pwm3b, at90pwm81, atmega8m1, atmega8c1).
64
65 Instruction set avr5 is for the enhanced AVR core with up to 128K program
66 memory space (MCU types: atmega16, atmega161, atmega162, atmega163, atmega164p,
67 atmega165, atmega165p, atmega168, atmega168p, atmega169, atmega169p, atmega16c1,
68 atmega32, atmega323, atmega324p, atmega325, atmega325p, atmega3250, atmega3250p,
69 atmega328p, atmega329, atmega329p, atmega3290, atmega3290p, atmega406, atmega64,
70 atmega640, atmega644, atmega644p, atmega644pa, atmega645, atmega6450, atmega649,
71 atmega6490, atmega16hva, atmega16hvb, atmega32hvb, at90can32, at90can64,
72 at90pwm216, at90pwm316, atmega32c1, atmega64c1, atmega16m1, atmega32m1,
73 atmega64m1, atmega16u4, atmega32u4, atmega32u6, at90usb646, at90usb647, at94k,
74 at90scr100).
75
76 Instruction set avr51 is for the enhanced AVR core with exactly 128K program
77 memory space (MCU types: atmega128, atmega1280, atmega1281, atmega1284p,
78 atmega128rfa1, at90can128, at90usb1286, at90usb1287, m3000f, m3000s, m3001b).
79
80 Instruction set avr6 is for the enhanced AVR core with a 3-byte PC (MCU types:
81 atmega2560, atmega2561).
82
83 @cindex @code{-mall-opcodes} command line option, AVR
84 @item -mall-opcodes
85 Accept all AVR opcodes, even if not supported by @code{-mmcu}.
86
87 @cindex @code{-mno-skip-bug} command line option, AVR
88 @item -mno-skip-bug
89 This option disable warnings for skipping two-word instructions.
90
91 @cindex @code{-mno-wrap} command line option, AVR
92 @item -mno-wrap
93 This option reject @code{rjmp/rcall} instructions with 8K wrap-around.
94
95 @end table
96
97
98 @node AVR Syntax
99 @section Syntax
100 @menu
101 * AVR-Chars:: Special Characters
102 * AVR-Regs:: Register Names
103 * AVR-Modifiers:: Relocatable Expression Modifiers
104 @end menu
105
106 @node AVR-Chars
107 @subsection Special Characters
108
109 @cindex line comment character, AVR
110 @cindex AVR line comment character
111
112 The presence of a @samp{;} on a line indicates the start of a comment
113 that extends to the end of the current line. If a @samp{#} appears as
114 the first character of a line, the whole line is treated as a comment.
115
116 @cindex line separator, AVR
117 @cindex statement separator, AVR
118 @cindex AVR line separator
119
120 The @samp{$} character can be used instead of a newline to separate
121 statements.
122
123 @node AVR-Regs
124 @subsection Register Names
125
126 @cindex AVR register names
127 @cindex register names, AVR
128
129 The AVR has 32 x 8-bit general purpose working registers @samp{r0},
130 @samp{r1}, ... @samp{r31}.
131 Six of the 32 registers can be used as three 16-bit indirect address
132 register pointers for Data Space addressing. One of the these address
133 pointers can also be used as an address pointer for look up tables in
134 Flash program memory. These added function registers are the 16-bit
135 @samp{X}, @samp{Y} and @samp{Z} - registers.
136
137 @smallexample
138 X = @r{r26:r27}
139 Y = @r{r28:r29}
140 Z = @r{r30:r31}
141 @end smallexample
142
143 @node AVR-Modifiers
144 @subsection Relocatable Expression Modifiers
145
146 @cindex AVR modifiers
147 @cindex syntax, AVR
148
149 The assembler supports several modifiers when using relocatable addresses
150 in AVR instruction operands. The general syntax is the following:
151
152 @smallexample
153 modifier(relocatable-expression)
154 @end smallexample
155
156 @table @code
157 @cindex symbol modifiers
158
159 @item lo8
160
161 This modifier allows you to use bits 0 through 7 of
162 an address expression as 8 bit relocatable expression.
163
164 @item hi8
165
166 This modifier allows you to use bits 7 through 15 of an address expression
167 as 8 bit relocatable expression. This is useful with, for example, the
168 AVR @samp{ldi} instruction and @samp{lo8} modifier.
169
170 For example
171
172 @smallexample
173 ldi r26, lo8(sym+10)
174 ldi r27, hi8(sym+10)
175 @end smallexample
176
177 @item hh8
178
179 This modifier allows you to use bits 16 through 23 of
180 an address expression as 8 bit relocatable expression.
181 Also, can be useful for loading 32 bit constants.
182
183 @item hlo8
184
185 Synonym of @samp{hh8}.
186
187 @item hhi8
188
189 This modifier allows you to use bits 24 through 31 of
190 an expression as 8 bit expression. This is useful with, for example, the
191 AVR @samp{ldi} instruction and @samp{lo8}, @samp{hi8}, @samp{hlo8},
192 @samp{hhi8}, modifier.
193
194 For example
195
196 @smallexample
197 ldi r26, lo8(285774925)
198 ldi r27, hi8(285774925)
199 ldi r28, hlo8(285774925)
200 ldi r29, hhi8(285774925)
201 ; r29,r28,r27,r26 = 285774925
202 @end smallexample
203
204 @item pm_lo8
205
206 This modifier allows you to use bits 0 through 7 of
207 an address expression as 8 bit relocatable expression.
208 This modifier useful for addressing data or code from
209 Flash/Program memory. The using of @samp{pm_lo8} similar
210 to @samp{lo8}.
211
212 @item pm_hi8
213
214 This modifier allows you to use bits 8 through 15 of
215 an address expression as 8 bit relocatable expression.
216 This modifier useful for addressing data or code from
217 Flash/Program memory.
218
219 @item pm_hh8
220
221 This modifier allows you to use bits 15 through 23 of
222 an address expression as 8 bit relocatable expression.
223 This modifier useful for addressing data or code from
224 Flash/Program memory.
225
226 @end table
227
228 @node AVR Opcodes
229 @section Opcodes
230
231 @cindex AVR opcode summary
232 @cindex opcode summary, AVR
233 @cindex mnemonics, AVR
234 @cindex instruction summary, AVR
235 For detailed information on the AVR machine instruction set, see
236 @url{www.atmel.com/products/AVR}.
237
238 @code{@value{AS}} implements all the standard AVR opcodes.
239 The following table summarizes the AVR opcodes, and their arguments.
240
241 @smallexample
242 @i{Legend:}
243 r @r{any register}
244 d @r{`ldi' register (r16-r31)}
245 v @r{`movw' even register (r0, r2, ..., r28, r30)}
246 a @r{`fmul' register (r16-r23)}
247 w @r{`adiw' register (r24,r26,r28,r30)}
248 e @r{pointer registers (X,Y,Z)}
249 b @r{base pointer register and displacement ([YZ]+disp)}
250 z @r{Z pointer register (for [e]lpm Rd,Z[+])}
251 M @r{immediate value from 0 to 255}
252 n @r{immediate value from 0 to 255 ( n = ~M ). Relocation impossible}
253 s @r{immediate value from 0 to 7}
254 P @r{Port address value from 0 to 63. (in, out)}
255 p @r{Port address value from 0 to 31. (cbi, sbi, sbic, sbis)}
256 K @r{immediate value from 0 to 63 (used in `adiw', `sbiw')}
257 i @r{immediate value}
258 l @r{signed pc relative offset from -64 to 63}
259 L @r{signed pc relative offset from -2048 to 2047}
260 h @r{absolute code address (call, jmp)}
261 S @r{immediate value from 0 to 7 (S = s << 4)}
262 ? @r{use this opcode entry if no parameters, else use next opcode entry}
263
264 1001010010001000 clc
265 1001010011011000 clh
266 1001010011111000 cli
267 1001010010101000 cln
268 1001010011001000 cls
269 1001010011101000 clt
270 1001010010111000 clv
271 1001010010011000 clz
272 1001010000001000 sec
273 1001010001011000 seh
274 1001010001111000 sei
275 1001010000101000 sen
276 1001010001001000 ses
277 1001010001101000 set
278 1001010000111000 sev
279 1001010000011000 sez
280 100101001SSS1000 bclr S
281 100101000SSS1000 bset S
282 1001010100001001 icall
283 1001010000001001 ijmp
284 1001010111001000 lpm ?
285 1001000ddddd010+ lpm r,z
286 1001010111011000 elpm ?
287 1001000ddddd011+ elpm r,z
288 0000000000000000 nop
289 1001010100001000 ret
290 1001010100011000 reti
291 1001010110001000 sleep
292 1001010110011000 break
293 1001010110101000 wdr
294 1001010111101000 spm
295 000111rdddddrrrr adc r,r
296 000011rdddddrrrr add r,r
297 001000rdddddrrrr and r,r
298 000101rdddddrrrr cp r,r
299 000001rdddddrrrr cpc r,r
300 000100rdddddrrrr cpse r,r
301 001001rdddddrrrr eor r,r
302 001011rdddddrrrr mov r,r
303 100111rdddddrrrr mul r,r
304 001010rdddddrrrr or r,r
305 000010rdddddrrrr sbc r,r
306 000110rdddddrrrr sub r,r
307 001001rdddddrrrr clr r
308 000011rdddddrrrr lsl r
309 000111rdddddrrrr rol r
310 001000rdddddrrrr tst r
311 0111KKKKddddKKKK andi d,M
312 0111KKKKddddKKKK cbr d,n
313 1110KKKKddddKKKK ldi d,M
314 11101111dddd1111 ser d
315 0110KKKKddddKKKK ori d,M
316 0110KKKKddddKKKK sbr d,M
317 0011KKKKddddKKKK cpi d,M
318 0100KKKKddddKKKK sbci d,M
319 0101KKKKddddKKKK subi d,M
320 1111110rrrrr0sss sbrc r,s
321 1111111rrrrr0sss sbrs r,s
322 1111100ddddd0sss bld r,s
323 1111101ddddd0sss bst r,s
324 10110PPdddddPPPP in r,P
325 10111PPrrrrrPPPP out P,r
326 10010110KKddKKKK adiw w,K
327 10010111KKddKKKK sbiw w,K
328 10011000pppppsss cbi p,s
329 10011010pppppsss sbi p,s
330 10011001pppppsss sbic p,s
331 10011011pppppsss sbis p,s
332 111101lllllll000 brcc l
333 111100lllllll000 brcs l
334 111100lllllll001 breq l
335 111101lllllll100 brge l
336 111101lllllll101 brhc l
337 111100lllllll101 brhs l
338 111101lllllll111 brid l
339 111100lllllll111 brie l
340 111100lllllll000 brlo l
341 111100lllllll100 brlt l
342 111100lllllll010 brmi l
343 111101lllllll001 brne l
344 111101lllllll010 brpl l
345 111101lllllll000 brsh l
346 111101lllllll110 brtc l
347 111100lllllll110 brts l
348 111101lllllll011 brvc l
349 111100lllllll011 brvs l
350 111101lllllllsss brbc s,l
351 111100lllllllsss brbs s,l
352 1101LLLLLLLLLLLL rcall L
353 1100LLLLLLLLLLLL rjmp L
354 1001010hhhhh111h call h
355 1001010hhhhh110h jmp h
356 1001010rrrrr0101 asr r
357 1001010rrrrr0000 com r
358 1001010rrrrr1010 dec r
359 1001010rrrrr0011 inc r
360 1001010rrrrr0110 lsr r
361 1001010rrrrr0001 neg r
362 1001000rrrrr1111 pop r
363 1001001rrrrr1111 push r
364 1001010rrrrr0111 ror r
365 1001010rrrrr0010 swap r
366 00000001ddddrrrr movw v,v
367 00000010ddddrrrr muls d,d
368 000000110ddd0rrr mulsu a,a
369 000000110ddd1rrr fmul a,a
370 000000111ddd0rrr fmuls a,a
371 000000111ddd1rrr fmulsu a,a
372 1001001ddddd0000 sts i,r
373 1001000ddddd0000 lds r,i
374 10o0oo0dddddbooo ldd r,b
375 100!000dddddee-+ ld r,e
376 10o0oo1rrrrrbooo std b,r
377 100!001rrrrree-+ st e,r
378 1001010100011001 eicall
379 1001010000011001 eijmp
380 @end smallexample
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