d0d0068faf3ee4f4d5a957c6de68b87cb024281b
[deliverable/binutils-gdb.git] / gas / doc / c-avr.texi
1 @c Copyright 2006, 2007, 2008, 2009
2 @c Free Software Foundation, Inc.
3 @c This is part of the GAS manual.
4 @c For copying conditions, see the file as.texinfo.
5
6 @ifset GENERIC
7 @page
8 @node AVR-Dependent
9 @chapter AVR Dependent Features
10 @end ifset
11
12 @ifclear GENERIC
13 @node Machine Dependencies
14 @chapter AVR Dependent Features
15 @end ifclear
16
17 @cindex AVR support
18 @menu
19 * AVR Options:: Options
20 * AVR Syntax:: Syntax
21 * AVR Opcodes:: Opcodes
22 @end menu
23
24 @node AVR Options
25 @section Options
26 @cindex AVR options (none)
27 @cindex options for AVR (none)
28
29 @table @code
30
31 @cindex @code{-mmcu=} command line option, AVR
32 @item -mmcu=@var{mcu}
33 Specify ATMEL AVR instruction set or MCU type.
34
35 Instruction set avr1 is for the minimal AVR core, not supported by the C
36 compiler, only for assembler programs (MCU types: at90s1200,
37 attiny11, attiny12, attiny15, attiny28).
38
39 Instruction set avr2 (default) is for the classic AVR core with up to
40 8K program memory space (MCU types: at90s2313, at90s2323, at90s2333, at90s2343,
41 attiny22, attiny26, at90s4414, at90s4433, at90s4434, at90s8515, at90c8534,
42 at90s8535).
43
44 Instruction set avr25 is for the classic AVR core with up to 8K program memory
45 space plus the MOVW instruction (MCU types: attiny13, attiny13a, attiny2313,
46 attiny2313a, attiny24, attiny24a, attiny4313, attiny44, attiny44a, attiny84,
47 attiny84a, attiny25, attiny45, attiny85, attiny261, attiny261a, attiny461,
48 attiny461a, attiny861, attiny861a, attiny87, attiny43u, attiny48, attiny88,
49 at86rf401, ata6289).
50
51 Instruction set avr3 is for the classic AVR core with up to 128K program
52 memory space (MCU types: at43usb355, at76c711).
53
54 Instruction set avr31 is for the classic AVR core with exactly 128K program
55 memory space (MCU types: atmega103, at43usb320).
56
57 Instruction set avr35 is for classic AVR core plus MOVW, CALL, and JMP
58 instructions (MCU types: attiny167, at90usb82, at90usb162, atmega8u2,
59 atmega16u2, atmega32u2).
60
61 Instruction set avr4 is for the enhanced AVR core with up to 8K program
62 memory space (MCU types: atmega48, atmega48a, atmega48p, atmega8, atmega88,
63 atmega88a, atmega88p, atmega88pa, atmega8515, atmega8535, atmega8hva, at90pwm1,
64 at90pwm2, at90pwm2b, at90pwm3, at90pwm3b, at90pwm81).
65
66 Instruction set avr5 is for the enhanced AVR core with up to 128K program
67 memory space (MCU types: atmega16, atmega16a, atmega161, atmega162, atmega163,
68 atmega164a, atmega164p, atmega165, atmega165a, atmega165p, atmega168,
69 atmega168a, atmega168p, atmega169, atmega169a, atmega169p, atmega169pa,
70 atmega32, atmega323, atmega324a, atmega324p, atmega325, atmega325a, atmega325p,
71 atmega3250, atmega3250a, atmega3250p, atmega328, atmega328p, atmega329,
72 atmega329a, atmega329p, atmega329pa, atmega3290, atmega3290a, atmega3290p,
73 atmega406, atmega64, atmega640, atmega644, atmega644a, atmega644p, atmega644pa,
74 atmega645, atmega645a, atmega645p, atmega6450, atmega6450a, atmega6450p,
75 atmega649, atmega649a, atmega649p, atmega6490, atmega6490a, atmega6490p,
76 atmega16hva, atmega16hva2, atmega16hvb, atmega32hvb, atmega64hve, at90can32,
77 at90can64, at90pwm216, at90pwm316, atmega32c1, atmega64c1, atmega16m1,
78 atmega32m1, atmega64m1, atmega16u4, atmega32u4, atmega32u6, at90usb646,
79 at90usb647, at94k, at90scr100).
80
81 Instruction set avr51 is for the enhanced AVR core with exactly 128K program
82 memory space (MCU types: atmega128, atmega1280, atmega1281, atmega1284p,
83 atmega128rfa1, at90can128, at90usb1286, at90usb1287, m3000).
84
85 Instruction set avr6 is for the enhanced AVR core with a 3-byte PC (MCU types:
86 atmega2560, atmega2561).
87
88 @cindex @code{-mall-opcodes} command line option, AVR
89 @item -mall-opcodes
90 Accept all AVR opcodes, even if not supported by @code{-mmcu}.
91
92 @cindex @code{-mno-skip-bug} command line option, AVR
93 @item -mno-skip-bug
94 This option disable warnings for skipping two-word instructions.
95
96 @cindex @code{-mno-wrap} command line option, AVR
97 @item -mno-wrap
98 This option reject @code{rjmp/rcall} instructions with 8K wrap-around.
99
100 @end table
101
102
103 @node AVR Syntax
104 @section Syntax
105 @menu
106 * AVR-Chars:: Special Characters
107 * AVR-Regs:: Register Names
108 * AVR-Modifiers:: Relocatable Expression Modifiers
109 @end menu
110
111 @node AVR-Chars
112 @subsection Special Characters
113
114 @cindex line comment character, AVR
115 @cindex AVR line comment character
116
117 The presence of a @samp{;} on a line indicates the start of a comment
118 that extends to the end of the current line. If a @samp{#} appears as
119 the first character of a line, the whole line is treated as a comment.
120
121 @cindex line separator, AVR
122 @cindex statement separator, AVR
123 @cindex AVR line separator
124
125 The @samp{$} character can be used instead of a newline to separate
126 statements.
127
128 @node AVR-Regs
129 @subsection Register Names
130
131 @cindex AVR register names
132 @cindex register names, AVR
133
134 The AVR has 32 x 8-bit general purpose working registers @samp{r0},
135 @samp{r1}, ... @samp{r31}.
136 Six of the 32 registers can be used as three 16-bit indirect address
137 register pointers for Data Space addressing. One of the these address
138 pointers can also be used as an address pointer for look up tables in
139 Flash program memory. These added function registers are the 16-bit
140 @samp{X}, @samp{Y} and @samp{Z} - registers.
141
142 @smallexample
143 X = @r{r26:r27}
144 Y = @r{r28:r29}
145 Z = @r{r30:r31}
146 @end smallexample
147
148 @node AVR-Modifiers
149 @subsection Relocatable Expression Modifiers
150
151 @cindex AVR modifiers
152 @cindex syntax, AVR
153
154 The assembler supports several modifiers when using relocatable addresses
155 in AVR instruction operands. The general syntax is the following:
156
157 @smallexample
158 modifier(relocatable-expression)
159 @end smallexample
160
161 @table @code
162 @cindex symbol modifiers
163
164 @item lo8
165
166 This modifier allows you to use bits 0 through 7 of
167 an address expression as 8 bit relocatable expression.
168
169 @item hi8
170
171 This modifier allows you to use bits 7 through 15 of an address expression
172 as 8 bit relocatable expression. This is useful with, for example, the
173 AVR @samp{ldi} instruction and @samp{lo8} modifier.
174
175 For example
176
177 @smallexample
178 ldi r26, lo8(sym+10)
179 ldi r27, hi8(sym+10)
180 @end smallexample
181
182 @item hh8
183
184 This modifier allows you to use bits 16 through 23 of
185 an address expression as 8 bit relocatable expression.
186 Also, can be useful for loading 32 bit constants.
187
188 @item hlo8
189
190 Synonym of @samp{hh8}.
191
192 @item hhi8
193
194 This modifier allows you to use bits 24 through 31 of
195 an expression as 8 bit expression. This is useful with, for example, the
196 AVR @samp{ldi} instruction and @samp{lo8}, @samp{hi8}, @samp{hlo8},
197 @samp{hhi8}, modifier.
198
199 For example
200
201 @smallexample
202 ldi r26, lo8(285774925)
203 ldi r27, hi8(285774925)
204 ldi r28, hlo8(285774925)
205 ldi r29, hhi8(285774925)
206 ; r29,r28,r27,r26 = 285774925
207 @end smallexample
208
209 @item pm_lo8
210
211 This modifier allows you to use bits 0 through 7 of
212 an address expression as 8 bit relocatable expression.
213 This modifier useful for addressing data or code from
214 Flash/Program memory. The using of @samp{pm_lo8} similar
215 to @samp{lo8}.
216
217 @item pm_hi8
218
219 This modifier allows you to use bits 8 through 15 of
220 an address expression as 8 bit relocatable expression.
221 This modifier useful for addressing data or code from
222 Flash/Program memory.
223
224 @item pm_hh8
225
226 This modifier allows you to use bits 15 through 23 of
227 an address expression as 8 bit relocatable expression.
228 This modifier useful for addressing data or code from
229 Flash/Program memory.
230
231 @end table
232
233 @node AVR Opcodes
234 @section Opcodes
235
236 @cindex AVR opcode summary
237 @cindex opcode summary, AVR
238 @cindex mnemonics, AVR
239 @cindex instruction summary, AVR
240 For detailed information on the AVR machine instruction set, see
241 @url{www.atmel.com/products/AVR}.
242
243 @code{@value{AS}} implements all the standard AVR opcodes.
244 The following table summarizes the AVR opcodes, and their arguments.
245
246 @smallexample
247 @i{Legend:}
248 r @r{any register}
249 d @r{`ldi' register (r16-r31)}
250 v @r{`movw' even register (r0, r2, ..., r28, r30)}
251 a @r{`fmul' register (r16-r23)}
252 w @r{`adiw' register (r24,r26,r28,r30)}
253 e @r{pointer registers (X,Y,Z)}
254 b @r{base pointer register and displacement ([YZ]+disp)}
255 z @r{Z pointer register (for [e]lpm Rd,Z[+])}
256 M @r{immediate value from 0 to 255}
257 n @r{immediate value from 0 to 255 ( n = ~M ). Relocation impossible}
258 s @r{immediate value from 0 to 7}
259 P @r{Port address value from 0 to 63. (in, out)}
260 p @r{Port address value from 0 to 31. (cbi, sbi, sbic, sbis)}
261 K @r{immediate value from 0 to 63 (used in `adiw', `sbiw')}
262 i @r{immediate value}
263 l @r{signed pc relative offset from -64 to 63}
264 L @r{signed pc relative offset from -2048 to 2047}
265 h @r{absolute code address (call, jmp)}
266 S @r{immediate value from 0 to 7 (S = s << 4)}
267 ? @r{use this opcode entry if no parameters, else use next opcode entry}
268
269 1001010010001000 clc
270 1001010011011000 clh
271 1001010011111000 cli
272 1001010010101000 cln
273 1001010011001000 cls
274 1001010011101000 clt
275 1001010010111000 clv
276 1001010010011000 clz
277 1001010000001000 sec
278 1001010001011000 seh
279 1001010001111000 sei
280 1001010000101000 sen
281 1001010001001000 ses
282 1001010001101000 set
283 1001010000111000 sev
284 1001010000011000 sez
285 100101001SSS1000 bclr S
286 100101000SSS1000 bset S
287 1001010100001001 icall
288 1001010000001001 ijmp
289 1001010111001000 lpm ?
290 1001000ddddd010+ lpm r,z
291 1001010111011000 elpm ?
292 1001000ddddd011+ elpm r,z
293 0000000000000000 nop
294 1001010100001000 ret
295 1001010100011000 reti
296 1001010110001000 sleep
297 1001010110011000 break
298 1001010110101000 wdr
299 1001010111101000 spm
300 000111rdddddrrrr adc r,r
301 000011rdddddrrrr add r,r
302 001000rdddddrrrr and r,r
303 000101rdddddrrrr cp r,r
304 000001rdddddrrrr cpc r,r
305 000100rdddddrrrr cpse r,r
306 001001rdddddrrrr eor r,r
307 001011rdddddrrrr mov r,r
308 100111rdddddrrrr mul r,r
309 001010rdddddrrrr or r,r
310 000010rdddddrrrr sbc r,r
311 000110rdddddrrrr sub r,r
312 001001rdddddrrrr clr r
313 000011rdddddrrrr lsl r
314 000111rdddddrrrr rol r
315 001000rdddddrrrr tst r
316 0111KKKKddddKKKK andi d,M
317 0111KKKKddddKKKK cbr d,n
318 1110KKKKddddKKKK ldi d,M
319 11101111dddd1111 ser d
320 0110KKKKddddKKKK ori d,M
321 0110KKKKddddKKKK sbr d,M
322 0011KKKKddddKKKK cpi d,M
323 0100KKKKddddKKKK sbci d,M
324 0101KKKKddddKKKK subi d,M
325 1111110rrrrr0sss sbrc r,s
326 1111111rrrrr0sss sbrs r,s
327 1111100ddddd0sss bld r,s
328 1111101ddddd0sss bst r,s
329 10110PPdddddPPPP in r,P
330 10111PPrrrrrPPPP out P,r
331 10010110KKddKKKK adiw w,K
332 10010111KKddKKKK sbiw w,K
333 10011000pppppsss cbi p,s
334 10011010pppppsss sbi p,s
335 10011001pppppsss sbic p,s
336 10011011pppppsss sbis p,s
337 111101lllllll000 brcc l
338 111100lllllll000 brcs l
339 111100lllllll001 breq l
340 111101lllllll100 brge l
341 111101lllllll101 brhc l
342 111100lllllll101 brhs l
343 111101lllllll111 brid l
344 111100lllllll111 brie l
345 111100lllllll000 brlo l
346 111100lllllll100 brlt l
347 111100lllllll010 brmi l
348 111101lllllll001 brne l
349 111101lllllll010 brpl l
350 111101lllllll000 brsh l
351 111101lllllll110 brtc l
352 111100lllllll110 brts l
353 111101lllllll011 brvc l
354 111100lllllll011 brvs l
355 111101lllllllsss brbc s,l
356 111100lllllllsss brbs s,l
357 1101LLLLLLLLLLLL rcall L
358 1100LLLLLLLLLLLL rjmp L
359 1001010hhhhh111h call h
360 1001010hhhhh110h jmp h
361 1001010rrrrr0101 asr r
362 1001010rrrrr0000 com r
363 1001010rrrrr1010 dec r
364 1001010rrrrr0011 inc r
365 1001010rrrrr0110 lsr r
366 1001010rrrrr0001 neg r
367 1001000rrrrr1111 pop r
368 1001001rrrrr1111 push r
369 1001010rrrrr0111 ror r
370 1001010rrrrr0010 swap r
371 00000001ddddrrrr movw v,v
372 00000010ddddrrrr muls d,d
373 000000110ddd0rrr mulsu a,a
374 000000110ddd1rrr fmul a,a
375 000000111ddd0rrr fmuls a,a
376 000000111ddd1rrr fmulsu a,a
377 1001001ddddd0000 sts i,r
378 1001000ddddd0000 lds r,i
379 10o0oo0dddddbooo ldd r,b
380 100!000dddddee-+ ld r,e
381 10o0oo1rrrrrbooo std b,r
382 100!001rrrrree-+ st e,r
383 1001010100011001 eicall
384 1001010000011001 eijmp
385 @end smallexample
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