gas/doc/c-ia64.texi

   1 @c Copyright 2002
   2 @c Free Software Foundation, Inc.
   3 @c   Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
   4 @c This is part of the GAS manual.
   5 @c For copying conditions, see the file as.texinfo.
   6
   7 @ifset GENERIC
   8 @page
   9 @node IA-64-Dependent
  10 @chapter IA-64 Dependent Features
  11 @end ifset
  12
  13 @ifclear GENERIC
  14 @node Machine Dependencies
  15 @chapter IA-64 Dependent Features
  16 @end ifclear
  17
  18 @cindex IA-64 support
  19 @menu
  20 * IA-64 Options::              Options
  21 * IA-64 Syntax::               Syntax
  22 @c * IA-64 Floating Point::       Floating Point                // to be written
  23 @c * IA-64 Directives::           IA-64 Machine Directives      // to be written
  24 * IA-64 Opcodes::              Opcodes
  25 @end menu
  26
  27 @node IA-64 Options
  28 @section Options
  29 @cindex IA-64 options
  30 @cindex options for IA-64
  31
  32 @table @option
  33 @cindex @code{-mconstant-gp} command line option, IA-64
  34
  35 @item -mconstant-gp
  36 This option instructs the assembler to mark the resulting object file
  37 as using the ``constant GP'' model.  With this model, it is assumed
  38 that the entire program uses a single global pointer (GP) value.  Note
  39 that this option does not in any fashion affect the machine code
  40 emitted by the assembler.  All it does is turn on the EF_IA_64_CONS_GP
  41 flag in the ELF file header.
  42
  43 @item -mauto-pic
  44 This option instructs the assembler to mark the resulting object file
  45 as using the ``constant GP without function descriptor'' data model.
  46 This model is like the ``constant GP'' model, except that it
  47 additionally does away with function descriptors.  What this means is
  48 that the address of a function refers directly to the function's code
  49 entry-point.  Normally, such an address would refer to a function
  50 descriptor, which contains both the code entry-point and the GP-value
  51 needed by the function.  Note that this option does not in any fashion
  52 affect the machine code emitted by the assembler.  All it does is
  53 turn on the EF_IA_64_NOFUNCDESC_CONS_GP flag in the ELF file header.
  54
  55 @item -milp32
  56 @item -milp64
  57 @item -mlp64
  58 @item -mp64
  59 These options select the data model.  The assembler defaults to @code{-mlp64}
  60 (LP64 data model).
  61
  62 @item -mle
  63 @item -mbe
  64 These options select the byte order.  The @code{-mle} option selects little-endian
  65 byte order (default) and @code{-mbe} selects big-endian byte order.  Note that
  66 IA-64 machine code always uses little-endian byte order.
  67
  68 @item -munwind-check=warning
  69 @item -munwind-check=error
  70 These options control what the assembler will do when performing
  71 consistency checks on unwind directives.  @code{-munwind-check=warning}
  72 will make the assembler issue a warning when an unwind directive check
  73 fails.  This is the default.  @code{-munwind-check=error} will make the
  74 assembler issue an error when an unwind directive check fails.
  75
  76 @item -x
  77 @item -xexplicit
  78 These options turn on dependency violation checking.
  79
  80 @item -xauto
  81 This option instructs the assembler to automatically insert stop bits where necessary
  82 to remove dependency violations.  This is the default mode.
  83
  84 @item -xnone
  85 This option turns off dependency violation checking.
  86
  87 @item -xdebug
  88 This turns on debug output intended to help tracking down bugs in the dependency
  89 violation checker.
  90
  91 @item -xdebugn
  92 This is a shortcut for -xnone -xdebug.
  93
  94 @item -xdebugx
  95 This is a shortcut for -xexplicit -xdebug.
  96
  97 @end table
  98
  99 @cindex IA-64 Syntax
 100 @node IA-64 Syntax
 101 @section Syntax
 102 The assembler syntax closely follows the IA-64 Assembly Language
 103 Reference Guide.
 104
 105 @menu
 106 * IA-64-Chars::                Special Characters
 107 * IA-64-Regs::                 Register Names
 108 * IA-64-Bits::                 Bit Names
 109 @c * IA-64-Relocs::               Relocations           // to be written
 110 @end menu
 111
 112 @node IA-64-Chars
 113 @subsection Special Characters
 114
 115 @cindex line comment character, IA-64
 116 @cindex IA-64 line comment character
 117 @samp{//} is the line comment token.
 118
 119 @cindex line separator, IA-64
 120 @cindex statement separator, IA-64
 121 @cindex IA-64 line separator
 122 @samp{;} can be used instead of a newline to separate statements.
 123
 124 @node IA-64-Regs
 125 @subsection Register Names
 126 @cindex IA-64 registers
 127 @cindex register names, IA-64
 128
 129 The 128 integer registers are referred to as @samp{r@var{n}}.
 130 The 128 floating-point registers are referred to as @samp{f@var{n}}.
 131 The 128 application registers are referred to as @samp{ar@var{n}}.
 132 The 128 control registers are referred to as @samp{cr@var{n}}.
 133 The 64 one-bit predicate registers are referred to as @samp{p@var{n}}.
 134 The 8 branch registers are referred to as @samp{b@var{n}}.
 135 In addition, the assembler defines a number of aliases:
 136 @samp{gp} (@samp{r1}), @samp{sp} (@samp{r12}), @samp{rp} (@samp{b0}),
 137 @samp{ret0} (@samp{r8}), @samp{ret1} (@samp{r9}), @samp{ret2} (@samp{r10}),
 138 @samp{ret3} (@samp{r9}), @samp{farg@var{n}} (@samp{f8+@var{n}}), and
 139 @samp{fret@var{n}} (@samp{f8+@var{n}}).
 140
 141 For convenience, the assembler also defines aliases for all named application
 142 and control registers.  For example, @samp{ar.bsp} refers to the register
 143 backing store pointer (@samp{ar17}).  Similarly, @samp{cr.eoi} refers to
 144 the end-of-interrupt register (@samp{cr67}).
 145
 146 @node IA-64-Bits
 147 @subsection IA-64 Processor-Status-Register (PSR) Bit Names
 148 @cindex IA-64 Processor-status-Register bit names
 149 @cindex PSR bits
 150 @cindex bit names, IA-64
 151
 152 The assembler defines bit masks for each of the bits in the IA-64
 153 processor status register.  For example, @samp{psr.ic} corresponds to
 154 a value of 0x2000.  These masks are primarily intended for use with
 155 the @samp{ssm}/@samp{sum} and @samp{rsm}/@samp{rum}
 156 instructions, but they can be used anywhere else where an integer
 157 constant is expected.
 158
 159 @node IA-64 Opcodes
 160 @section Opcodes
 161 For detailed information on the IA-64 machine instruction set, see the
 162 @c Attempt to work around a very overfull hbox.
 163 @iftex
 164 IA-64 Assembly Language Reference Guide available at
 165 @smallfonts
 166 @example
 167 http://developer.intel.com/design/itanium/arch_spec.htm
 168 @end example
 169 @textfonts
 170 @end iftex
 171 @ifnottex
 172 @uref{http://developer.intel.com/design/itanium/arch_spec.htm,IA-64 Architecture Handbook}.
 173 @end ifnottex