1 @c Copyright 2001, 2002, 2003, 2005, 2006, 2007, 2008
2 @c Free Software Foundation, Inc.
3 @c This is part of the GAS manual.
4 @c For copying conditions, see the file as.texinfo.
8 @chapter PowerPC Dependent Features
11 @node Machine Dependencies
12 @chapter PowerPC Dependent Features
15 @cindex PowerPC support
17 * PowerPC-Opts:: Options
18 * PowerPC-Pseudo:: PowerPC Assembler Directives
24 @cindex options for PowerPC
25 @cindex PowerPC options
26 @cindex architectures, PowerPC
27 @cindex PowerPC architectures
28 The PowerPC chip family includes several successive levels, using the same
29 core instruction set, but including a few additional instructions at
30 each level. There are exceptions to this however. For details on what
31 instructions each variant supports, please see the chip's architecture
34 The following table lists all available PowerPC options.
38 Generate code for POWER/2 (RIOS2).
41 Generate code for POWER (RIOS1)
44 Generate code for PowerPC 601.
46 @item -mppc, -mppc32, -m603, -m604
47 Generate code for PowerPC 603/604.
50 Generate code for PowerPC 403/405.
53 Generate code for PowerPC 440. BookE and some 405 instructions.
55 @item -m7400, -m7410, -m7450, -m7455
56 Generate code for PowerPC 7400/7410/7450/7455.
59 Generate code for PowerPC 750CL.
62 Generate code for PowerPC 620/625/630.
64 @item -me500, -me500x2
65 Generate code for Motorola e500 core complex.
68 Generate code for Motorola SPE instructions.
71 Generate code for PowerPC 64, including bridge insns.
74 Generate code for 32-bit BookE.
77 Generate code for A2 architecture.
80 Generate code for PowerPC e300 family.
83 Generate code for processors with AltiVec instructions.
86 Generate code for processors with Vector-Scalar (VSX) instructions.
89 Generate code for Power4 architecture.
92 Generate code for Power5 architecture.
95 Generate code for Power6 architecture.
98 Generate code for Power7 architecture.
101 Generate code for Cell Broadband Engine architecture.
104 Generate code Power/PowerPC common instructions.
107 Generate code for any architecture (PWR/PWRX/PPC).
110 Allow symbolic names for registers.
113 Do not allow symbolic names for registers.
116 Support for GCC's -mrelocatable option.
118 @item -mrelocatable-lib
119 Support for GCC's -mrelocatable-lib option.
122 Set PPC_EMB bit in ELF flags.
124 @item -mlittle, -mlittle-endian
125 Generate code for a little endian machine.
127 @item -mbig, -mbig-endian
128 Generate code for a big endian machine.
131 Generate code for Solaris.
134 Do not generate code for Solaris.
139 @section PowerPC Assembler Directives
141 @cindex directives for PowerPC
142 @cindex PowerPC directives
143 A number of assembler directives are available for PowerPC. The
144 following table is far from complete.
147 @item .machine "string"
148 This directive allows you to change the machine for which code is
149 generated. @code{"string"} may be any of the -m cpu selection options
150 (without the -m) enclosed in double quotes, @code{"push"}, or
151 @code{"pop"}. @code{.machine "push"} saves the currently selected
152 cpu, which may be restored with @code{.machine "pop"}.