c71ace9e46e1b8d5ca3f4c0f49f641901dcdd179
[deliverable/binutils-gdb.git] / gas / doc / c-ppc.texi
1 @c Copyright 2001, 2002, 2003, 2005, 2006
2 @c Free Software Foundation, Inc.
3 @c This is part of the GAS manual.
4 @c For copying conditions, see the file as.texinfo.
5 @ifset GENERIC
6 @page
7 @node PPC-Dependent
8 @chapter PowerPC Dependent Features
9 @end ifset
10 @ifclear GENERIC
11 @node Machine Dependencies
12 @chapter PowerPC Dependent Features
13 @end ifclear
14
15 @cindex PowerPC support
16 @menu
17 * PowerPC-Opts:: Options
18 * PowerPC-Pseudo:: PowerPC Assembler Directives
19 @end menu
20
21 @node PowerPC-Opts
22 @section Options
23
24 @cindex options for PowerPC
25 @cindex PowerPC options
26 @cindex architectures, PowerPC
27 @cindex PowerPC architectures
28 The PowerPC chip family includes several successive levels, using the same
29 core instruction set, but including a few additional instructions at
30 each level. There are exceptions to this however. For details on what
31 instructions each variant supports, please see the chip's architecture
32 reference manual.
33
34 The following table lists all available PowerPC options.
35
36 @table @code
37 @item -mpwrx | -mpwr2
38 Generate code for POWER/2 (RIOS2).
39
40 @item -mpwr
41 Generate code for POWER (RIOS1)
42
43 @item -m601
44 Generate code for PowerPC 601.
45
46 @item -mppc, -mppc32, -m603, -m604
47 Generate code for PowerPC 603/604.
48
49 @item -m403, -m405
50 Generate code for PowerPC 403/405.
51
52 @item -m440
53 Generate code for PowerPC 440. BookE and some 405 instructions.
54
55 @item -m7400, -m7410, -m7450, -m7455
56 Generate code for PowerPC 7400/7410/7450/7455.
57
58 @item -m750cl
59 Generate code for PowerPC 750CL.
60
61 @item -mppc64, -m620
62 Generate code for PowerPC 620/625/630.
63
64 @item -me500, -me500x2
65 Generate code for Motorola e500 core complex.
66
67 @item -mspe
68 Generate code for Motorola SPE instructions.
69
70 @item -mppc64bridge
71 Generate code for PowerPC 64, including bridge insns.
72
73 @item -mbooke64
74 Generate code for 64-bit BookE.
75
76 @item -mbooke, mbooke32
77 Generate code for 32-bit BookE.
78
79 @item -me300
80 Generate code for PowerPC e300 family.
81
82 @item -maltivec
83 Generate code for processors with AltiVec instructions.
84
85 @item -mpower4
86 Generate code for Power4 architecture.
87
88 @item -mpower5
89 Generate code for Power5 architecture.
90
91 @item -mpower6
92 Generate code for Power6 architecture.
93
94 @item -mcell
95 Generate code for Cell Broadband Engine architecture.
96
97 @item -mcom
98 Generate code Power/PowerPC common instructions.
99
100 @item -many
101 Generate code for any architecture (PWR/PWRX/PPC).
102
103 @item -mregnames
104 Allow symbolic names for registers.
105
106 @item -mno-regnames
107 Do not allow symbolic names for registers.
108
109 @item -mrelocatable
110 Support for GCC's -mrelocatable option.
111
112 @item -mrelocatable-lib
113 Support for GCC's -mrelocatable-lib option.
114
115 @item -memb
116 Set PPC_EMB bit in ELF flags.
117
118 @item -mlittle, -mlittle-endian
119 Generate code for a little endian machine.
120
121 @item -mbig, -mbig-endian
122 Generate code for a big endian machine.
123
124 @item -msolaris
125 Generate code for Solaris.
126
127 @item -mno-solaris
128 Do not generate code for Solaris.
129 @end table
130
131
132 @node PowerPC-Pseudo
133 @section PowerPC Assembler Directives
134
135 @cindex directives for PowerPC
136 @cindex PowerPC directives
137 A number of assembler directives are available for PowerPC. The
138 following table is far from complete.
139
140 @table @code
141 @item .machine "string"
142 This directive allows you to change the machine for which code is
143 generated. @code{"string"} may be any of the -m cpu selection options
144 (without the -m) enclosed in double quotes, @code{"push"}, or
145 @code{"pop"}. @code{.machine "push"} saves the currently selected
146 cpu, which may be restored with @code{.machine "pop"}.
147 @end table
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