1 @c Copyright (C) 2016-2017 Free Software Foundation, Inc.
2 @c This is part of the GAS anual.
3 @c For copying conditions, see the file as.texinfo
9 @chapter RISC-V Dependent Features
12 @node Machine Dependencies
13 @chapter RISC-V Dependent Features
16 @cindex RISC-V support
18 * RISC-V-Options:: RISC-V Options
19 * RISC-V-Directives:: RISC-V Directives
23 @section RISC-V Options
25 The following table lists all available RISC-V specific options.
30 @cindex @samp{-fpic} option, RISC-V
33 Generate position-independent code
35 @cindex @samp{-fno-pic} option, RISC-V
37 Don't generate position-independent code (default)
39 @cindex @samp{-march=ISA} option, RISC-V
41 Select the base isa, as specified by ISA. For example -march=rv32ima.
43 @cindex @samp{-mabi=ABI} option, RISC-V
45 Selects the ABI, which is either "ilp32" or "lp64", optionally followed
46 by "f", "d", or "q" to indicate single-precision, double-precision, or
47 quad-precision floating-point calling convention, or none to indicate
48 the soft-float calling convention.
53 @node RISC-V-Directives
54 @cindex machine directives, RISC-V
55 @cindex RISC-V machine directives
57 @section RISC-V Directives
59 The following table lists all available RISC-V specific directives.
63 @cindex @code{align} directive
64 @item .align @var{size-log-2}
65 Align to the given boundary, with the size given as log2 the number of bytes to
68 @cindex Data directives
69 @item .half @var{value}
70 @itemx .word @var{value}
71 @itemx .dword @var{value}
72 Emits a half-word, word, or double-word value at the current position.
74 @cindex DTP-relative data directives
75 @item .dtprelword @var{value}
76 @itemx .dtpreldword @var{value}
77 Emits a DTP-relative word (or double-word) at the current position. This is
78 meant to be used by the compiler in shared libraries for DWARF debug info for
79 thread local variables.
83 Sets the current section to the BSS section.
85 @cindex LEB128 directives
86 @item .uleb128 @var{value}
87 @itemx .sleb128 @var{value}
88 Emits a signed or unsigned LEB128 value at the current position. This only
89 accepts constant expressions, because symbol addresses can change with
90 relaxation, and we don't support relocations to modify LEB128 values at link
93 @cindex Option directive
94 @cindex @code{option} directive
95 @item .option @var{argument}
96 Modifies RISC-V specific assembler options inline with the assembly code.
97 This is used when particular instruction sequences must be assembled with a
98 specific set of options. For example, since we relax addressing sequences to
99 shorter GP-relative sequences when possible the initial load of GP must not be
100 relaxed and should be emitted as something like
105 la gp, __global_pointer$
109 in order to produce after linker relaxation the expected
112 auipc gp, %pcrel_hi(__global_pointer$)
113 addi gp, gp, %pcrel_lo(__global_pointer$)
122 It's not expected that options are changed in this manner during regular use,
123 but there are a handful of esoteric cases like the one above where users need
124 to disable particular features of the assembler for particular code sequences.
125 The complete list of option arguments is shown below:
130 Pushes or pops the current option stack. These should be used whenever
131 changing an option in line with assembly code in order to ensure the user's
132 command-line options are respected for the bulk of the file being assembled.
136 Enables or disables the generation of compressed instructions. Instructions
137 are opportunistically compressed by the RISC-V assembler when possible, but
138 sometimes this behavior is not desirable.
142 Enables or disables position-independent code generation. Unless you really
143 know what you're doing, this should only be at the top of a file.
147 Enables or disables relaxation. The RISC-V assembler and linker
148 opportunistically relax some code sequences, but sometimes this behavior is not