1 @c Copyright (C) 2016-2018 Free Software Foundation, Inc.
2 @c This is part of the GAS anual.
3 @c For copying conditions, see the file as.texinfo
9 @chapter RISC-V Dependent Features
12 @node Machine Dependencies
13 @chapter RISC-V Dependent Features
16 @cindex RISC-V support
18 * RISC-V-Options:: RISC-V Options
19 * RISC-V-Directives:: RISC-V Directives
23 @section RISC-V Options
25 The following table lists all available RISC-V specific options.
30 @cindex @samp{-fpic} option, RISC-V
33 Generate position-independent code
35 @cindex @samp{-fno-pic} option, RISC-V
37 Don't generate position-independent code (default)
39 @cindex @samp{-march=ISA} option, RISC-V
41 Select the base isa, as specified by ISA. For example -march=rv32ima.
43 @cindex @samp{-mabi=ABI} option, RISC-V
45 Selects the ABI, which is either "ilp32" or "lp64", optionally followed
46 by "f", "d", or "q" to indicate single-precision, double-precision, or
47 quad-precision floating-point calling convention, or none to indicate
48 the soft-float calling convention.
53 @node RISC-V-Directives
54 @section RISC-V Directives
55 @cindex machine directives, RISC-V
56 @cindex RISC-V machine directives
58 The following table lists all available RISC-V specific directives.
62 @cindex @code{align} directive
63 @item .align @var{size-log-2}
64 Align to the given boundary, with the size given as log2 the number of bytes to
67 @cindex Data directives
68 @item .half @var{value}
69 @itemx .word @var{value}
70 @itemx .dword @var{value}
71 Emits a half-word, word, or double-word value at the current position.
73 @cindex DTP-relative data directives
74 @item .dtprelword @var{value}
75 @itemx .dtpreldword @var{value}
76 Emits a DTP-relative word (or double-word) at the current position. This is
77 meant to be used by the compiler in shared libraries for DWARF debug info for
78 thread local variables.
82 Sets the current section to the BSS section.
84 @cindex LEB128 directives
85 @item .uleb128 @var{value}
86 @itemx .sleb128 @var{value}
87 Emits a signed or unsigned LEB128 value at the current position. This only
88 accepts constant expressions, because symbol addresses can change with
89 relaxation, and we don't support relocations to modify LEB128 values at link
92 @cindex Option directive
93 @cindex @code{option} directive
94 @item .option @var{argument}
95 Modifies RISC-V specific assembler options inline with the assembly code.
96 This is used when particular instruction sequences must be assembled with a
97 specific set of options. For example, since we relax addressing sequences to
98 shorter GP-relative sequences when possible the initial load of GP must not be
99 relaxed and should be emitted as something like
104 la gp, __global_pointer$
108 in order to produce after linker relaxation the expected
111 auipc gp, %pcrel_hi(__global_pointer$)
112 addi gp, gp, %pcrel_lo(__global_pointer$)
121 It's not expected that options are changed in this manner during regular use,
122 but there are a handful of esoteric cases like the one above where users need
123 to disable particular features of the assembler for particular code sequences.
124 The complete list of option arguments is shown below:
129 Pushes or pops the current option stack. These should be used whenever
130 changing an option in line with assembly code in order to ensure the user's
131 command-line options are respected for the bulk of the file being assembled.
135 Enables or disables the generation of compressed instructions. Instructions
136 are opportunistically compressed by the RISC-V assembler when possible, but
137 sometimes this behavior is not desirable.
141 Enables or disables position-independent code generation. Unless you really
142 know what you're doing, this should only be at the top of a file.
146 Enables or disables relaxation. The RISC-V assembler and linker
147 opportunistically relax some code sequences, but sometimes this behavior is not