* sim-info.c (sim_info): Be verbose when either VERBOSE or STATE_VERBOSE_P.
[deliverable/binutils-gdb.git] / gas / doc / c-sparc.texi
1 @c Copyright (C) 1991, 1992, 1993, 1994, 1995 Free Software Foundation, Inc.
2 @c This is part of the GAS manual.
3 @c For copying conditions, see the file as.texinfo.
4 @ifset GENERIC
5 @page
6 @node Sparc-Dependent
7 @chapter SPARC Dependent Features
8 @end ifset
9 @ifclear GENERIC
10 @node Machine Dependencies
11 @chapter SPARC Dependent Features
12 @end ifclear
13
14 @cindex SPARC support
15 @menu
16 * Sparc-Opts:: Options
17 * Sparc-Float:: Floating Point
18 * Sparc-Directives:: Sparc Machine Directives
19 @end menu
20
21 @node Sparc-Opts
22 @section Options
23
24 @cindex options for SPARC
25 @cindex SPARC options
26 @cindex architectures, SPARC
27 @cindex SPARC architectures
28 The SPARC chip family includes several successive levels (or other
29 variants) of chip, using the same core instruction set, but including
30 a few additional instructions at each level.
31
32 By default, @code{@value{AS}} assumes the core instruction set (SPARC
33 v6), but ``bumps'' the architecture level as needed: it switches to
34 successively higher architectures as it encounters instructions that
35 only exist in the higher levels.
36
37 @table @code
38 @kindex -Av6
39 @kindex Av7
40 @kindex -Av8
41 @kindex -Av9
42 @kindex -Asparclite
43 @item -Av6 | -Av7 | -Av8 | -Av9 | -Asparclite
44 Use one of the @samp{-A} options to select one of the SPARC
45 architectures explicitly. If you select an architecture explicitly,
46 @code{@value{AS}} reports a fatal error if it encounters an instruction
47 or feature requiring a higher level.
48
49 @item -bump
50 Permit the assembler to ``bump'' the architecture level as required, but
51 warn whenever it is necessary to switch to another level.
52 @end table
53
54 @ignore
55 @c FIXME: (sparc) Fill in "syntax" section!
56 @c subsection syntax
57 I don't know anything about Sparc syntax. Someone who does
58 will have to write this section.
59 @end ignore
60
61 @node Sparc-Float
62 @section Floating Point
63
64 @cindex floating point, SPARC (@sc{ieee})
65 @cindex SPARC floating point (@sc{ieee})
66 The Sparc uses @sc{ieee} floating-point numbers.
67
68 @node Sparc-Directives
69 @section Sparc Machine Directives
70
71 @cindex SPARC machine directives
72 @cindex machine directives, SPARC
73 The Sparc version of @code{@value{AS}} supports the following additional
74 machine directives:
75
76 @table @code
77 @cindex @code{align} directive, SPARC
78 @item .align
79 This must be followed by the desired alignment in bytes.
80
81 @cindex @code{common} directive, SPARC
82 @item .common
83 This must be followed by a symbol name, a positive number, and
84 @code{"bss"}. This behaves somewhat like @code{.comm}, but the
85 syntax is different.
86
87 @cindex @code{half} directive, SPARC
88 @item .half
89 This is functionally identical to @code{.short}.
90
91 @cindex @code{proc} directive, SPARC
92 @item .proc
93 This directive is ignored. Any text following it on the same
94 line is also ignored.
95
96 @cindex @code{reserve} directive, SPARC
97 @item .reserve
98 This must be followed by a symbol name, a positive number, and
99 @code{"bss"}. This behaves somewhat like @code{.lcomm}, but the
100 syntax is different.
101
102 @cindex @code{seg} directive, SPARC
103 @item .seg
104 This must be followed by @code{"text"}, @code{"data"}, or
105 @code{"data1"}. It behaves like @code{.text}, @code{.data}, or
106 @code{.data 1}.
107
108 @cindex @code{skip} directive, SPARC
109 @item .skip
110 This is functionally identical to the @code{.space} directive.
111
112 @cindex @code{word} directive, SPARC
113 @item .word
114 On the Sparc, the @code{.word} directive produces 32 bit values,
115 instead of the 16 bit values it produces on many other machines.
116
117 @cindex @code{xword} directive, SPARC
118 @item .xword
119 On the Sparc V9 processor, the @code{.xword} directive produces
120 64 bit values.
121 @end table
122
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