2 Copyright 1997, 1999, 2000, 2001 Free Software Foundation, Inc.
4 This file is part of GAS, the GNU Assembler.
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to the Free
18 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
21 /*======================================================================*/
23 * Herein lies the support for dynamic specification of processor
24 * instructions and registers. Mnemonics, values, and formats for each
25 * instruction and register are specified in an ascii file consisting of
26 * table entries. The grammar for the table is defined in the document
27 * "Processor instruction table specification".
29 * Instructions use the gnu assembler syntax, with the addition of
30 * allowing mnemonics for register.
31 * Eg. "func $2,reg3,0x100,symbol ; comment"
34 * reg3 - mnemonic for processor's register defined in table
35 * 0xddd..d - immediate value
36 * symbol - address of label or external symbol
38 * First, itbl_parse reads in the table of register and instruction
39 * names and formats, and builds a list of entries for each
40 * processor/type combination. lex and yacc are used to parse
41 * the entries in the table and call functions defined here to
42 * add each entry to our list.
44 * Then, when assembling or disassembling, these functions are called to
45 * 1) get information on a processor's registers and
46 * 2) assemble/disassemble an instruction.
47 * To assemble(disassemble) an instruction, the function
48 * itbl_assemble(itbl_disassemble) is called to search the list of
49 * instruction entries, and if a match is found, uses the format
50 * described in the instruction entry structure to complete the action.
52 * Eg. Suppose we have a Mips coprocessor "cop3" with data register "d2"
53 * and we want to define function "pig" which takes two operands.
55 * Given the table entries:
56 * "p3 insn pig 0x1:24-21 dreg:20-16 immed:15-0"
58 * and that the instruction encoding for coprocessor pz has encoding:
59 * #define MIPS_ENCODE_COP_NUM(z) ((0x21|(z<<1))<<25)
60 * #define ITBL_ENCODE_PNUM(pnum) MIPS_ENCODE_COP_NUM(pnum)
62 * a structure to describe the instruction might look something like:
63 * struct itbl_entry = {
64 * e_processor processor = e_p3
65 * e_type type = e_insn
69 * struct itbl_range range = 24-21
70 * struct itbl_field *field = {
71 * e_type type = e_dreg
72 * struct itbl_range range = 20-16
73 * struct itbl_field *next = {
74 * e_type type = e_immed
75 * struct itbl_range range = 15-0
76 * struct itbl_field *next = 0
79 * struct itbl_entry *next = 0
82 * And the assembler instructions:
86 * would both assemble to the hex value:
95 #include <itbl-parse.h>
101 #define ASSERT(x) assert(x)
102 #define DBG(x) printf x
109 #define min(a,b) (a<b?a:b)
112 int itbl_have_entries
= 0;
114 /*======================================================================*/
115 /* structures for keeping itbl format entries */
118 int sbit
; /* mask starting bit position */
119 int ebit
; /* mask ending bit position */
123 e_type type
; /* dreg/creg/greg/immed/symb */
124 struct itbl_range range
; /* field's bitfield range within instruction */
125 unsigned long flags
; /* field flags */
126 struct itbl_field
*next
; /* next field in list */
129 /* These structures define the instructions and registers for a processor.
130 * If the type is an instruction, the structure defines the format of an
131 * instruction where the fields are the list of operands.
132 * The flags field below uses the same values as those defined in the
133 * gnu assembler and are machine specific. */
135 e_processor processor
; /* processor number */
136 e_type type
; /* dreg/creg/greg/insn */
137 char *name
; /* mnemionic name for insn/register */
138 unsigned long value
; /* opcode/instruction mask/register number */
139 unsigned long flags
; /* effects of the instruction */
140 struct itbl_range range
; /* bit range within instruction for value */
141 struct itbl_field
*fields
; /* list of operand definitions (if any) */
142 struct itbl_entry
*next
; /* next entry */
145 /* local data and structures */
147 static int itbl_num_opcodes
= 0;
148 /* Array of entries for each processor and entry type */
149 static struct itbl_entry
*entries
[e_nprocs
][e_ntypes
] = {
156 /* local prototypes */
157 static unsigned long build_opcode (struct itbl_entry
*e
);
158 static e_type
get_type (int yytype
);
159 static e_processor
get_processor (int yyproc
);
160 static struct itbl_entry
**get_entries (e_processor processor
,
162 static struct itbl_entry
*find_entry_byname (e_processor processor
,
163 e_type type
, char *name
);
164 static struct itbl_entry
*find_entry_byval (e_processor processor
,
165 e_type type
, unsigned long val
, struct itbl_range
*r
);
166 static struct itbl_entry
*alloc_entry (e_processor processor
,
167 e_type type
, char *name
, unsigned long value
);
168 static unsigned long apply_range (unsigned long value
, struct itbl_range r
);
169 static unsigned long extract_range (unsigned long value
, struct itbl_range r
);
170 static struct itbl_field
*alloc_field (e_type type
, int sbit
,
171 int ebit
, unsigned long flags
);
173 /*======================================================================*/
174 /* Interfaces to the parser */
176 /* Open the table and use lex and yacc to parse the entries.
177 * Return 1 for failure; 0 for success. */
180 itbl_parse (char *insntbl
)
183 extern int yyparse (void);
185 yyin
= fopen (insntbl
, FOPEN_RT
);
188 printf ("Can't open processor instruction specification file \"%s\"\n",
197 itbl_have_entries
= 1;
201 /* Add a register entry */
204 itbl_add_reg (int yyprocessor
, int yytype
, char *regname
,
210 /* Since register names don't have a prefix, we put them in the symbol table so
211 they can't be used as symbols. This also simplifies argument parsing as
212 we can let gas parse registers for us. The recorded register number is
214 /* Use symbol_create here instead of symbol_new so we don't try to
215 output registers into the object file's symbol table. */
216 symbol_table_insert (symbol_create (regname
, reg_section
,
217 regnum
, &zero_address_frag
));
219 return alloc_entry (get_processor (yyprocessor
), get_type (yytype
), regname
,
220 (unsigned long) regnum
);
223 /* Add an instruction entry */
226 itbl_add_insn (int yyprocessor
, char *name
, unsigned long value
,
227 int sbit
, int ebit
, unsigned long flags
)
229 struct itbl_entry
*e
;
230 e
= alloc_entry (get_processor (yyprocessor
), e_insn
, name
, value
);
233 e
->range
.sbit
= sbit
;
234 e
->range
.ebit
= ebit
;
241 /* Add an operand to an instruction entry */
244 itbl_add_operand (struct itbl_entry
*e
, int yytype
, int sbit
,
245 int ebit
, unsigned long flags
)
247 struct itbl_field
*f
, **last_f
;
250 /* Add to end of fields' list. */
251 f
= alloc_field (get_type (yytype
), sbit
, ebit
, flags
);
256 last_f
= &(*last_f
)->next
;
263 /*======================================================================*/
264 /* Interfaces for assembler and disassembler */
269 static void append_insns_as_macros (void);
271 /* Initialize for gas. */
276 struct itbl_entry
*e
, **es
;
280 if (!itbl_have_entries
)
283 /* Since register names don't have a prefix, put them in the symbol table so
284 they can't be used as symbols. This simplifies argument parsing as
285 we can let gas parse registers for us. */
286 /* Use symbol_create instead of symbol_new so we don't try to
287 output registers into the object file's symbol table. */
289 for (type
= e_regtype0
; type
< e_nregtypes
; type
++)
290 for (procn
= e_p0
; procn
< e_nprocs
; procn
++)
292 es
= get_entries (procn
, type
);
293 for (e
= *es
; e
; e
= e
->next
)
295 symbol_table_insert (symbol_create (e
->name
, reg_section
,
296 e
->value
, &zero_address_frag
));
299 append_insns_as_macros ();
302 /* Append insns to opcodes table and increase number of opcodes
303 * Structure of opcodes table:
307 * const char *args; - string describing the arguments.
308 * unsigned long match; - opcode, or ISA level if pinfo=INSN_MACRO
309 * unsigned long mask; - opcode mask, or macro id if pinfo=INSN_MACRO
310 * unsigned long pinfo; - insn flags, or INSN_MACRO
313 * {"li", "t,i", 0x34000000, 0xffe00000, WR_t },
314 * {"li", "t,I", 0, (int) M_LI, INSN_MACRO },
317 static char *form_args (struct itbl_entry
*e
);
319 append_insns_as_macros (void)
321 struct ITBL_OPCODE_STRUCT
*new_opcodes
, *o
;
322 struct itbl_entry
*e
, **es
;
323 int n
, id
, size
, new_size
, new_num_opcodes
;
325 if (!itbl_have_entries
)
328 if (!itbl_num_opcodes
) /* no new instructions to add! */
332 DBG (("previous num_opcodes=%d\n", ITBL_NUM_OPCODES
));
334 new_num_opcodes
= ITBL_NUM_OPCODES
+ itbl_num_opcodes
;
335 ASSERT (new_num_opcodes
>= itbl_num_opcodes
);
337 size
= sizeof (struct ITBL_OPCODE_STRUCT
) * ITBL_NUM_OPCODES
;
339 DBG (("I get=%d\n", size
/ sizeof (ITBL_OPCODES
[0])));
341 new_size
= sizeof (struct ITBL_OPCODE_STRUCT
) * new_num_opcodes
;
342 ASSERT (new_size
> size
);
344 /* FIXME since ITBL_OPCODES culd be a static table,
345 we can't realloc or delete the old memory. */
346 new_opcodes
= (struct ITBL_OPCODE_STRUCT
*) malloc (new_size
);
349 printf (_("Unable to allocate memory for new instructions\n"));
352 if (size
) /* copy preexisting opcodes table */
353 memcpy (new_opcodes
, ITBL_OPCODES
, size
);
355 /* FIXME! some NUMOPCODES are calculated expressions.
356 These need to be changed before itbls can be supported. */
358 id
= ITBL_NUM_MACROS
; /* begin the next macro id after the last */
359 o
= &new_opcodes
[ITBL_NUM_OPCODES
]; /* append macro to opcodes list */
360 for (n
= e_p0
; n
< e_nprocs
; n
++)
362 es
= get_entries (n
, e_insn
);
363 for (e
= *es
; e
; e
= e
->next
)
365 /* name, args, mask, match, pinfo
366 * {"li", "t,i", 0x34000000, 0xffe00000, WR_t },
367 * {"li", "t,I", 0, (int) M_LI, INSN_MACRO },
368 * Construct args from itbl_fields.
371 o
->args
= strdup (form_args (e
));
372 o
->mask
= apply_range (e
->value
, e
->range
);
373 /* FIXME how to catch during assembly? */
374 /* mask to identify this insn */
375 o
->match
= apply_range (e
->value
, e
->range
);
379 o
->mask
= id
++; /* FIXME how to catch during assembly? */
380 o
->match
= 0; /* for macros, the insn_isa number */
381 o
->pinfo
= INSN_MACRO
;
384 /* Don't add instructions which caused an error */
391 ITBL_OPCODES
= new_opcodes
;
392 ITBL_NUM_OPCODES
= new_num_opcodes
;
395 At this point, we can free the entries, as they should have
396 been added to the assembler's tables.
397 Don't free name though, since name is being used by the new
400 Eventually, we should also free the new opcodes table itself
406 form_args (struct itbl_entry
*e
)
410 struct itbl_field
*f
;
413 for (f
= e
->fields
; f
; f
= f
->next
)
433 c
= 0; /* ignore; unknown field type */
445 #endif /* !STAND_ALONE */
447 /* Get processor's register name from val */
450 itbl_get_reg_val (char *name
, unsigned long *pval
)
455 for (p
= e_p0
; p
< e_nprocs
; p
++)
457 for (t
= e_regtype0
; t
< e_nregtypes
; t
++)
459 if (itbl_get_val (p
, t
, name
, pval
))
467 itbl_get_name (e_processor processor
, e_type type
, unsigned long val
)
469 struct itbl_entry
*r
;
470 /* type depends on instruction passed */
471 r
= find_entry_byval (processor
, type
, val
, 0);
475 return 0; /* error; invalid operand */
478 /* Get processor's register value from name */
481 itbl_get_val (e_processor processor
, e_type type
, char *name
,
484 struct itbl_entry
*r
;
485 /* type depends on instruction passed */
486 r
= find_entry_byname (processor
, type
, name
);
493 /* Assemble instruction "name" with operands "s".
494 * name - name of instruction
496 * returns - long word for assembled instruction */
499 itbl_assemble (char *name
, char *s
)
501 unsigned long opcode
;
502 struct itbl_entry
*e
= NULL
;
503 struct itbl_field
*f
;
508 return 0; /* error! must have an opcode name/expr */
510 /* find entry in list of instructions for all processors */
511 for (processor
= 0; processor
< e_nprocs
; processor
++)
513 e
= find_entry_byname (processor
, e_insn
, name
);
518 return 0; /* opcode not in table; invalid instruction */
519 opcode
= build_opcode (e
);
521 /* parse opcode's args (if any) */
522 for (f
= e
->fields
; f
; f
= f
->next
) /* for each arg, ... */
524 struct itbl_entry
*r
;
527 return 0; /* error - not enough operands */
528 n
= itbl_get_field (&s
);
529 /* n should be in form $n or 0xhhh (are symbol names valid?? */
535 /* Accept either a string name
536 * or '$' followed by the register number */
540 value
= strtol (n
, 0, 10);
541 /* FIXME! could have "0l"... then what?? */
542 if (value
== 0 && *n
!= '0')
543 return 0; /* error; invalid operand */
547 r
= find_entry_byname (e
->processor
, f
->type
, n
);
551 return 0; /* error; invalid operand */
555 /* use assembler's symbol table to find symbol */
556 /* FIXME!! Do we need this?
557 if so, what about relocs??
558 my_getExpression (&imm_expr, s);
559 return 0; /-* error; invalid operand *-/
562 /* If not a symbol, fall thru to IMMED */
564 if (*n
== '0' && *(n
+ 1) == 'x') /* hex begins 0x... */
567 value
= strtol (n
, 0, 16);
568 /* FIXME! could have "0xl"... then what?? */
572 value
= strtol (n
, 0, 10);
573 /* FIXME! could have "0l"... then what?? */
574 if (value
== 0 && *n
!= '0')
575 return 0; /* error; invalid operand */
579 return 0; /* error; invalid field spec */
581 opcode
|= apply_range (value
, f
->range
);
584 return 0; /* error - too many operands */
585 return opcode
; /* done! */
588 /* Disassemble instruction "insn".
590 * s - buffer to hold disassembled instruction
591 * returns - 1 if succeeded; 0 if failed
595 itbl_disassemble (char *s
, unsigned long insn
)
597 e_processor processor
;
598 struct itbl_entry
*e
;
599 struct itbl_field
*f
;
601 if (!ITBL_IS_INSN (insn
))
602 return 0; /* error */
603 processor
= get_processor (ITBL_DECODE_PNUM (insn
));
605 /* find entry in list */
606 e
= find_entry_byval (processor
, e_insn
, insn
, 0);
608 return 0; /* opcode not in table; invalid instruction */
611 /* Parse insn's args (if any). */
612 for (f
= e
->fields
; f
; f
= f
->next
) /* for each arg, ... */
614 struct itbl_entry
*r
;
617 if (f
== e
->fields
) /* First operand is preceded by tab. */
619 else /* ','s separate following operands. */
621 value
= extract_range (insn
, f
->range
);
622 /* n should be in form $n or 0xhhh (are symbol names valid?? */
628 /* Accept either a string name
629 or '$' followed by the register number. */
630 r
= find_entry_byval (e
->processor
, f
->type
, value
, &f
->range
);
634 sprintf (s
, "%s$%lu", s
, value
);
637 /* Use assembler's symbol table to find symbol. */
638 /* FIXME!! Do we need this? If so, what about relocs?? */
639 /* If not a symbol, fall through to IMMED. */
641 sprintf (s
, "%s0x%lx", s
, value
);
644 return 0; /* error; invalid field spec */
647 return 1; /* Done! */
650 /*======================================================================*/
652 * Local functions for manipulating private structures containing
653 * the names and format for the new instructions and registers
654 * for each processor.
657 /* Calculate instruction's opcode and function values from entry */
660 build_opcode (struct itbl_entry
*e
)
662 unsigned long opcode
;
664 opcode
= apply_range (e
->value
, e
->range
);
665 opcode
|= ITBL_ENCODE_PNUM (e
->processor
);
669 /* Calculate absolute value given the relative value and bit position range
670 * within the instruction.
671 * The range is inclusive where 0 is least significant bit.
672 * A range of { 24, 20 } will have a mask of
674 * pos: 1098 7654 3210 9876 5432 1098 7654 3210
675 * bin: 0000 0001 1111 0000 0000 0000 0000 0000
676 * hex: 0 1 f 0 0 0 0 0
681 apply_range (unsigned long rval
, struct itbl_range r
)
685 int len
= MAX_BITPOS
- r
.sbit
;
687 ASSERT (r
.sbit
>= r
.ebit
);
688 ASSERT (MAX_BITPOS
>= r
.sbit
);
689 ASSERT (r
.ebit
>= 0);
691 /* create mask by truncating 1s by shifting */
692 mask
= 0xffffffff << len
;
694 mask
= mask
>> r
.ebit
;
695 mask
= mask
<< r
.ebit
;
697 aval
= (rval
<< r
.ebit
) & mask
;
701 /* Calculate relative value given the absolute value and bit position range
702 * within the instruction. */
705 extract_range (unsigned long aval
, struct itbl_range r
)
709 int len
= MAX_BITPOS
- r
.sbit
;
711 /* create mask by truncating 1s by shifting */
712 mask
= 0xffffffff << len
;
714 mask
= mask
>> r
.ebit
;
715 mask
= mask
<< r
.ebit
;
717 rval
= (aval
& mask
) >> r
.ebit
;
721 /* Extract processor's assembly instruction field name from s;
722 * forms are "n args" "n,args" or "n" */
723 /* Return next argument from string pointer "s" and advance s.
724 * delimiters are " ,()" */
727 itbl_get_field (char **S
)
736 /* FIXME: This is a weird set of delimiters. */
737 len
= strcspn (s
, " \t,()");
738 ASSERT (128 > len
+ 1);
742 s
= 0; /* no more args */
744 s
+= len
+ 1; /* advance to next arg */
750 /* Search entries for a given processor and type
751 * to find one matching the name "n".
752 * Return a pointer to the entry */
754 static struct itbl_entry
*
755 find_entry_byname (e_processor processor
,
756 e_type type
, char *n
)
758 struct itbl_entry
*e
, **es
;
760 es
= get_entries (processor
, type
);
761 for (e
= *es
; e
; e
= e
->next
) /* for each entry, ... */
763 if (!strcmp (e
->name
, n
))
769 /* Search entries for a given processor and type
770 * to find one matching the value "val" for the range "r".
771 * Return a pointer to the entry.
772 * This function is used for disassembling fields of an instruction.
775 static struct itbl_entry
*
776 find_entry_byval (e_processor processor
, e_type type
,
777 unsigned long val
, struct itbl_range
*r
)
779 struct itbl_entry
*e
, **es
;
782 es
= get_entries (processor
, type
);
783 for (e
= *es
; e
; e
= e
->next
) /* for each entry, ... */
785 if (processor
!= e
->processor
)
787 /* For insns, we might not know the range of the opcode,
788 * so a range of 0 will allow this routine to match against
789 * the range of the entry to be compared with.
790 * This could cause ambiguities.
791 * For operands, we get an extracted value and a range.
793 /* if range is 0, mask val against the range of the compared entry. */
794 if (r
== 0) /* if no range passed, must be whole 32-bits
795 * so create 32-bit value from entry's range */
797 eval
= apply_range (e
->value
, e
->range
);
798 val
&= apply_range (0xffffffff, e
->range
);
800 else if ((r
->sbit
== e
->range
.sbit
&& r
->ebit
== e
->range
.ebit
)
801 || (e
->range
.sbit
== 0 && e
->range
.ebit
== 0))
803 eval
= apply_range (e
->value
, *r
);
804 val
= apply_range (val
, *r
);
814 /* Return a pointer to the list of entries for a given processor and type. */
816 static struct itbl_entry
**
817 get_entries (e_processor processor
, e_type type
)
819 return &entries
[processor
][type
];
822 /* Return an integral value for the processor passed from yyparse. */
825 get_processor (int yyproc
)
827 /* translate from yacc's processor to enum */
828 if (yyproc
>= e_p0
&& yyproc
< e_nprocs
)
829 return (e_processor
) yyproc
;
830 return e_invproc
; /* error; invalid processor */
833 /* Return an integral value for the entry type passed from yyparse. */
836 get_type (int yytype
)
840 /* translate from yacc's type to enum */
854 return e_invtype
; /* error; invalid type */
858 /* Allocate and initialize an entry */
860 static struct itbl_entry
*
861 alloc_entry (e_processor processor
, e_type type
,
862 char *name
, unsigned long value
)
864 struct itbl_entry
*e
, **es
;
867 e
= (struct itbl_entry
*) malloc (sizeof (struct itbl_entry
));
870 memset (e
, 0, sizeof (struct itbl_entry
));
871 e
->name
= (char *) malloc (sizeof (strlen (name
)) + 1);
873 strcpy (e
->name
, name
);
874 e
->processor
= processor
;
877 es
= get_entries (e
->processor
, e
->type
);
884 /* Allocate and initialize an entry's field */
886 static struct itbl_field
*
887 alloc_field (e_type type
, int sbit
, int ebit
,
890 struct itbl_field
*f
;
891 f
= (struct itbl_field
*) malloc (sizeof (struct itbl_field
));
894 memset (f
, 0, sizeof (struct itbl_field
));
896 f
->range
.sbit
= sbit
;
897 f
->range
.ebit
= ebit
;
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