Add assembler and disassembler support for the new Armv8.4-a instructions for AArch64.
[deliverable/binutils-gdb.git] / gas / testsuite / gas / aarch64 / armv8_4-a.s
1 # Print a 4 operand instruction
2 .macro print_gen4reg op, d, pd1=, pd2=, n, pn1=, pn2=, m, pm1=, pm2=, w , pw1=, pw2=
3 .ifnb \d
4 \op \pd1\d\()\pd2, \pn1\n\()\pn2, \pm1\m\()\pm2, \pw1\w\()\pw2
5 .else
6 .ifnb \n
7 \op \pn1\n\()\pn2, \pm1\m\()\pm2, \pw1\w\()\pw2
8 .else
9 \op \pm1\m\()\pm2, \pw1\w\()\pw2
10 .endif
11 .endif
12 .endm
13
14 .macro gen4reg_iter_d_offset op, d, pd1=, pd2=, r
15 .irp m, 03, 82, 13
16 \op \pd1\d\()\pd2, [\r, \m]
17 .endr
18 .endm
19
20 .macro gen4reg_iter_d_n_w op, d, pd1=, pd2=, n, pn1=, pn2=, m, pm1=, pm2=, pw1=, pw2=
21 .irp w, 3, 11, 15
22 print_gen4reg \op, \d, \pd1, \pd2, \n, \pn1, \pn2, \m, \pm1, \pm2, \w, \pw1, \pw2
23 .endr
24 .endm
25
26 .macro gen4reg_iter_d_n op, d, pd1=, pd2=, n, pn1=, pn2=, pm1=, pm2=, pw1=, pw2=
27 .irp m, 0, 8, 12
28 gen4reg_iter_d_n_w \op, \d, \pd1, \pd2, \n, \pn1, \pn2, \m, \pm1, \pm2, \pw1, \pw2
29 .endr
30 .endm
31
32 .macro gen4reg_iter_d op, d, pd1=, pd2=, pn1=, pn2=, pm1=, pm2=, pw1=, pw2=
33 .irp n, 2, 15, 30
34 gen4reg_iter_d_n \op, \d, \pd1, \pd2, \n, \pn1, \pn2, \pm1, \pm2, \pw1, \pw2
35 .endr
36 .endm
37
38 .macro gen4reg_iter op, pd1=, pd2=, pn1=, pn2=, pm1=, pm2=, pw1=, pw2=
39 .irp d, 0, 7, 16, 30
40 gen4reg_iter_d \op, \d, \pd1, \pd2, \pn1, \pn2, \pm1, \pm2, \pw1, \pw2
41 .endr
42 .endm
43
44 # Print a 3 operand instruction
45 .macro gen3reg_iter op, pd1=, pd2=, pn1=, pn2=, pm1=, pm2=
46 .irp d, 0, 7, 16, 30
47 gen4reg_iter_d \op,,, \d, \pd1, \pd2, \pn1, \pn2, \pm1, \pm2
48 .endr
49 .endm
50
51 .macro gen3reg_iter_lane op, pn1=, pn2=, pm1=, pm2=, pw1=, pw2=, x:vararg
52 .irp l, \x
53 gen4reg_iter_d \op,,,, \pn1, \pn2, \pm1, \pm2, \pw1, \pw2[\l]
54 .endr
55 .endm
56
57 # Print a 2 operand instruction
58 .macro gen2reg_iter op, pd1=, pd2=, pn1=, pn2=
59 .irp d, 0, 7, 16, 30
60 gen4reg_iter_d_n \op,,,,,, \d, \pd1, \pd2, \pn1, \pn2
61 .endr
62 .endm
63
64 .macro gen2reg_iter_offset op, pd1=, pd2=, r
65 .irp d, 0, 7, 16, 30
66 gen4reg_iter_d_offset \op, \d, \pd1, \pd2, \r,
67 .endr
68 .endm
69
70 # Print a 1 operand instruction
71 .macro gen1reg_iter op, pd1=, pd2=
72 .irp d, 0, 7, 16, 30
73 \op \pd1\d\()\pd2
74 .endr
75 .endm
76
77 .text
78 func:
79 gen3reg_iter rmif x,,,,,,
80 gen1reg_iter setf8 w,,
81 gen1reg_iter setf16 w,,
82
83 gen2reg_iter stlurb w,,[x,]
84 gen1reg_iter stlurb w,", [sp]"
85 gen3reg_iter stlurb w,, [x,,,]
86 gen2reg_iter_offset stlurb w,,sp
87
88 gen2reg_iter ldapurb w,,[x,]
89 gen1reg_iter ldapurb w,", [sp]"
90 gen3reg_iter ldapurb w,, [x,,,]
91 gen2reg_iter_offset ldapurb w,,sp
92
93 gen2reg_iter ldapursb w,,[x,]
94 gen1reg_iter ldapursb w,", [sp]"
95 gen3reg_iter ldapursb w,, [x,,,]
96 gen2reg_iter_offset ldapursb w,,sp
97
98 gen2reg_iter ldapursb x,,[x,]
99 gen1reg_iter ldapursb x,", [sp]"
100 gen3reg_iter ldapursb x,, [x,,,]
101 gen2reg_iter_offset ldapursb x,,sp
102
103 gen2reg_iter stlurh w,,[x,]
104 gen1reg_iter stlurh w,", [sp]"
105 gen3reg_iter stlurh w,, [x,,,]
106 gen2reg_iter_offset stlurh w,,sp
107
108 gen2reg_iter ldapurh w,,[x,]
109 gen1reg_iter ldapurh w,", [sp]"
110 gen3reg_iter ldapurh w,, [x,,,]
111 gen2reg_iter_offset ldapurh w,,sp
112
113 gen2reg_iter ldapursh w,,[x,]
114 gen1reg_iter ldapursh w,", [sp]"
115 gen3reg_iter ldapursh w,, [x,,,]
116 gen2reg_iter_offset ldapursh w,,sp
117
118 gen2reg_iter ldapursh x,,[x,]
119 gen1reg_iter ldapursh x,", [sp]"
120 gen3reg_iter ldapursh x,, [x,,,]
121 gen2reg_iter_offset ldapursh x,,sp
122
123 gen2reg_iter stlur w,,[x,]
124 gen1reg_iter stlur w,", [sp]"
125 gen3reg_iter stlur w,, [x,,,]
126 gen2reg_iter_offset stlur w,,sp
127
128 gen2reg_iter stlur x,,[x,]
129 gen1reg_iter stlur x,", [sp]"
130 gen3reg_iter stlur x,, [x,,,]
131 gen2reg_iter_offset stlur x,,sp
132
133 gen2reg_iter ldapur w,,[x,]
134 gen1reg_iter ldapur w,", [sp]"
135 gen3reg_iter ldapur w,, [x,,,]
136 gen2reg_iter_offset ldapur w,,sp
137
138 gen2reg_iter ldapur x,,[x,]
139 gen1reg_iter ldapur x,", [sp]"
140 gen3reg_iter ldapur x,, [x,,,]
141 gen2reg_iter_offset ldapur x,,sp
142
143 gen2reg_iter ldapursw x,,[x,]
144 gen1reg_iter ldapursw x,", [sp]"
145 gen3reg_iter ldapursw x,, [x,,,]
146 gen2reg_iter_offset ldapursw x,,sp
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