2 # ARMv8 tests to test neon register
7 # Post-index multiple elements
9 .macro ldst1_reg_list_post_imm_64 inst type
10 \inst\()1 {v0.\type}, [x0], #8
11 \inst\()1 {v0.\type, v1.\type}, [x0], #16
12 \inst\()1 {v0.\type, v1.\type, v2.\type}, [x0], #24
13 \inst\()1 {v0.\type, v1.\type, v2.\type, v3.\type}, [x0], #32
17 .irp bits_64 8b, 4h, 2s, 1d
18 ldst1_reg_list_post_imm_64 \instr \bits_64
22 .macro ldst1_reg_list_post_imm_128 inst type
23 \inst\()1 {v0.\type}, [x0], #16
24 \inst\()1 {v0.\type, v1.\type}, [x0], #32
25 \inst\()1 {v0.\type, v1.\type, v2.\type}, [x0], #48
26 \inst\()1 {v0.\type, v1.\type, v2.\type, v3.\type}, [x0], #64
30 .irp bits_128 16b, 8h, 4s, 2d
31 ldst1_reg_list_post_imm_128 \instr \bits_128
35 .macro ldst1_reg_list_post_reg inst type postreg
36 \inst\()1 {v0.\type}, [x0], \postreg
37 \inst\()1 {v0.\type, v1.\type}, [x0], \postreg
38 \inst\()1 {v0.\type, v1.\type, v2.\type}, [x0], \postreg
39 \inst\()1 {v0.\type, v1.\type, v2.\type, v3.\type}, [x0], \postreg
43 .irp bits 8b, 4h, 2s, 1d, 16b, 8h, 4s, 2d
44 ldst1_reg_list_post_reg \instr \bits x7
48 .macro ldst2_reg_list_post_imm_reg_64 inst type postreg
49 \inst\()2 {v0.\type, v1.\type}, [x0], #16
51 \inst\()2 {v0.\type, v1.\type}, [x0], \postreg
55 .macro ldst2_reg_list_post_imm_reg_128 inst type postreg
56 \inst\()2 {v0.\type, v1.\type}, [x0], #32
58 \inst\()2 {v0.\type, v1.\type}, [x0], \postreg
63 .irp bits_64 8b, 4h, 2s
64 ldst2_reg_list_post_imm_reg_64 \instr \bits_64 x7
69 .irp bits_128 16b, 8h, 4s, 2d
70 ldst2_reg_list_post_imm_reg_128 \instr \bits_128 x7
74 .macro ldst34_reg_list_post_imm_reg_64 inst type postreg
75 \inst\()3 {v0.\type, v1.\type, v2.\type}, [x0], #24
76 \inst\()4 {v0.\type, v1.\type, v2.\type, v3.\type}, [x0], #32
77 \inst\()3 {v0.\type, v1.\type, v2.\type}, [x0], \postreg
78 \inst\()4 {v0.\type, v1.\type, v2.\type, v3.\type}, [x0], \postreg
81 .macro ldst34_reg_list_post_imm_reg_128 inst type postreg
82 \inst\()3 {v0.\type, v1.\type, v2.\type}, [x0], #48
83 \inst\()4 {v0.\type, v1.\type, v2.\type, v3.\type}, [x0], #64
84 \inst\()3 {v0.\type, v1.\type, v2.\type}, [x0], \postreg
85 \inst\()4 {v0.\type, v1.\type, v2.\type, v3.\type}, [x0], \postreg
89 .irp bits_64 8b, 4h, 2s
90 ldst34_reg_list_post_imm_reg_64 \instr \bits_64 x7
95 .irp bits_128 16b, 8h, 4s, 2d
96 ldst34_reg_list_post_imm_reg_128 \instr \bits_128 x7
101 # Post Index Vector-element form with replicate (Immediate offset)
103 # Consecutive registers in reg list
105 .macro ldstn_index_rep_B_imm inst index type rep
106 \inst\()1\rep {v0.\type}\index, [x0], #1
107 \inst\()2\rep {v0.\type, v1.\type}\index, [x0], #2
108 \inst\()3\rep {v0.\type, v1.\type, v2.\type}\index, [x0], #3
109 \inst\()4\rep {v0.\type, v1.\type, v2.\type, v3.\type}\index, [x0], #4
112 # Vector element with index
115 ldstn_index_rep_B_imm \instr index="[1]" type=b rep=""
118 ldstn_index_rep_B_imm \instr index="" type=\types rep="r"
123 .macro ldstn_index_rep_H_imm inst index type rep
124 \inst\()1\rep {v0.\type}\index, [x0], #2
125 \inst\()2\rep {v0.\type, v1.\type}\index, [x0], #4
126 \inst\()3\rep {v0.\type, v1.\type, v2.\type}\index, [x0], #6
127 \inst\()4\rep {v0.\type, v1.\type, v2.\type, v3.\type}\index, [x0], #8
131 ldstn_index_rep_H_imm \instr index="[1]" type=h rep=""
134 ldstn_index_rep_H_imm \instr index="" type=\types rep="r"
139 .macro ldstn_index_rep_S_imm inst index type rep
140 \inst\()1\rep {v0.\type}\index, [x0], #4
141 \inst\()2\rep {v0.\type, v1.\type}\index, [x0], #8
142 \inst\()3\rep {v0.\type, v1.\type, v2.\type}\index, [x0], #12
143 \inst\()4\rep {v0.\type, v1.\type, v2.\type, v3.\type}\index, [x0], #16
147 ldstn_index_rep_S_imm \instr index="[1]" type=s rep=""
150 ldstn_index_rep_S_imm \instr index="" type=\types rep="r"
155 .macro ldstn_index_rep_D_imm inst index type rep
156 \inst\()1\rep {v0.\type}\index, [x0], #8
157 \inst\()2\rep {v0.\type, v1.\type}\index, [x0], #16
158 \inst\()3\rep {v0.\type, v1.\type, v2.\type}\index, [x0], #24
159 \inst\()4\rep {v0.\type, v1.\type, v2.\type, v3.\type}\index, [x0], #32
163 ldstn_index_rep_D_imm \instr index="[1]" type=d rep=""
166 ldstn_index_rep_D_imm \instr index="" type=\types rep="r"
171 # Post Index Vector-element form with replicate (Register offset)
172 # This could have been factored into Post-index multiple
173 # element macros but this would make this already-looking-complex
174 # testcase look more complex!
176 # Consecutive registers in reg list
178 .macro ldstn_index_rep_reg inst index type rep postreg
179 \inst\()1\rep {v0.\type}\index, [x0], \postreg
180 \inst\()2\rep {v0.\type, v1.\type}\index, [x0], \postreg
181 \inst\()3\rep {v0.\type, v1.\type, v2.\type}\index, [x0], \postreg
182 \inst\()4\rep {v0.\type, v1.\type, v2.\type, v3.\type}\index, [x0], \postreg
187 ldstn_index_rep_reg \instr index="[1]" type=\itypes rep="" postreg=x7
190 .irp types 8b, 16b, 4h, 8h, 2s, 4s, 1d, 2d
191 ldstn_index_rep_reg \instr index="" type=\types rep="r" postreg=x7