[AArch64][SVE 32/32] Add SVE tests
[deliverable/binutils-gdb.git] / gas / testsuite / gas / aarch64 / sve-reg-diagnostic.s
1 .equ x0, 0
2 .equ s0, 0
3 .equ z0, 0
4 .equ z0.s, 0
5 .equ p0, 0
6 .equ p0.b, 1
7
8 cmeq v0.4s, v1.4s, x0 // Error (wrong register type)
9 cmeq v0.4s, v1.4s, #x0 // OK
10 cmeq v0.4s, v1.4s, s0 // Error (wrong register type)
11 cmeq v0.4s, v1.4s, #s0 // OK
12 cmeq v0.4s, v1.4s, z0 // OK (for compatibility)
13 cmeq v0.4s, v1.4s, #z0 // OK
14 cmeq v0.4s, v1.4s, z0.s // OK (for compatibility)
15 cmeq v0.4s, v1.4s, #z0.s // OK
16 cmeq v0.4s, v1.4s, p0 // OK (for compatibility)
17 cmeq v0.4s, v1.4s, #p0 // OK
18 cmeq v0.4s, v1.4s, p0.b // Error (not 0)
19 cmeq v0.4s, v1.4s, #p0.b // Error (not 0)
20
21 ldr x1, [x0, x0] // OK
22 ldr x1, [x0, #x0] // OK
23 ldr x1, [x2, s0] // OK (not considered a register here)
24 ldr x1, [x2, #s0] // OK
25 ldr x1, [x2, z0] // OK (for compatibility)
26 ldr x1, [x2, #z0] // OK
27 ldr x2, [x2, z0.s] // OK (for compatibility)
28 ldr x1, [x2, #z0.s] // OK
29 ldr x2, [x2, p0] // OK (not considered a register here)
30 ldr x1, [x2, #p0] // OK
31 ldr x2, [x2, p0.b] // OK (not considered a register here)
32 ldr x1, [x2, #p0.b] // OK
33
34 ldr x1, [x0] // OK
35 ldr x1, [s0] // Error (not a base register)
36 ldr x1, [z0] // Error
37 ldr x1, [z0.s] // Error
38 ldr x1, [p0] // Error (not a base register)
39 ldr x1, [p0.b] // Error (not a base register)
40
41 ldr x0, [x1, x2, lsl x0] // OK (not considered a register here)
42 ldr x0, [x1, x2, lsl #x0] // OK
43 ldr x0, [x1, x2, lsl s0] // OK (not considered a register here)
44 ldr x0, [x1, x2, lsl #s0] // OK
45 ldr x0, [x1, x2, lsl z0] // OK (not considered a register here)
46 ldr x0, [x1, x2, lsl #z0] // OK
47 ldr x0, [x1, x2, lsl z0.s] // OK (not considered a register here)
48 ldr x0, [x1, x2, lsl #z0.s] // OK
49 ldr x0, [x1, x2, lsl p0] // OK (not considered a register here)
50 ldr x0, [x1, x2, lsl #p0] // OK
51 ldr x0, [x1, x2, lsl p0.b] // Error (invalid shift amount)
52 ldr x0, [x1, x2, lsl #p0.b] // Error (invalid shift amount)
53
54 mov x0, x0 // OK
55 mov x0, #x0 // OK
56 mov x0, s0 // OK (not considered a register here)
57 mov x0, #s0 // OK
58 mov x0, z0 // OK (not considered a register here)
59 mov x0, #z0 // OK
60 mov x0, z0.s // OK (not considered a register here)
61 mov x0, #z0.s // OK
62 mov x0, p0 // OK (not considered a register here)
63 mov x0, #p0 // OK
64 mov x0, p0.b // OK (not considered a register here)
65 mov x0, #p0.b // OK
66
67 movk x0, x0 // OK (not considered a register here)
68 movk x0, #x0 // OK
69 movk x0, s0 // OK (not considered a register here)
70 movk x0, #s0 // OK
71 movk x0, z0 // OK (not considered a register here)
72 movk x0, #z0 // OK
73 movk x0, z0.s // OK (not considered a register here)
74 movk x0, #z0.s // OK
75 movk x0, p0 // OK (not considered a register here)
76 movk x0, #p0 // OK
77 movk x0, p0.b // OK (not considered a register here)
78 movk x0, #p0.b // OK
79
80 add x0, x0, x0 // OK
81 add x0, x0, #x0 // OK
82 add x0, x0, s0 // OK (not considered a register here)
83 add x0, x0, #s0 // OK
84 add x0, x0, z0 // OK (not considered a register here)
85 add x0, x0, #z0 // OK
86 add x0, x0, z0.s // OK (not considered a register here)
87 add x0, x0, #z0.s // OK
88 add x0, x0, p0 // OK (not considered a register here)
89 add x0, x0, #p0 // OK
90 add x0, x0, p0.b // OK (not considered a register here)
91 add x0, x0, #p0.b // OK
92
93 and x0, x0, x0 // OK
94 and x0, x0, #x0 // Error (immediate out of range)
95 and x0, x0, s0 // Error (immediate out of range)
96 and x0, x0, #s0 // Error (immediate out of range)
97 and x0, x0, z0 // Error (immediate out of range)
98 and x0, x0, #z0 // Error (immediate out of range)
99 and x0, x0, z0.s // Error (immediate out of range)
100 and x0, x0, #z0.s // Error (immediate out of range)
101 and x0, x0, p0 // Error (immediate out of range)
102 and x0, x0, #p0 // Error (immediate out of range)
103 and x0, x0, p0.b // OK (not considered a register here)
104 and x0, x0, #p0.b // OK
105
106 lsl x0, x0, x0 // OK
107 lsl x0, x0, #x0 // OK
108 lsl x0, x0, s0 // Error (wrong register type)
109 lsl x0, x0, #s0 // OK
110 lsl x0, x0, z0 // OK (for compatibility)
111 lsl x0, x0, #z0 // OK
112 lsl x0, x0, z0.s // OK (for compatibility)
113 lsl x0, x0, #z0.s // OK
114 lsl x0, x0, p0 // OK (for compatibility)
115 lsl x0, x0, #p0 // OK
116 lsl x0, x0, p0.b // OK (for compatibility)
117 lsl x0, x0, #p0.b // OK
118
119 adr x0, x0 // OK (not considered a register here)
120 adr x0, #x0 // OK
121 adr x0, s0 // OK (not considered a register here)
122 adr x0, #s0 // OK
123 adr x0, z0 // OK (not considered a register here)
124 adr x0, #z0 // OK
125 adr x0, z0.s // OK (not considered a register here)
126 adr x0, #z0.s // OK
127 adr x0, p0 // OK (not considered a register here)
128 adr x0, #p0 // OK
129 adr x0, p0.b // OK (not considered a register here)
130 adr x0, #p0.b // OK
131
132 svc x0 // Error (immediate operand required)
133 svc #x0 // OK
134 svc s0 // Error (immediate operand required)
135 svc #s0 // OK
136 svc z0 // OK (for compatibility)
137 svc #z0 // OK
138 svc z0.s // OK (for compatibility)
139 svc #z0.s // OK
140 svc p0 // OK (for compatibility)
141 svc #p0 // OK
142 svc p0.b // OK (for compatibility)
143 svc #p0.b // OK
This page took 0.03297 seconds and 4 git commands to generate.