23 lr r5, [tag_addr_mask]
24 lr r5, [tag_data_mask]
25 lr r5, [line_length_mask]
30 lr r5, [ic_ram_address]
39 lr r5, [int_vector_base]
40 lr r5, [aux_vbfdw_mode]
42 lr r5, [aux_vbfdw_bm0]
43 lr r5, [aux_vbfdw_bm1]
44 lr r5, [aux_vbfdw_accu]
45 lr r5, [aux_vbfdw_ofst]
46 lr r5, [aux_vbfdw_intstat]
50 lr r5, [aux_fbf_store_16]
88 lr r5, [dccm_base_build]
90 lr r5, [bta_link_build]
95 lr r5, [vecbase_ac_build]
97 lr r5, [data_uncached_build]
104 lr r5, [vecbase_build]
105 lr r5, [d_cache_build]
110 lr r5, [i_cache_build]
112 lr r5, [dspram_build]
114 lr r5, [multiply_build]
117 lr r5, [minmax_build]
118 lr r5, [barrel_build]
150 lr r5, [aux_xmaclw_h]
151 lr r5, [aux_xmaclw_l]
160 lr r5, [se_dbg_data0]
161 lr r5, [se_dbg_data1]
162 lr r5, [se_dbg_data2]
163 lr r5, [se_dbg_data3]
166 lr r5, [arc600_build_config]
172 lr r5, [scq_switch_build]
173 lr r5, [vraptor_build]
177 lr r5, [simd_dma_build]
178 lr r5, [ifetch_queue_build]
184 lr r5, [arcangel_periph_xx]
187 lr r5, [aux_irq_hint]
188 lr r5, [aux_inter_core_interrupt]
192 lr r5, [aes_crypt_mode]
197 lr r5, [arith_ctl_aux]
254 lr r5, [aux_itrigger]
259 lr r5, [aux_irq_pulse_cancel]
260 lr r5, [aux_irq_pending]
261 lr r5, [scratch_data0]
299 lr r5, [dvfs_performance]
301 lr r5, [aux_vlc_buf_idx]
302 lr r5, [aux_vlc_read_buf]
303 lr r5, [aux_vlc_valid_bits]
304 lr r5, [aux_vlc_buf_in]
305 lr r5, [aux_vlc_buf_free]
306 lr r5, [aux_vlc_ibuf_status]
307 lr r5, [aux_vlc_setup]
308 lr r5, [aux_vlc_bits]
309 lr r5, [aux_vlc_table]
310 lr r5, [aux_vlc_get_symbol]
311 lr r5, [aux_vlc_read_symbol]
312 lr r5, [aux_ucavlc_setup]
313 lr r5, [aux_ucavlc_state]
314 lr r5, [aux_cavlc_zero_left]
315 lr r5, [aux_uvlc_i_state]
316 lr r5, [aux_vlc_dma_ptr]
317 lr r5, [aux_vlc_dma_end]
318 lr r5, [aux_vlc_dma_esc]
319 lr r5, [aux_vlc_dma_ctrl]
320 lr r5, [aux_vlc_get_0bit]
321 lr r5, [aux_vlc_get_1bit]
322 lr r5, [aux_vlc_get_2bit]
323 lr r5, [aux_vlc_get_3bit]
324 lr r5, [aux_vlc_get_4bit]
325 lr r5, [aux_vlc_get_5bit]
326 lr r5, [aux_vlc_get_6bit]
327 lr r5, [aux_vlc_get_7bit]
328 lr r5, [aux_vlc_get_8bit]
329 lr r5, [aux_vlc_get_9bit]
330 lr r5, [aux_vlc_get_10bit]
331 lr r5, [aux_vlc_get_11bit]
332 lr r5, [aux_vlc_get_12bit]
333 lr r5, [aux_vlc_get_13bit]
334 lr r5, [aux_vlc_get_14bit]
335 lr r5, [aux_vlc_get_15bit]
336 lr r5, [aux_vlc_get_16bit]
337 lr r5, [aux_vlc_get_17bit]
338 lr r5, [aux_vlc_get_18bit]
339 lr r5, [aux_vlc_get_19bit]
340 lr r5, [aux_vlc_get_20bit]
341 lr r5, [aux_vlc_get_21bit]
342 lr r5, [aux_vlc_get_22bit]
343 lr r5, [aux_vlc_get_23bit]
344 lr r5, [aux_vlc_get_24bit]
345 lr r5, [aux_vlc_get_25bit]
346 lr r5, [aux_vlc_get_26bit]
347 lr r5, [aux_vlc_get_27bit]
348 lr r5, [aux_vlc_get_28bit]
349 lr r5, [aux_vlc_get_29bit]
350 lr r5, [aux_vlc_get_30bit]
351 lr r5, [aux_vlc_get_31bit]
352 lr r5, [aux_cabac_ctrl]
353 lr r5, [aux_cabac_ctx_state]
354 lr r5, [aux_cabac_cod_param]
355 lr r5, [aux_cabac_misc0]
356 lr r5, [aux_cabac_misc1]
357 lr r5, [aux_cabac_misc2]
358 lr r5, [arc600_build_config]
359 lr r5, [smart_control]
360 lr r5, [smart_data_0]
361 lr r5, [smart_data_1]
362 lr r5, [smart_data_2]
363 lr r5, [smart_data_3]