gas/testsuite/gas/arc/taux.s

   1         lr      r5, [lp_start]
   2         lr      r5, [lp_end]
   3         lr      r5, [identity]
   4         lr      r5, [debug]
   5         lr      r5, [pc]
   6         lr      r5, [status32]
   7         lr      r5, [ic_ivic]
   8         lr      r5, [ic_ctrl]
   9         lr      r5, [ic_ivil]
  10         lr      r5, [ic_ram_address]
  11         lr      r5, [ic_tag]
  12         lr      r5, [ic_wp]
  13         lr      r5, [ic_data]
  14         lr      r5, [count0]
  15         lr      r5, [control0]
  16         lr      r5, [limit0]
  17         lr      r5, [dc_ivdc]
  18         lr      r5, [dc_ctrl]
  19         lr      r5, [dc_ldl]
  20         lr      r5, [dc_ivdl]
  21         lr      r5, [dc_flsh]
  22         lr      r5, [dc_ram_addr]
  23         lr      r5, [dc_tag]
  24         lr      r5, [dc_wp]
  25         lr      r5, [dc_data]
  26         lr      r5, [dccm_base_build]
  27         lr      r5, [crc_build]
  28         lr      r5, [bta_link_build]
  29         lr      r5, [vbfdw_build]
  30         lr      r5, [ea_build]
  31         lr      r5, [dataspace]
  32         lr      r5, [memsubsys]
  33         lr      r5, [vecbase_ac_build]
  34         lr      r5, [p_base_addr]
  35         lr      r5, [data_uncached_build]
  36         lr      r5, [fp_build]
  37         lr      r5, [dpfp_build]
  38         lr      r5, [mpu_build]
  39         lr      r5, [rf_build]
  40         lr      r5, [mmu_build]
  41         lr      r5, [vecbase_build]
  42         lr      r5, [d_cache_build]
  43         lr      r5, [madi_build]
  44         lr      r5, [dccm_build]
  45         lr      r5, [timer_build]
  46         lr      r5, [ap_build]
  47         lr      r5, [i_cache_build]
  48         lr      r5, [iccm_build]
  49         lr      r5, [dspram_build]
  50         lr      r5, [mac_build]
  51         lr      r5, [multiply_build]
  52         lr      r5, [swap_build]
  53         lr      r5, [norm_build]
  54         lr      r5, [minmax_build]
  55         lr      r5, [barrel_build]
  56         lr      r5, [ax0]
  57         lr      r5, [ax1]
  58         lr      r5, [ax2]
  59         lr      r5, [ax3]
  60         lr      r5, [ay0]
  61         lr      r5, [ay1]
  62         lr      r5, [ay2]
  63         lr      r5, [ay3]
  64         lr      r5, [mx00]
  65         lr      r5, [mx01]
  66         lr      r5, [mx10]
  67         lr      r5, [mx11]
  68         lr      r5, [mx20]
  69         lr      r5, [mx21]
  70         lr      r5, [mx30]
  71         lr      r5, [mx31]
  72         lr      r5, [my00]
  73         lr      r5, [my01]
  74         lr      r5, [my10]
  75         lr      r5, [my11]
  76         lr      r5, [my20]
  77         lr      r5, [my21]
  78         lr      r5, [my30]
  79         lr      r5, [my31]
  80         lr      r5, [xyconfig]
  81         lr      r5, [burstsys]
  82         lr      r5, [burstxym]
  83         lr      r5, [burstsz]
  84         lr      r5, [burstval]
  85         lr      r5, [xylsbasex]
  86         lr      r5, [xylsbasey]
  87         lr      r5, [aux_xmaclw_h]
  88         lr      r5, [aux_xmaclw_l]
  89         lr      r5, [se_ctrl]
  90         lr      r5, [se_stat]
  91         lr      r5, [se_err]
  92         lr      r5, [se_eadr]
  93         lr      r5, [se_spc]
  94         lr      r5, [sdm_base]
  95         lr      r5, [scm_base]
  96         lr      r5, [se_dbg_ctrl]
  97         lr      r5, [se_dbg_data0]
  98         lr      r5, [se_dbg_data1]
  99         lr      r5, [se_dbg_data2]
 100         lr      r5, [se_dbg_data3]
 101         lr      r5, [se_watch]
 102         lr      r5, [bpu_build]
 103         lr      r5, [isa_config]
 104         lr      r5, [hwp_build]
 105         lr      r5, [pct_build]
 106         lr      r5, [cc_build]
 107         lr      r5, [pm_bcr]
 108         lr      r5, [scq_switch_build]
 109         lr      r5, [vraptor_build]
 110         lr      r5, [dma_config]
 111         lr      r5, [simd_config]
 112         lr      r5, [vlc_build]
 113         lr      r5, [simd_dma_build]
 114         lr      r5, [ifetch_queue_build]
 115         lr      r5, [smart_build]
 116         lr      r5, [count1]
 117         lr      r5, [control1]
 118         lr      r5, [limit1]
 119         lr      r5, [timer_xx]
 120         lr      r5, [aux_irq_hint]
 121         lr      r5, [ap_amv0]
 122         lr      r5, [ap_amm0]
 123         lr      r5, [ap_ac0]
 124         lr      r5, [ap_amv1]
 125         lr      r5, [ap_amm1]
 126         lr      r5, [ap_ac1]
 127         lr      r5, [ap_amv2]
 128         lr      r5, [ap_amm2]
 129         lr      r5, [ap_ac2]
 130         lr      r5, [ap_amv3]
 131         lr      r5, [ap_amm3]
 132         lr      r5, [ap_ac3]
 133         lr      r5, [ap_amv4]
 134         lr      r5, [ap_amm4]
 135         lr      r5, [ap_ac4]
 136         lr      r5, [ap_amv5]
 137         lr      r5, [ap_amm5]
 138         lr      r5, [ap_ac5]
 139         lr      r5, [ap_amv6]
 140         lr      r5, [ap_amm6]
 141         lr      r5, [ap_ac6]
 142         lr      r5, [ap_amv7]
 143         lr      r5, [ap_amm7]
 144         lr      r5, [ap_ac7]
 145         lr      r5, [fp_status]
 146         lr      r5, [aux_dpfp1l]
 147         lr      r5, [d1l]
 148         lr      r5, [aux_dpfp1h]
 149         lr      r5, [d1h]
 150         lr      r5, [d1l]
 151         lr      r5, [aux_dpfp2l]
 152         lr      r5, [d2l]
 153         lr      r5, [d1h]
 154         lr      r5, [aux_dpfp2h]
 155         lr      r5, [d2h]
 156         lr      r5, [d2l]
 157         lr      r5, [dpfp_status]
 158         lr      r5, [d2h]
 159         lr      r5, [eret]
 160         lr      r5, [erbta]
 161         lr      r5, [erstatus]
 162         lr      r5, [ecr]
 163         lr      r5, [efa]
 164         lr      r5, [mpuen]
 165         lr      r5, [icause1]
 166         lr      r5, [icause2]
 167         lr      r5, [aux_ienable]
 168         lr      r5, [aux_itrigger]
 169         lr      r5, [xpu]
 170         lr      r5, [bta]
 171         lr      r5, [aux_irq_pulse_cancel]
 172         lr      r5, [aux_irq_pending]
 173         lr      r5, [mpuic]
 174         lr      r5, [mpufa]
 175         lr      r5, [mpurdb0]
 176         lr      r5, [mpurdp0]
 177         lr      r5, [mpurdb1]
 178         lr      r5, [mpurdp1]
 179         lr      r5, [mpurdb2]
 180         lr      r5, [mpurdp2]
 181         lr      r5, [mpurdb3]
 182         lr      r5, [mpurdp3]
 183         lr      r5, [mpurdb4]
 184         lr      r5, [mpurdp4]
 185         lr      r5, [mpurdb5]
 186         lr      r5, [mpurdp5]
 187         lr      r5, [mpurdb6]
 188         lr      r5, [mpurdp6]
 189         lr      r5, [mpurdb7]
 190         lr      r5, [mpurdp7]
 191         lr      r5, [mpurdb8]
 192         lr      r5, [mpurdp8]
 193         lr      r5, [mpurdb9]
 194         lr      r5, [mpurdp9]
 195         lr      r5, [mpurdb10]
 196         lr      r5, [mpurdp10]
 197         lr      r5, [mpurdb11]
 198         lr      r5, [mpurdp11]
 199         lr      r5, [mpurdb12]
 200         lr      r5, [mpurdp12]
 201         lr      r5, [mpurdb13]
 202         lr      r5, [mpurdp13]
 203         lr      r5, [mpurdb14]
 204         lr      r5, [mpurdp14]
 205         lr      r5, [mpurdb15]
 206         lr      r5, [mpurdp15]