Add LDM and STM instructions which are unpredictable because of their use of
[deliverable/binutils-gdb.git] / gas / testsuite / gas / arm / armv1-bad.l
1 [^:]*: Assembler messages:
2 [^:]*:4: Error: invalid pseudo operation -- `str r0,=0x00ff0000'
3 [^:]*:5: Error: bad expression -- `ldr r0,{r1}'
4 [^:]*:6: Error: address offset too large -- `ldr r0,\[r1,#4096\]'
5 [^:]*:7: Error: address offset too large -- `ldr r0,\[r1,#-4096\]'
6 [^:]*:8: Error: invalid constant -- `mov r0,#0x1ff'
7 [^:]*:9: Error: bad instruction `cmpl r0,r0'
8 [^:]*:10: Error: selected processor does not support `strh r0,\[r1\]'
9 [^:]*:11: Warning: writeback of base register is UNPREDICTABLE
10 [^:]*:12: Warning: writeback of base register when in register list is UNPREDICTABLE
11 [^:]*:13: Warning: writeback of base register is UNPREDICTABLE
12 [^:]*:15: Warning: if writeback register is in list, it must be the lowest reg in the list
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