gas/testsuite/gas/arm/armv8-2-fp16-scalar-bad.s

   1         .macro f16_sss_arithmetic reg0, reg1, reg2
   2         .irp op, vdiv, vfma, vfms, vfnma, vfnms, vmla, vmls, vmul, vnmla, vnmls, vnmul, vsub
   3           .irp cond, eq.f16, ne.f16, ge.f16, lt.f16, gt.f16, le.f16
   4                 \op\cond s\reg0, s\reg1, s\reg2
   5           .endr
   6         .endr
   7         .endm
   8
   9         .macro f16_ss_arithmetic reg0, reg1
  10         .irp op, vabs, vadd, vsqrt, vneg
  11           .irp cond, eq.f16, ne.f16, ge.f16, lt.f16, gt.f16, le.f16
  12                 \op\cond s\reg0, s\reg1
  13           .endr
  14         .endr
  15         .endm
  16
  17         .macro f16_si_cmp reg0, imm
  18         .irp op, vcmp, vcmpe
  19           .irp cond, eq.f16, ne.f16, ge.f16, lt.f16, gt.f16, le.f16
  20                 \op\cond s\reg0, \imm
  21           .endr
  22         .endr
  23         .endm
  24
  25         .macro f16_ss_cmp reg0, reg1
  26         .irp op, vcmp, vcmpe
  27           .irp cond, eq.f16, ne.f16, ge.f16, lt.f16, gt.f16, le.f16
  28                 \op\cond s\reg0, s\reg1
  29           .endr
  30         .endr
  31         .endm
  32
  33         .macro f16_ss_cvt reg0, reg1
  34         .irp cond, eq, ne, ge, lt, gt, le
  35           .irp mode, .s32.f16, .u32.f16, .f16.s32, .f16.u32
  36                 vcvt\cond\mode s\reg0, s\reg1
  37           .endr
  38         .endr
  39         .endm
  40
  41         .macro f16_ssi_cvt_imm32 reg0, reg1, imm
  42         .irp cond, eq, ne, ge, lt, gt, le
  43           .irp mode, .s32.f16, .u32.f16, .f16.s32, .f16.u32
  44                 vcvt\cond\mode s\reg0, s\reg1, \imm
  45           .endr
  46         .endr
  47         .endm
  48
  49         .macro f16_ss_cvt_r reg0, reg1
  50         .irp cond, eq, ne, ge, lt, gt, le
  51           .irp mode, .s32.f16, .u32.f16
  52                 vcvtr\cond\mode s\reg0, s\reg1
  53           .endr
  54         .endr
  55         .endm
  56
  57         .macro f16_ss_vrint reg0, reg1
  58         .irp op, vrintr, vrintx, vrintz
  59           .irp cond, eq.f16, ne.f16, ge.f16, lt.f16, gt.f16, le.f16
  60                 \op\cond s\reg0, s\reg1
  61           .endr
  62         .endr
  63         .endm
  64
  65         .macro f16_ss_mov reg0, reg1
  66         .irp op, vins, vmovx
  67           .irp cond, eq.f16, ne.f16, ge.f16, lt.f16, gt.f16, le.f16
  68                 \op\cond s\reg0, s\reg1
  69           .endr
  70         .endr
  71         .endm
  72
  73         .macro t_f16_ss_mov reg0, reg1
  74         .irp op, vins, vmovx
  75           .irp cond, eq, ne, ge, lt, gt, le
  76             .irp mode, .f16
  77                 it \cond
  78                 \op\cond\mode s\reg0, s\reg1
  79             .endr
  80           .endr
  81         .endr
  82         .endm
  83
  84         .text
  85
  86         @ invalied immediate range
  87         vldr.16 s6, [pc, #-511]
  88         vldr.16 s6, [pc, #111]
  89         vldr.16 s3, [pc, #511]
  90
  91         @ invalid immediate range
  92         vcvt.s32.f16 s11, s11, #33
  93         vcvt.u32.f16 s11, s11, #0
  94         vcvt.f16.s32 s12, s12, #34
  95         vcvt.f16.u32 s12, s12, #-1
  96
  97         @ armv8.2 fp16 scalar instruction cannot be conditional
  98         f16_sss_arithmetic 0, 1, 2
  99         f16_ss_arithmetic 0, 1
 100         f16_si_cmp 2, #0.0
 101         f16_ss_cmp 0, 1
 102         f16_ss_cvt 1, 8
 103         f16_ssi_cvt_imm32 2, 2, #29
 104         f16_ss_cvt_r 0, 10
 105         f16_ss_vrint 3, 11
 106         f16_ss_mov 0, 1
 107
 108         .syntax unified
 109         .thumb
 110         t_f16_ss_mov 0, 1