2 # Extra tests everywhere:
3 # Ensure that setting the register to something in r[1-12] works.
5 # cx1{a} Has arguments in the following form
6 # 111a111000iiiiiidddd0pppi0iiiiii
9 # - Base (everything we can set to zero)
10 # - immediates that set each set of `i` to ones in turn.
11 # (imm = op1:op2:op3 , which is each group of `i` from left to write
13 # - Each register 9 (0b1001), APSR_nzcv, or all zeros
14 # - Coprocessor num set to 7
15 # - Everything again with the `a` version (to double check parsing).
16 # - Accumulator versions without optional argument (to check parsing)
19 # Non-accumulator versions are UNPREDICTABLE in IT blocks.
20 # Accumulator versions are allowed in IT blocks.
36 cx1a p0, APSR_nzcv, #0
42 # cx1d{a} encoding of following form:
43 # 111a111000iiiiiidddd0pppi1iiiiii
46 # - Base (everything we can set to zero)
47 # - immediates that set each set of `i` to ones in turn.
48 # (imm = op1:op2:op3 , which is each group of `i` from left to write
50 # - Destination register 10 (0b1010) or all zeros
51 # - Coprocessor num set to 7
52 # - Everything again with the `a` version (to double check parsing).
53 # - Accumulator versions without optional argument (to check parsing)
55 cx1d p0, r0, r1, #8064
61 cx1da p0, r0, r1, #8064
65 cx1da p0, r10, r11, #0
68 cx1dane p0, r0, r1, #0
71 # cx2{a} Has arguments of the following form:
72 # 111a111001iinnnndddd0pppi0iiiiii
75 # - Base (everything we can set to zero)
76 # - immediates that set each set of `i` to ones in turn.
77 # (imm = op1:op2:op3 , which is each group of `i` from left to write
79 # - Each register 9 (0b1001), APSR_nzcv, or all zeros
80 # - Coprocessor num set to 7
81 # - Everything again with the `a` version (to double check parsing).
82 # - Accumulator versions without optional argument (to check parsing)
88 cx2 p0, APSR_nzcv, r0, #0
90 cx2 p0, r0, APSR_nzcv, #0
97 cx2a p0, APSR_nzcv, r0, #0
99 cx2a p0, r0, APSR_nzcv, #0
103 cx2ane p0, r0, r0, #0
105 # cx2d{a} encoding has following form:
106 # 111a111001iinnnndddd0pppi1iiiiii
108 # - Base (everything we can set to zero)
109 # - immediates that set each set of `i` to ones in turn.
110 # (imm = op1:op2:op3 , which is each group of `i` from left to write
112 # - Destination register 10 (0b1010) or all zeros
113 # - Coprocessor num set to 7
114 # - Everything again with the `a` version (to double check parsing).
115 # - Accumulator versions without optional argument (to check parsing)
116 cx2d p0, r0, r1, r0, #0
117 cx2d p0, r0, r1, r0, #384
118 cx2d p0, r0, r1, r0, #64
119 cx2d p0, r0, r1, r0, #63
120 cx2d p7, r0, r1, r0, #0
121 cx2d p0, r10, r11, r0, #0
122 cx2d p0, r0, r1, APSR_nzcv, #0
123 cx2d p0, r0, r1, r9, #0
124 cx2da p0, r0, r1, r0, #0
125 cx2da p0, r0, r1, r0, #384
126 cx2da p0, r0, r1, r0, #64
127 cx2da p0, r0, r1, r0, #63
128 cx2da p7, r0, r1, r0, #0
129 cx2da p0, r10, r11, r0, #0
130 cx2da p0, r0, r1, APSR_nzcv, #0
131 cx2da p0, r0, r1, r9, #0
133 # cx3{a} Has arguments in the following form:
134 # 111a11101iiinnnnmmmm0pppi0iidddd
137 # - immediates that set each set of `i` to ones in turn.
138 # (imm = op1:op2:op3 , which is each group of `i` from left to write
139 # - Base (everything we can set to zero)
140 # - immediates that set each set of `i` to ones in turn.
141 # (imm = op1:op2:op3 , which is each group of `i` from left to write
143 # - Each register 9 (0b1001), APSR_nzcv, or all zeros
144 # - Coprocessor num set to 7
145 # - Everything again with the `a` version (to double check parsing).
146 # - Accumulator versions without optional argument (to check parsing)
147 cx3 p0, r0, r0, r0, #0
148 cx3 p0, r0, r0, r0, #56
149 cx3 p0, r0, r0, r0, #4
150 cx3 p0, r0, r0, r0, #3
151 cx3 p7, r0, r0, r0, #0
152 cx3 p0, APSR_nzcv, r0, r0, #0
153 cx3 p0, r9, r0, r0, #0
154 cx3 p0, r0, APSR_nzcv, r0, #0
155 cx3 p0, r0, r9, r0, #0
156 cx3 p0, r0, r0, APSR_nzcv, #0
157 cx3 p0, r0, r0, r9, #0
158 cx3a p0, r0, r0, r0, #0
159 cx3a p0, r0, r0, r0, #56
160 cx3a p0, r0, r0, r0, #4
161 cx3a p0, r0, r0, r0, #3
162 cx3a p7, r0, r0, r0, #0
163 cx3a p0, APSR_nzcv, r0, r0, #0
164 cx3a p0, r9, r0, r0, #0
165 cx3a p0, r0, APSR_nzcv, r0, #0
166 cx3a p0, r0, r9, r0, #0
167 cx3a p0, r0, r0, APSR_nzcv, #0
168 cx3a p0, r0, r0, r9, #0
171 cx3ane p0, r0, r0, r0, #0
173 # cx3d{a} encoding has following form:
174 # 111a11101iiinnnnmmmm0pppi1iidddd
178 # - immediates that set each set of `i` to ones in turn.
179 # (imm = op1:op2:op3 , which is each group of `i` from left to write
181 # - Destination register 10 (0b1010) or all zeros
182 # - Source register 9 (0b1001), APSR_nzcv, or all zeros
184 # No longer allows APSR_nzcv in destination register
185 cx3d p0, r0, r1, r0, r0, #0
186 cx3d p0, r0, r1, r0, r0, #56
187 cx3d p0, r0, r1, r0, r0, #4
188 cx3d p0, r0, r1, r0, r0, #3
189 cx3d p7, r0, r1, r0, r0, #0
190 cx3d p0, r10, r11, r0, r0, #0
191 cx3d p0, r0, r1, APSR_nzcv, r0, #0
192 cx3d p0, r0, r1, r9, r0, #0
193 cx3d p0, r0, r1, r0, APSR_nzcv, #0
194 cx3d p0, r0, r1, r0, r9, #0
195 cx3da p0, r0, r1, r0, r0, #0
196 cx3da p0, r0, r1, r0, r0, #56
197 cx3da p0, r0, r1, r0, r0, #4
198 cx3da p0, r0, r1, r0, r0, #3
199 cx3da p7, r0, r1, r0, r0, #0
200 cx3da p0, r10, r11, r0, r0, #0
201 cx3da p0, r0, r1, APSR_nzcv, r0, #0
202 cx3da p0, r0, r1, r9, r0, #0
203 cx3da p0, r0, r1, r0, APSR_nzcv, #0
204 cx3da p0, r0, r1, r0, r9, #0