4 cdp p1, 4, cr1, cr2, cr3
5 cdpeq 4, 3, c1, c4, cr5, 5
8 ldcl 1, cr14, [r1, #32]
9 ldcmi 0, cr0, [r2, #1020]!
10 ldclpl p7, c1, [r3], #64
15 stcl 3, cr15, [r0, #8]
16 stceq p4, cr12, [r2, #100]!
17 stccc p6, c8, [r4], #48
22 mrcge p4, 5, r15, cr1, cr2, 7
24 mcr p7, 1, r5, cr1, cr1
25 mcrlt 5, 1, r8, cr2, cr9, 0
27 @ The following patterns test Addressing Mode 5 "Unindexed"
29 stc p14, c6, [r1], {1}
31 stcl p8, c2, [r5], {5}
32 @ using '11' below results in an (invalid) Neon vldmia instruction.
33 ldcl 12, c8, [r8], {255}
34 stcl p12, c9, [r9], {254}
36 # Extra instructions to allow for code alignment in arm-aout target.
40 # UAL-syntax for MRC with APSR. Pre-UAL was PC
41 mrcge p4, 5, APSR_nzcv, cr1, cr2, 7