gas/testsuite/gas/arm/copro-arm_v5plus-arm_v5.d

   1 #source: copro-arm_v5plus-thumb_v6t2plus.s
   2 #objdump: -dr --prefix-addresses --show-raw-insn
   3 #name: ARMv5 ARM CoProcessor Instructions
   4 #as: -march=armv5 -EL
   5
   6 # Test the standard ARM co-processor instructions:
   7
   8 .*: +file format .*arm.*
   9
  10 Disassembly of section .text:
  11 0+000 <[^>]*> fe421103  cdp2    1, 4, cr1, cr2, cr3, \{0\}
  12 0+004 <[^>]*> fd939500  ldc2    5, cr9, \[r3\]
  13 0+008 <[^>]*> fdd1e108  ldc2l   1, cr14, \[r1, #32\]
  14 0+00c <[^>]*> fd1f8001  ldc2    0, cr8, \[pc, #-4\]     ; .* <foo>
  15 0+010 <[^>]*> fd830500  stc2    5, cr0, \[r3\]
  16 0+014 <[^>]*> fdc0f302  stc2l   3, cr15, \[r0, #8\]
  17 0+018 <[^>]*> fd0f7101  stc2    1, cr7, \[pc, #-4\]     ; .* <bar>
  18 0+01c <[^>]*> fe715212  mrc2    2, 3, r5, cr1, cr2, \{0\}
  19 0+020 <[^>]*> fe215711  mcr2    7, 1, r5, cr1, cr1, \{0\}
  20 0+024 <[^>]*> fc925502  ldc2    5, cr5, \[r2\], \{2\}
  21 0+028 <[^>]*> fc834603  stc2    6, cr4, \[r3\], \{3\}
  22 0+02c <[^>]*> fcd61c06  ldc2l   12, cr1, \[r6\], \{6\}
  23 0+030 <[^>]*> fcc70c07  stc2l   12, cr0, \[r7\], \{7\}