gdb: Convert language la_word_break_characters field to a method
[deliverable/binutils-gdb.git] / gas / testsuite / gas / arm / mve-vhadd-vhsub-vrhadd-bad.l
1 [^:]*: Assembler messages:
2 [^:]*:10: Error: bad type in SIMD instruction -- `vhadd.i8 q0,q1,q2'
3 [^:]*:11: Error: bad type in SIMD instruction -- `vhadd.s64 q0,q1,q2'
4 [^:]*:12: Error: bad type in SIMD instruction -- `vhadd.i8 q0,q1,r2'
5 [^:]*:13: Error: bad type in SIMD instruction -- `vhadd.s64 q0,q1,r2'
6 [^:]*:14: Error: bad type in SIMD instruction -- `vhsub.i16 q0,q1,q2'
7 [^:]*:15: Error: bad type in SIMD instruction -- `vhsub.u64 q0,q1,q2'
8 [^:]*:16: Error: bad type in SIMD instruction -- `vhsub.i16 q0,q1,r2'
9 [^:]*:17: Error: bad type in SIMD instruction -- `vhsub.u64 q0,q1,r2'
10 [^:]*:18: Error: bad type in SIMD instruction -- `vrhadd.i32 q0,q1,q2'
11 [^:]*:19: Error: bad type in SIMD instruction -- `vrhadd.s64 q0,q1,q2'
12 [^:]*:20: Warning: instruction is UNPREDICTABLE with SP operand
13 [^:]*:21: Warning: instruction is UNPREDICTABLE with PC operand
14 [^:]*:22: Warning: instruction is UNPREDICTABLE with SP operand
15 [^:]*:23: Warning: instruction is UNPREDICTABLE with PC operand
16 [^:]*:24: Error: garbage following instruction -- `vrhadd.s8 q0,q1,r2'
17 [^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
18 [^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
19 [^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
20 [^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
21 [^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
22 [^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
23 [^:]*:26: Warning: instruction is UNPREDICTABLE in an IT block
24 [^:]*:26: Warning: instruction is UNPREDICTABLE in an IT block
25 [^:]*:26: Warning: instruction is UNPREDICTABLE in an IT block
26 [^:]*:26: Warning: instruction is UNPREDICTABLE in an IT block
27 [^:]*:26: Warning: instruction is UNPREDICTABLE in an IT block
28 [^:]*:26: Warning: instruction is UNPREDICTABLE in an IT block
29 [^:]*:27: Warning: instruction is UNPREDICTABLE in an IT block
30 [^:]*:27: Warning: instruction is UNPREDICTABLE in an IT block
31 [^:]*:27: Warning: instruction is UNPREDICTABLE in an IT block
32 [^:]*:27: Warning: instruction is UNPREDICTABLE in an IT block
33 [^:]*:27: Warning: instruction is UNPREDICTABLE in an IT block
34 [^:]*:27: Warning: instruction is UNPREDICTABLE in an IT block
35 [^:]*:28: Warning: instruction is UNPREDICTABLE in an IT block
36 [^:]*:28: Warning: instruction is UNPREDICTABLE in an IT block
37 [^:]*:28: Warning: instruction is UNPREDICTABLE in an IT block
38 [^:]*:28: Warning: instruction is UNPREDICTABLE in an IT block
39 [^:]*:28: Warning: instruction is UNPREDICTABLE in an IT block
40 [^:]*:28: Warning: instruction is UNPREDICTABLE in an IT block
41 [^:]*:29: Warning: instruction is UNPREDICTABLE in an IT block
42 [^:]*:29: Warning: instruction is UNPREDICTABLE in an IT block
43 [^:]*:29: Warning: instruction is UNPREDICTABLE in an IT block
44 [^:]*:29: Warning: instruction is UNPREDICTABLE in an IT block
45 [^:]*:29: Warning: instruction is UNPREDICTABLE in an IT block
46 [^:]*:29: Warning: instruction is UNPREDICTABLE in an IT block
47 [^:]*:31: Error: syntax error -- `vhaddeq.s8 q0,q1,r2'
48 [^:]*:32: Error: syntax error -- `vhaddeq.s8 q0,q1,r2'
49 [^:]*:34: Error: syntax error -- `vhaddeq.s8 q0,q1,r2'
50 [^:]*:35: Error: vector predicated instruction should be in VPT/VPST block -- `vhaddt.s8 q0,q1,r2'
51 [^:]*:37: Error: instruction missing MVE vector predication code -- `vhadd.s8 q0,q1,r2'
52 [^:]*:39: Error: syntax error -- `vhaddeq.s8 q0,q1,q2'
53 [^:]*:40: Error: syntax error -- `vhaddeq.s8 q0,q1,q2'
54 [^:]*:42: Error: syntax error -- `vhaddeq.s8 q0,q1,q2'
55 [^:]*:43: Error: vector predicated instruction should be in VPT/VPST block -- `vhaddt.s8 q0,q1,q2'
56 [^:]*:45: Error: instruction missing MVE vector predication code -- `vhadd.s8 q0,q1,q2'
57 [^:]*:47: Error: syntax error -- `vhsubeq.s8 q0,q1,r2'
58 [^:]*:48: Error: syntax error -- `vhsubeq.s8 q0,q1,r2'
59 [^:]*:50: Error: syntax error -- `vhsubeq.s8 q0,q1,r2'
60 [^:]*:51: Error: vector predicated instruction should be in VPT/VPST block -- `vhsubt.s8 q0,q1,r2'
61 [^:]*:53: Error: instruction missing MVE vector predication code -- `vhsub.s8 q0,q1,r2'
62 [^:]*:55: Error: syntax error -- `vhsubeq.s8 q0,q1,q2'
63 [^:]*:56: Error: syntax error -- `vhsubeq.s8 q0,q1,q2'
64 [^:]*:58: Error: syntax error -- `vhsubeq.s8 q0,q1,q2'
65 [^:]*:59: Error: vector predicated instruction should be in VPT/VPST block -- `vhsubt.s8 q0,q1,q2'
66 [^:]*:61: Error: instruction missing MVE vector predication code -- `vhsub.s8 q0,q1,q2'
67 [^:]*:63: Error: syntax error -- `vrhaddeq.s8 q0,q1,q2'
68 [^:]*:64: Error: syntax error -- `vrhaddeq.s8 q0,q1,q2'
69 [^:]*:66: Error: syntax error -- `vrhaddeq.s8 q0,q1,q2'
70 [^:]*:67: Error: vector predicated instruction should be in VPT/VPST block -- `vrhaddt.s8 q0,q1,q2'
71 [^:]*:69: Error: instruction missing MVE vector predication code -- `vrhadd.s8 q0,q1,q2'
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