7 .macro vlxr regtype const
8 .irp regindex, 0, 14, 28, 31
9 vldr \regtype\regindex, \const
12 # Thumb-2 support vldr literal pool also.
38 vlxr d "=0xff00000000000000"
40 vlxr d "=0x0fff000000000000"
44 vlxr d "=0x00ff00000000000"
45 vlxr d "=0xff00ffff0000000"
46 vlxr d "=0xff00ffff0000000"
49 # pool should be aligned to 8-byte.
51 vldr d1, =0x0000fff000000000
54 # no error when code is align already.
57 vldr d1, =0x0000fff000000000
61 vldr d1, =0x0000fff000000000
64 vldr d3, =0x0000fff000000001
65 # reuse padding slot A
68 vldr d5, =0x0000fff000000001
70 vldr d6, =0x0000fff000000002
72 vldr d7, =0x0000fff000000003
76 vldr d9, =0x0000fff000000004
77 # reuse padding slot B
80 vldr d11, =0x0000fff000000005
85 # reuse value of s4 in pool
87 # reuse high part of d1 in pool
89 # 8-byte entry reuse two 4-byte entries.
91 vldr d16, =0xff000005ff000004
92 # d17 should not reuse high part of d11 and s12.
93 # because the it's align 8-byte aligned.
94 vldr d17, =0xff0000040000fff0