5 encode_thumb32_immediate:
6 orr r0, r1, #0x00000000
7 orr r0, r1, #0x000000a5
8 orr r0, r1, #0x00a500a5
9 orr r0, r1, #0xa500a500
10 orr r0, r1, #0xa5a5a5a5
12 orr r0, r1, #0xa5 << 31
13 orr r0, r1, #0xa5 << 30
14 orr r0, r1, #0xa5 << 29
15 orr r0, r1, #0xa5 << 28
16 orr r0, r1, #0xa5 << 27
17 orr r0, r1, #0xa5 << 26
18 orr r0, r1, #0xa5 << 25
19 orr r0, r1, #0xa5 << 24
20 orr r0, r1, #0xa5 << 23
21 orr r0, r1, #0xa5 << 22
22 orr r0, r1, #0xa5 << 21
23 orr r0, r1, #0xa5 << 20
24 orr r0, r1, #0xa5 << 19
25 orr r0, r1, #0xa5 << 18
26 orr r0, r1, #0xa5 << 17
27 orr r0, r1, #0xa5 << 16
28 orr r0, r1, #0xa5 << 15
29 orr r0, r1, #0xa5 << 14
30 orr r0, r1, #0xa5 << 13
31 orr r0, r1, #0xa5 << 12
32 orr r0, r1, #0xa5 << 11
33 orr r0, r1, #0xa5 << 10
34 orr r0, r1, #0xa5 << 9
35 orr r0, r1, #0xa5 << 8
36 orr r0, r1, #0xa5 << 7
37 orr r0, r1, #0xa5 << 6
38 orr r0, r1, #0xa5 << 5
39 orr r0, r1, #0xa5 << 4
40 orr r0, r1, #0xa5 << 3
41 orr r0, r1, #0xa5 << 2
42 orr r0, r1, #0xa5 << 1
45 @ Should be format 1, Some have equivalent format 2 encodings
51 adds r0, #129 @ format 2
55 adds r0, r0, r0 @ format 3
65 add r8, r0, r0 @ ... not this one
70 add r0, pc, #0 @ format 5
74 add r0, sp, #0 @ format 6
82 add.w r0, r0, #0 @ T32 format 1
92 add.w r0, r0, r0 @ T32 format 2
99 add.w r8, r9, r10, lsl #17
100 add.w r8, r8, r10, lsr #32
101 add.w r8, r8, r10, lsr #17
102 add.w r8, r9, r10, asr #32
103 add.w r8, r9, r10, asr #17
104 add.w r8, r9, r10, rrx
105 add.w r8, r9, r10, ror #17
107 subs r0, r0, #0 @ format 1
115 subs r0, r0, r0 @ format 3
120 sub sp, #260 @ format 4
123 subs r8, r0 @ T32 format 2
125 subs r0, #260 @ T32 format 1
127 subs r5, r3, #0x10000
133 .macro arit3 op ops opw opsw
145 \opw r0, r1, r2, asr #17
149 arit3 adc adcs adc.w adcs.w
150 arit3 and ands and.w ands.w
151 arit3 bic bics bic.w bics.w
152 arit3 eor eors eor.w eors.w
153 arit3 orr orrs orr.w orrs.w
154 arit3 rsb rsbs rsb.w rsbs.w
155 arit3 sbc sbcs sbc.w sbcs.w
207 @ bl, blx have no short form.
288 .macro nop1 cond ncond a
299 .macro it1 cond ncond a m=
303 .macro it2 cond ncond a b m=
304 it1 \cond \ncond \a \b\m
307 .macro it3 cond ncond a b c
308 it2 \cond \ncond \a \b \c
376 ldrd r2, [r5, #-0x30]
379 strd r2, [r5, #-0x30]
382 ldrbt r1, [r5, #0x30]
384 ldrsbt r1, [r5, #0x30]
386 ldrht r1, [r5, #0x30]
388 ldrsht r1, [r5, #0x30]
401 strexd r1, r2, r3, [r4]
404 strex r1, r2, [r4,#516]
407 ldmia r0!, {r1,r2,r3}
409 ldmia.w r2, {r0,r1,r2}
411 ldmia r0, {r7,r8,r10}
412 ldmia r0!, {r7,r8,r10}
414 stmia r0!, {r1,r2,r3}
415 stmia r2!, {r0,r1,r3}
416 stmia.w r2!, {r0,r1,r3}
418 stmia r0, {r7,r8,r10}
419 stmia r0!, {r7,r8,r10}
421 ldmdb r0, {r7,r8,r10}
422 stmdb r0, {r7,r8,r10}
432 tst_teq_cmp_cmn_mov_mvn:
433 .macro mt op ops opw opsw
446 mt tst tsts tst.w tsts.w
447 mt teq teqs teq.w teqs.w
448 mt cmp cmps cmp.w cmps.w
449 mt cmn cmns cmn.w cmns.w
450 mt mov movs mov.w movs.w
451 mt mvn mvns mvn.w mvns.w
515 pkhbt r0, r0, r0, lsl #0x14
516 pkhbt r0, r0, r0, lsl #3
518 pkhtb r1, r2, r3, asr #0x11
525 push {r8,r9,r10,r11,r12}
526 pop {r8,r9,r10,r11,r12}
601 .macro sh op ops opw opsw
602 \ops r0, #17 @ 16-bit format 1
606 \ops r0, r0 @ 16-bit format 2
609 \op r9, #17 @ 32-bit format 1
613 \opw r0, r0, r0 @ 32-bit format 2
621 sh lsl lsls lsl.w lsls.w
622 sh lsr lsrs lsr.w lsrs.w
623 sh asr asrs asr.w asrs.w
624 sh ror rors ror.w rors.w
633 smlabb r0, r0, r0, r0
634 smlabb r9, r0, r0, r0
635 smlabb r0, r9, r0, r0
636 smlabb r0, r0, r9, r0
637 smlabb r0, r0, r0, r9
639 smlatb r0, r0, r0, r0
640 smlabt r0, r0, r0, r0
641 smlatt r0, r0, r0, r0
642 smlawb r0, r0, r0, r0
643 smlawt r0, r0, r0, r0
645 smladx r0, r0, r0, r0
647 smlsdx r0, r0, r0, r0
649 smmlar r0, r0, r0, r0
651 smmlsr r0, r0, r0, r0
652 usada8 r0, r0, r0, r0
655 smlalbb r0, r0, r0, r0
656 smlalbb r9, r0, r0, r0
657 smlalbb r0, r9, r0, r0
658 smlalbb r0, r0, r9, r0
659 smlalbb r0, r0, r0, r9
661 smlaltb r0, r0, r0, r0
662 smlalbt r0, r0, r0, r0
663 smlaltt r0, r0, r0, r0
664 smlald r0, r0, r0, r0
665 smlaldx r0, r0, r0, r0
666 smlsld r0, r0, r0, r0
667 smlsldx r0, r0, r0, r0
691 ssat r0, #1, r0, lsl #0
692 ssat r0, #1, r0, asr #0
696 ssat r0, #1, r0, lsl #0x1c
697 ssat r0, #1, r0, asr #0x03
705 usat r0, #0, r0, lsl #0
706 usat r0, #0, r0, asr #0
710 usat r0, #0, r0, lsl #0x1c
711 usat r0, #0, r0, asr #0x03
741 sxtab r0, r0, r0, ror #0
742 sxtab r9, r0, r0, ror #8
743 sxtab r0, r9, r0, ror #16
744 sxtab r0, r0, r9, ror #24
755 \op r1, [pc, #-0x2aa]
756 \op r1, [pc, #-0x155]
775 ldmdb r0!, {r7,r8,r10}
776 stmdb r0!, {r7,r8,r10}
800 ldrd r2, r4, [r9, #48]!
801 ldrd r2, r4, [r9, #-48]!
802 strd r2, r4, [r9, #48]!
803 strd r2, r4, [r9, #-48]!
804 ldrd r2, r4, [r9], #48
805 ldrd r2, r4, [r9], #-48
806 strd r2, r4, [r9], #48
807 strd r2, r4, [r9], #-48
810 ldr\op r1, [r5, #0x301]
811 ldr\op r1, [r5, #0x30]!
812 ldr\op r1, [r5, #-0x30]!
813 ldr\op r1, [r5], #0x30
814 ldr\op r1, [r5], #-0x30
822 .macro movshift op s="s"