Add script to build and test GDB using enable-targets=all.
[deliverable/binutils-gdb.git] / gas / testsuite / gas / ia64 / dv-waw-err.s
1 //
2 // Detect WAW violations. Cases taken from DV tables.
3 //
4 .text
5 .explicit
6 // AR[BSP]
7 mov ar.bsp = r0
8 mov ar.bsp = r1
9 ;;
10 // AR[BSPSTORE]
11 mov ar.bspstore = r2
12 mov ar.bspstore = r3
13 ;;
14
15 // AR[CCV]
16 mov ar.ccv = r4
17 mov ar.ccv = r4
18 ;;
19
20 // AR[EC]
21 br.wtop.sptk L
22 mov ar.ec = r0
23 ;;
24
25 // AR[FPSR].sf0.controls
26 mov ar.fpsr = r0
27 fsetc.s0 0x7f, 0x0f
28 ;;
29
30 // AR[FPSR].sf1.controls
31 mov ar.fpsr = r0
32 fsetc.s1 0x7f, 0x0f
33 ;;
34
35 // AR[FPSR].sf2.controls
36 mov ar.fpsr = r0
37 fsetc.s2 0x7f, 0x0f
38 ;;
39
40 // AR[FPSR].sf3.controls
41 mov ar.fpsr = r0
42 fsetc.s3 0x7f, 0x0f
43 ;;
44
45 // AR[FPSR].sf0.flags
46 fcmp.eq.s0 p1, p2 = f3, f4
47 fcmp.eq.s0 p3, p4 = f3, f4 // no DV here
48 ;;
49 fcmp.eq.s0 p1, p2 = f3, f4
50 fclrf.s0
51 ;;
52
53 // AR[FPSR].sf1.flags
54 fcmp.eq.s1 p1, p2 = f3, f4
55 fcmp.eq.s1 p3, p4 = f3, f4 // no DV here
56 ;;
57 fcmp.eq.s1 p1, p2 = f3, f4
58 fclrf.s1
59 ;;
60
61 // AR[FPSR].sf2.flags
62 fcmp.eq.s2 p1, p2 = f3, f4
63 fcmp.eq.s2 p3, p4 = f3, f4 // no DV here
64 ;;
65 fcmp.eq.s2 p1, p2 = f3, f4
66 fclrf.s2
67 ;;
68
69 // AR[FPSR].sf3.flags
70 fcmp.eq.s3 p1, p2 = f3, f4
71 fcmp.eq.s3 p3, p4 = f3, f4 // no DV here
72 ;;
73 fcmp.eq.s3 p1, p2 = f3, f4
74 fclrf.s3
75 ;;
76
77 // AR[FPSR].traps/rv plus all controls/flags
78 mov ar.fpsr = r0
79 mov ar.fpsr = r0
80 ;;
81
82 // AR[ITC]
83 mov ar.itc = r1
84 mov ar.itc = r1
85 ;;
86
87 // AR[RUC]
88 mov ar.ruc = r1
89 mov ar.ruc = r1
90 ;;
91
92 // AR[K]
93 mov ar.k2 = r3
94 mov ar.k2 = r3
95 ;;
96
97 // AR[LC]
98 br.cloop.sptk L
99 mov ar.lc = r0
100 ;;
101
102 // AR[PFS]
103 mov ar.pfs = r0
104 br.call.sptk b0 = L
105 ;;
106
107 // AR[RNAT] (see also AR[BSPSTORE])
108 mov ar.rnat = r8
109 mov ar.rnat = r8
110 ;;
111
112 // AR[RSC]
113 mov ar.rsc = r10
114 mov ar.rsc = r10
115 ;;
116
117 // AR[UNAT]
118 mov ar.unat = r12
119 st8.spill [r0] = r1
120 ;;
121
122 // AR%
123 mov ar48 = r0
124 mov ar48 = r0
125 ;;
126
127 // BR%
128 mov b1 = r0
129 mov b1 = r1
130 ;;
131
132 // CFM (and others)
133 br.wtop.sptk L
134 br.wtop.sptk L
135 ;;
136
137 // CR[CMCV]
138 mov cr.cmcv = r1
139 mov cr.cmcv = r2
140 ;;
141
142 // CR[DCR]
143 mov cr.dcr = r3
144 mov cr.dcr = r3
145 ;;
146
147 // CR[EOI] (and InService)
148 mov cr.eoi = r0
149 mov cr.eoi = r0
150 ;;
151 srlz.d
152
153 // CR[GPTA]
154 mov cr.gpta = r6
155 mov cr.gpta = r7
156 ;;
157
158 // CR[IFA]
159 mov cr.ifa = r9
160 mov cr.ifa = r10
161 ;;
162
163 // CR[IFS]
164 mov cr.ifs = r11
165 cover
166 ;;
167
168 // CR[IHA]
169 mov cr.iha = r13
170 mov cr.iha = r14
171 ;;
172
173 // CR[IIM]
174 mov cr.iim = r15
175 mov cr.iim = r16
176 ;;
177
178 // CR[IIP]
179 mov cr.iip = r17
180 mov cr.iip = r17
181 ;;
182
183 // CR[IIPA]
184 mov cr.iipa = r19
185 mov cr.iipa = r20
186 ;;
187
188 // CR[IPSR]
189 mov cr.ipsr = r21
190 mov cr.ipsr = r22
191 ;;
192
193 // CR[IRR%] (and others)
194 mov r2 = cr.ivr
195 mov r3 = cr.ivr
196 ;;
197
198 // CR[ISR]
199 mov cr.isr = r24
200 mov cr.isr = r25
201 ;;
202
203 // CR[ITIR]
204 mov cr.itir = r26
205 mov cr.itir = r27
206 ;;
207
208 // CR[ITM]
209 mov cr.itm = r28
210 mov cr.itm = r29
211 ;;
212
213 // CR[ITV]
214 mov cr.itv = r0
215 mov cr.itv = r1
216 ;;
217
218 // CR[IVA]
219 mov cr.iva = r0
220 mov cr.iva = r1
221 ;;
222
223 // CR[IVR] (no explicit writers)
224
225 // CR[LID]
226 mov cr.lid = r0
227 mov cr.lid = r1
228 ;;
229
230 // CR[LRR%]
231 mov cr.lrr0 = r0
232 mov cr.lrr1 = r0 // no DV here
233 ;;
234 mov cr.lrr0 = r0
235 mov cr.lrr0 = r0
236 ;;
237
238 // CR[PMV]
239 mov cr.pmv = r0
240 mov cr.pmv = r1
241 ;;
242
243 // CR[PTA]
244 mov cr.pta = r0
245 mov cr.pta = r1
246 ;;
247
248 // CR[TPR]
249 mov cr.tpr = r0
250 mov cr.tpr = r1
251 ;;
252
253 // DBR#
254 mov dbr[r1] = r1
255 mov dbr[r1] = r2
256 ;;
257 srlz.d
258
259 // DTC
260 ptc.e r0
261 ptc.e r1 // no DVs here
262 ;;
263 ptc.e r0 // (and others)
264 itc.i r0
265 ;;
266 srlz.d
267
268 // DTC_LIMIT
269 ptc.g r0, r1 // NOTE: GAS automatically emits stops after
270 ptc.ga r2, r3 // ptc.g/ptc.ga, so this conflict is no
271 ;; // longer possible in GAS-generated assembly
272 srlz.d
273
274 // DTR
275 itr.d dtr[r0] = r1 // (and others)
276 ptr.d r2, r3
277 ;;
278 srlz.d
279
280 // FR%
281 mov f3 = f2
282 ldfs.c.clr f3 = [r1]
283 ;;
284
285 // GR%
286 mov r2 = r0
287 ld8.c.clr r2 = [r1]
288 ;;
289
290 // IBR#
291 mov ibr[r0] = r2
292 mov ibr[r1] = r2
293 ;;
294
295 // InService
296 mov cr.eoi = r0
297 mov r1 = cr.ivr
298 ;;
299 srlz.d
300
301 // ITC
302 ptc.e r0
303 itc.i r1
304 ;;
305 srlz.i
306 ;;
307
308 // ITR
309 itr.i itr[r0] = r1
310 ptr.i r2, r3
311 ;;
312 srlz.i
313 ;;
314
315 // PKR#
316 .reg.val r1, 0x1
317 .reg.val r2, ~0x1
318 mov pkr[r1] = r1
319 mov pkr[r2] = r1 // no DV here
320 ;;
321 mov pkr[r1] = r1
322 mov pkr[r1] = r1
323 ;;
324
325 // PMC#
326 mov pmc[r3] = r1
327 mov pmc[r4] = r1
328 ;;
329
330 // PMD#
331 mov pmd[r3] = r1
332 mov pmd[r4] = r1
333 ;;
334
335 // PR%, 1 - 15
336 cmp.eq p1, p0 = r0, r1
337 cmp.eq p1, p0 = r2, r3
338 ;;
339 fcmp.eq p1, p2 = f2, f3
340 fcmp.eq p1, p3 = f2, f3
341 ;;
342 cmp.eq.and p1, p2 = r0, r1
343 cmp.eq.or p1, p3 = r2, r3
344 ;;
345 cmp.eq.or p1, p3 = r2, r3
346 cmp.eq.and p1, p2 = r0, r1
347 ;;
348 cmp.eq.and p1, p2 = r0, r1
349 cmp.eq.and p1, p3 = r2, r3 // no DV here
350 ;;
351 cmp.eq.or p1, p2 = r0, r1
352 cmp.eq.or p1, p3 = r2, r3 // no DV here
353 ;;
354
355 // PR63
356 br.wtop.sptk L
357 br.wtop.sptk L
358 ;;
359 cmp.eq p63, p0 = r0, r1
360 cmp.eq p63, p0 = r2, r3
361 ;;
362 fcmp.eq p63, p2 = f2, f3
363 fcmp.eq p63, p3 = f2, f3
364 ;;
365 cmp.eq.and p63, p2 = r0, r1
366 cmp.eq.or p63, p3 = r2, r3
367 ;;
368 cmp.eq.or p63, p3 = r2, r3
369 cmp.eq.and p63, p2 = r0, r1
370 ;;
371 cmp.eq.and p63, p2 = r0, r1
372 cmp.eq.and p63, p3 = r2, r3 // no DV here
373 ;;
374 cmp.eq.or p63, p2 = r0, r1
375 cmp.eq.or p63, p3 = r2, r3 // no DV here
376 ;;
377
378 // PSR.ac
379 rum (1<<3)
380 rum (1<<3)
381 ;;
382
383 // PSR.be
384 rum (1<<1)
385 rum (1<<1)
386 ;;
387
388 // PSR.bn
389 bsw.0 // GAS automatically emits a stop after bsw.n
390 bsw.0 // so this conflict is avoided
391 ;;
392
393 // PSR.cpl
394 epc
395 br.ret.sptk b0
396 ;;
397
398 // PSR.da (rfi is the only writer)
399 // PSR.db (and others)
400 mov psr.l = r0
401 mov psr.l = r1
402 ;;
403 srlz.d
404
405 // PSR.dd (rfi is the only writer)
406
407 // PSR.dfh
408 ssm (1<<19)
409 ssm (1<<19)
410 ;;
411 srlz.d
412
413 // PSR.dfl
414 ssm (1<<18)
415 ssm (1<<18)
416 ;;
417 srlz.d
418
419 // PSR.di
420 rsm (1<<22)
421 rsm (1<<22)
422 ;;
423
424 // PSR.dt
425 rsm (1<<17)
426 rsm (1<<17)
427 ;;
428
429 // PSR.ed (rfi is the only writer)
430 // PSR.i
431 ssm (1<<14)
432 ssm (1<<14)
433 ;;
434
435 // PSR.ia (no DV semantics)
436 // PSR.ic
437 ssm (1<<13)
438 ssm (1<<13)
439 ;;
440
441 // PSR.id (rfi is the only writer)
442 // PSR.is (br.ia and rfi are the only writers)
443 // PSR.it (rfi is the only writer)
444 // PSR.lp (see PSR.db)
445
446 // PSR.mc (rfi is the only writer)
447 // PSR.mfh
448 mov f32 = f33
449 mov r10 = psr
450 ;;
451 ssm (1<<5)
452 ssm (1<<5)
453 ;;
454 ssm (1<<5)
455 mov psr.um = r10
456 ;;
457 rum (1<<5)
458 rum (1<<5)
459 ;;
460 mov f32 = f33
461 mov f34 = f35 // no DV here
462 ;;
463
464 // PSR.mfl
465 mov f2 = f3
466 mov r10 = psr
467 ;;
468 ssm (1<<4)
469 ssm (1<<4)
470 ;;
471 ssm (1<<4)
472 mov psr.um = r10
473 ;;
474 rum (1<<4)
475 rum (1<<4)
476 ;;
477 mov f2 = f3
478 mov f4 = f5 // no DV here
479 ;;
480
481 // PSR.pk
482 rsm (1<<15)
483 rsm (1<<15)
484 ;;
485
486 // PSR.pp
487 rsm (1<<21)
488 rsm (1<<21)
489 ;;
490
491 // PSR.ri (no DV semantics)
492 // PSR.rt (see PSR.db)
493
494 // PSR.si
495 rsm (1<<23)
496 ssm (1<<23)
497 ;;
498
499 // PSR.sp
500 ssm (1<<20)
501 rsm (1<<20)
502 ;;
503 srlz.d
504
505 // PSR.ss (rfi is the only writer)
506 // PSR.tb (see PSR.db)
507
508 // PSR.up
509 rsm (1<<2)
510 rsm (1<<2)
511 ;;
512 rum (1<<2)
513 mov psr.um = r0
514 ;;
515
516 // RR#
517 mov rr[r2] = r1
518 mov rr[r2] = r3
519 ;;
520
521 // PR, additional cases (or.andcm and and.orcm interaction)
522 cmp.eq.or.andcm p6, p7 = 1, r32
523 cmp.eq.or.andcm p6, p7 = 5, r36 // no DV here
524 ;;
525 cmp.eq.and.orcm p6, p7 = 1, r32
526 cmp.eq.and.orcm p6, p7 = 5, r36 // no DV here
527 ;;
528 cmp.eq.or.andcm p63, p7 = 1, r32
529 cmp.eq.or.andcm p63, p7 = 5, r36 // no DV here
530 ;;
531 cmp.eq.or.andcm p6, p63 = 1, r32
532 cmp.eq.or.andcm p6, p63 = 5, r36 // no DV here
533 ;;
534 cmp.eq.and.orcm p63, p7 = 1, r32
535 cmp.eq.and.orcm p63, p7 = 5, r36 // no DV here
536 ;;
537 cmp.eq.and.orcm p6, p63 = 1, r32
538 cmp.eq.and.orcm p6, p63 = 5, r36 // no DV here
539 ;;
540 cmp.eq.or.andcm p6, p7 = 1, r32
541 cmp.eq.and.orcm p6, p7 = 5, r36
542 ;;
543 cmp.eq.or.andcm p63, p7 = 1, r32
544 cmp.eq.and.orcm p63, p7 = 5, r36
545 ;;
546 cmp.eq.or.andcm p6, p63 = 1, r32
547 cmp.eq.and.orcm p6, p63 = 5, r36
548 ;;
549
550 // PR%, 16 - 62
551 cmp.eq p21, p0 = r0, r1
552 cmp.eq p21, p0 = r2, r3
553 ;;
554 fcmp.eq p21, p22 = f2, f3
555 fcmp.eq p21, p23 = f2, f3
556 ;;
557 cmp.eq.and p21, p22 = r0, r1
558 cmp.eq.or p21, p23 = r2, r3
559 ;;
560 cmp.eq.or p21, p23 = r2, r3
561 cmp.eq.and p21, p22 = r0, r1
562 ;;
563 cmp.eq.and p21, p22 = r0, r1
564 cmp.eq.and p21, p23 = r2, r3 // no DV here
565 ;;
566 cmp.eq.or p21, p22 = r0, r1
567 cmp.eq.or p21, p23 = r2, r3 // no DV here
568 ;;
569
570 // RSE
571
572 L:
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