2 // Detect WAW violations. Cases taken from DV tables.
25 // AR[FPSR].sf0.controls
30 // AR[FPSR].sf1.controls
35 // AR[FPSR].sf2.controls
40 // AR[FPSR].sf3.controls
46 fcmp.eq.s0 p1, p2 = f3, f4
47 fcmp.eq.s0 p3, p4 = f3, f4 // no DV here
49 fcmp.eq.s0 p1, p2 = f3, f4
54 fcmp.eq.s1 p1, p2 = f3, f4
55 fcmp.eq.s1 p3, p4 = f3, f4 // no DV here
57 fcmp.eq.s1 p1, p2 = f3, f4
62 fcmp.eq.s2 p1, p2 = f3, f4
63 fcmp.eq.s2 p3, p4 = f3, f4 // no DV here
65 fcmp.eq.s2 p1, p2 = f3, f4
70 fcmp.eq.s3 p1, p2 = f3, f4
71 fcmp.eq.s3 p3, p4 = f3, f4 // no DV here
73 fcmp.eq.s3 p1, p2 = f3, f4
77 // AR[FPSR].traps/rv plus all controls/flags
107 // AR[RNAT] (see also AR[BSPSTORE])
147 // CR[EOI] (and InService)
193 // CR[IRR%] (and others)
223 // CR[IVR] (no explicit writers)
232 mov cr.lrr1 = r0 // no DV here
261 ptc.e r1 // no DVs here
263 ptc.e r0 // (and others)
269 ptc.g r0, r1 // NOTE: GAS automatically emits stops after
270 ptc.ga r2, r3 // ptc.g/ptc.ga, so this conflict is no
271 ;; // longer possible in GAS-generated assembly
275 itr.d dtr[r0] = r1 // (and others)
319 mov pkr[r2] = r1 // no DV here
336 cmp.eq p1, p0 = r0, r1
337 cmp.eq p1, p0 = r2, r3
339 fcmp.eq p1, p2 = f2, f3
340 fcmp.eq p1, p3 = f2, f3
342 cmp.eq.and p1, p2 = r0, r1
343 cmp.eq.or p1, p3 = r2, r3
345 cmp.eq.or p1, p3 = r2, r3
346 cmp.eq.and p1, p2 = r0, r1
348 cmp.eq.and p1, p2 = r0, r1
349 cmp.eq.and p1, p3 = r2, r3 // no DV here
351 cmp.eq.or p1, p2 = r0, r1
352 cmp.eq.or p1, p3 = r2, r3 // no DV here
359 cmp.eq p63, p0 = r0, r1
360 cmp.eq p63, p0 = r2, r3
362 fcmp.eq p63, p2 = f2, f3
363 fcmp.eq p63, p3 = f2, f3
365 cmp.eq.and p63, p2 = r0, r1
366 cmp.eq.or p63, p3 = r2, r3
368 cmp.eq.or p63, p3 = r2, r3
369 cmp.eq.and p63, p2 = r0, r1
371 cmp.eq.and p63, p2 = r0, r1
372 cmp.eq.and p63, p3 = r2, r3 // no DV here
374 cmp.eq.or p63, p2 = r0, r1
375 cmp.eq.or p63, p3 = r2, r3 // no DV here
389 bsw.0 // GAS automatically emits a stop after bsw.n
390 bsw.0 // so this conflict is avoided
398 // PSR.da (rfi is the only writer)
399 // PSR.db (and others)
405 // PSR.dd (rfi is the only writer)
429 // PSR.ed (rfi is the only writer)
435 // PSR.ia (no DV semantics)
441 // PSR.id (rfi is the only writer)
442 // PSR.is (br.ia and rfi are the only writers)
443 // PSR.it (rfi is the only writer)
444 // PSR.lp (see PSR.db)
446 // PSR.mc (rfi is the only writer)
461 mov f34 = f35 // no DV here
478 mov f4 = f5 // no DV here
491 // PSR.ri (no DV semantics)
492 // PSR.rt (see PSR.db)
505 // PSR.ss (rfi is the only writer)
506 // PSR.tb (see PSR.db)
521 // PR, additional cases (or.andcm and and.orcm interaction)
522 cmp.eq.or.andcm p6, p7 = 1, r32
523 cmp.eq.or.andcm p6, p7 = 5, r36 // no DV here
525 cmp.eq.and.orcm p6, p7 = 1, r32
526 cmp.eq.and.orcm p6, p7 = 5, r36 // no DV here
528 cmp.eq.or.andcm p63, p7 = 1, r32
529 cmp.eq.or.andcm p63, p7 = 5, r36 // no DV here
531 cmp.eq.or.andcm p6, p63 = 1, r32
532 cmp.eq.or.andcm p6, p63 = 5, r36 // no DV here
534 cmp.eq.and.orcm p63, p7 = 1, r32
535 cmp.eq.and.orcm p63, p7 = 5, r36 // no DV here
537 cmp.eq.and.orcm p6, p63 = 1, r32
538 cmp.eq.and.orcm p6, p63 = 5, r36 // no DV here
540 cmp.eq.or.andcm p6, p7 = 1, r32
541 cmp.eq.and.orcm p6, p7 = 5, r36
543 cmp.eq.or.andcm p63, p7 = 1, r32
544 cmp.eq.and.orcm p63, p7 = 5, r36
546 cmp.eq.or.andcm p6, p63 = 1, r32
547 cmp.eq.and.orcm p6, p63 = 5, r36
551 cmp.eq p21, p0 = r0, r1
552 cmp.eq p21, p0 = r2, r3
554 fcmp.eq p21, p22 = f2, f3
555 fcmp.eq p21, p23 = f2, f3
557 cmp.eq.and p21, p22 = r0, r1
558 cmp.eq.or p21, p23 = r2, r3
560 cmp.eq.or p21, p23 = r2, r3
561 cmp.eq.and p21, p22 = r0, r1
563 cmp.eq.and p21, p22 = r0, r1
564 cmp.eq.and p21, p23 = r2, r3 // no DV here
566 cmp.eq.or p21, p22 = r0, r1
567 cmp.eq.or p21, p23 = r2, r3 // no DV here