gas/testsuite/gas/m32r/m32rx.d

   1 #as: -m32rx --no-warn-explicit-parallel-conflicts --hidden
   2 #objdump: -dr
   3 #name: m32rx
   4
   5 .*: +file format .*
   6
   7 Disassembly of section .text:
   8
   9 00000000 <bcl>:
  10    0:   78 00 f0 00     bcl 0 <bcl> || nop
  11
  12 00000004 <bncl>:
  13    4:   79 ff f0 00     bncl 0 <bcl> || nop
  14
  15 00000008 <cmpz>:
  16    8:   00 7d f0 00     cmpz fp || nop
  17
  18 0000000c <cmpeq>:
  19    c:   0d 6d f0 00     cmpeq fp,fp || nop
  20
  21 00000010 <maclh1>:
  22   10:   5d cd f0 00     maclh1 fp,fp || nop
  23
  24 00000014 <msblo>:
  25   14:   5d dd f0 00     msblo fp,fp || nop
  26
  27 00000018 <mulwu1>:
  28   18:   5d ad f0 00     mulwu1 fp,fp || nop
  29
  30 0000001c <macwu1>:
  31   1c:   5d bd f0 00     macwu1 fp,fp || nop
  32
  33 00000020 <sadd>:
  34   20:   50 e4 f0 00     sadd || nop
  35
  36 00000024 <satb>:
  37   24:   8d 6d 03 00     satb fp,fp
  38
  39 00000028 <mulhi>:
  40   28:   3d 8d f0 00     mulhi fp, fp, a1 || nop
  41
  42 0000002c <mullo>:
  43   2c:   3d 1d f0 00     mullo fp,fp || nop
  44
  45 00000030 <divh>:
  46   30:   9d 0d f0 00     divh fp, fp || nop
  47
  48 00000034 <machi>:
  49   34:   3d cd f0 00     machi fp, fp, a1 || nop
  50
  51 00000038 <maclo>:
  52   38:   3d 5d f0 00     maclo fp, fp || nop
  53
  54 0000003c <mvfachi>:
  55   3c:   5d f4 f0 00     mvfachi fp,a1 || nop
  56
  57 00000040 <mvfacmi>:
  58   40:   5d f6 f0 00     mvfacmi fp || nop
  59
  60 00000044 <mvfaclo>:
  61   44:   5d f5 f0 00     mvfaclo fp || nop
  62
  63 00000048 <mvtachi>:
  64   48:   5d f0 f0 00     mvfachi fp || nop
  65
  66 0000004c <mvtaclo>:
  67   4c:   5d 71 f0 00     mvtaclo fp || nop
  68
  69 00000050 <rac>:
  70   50:   54 90 f0 00     rac a1 || nop
  71
  72 00000054 <rac_ds>:
  73   54:   54 90 f0 00     rac a1, a0 || nop
  74
  75 00000058 <rac_dsi>:
  76   58:   50 94 f0 00     rac a0, a1, #1 || nop
  77
  78 0000005c <rach>:
  79   5c:   54 80 f0 00     rach a1 || nop
  80
  81 00000060 <rach_ds>:
  82   60:   50 84 f0 00     rach a0, a1 || nop
  83
  84 00000064 <rach_dsi>:
  85   64:   54 81 f0 00     rach a1, a0, #2 || nop
  86
  87 00000068 <bc__add>:
  88   68:   7c e6 8d ad     bc 0 <bcl> || add fp,fp
  89   6c:   7c e5 0d ad     bc 0 <bcl> -> add fp,fp
  90
  91 00000070 <bcl__addi>:
  92   70:   78 e4 cd 4d     bcl 0 <bcl> || addi fp,#77
  93   74:   78 e3 cd 4d     bcl 0 <bcl> || addi fp,#77
  94
  95 00000078 <bl__addv>:
  96   78:   7e e2 8d 8d     bl 0 <bcl> || addv fp,fp
  97   7c:   7e e1 8d 8d     bl 0 <bcl> || addv fp,fp
  98
  99 00000080 <bnc__addx>:
 100   80:   7d e0 8d 9d     bnc 0 <bnc> || addx fp,fp
 101   84:   7d df 0d 9d     bnc 0 <bcl> -> addx fp,fp
 102
 103 00000088 <bncl__and>:
 104   88:   79 de 8d cd     bncl 0 <bcl> || and fp,fp
 105   8c:   79 dd 0d cd     bncl 0 <bcl> -> and fp,fp
 106
 107 00000090 <bra__cmp>:
 108   90:   7f dc 8d 4d     bra 0 <bcl> || cmp fp,fp
 109   94:   7f db 8d 4d     bra 0 <bcl> || cmp fp,fp
 110
 111 00000098 <jl__cmpeq>:
 112   98:   1e cd 8d 6d     jl fp || cmpeq fp,fp
 113   9c:   1e cd 8d 6d     jl fp || cmpeq fp,fp
 114
 115 000000a0 <jmp__cmpu>:
 116   a0:   1f cd 8d 5d     jmp fp || cmpu fp,fp
 117   a4:   1f cd 8d 5d     jmp fp || cmpu fp,fp
 118
 119 000000a8 <ld__cmpz>:
 120   a8:   2d cd 80 71     ld fp,@fp || cmpz r1
 121   ac:   2d cd 80 71     ld fp,@fp || cmpz r1
 122
 123 000000b0 <ld__ldi>:
 124   b0:   2d e1 e2 4d     ld fp,@r1\+ || ldi r2,#77
 125   b4:   2d e1 e2 4d     ld fp,@r1\+ || ldi r2,#77
 126
 127 000000b8 <ldb__mv>:
 128   b8:   2d 8d 92 8d     ldb fp,@fp || mv r2,fp
 129   bc:   2d 8d 12 8d     ldb fp,@fp -> mv r2,fp
 130
 131 000000c0 <ldh__neg>:
 132   c0:   2d ad 82 3d     ldh fp,@fp || neg r2,fp
 133   c4:   2d ad 02 3d     ldh fp,@fp -> neg r2,fp
 134
 135 000000c8 <ldub__nop>:
 136   c8:   2d 9d f0 00     ldub fp,@fp || nop
 137   cc:   2d 9d f0 00     ldub fp,@fp || nop
 138
 139 000000d0 <lduh__not>:
 140   d0:   2d bd 82 bd     lduh fp,@fp || not r2,fp
 141   d4:   2d bd 02 bd     lduh fp,@fp -> not r2,fp
 142
 143 000000d8 <lock__or>:
 144   d8:   2d dd 82 ed     lock fp,@fp || or r2,fp
 145   dc:   2d dd 02 ed     lock fp,@fp -> or r2,fp
 146
 147 000000e0 <mvfc__sub>:
 148   e0:   1d 91 82 2d     mvfc fp,cbr || sub r2,fp
 149   e4:   1d 91 02 2d     mvfc fp,cbr -> sub r2,fp
 150
 151 000000e8 <mvtc__subv>:
 152   e8:   10 ad 82 0d     mvtc fp,cr2 || subv r2,fp
 153   ec:   10 ad 82 0d     mvtc fp,cr2 || subv r2,fp
 154
 155 000000f0 <rte__subx>:
 156   f0:   10 d6 82 2d     rte || sub r2,fp
 157   f4:   10 d6 02 1d     rte -> subx r2,fp
 158
 159 000000f8 <sll__xor>:
 160   f8:   1d 41 82 dd     sll fp,r1 || xor r2,fp
 161   fc:   1d 41 02 dd     sll fp,r1 -> xor r2,fp
 162
 163 00000100 <slli__machi>:
 164  100:   5d 56 b2 4d     slli fp,#0x16 || machi r2,fp
 165  104:   5d 56 32 4d     slli fp,#0x16 -> machi r2,fp
 166
 167 00000108 <sra__maclh1>:
 168  108:   1d 2d d2 cd     sra fp,fp || maclh1 r2,fp
 169  10c:   1d 2d 52 cd     sra fp,fp -> maclh1 r2,fp
 170
 171 00000110 <srai__maclo>:
 172  110:   5d 36 b2 5d     srai fp,#0x16 || maclo r2,fp
 173  114:   5d 36 32 5d     srai fp,#0x16 -> maclo r2,fp
 174
 175 00000118 <srl__macwhi>:
 176  118:   1d 0d b2 6d     srl fp,fp || macwhi r2,fp
 177  11c:   1d 0d 32 6d     srl fp,fp -> macwhi r2,fp
 178
 179 00000120 <srli__macwlo>:
 180  120:   5d 16 b2 7d     srli fp,#0x16 || macwlo r2,fp
 181  124:   5d 16 32 7d     srli fp,#0x16 -> macwlo r2,fp
 182
 183 00000128 <st__macwu1>:
 184  128:   2d 4d d2 bd     st fp,@fp || macwu1 r2,fp
 185  12c:   2d 4d d2 bd     st fp,@fp || macwu1 r2,fp
 186
 187 00000130 <st__msblo>:
 188  130:   2d 6d d2 dd     st fp,@+fp || msblo r2,fp
 189  134:   2d 6d d2 dd     st fp,@+fp || msblo r2,fp
 190
 191 00000138 <st__mul>:
 192  138:   2d 7d 92 6d     st fp,@-fp || mul r2,fp
 193  13c:   2d 7d 92 6d     st fp,@-fp || mul r2,fp
 194
 195 00000140 <stb__mulhi>:
 196  140:   2d 0d b2 0d     stb fp,@fp || mulhi r2,fp
 197  144:   2d 0d b2 0d     stb fp,@fp || mulhi r2,fp
 198
 199 00000148 <sth__mullo>:
 200  148:   2d 2d b2 1d     sth fp,@fp || mullo r2,fp
 201  14c:   2d 2d b2 1d     sth fp,@fp || mullo r2,fp
 202
 203 00000150 <trap__mulwhi>:
 204  150:   10 f2 b2 2d     trap #0x2 || mulwhi r2,fp
 205  154:   10 f2 f0 00     trap #0x2 || nop
 206  158:   32 2d f0 00     mulwhi r2,fp || nop
 207
 208 0000015c <unlock__mulwlo>:
 209  15c:   2d 5d b2 3d     unlock fp,@fp || mulwlo r2,fp
 210  160:   2d 5d b2 3d     unlock fp,@fp || mulwlo r2,fp
 211
 212 00000164 <add__mulwu1>:
 213  164:   0d ad d2 ad     add fp,fp || mulwu1 r2,fp
 214  168:   0d ad 52 ad     add fp,fp -> mulwu1 r2,fp
 215
 216 0000016c <addi__mvfachi>:
 217  16c:   4d 4d d2 f0     addi fp,#77 || mvfachi r2
 218  170:   4d 4d d2 f0     addi fp,#77 || mvfachi r2
 219
 220 00000174 <addv__mvfaclo>:
 221  174:   0d 8d d2 f5     addv fp,fp || mvfaclo r2,a1
 222  178:   0d 8d d2 f5     addv fp,fp || mvfaclo r2,a1
 223
 224 0000017c <addx__mvfacmi>:
 225  17c:   0d 9d d2 f2     addx fp,fp || mvfacmi r2
 226  180:   0d 9d d2 f2     addx fp,fp || mvfacmi r2
 227
 228 00000184 <and__mvtachi>:
 229  184:   0d cd d2 70     and fp,fp || mvtachi r2
 230  188:   0d cd d2 70     and fp,fp || mvtachi r2
 231
 232 0000018c <cmp__mvtaclo>:
 233  18c:   0d 4d d2 71     cmp fp,fp || mvtaclo r2
 234  190:   0d 4d d2 71     cmp fp,fp || mvtaclo r2
 235
 236 00000194 <cmpeq__rac>:
 237  194:   0d 6d d0 94     cmpeq fp,fp || rac a1
 238  198:   0d 6d d0 94     cmpeq fp,fp || rac a1
 239
 240 0000019c <cmpu__rach>:
 241  19c:   0d 5d d0 84     cmpu fp,fp || rach a0, a1
 242  1a0:   0d 5d d4 86     cmpu fp,fp || rach a1, a1, #2
 243
 244 000001a4 <cmpz__sadd>:
 245  1a4:   00 7d d0 e4     cmpz fp || sadd
 246  1a8:   00 7d d0 e4     cmpz fp || sadd
 247
 248 000001ac <sc>:
 249  1ac:   74 01 d0 e4     sc || sadd
 250
 251 000001b0 <snc>:
 252  1b0:   75 01 d0 e4     snc || sadd
 253
 254 000001b4 <jc>:
 255  1b4:   1c cd f0 00     jc fp || nop
 256
 257 000001b8 <jnc>:
 258  1b8:   1d cd f0 00     jnc fp || nop
 259
 260 000001bc <pcmpbz>:
 261  1bc:   03 7d f0 00     pcmpbz fp || nop
 262
 263 000001c0 <sat>:
 264  1c0:   8d 6d 00 00     sat fp,fp
 265
 266 000001c4 <sath>:
 267  1c4:   8d 6d 02 00     sath fp,fp
 268
 269 000001c8 <jc__pcmpbz>:
 270  1c8:   1c cd 83 7d     jc fp || pcmpbz fp
 271  1cc:   1c cd 03 7d     jc fp -> pcmpbz fp
 272
 273 000001d0 <jnc__ldi>:
 274  1d0:   1d cd ed 4d     jnc fp || ldi fp,#77
 275  1d4:   1d cd 6d 4d     jnc fp -> ldi fp,#77
 276
 277 000001d8 <sc__mv>:
 278  1d8:   74 01 9d 82     sc || mv fp,r2
 279  1dc:   74 01 9d 82     sc || mv fp,r2
 280
 281 000001e0 <snc__neg>:
 282  1e0:   75 01 8d 32     snc || neg fp,r2
 283  1e4:   75 01 8d 32     snc || neg fp,r2
 284
 285 000001e8 <nop__sadd>:
 286  1e8:   70 00 d0 e4     nop || sadd
 287
 288 000001ec <sadd__nop>:
 289  1ec:   70 00 d0 e4     nop || sadd
 290
 291 000001f0 <sadd__nop_reverse>:
 292  1f0:   70 00 d0 e4     nop || sadd
 293
 294 000001f4 <add__not>:
 295  1f4:   00 a1 83 b5     add r0,r1 || not r3,r5
 296
 297 000001f8 <add__not_dest_clash>:
 298  1f8:   03 a4 03 b5     add r3,r4 -> not r3,r5
 299
 300 000001fc <add__not__src_clash>:
 301  1fc:   03 a4 05 b3     add r3,r4 -> not r5,r3
 302
 303 00000200 <add__not__no_clash>:
 304  200:   03 a4 84 b5     add r3,r4 || not r4,r5
 305
 306 00000204 <mul__sra>:
 307  204:   13 24 91 62     sra r3,r4 || mul r1,r2
 308
 309 00000208 <mul__sra__reverse_src_clash>:
 310  208:   13 24 91 63     sra r3,r4 || mul r1,r3
 311
 312 0000020c <bc__add_>:
 313  20c:   7c 04 01 a2     bc 21c <label> -> add r1,r2
 314
 315 00000210 <add__bc>:
 316  210:   7c 03 83 a4     bc 21c <label> || add r3,r4
 317
 318 00000214 <bc__add__forced_parallel>:
 319  214:   7c 02 85 a6     bc 21c <label> || add r5,r6
 320
 321 00000218 <add__bc__forced_parallel>:
 322  218:   7c 01 87 a8     bc 21c <label> || add r7,r8
 323
 324