gas/testsuite/gas/m32r/m32rx.d

   1 #as: -m32rx
   2 #objdump: -dr
   3 #name: m32rx
   4
   5 .*: +file format .*
   6
   7 Disassembly of section .text:
   8
   9 00000000 <bcl>:
  10    0:   78 00 f0 00     bcl 0 <bcl> || nop
  11
  12 00000004 <bncl>:
  13    4:   79 ff f0 00     bncl 0 <bcl> || nop
  14
  15 00000008 <cmpz>:
  16    8:   00 7d f0 00     cmpz fp || nop
  17
  18 0000000c <cmpeq>:
  19    c:   0d 6d f0 00     cmpeq fp,fp || nop
  20
  21 00000010 <machl1>:
  22   10:   5d cd f0 00     machl1 fp,fp || nop
  23
  24 00000014 <msblo>:
  25   14:   5d dd f0 00     msblo fp,fp || nop
  26
  27 00000018 <mulwu1>:
  28   18:   5d ad f0 00     mulwu1 fp,fp || nop
  29
  30 0000001c <macwu1>:
  31   1c:   5d bd f0 00     macwu1 fp,fp || nop
  32
  33 00000020 <sadd>:
  34   20:   50 e4 f0 00     sadd || nop
  35
  36 00000024 <satb>:
  37   24:   8d 0d 01 00     satb fp,fp
  38
  39 00000028 <mulhi>:
  40   28:   3d 8d f0 00      || nop
  41
  42 0000002c <mullo>:
  43   2c:   3d 1d f0 00     mullo fp,fp || nop
  44
  45 00000030 <mulwhi>:
  46   30:   3d ad f0 00      || nop
  47
  48 00000034 <mulwlo>:
  49   34:   3d 3d f0 00     mulwlo fp,fp || nop
  50
  51 00000038 <machi>:
  52   38:   3d cd f0 00      || nop
  53
  54 0000003c <maclo>:
  55   3c:   3d 5d f0 00     maclo fp,fp || nop
  56
  57 00000040 <macwhi>:
  58   40:   3d ed f0 00      || nop
  59
  60 00000044 <macwlo>:
  61   44:   3d 7d f0 00     macwlo fp,fp || nop
  62
  63 00000048 <mvfachi>:
  64   48:   5d f0 f0 00     mvfachi fp || nop
  65
  66 0000004c <mvfacmi>:
  67   4c:   5d f2 f0 00     mvfacmi fp || nop
  68
  69 00000050 <mvfaclo>:
  70   50:   5d f1 f0 00     mvfaclo fp || nop
  71
  72 00000054 <mvtachi>:
  73   54:   5d f0 f0 00     mvfachi fp || nop
  74
  75 00000058 <mvtaclo>:
  76   58:   5d 71 f0 00     mvtaclo fp || nop
  77
  78 0000005c <rac>:
  79   5c:   50 90 f0 00     rac || nop
  80
  81 00000060 <rach>:
  82   60:   50 80 f0 00     rach || nop
  83
  84 00000064 <bc__add>:
  85   64:   7c e7 8d ad     bc 0 <bcl> || add fp,fp
  86   68:   7c e6 0d ad     bc 0 <bcl> -> add fp,fp
  87
  88 0000006c <bcl__addi>:
  89   6c:   78 e5 cd 4d     bcl 0 <bcl> || addi fp,#77
  90   70:   78 e4 cd 4d     bcl 0 <bcl> || addi fp,#77
  91
  92 00000074 <bl__addv>:
  93   74:   7e e3 8d 8d     bl 0 <bcl> || addv fp,fp
  94   78:   7e e2 8d 8d     bl 0 <bcl> || addv fp,fp
  95
  96 0000007c <bnc__addx>:
  97   7c:   7d e1 8d 9d     bnc 0 <bnc> || addx fp,fp
  98   80:   7d e0 0d 9d     bnc 0 <bcl> -> addx fp,fp
  99
 100 00000084 <bncl__and>:
 101   84:   79 df 8d cd     bncl 0 <bcl> || and fp,fp
 102   88:   79 de 0d cd     bncl 0 <bcl> -> and fp,fp
 103
 104 0000008c <bra__cmp>:
 105   8c:   7f dd 8d 4d     bra 0 <bcl> || cmp fp,fp
 106   90:   7f dc 8d 4d     bra 0 <bcl> || cmp fp,fp
 107
 108 00000094 <jl__cmpeq>:
 109   94:   1e cd 8d 6d     jl fp || cmpeq fp,fp
 110   98:   1e cd 8d 6d     jl fp || cmpeq fp,fp
 111
 112 0000009c <jmp__cmpu>:
 113   9c:   1f cd 8d 5d     jmp fp || cmpu fp,fp
 114   a0:   1f cd 8d 5d     jmp fp || cmpu fp,fp
 115
 116 000000a4 <ld__cmpz>:
 117   a4:   2d cd 80 71     ld fp,@fp || cmpz r1
 118   a8:   2d cd 80 71     ld fp,@fp || cmpz r1
 119
 120 000000ac <ld__ldi>:
 121   ac:   2d e1 e2 4d     ld fp,@r1\+ || ldi r2,#77
 122   b0:   2d e1 e2 4d     ld fp,@r1\+ || ldi r2,#77
 123
 124 000000b4 <ldb__mv>:
 125   b4:   2d 8d 92 8d     ldb fp,@fp || mv r2,fp
 126   b8:   2d 8d 12 8d     ldb fp,@fp -> mv r2,fp
 127
 128 000000bc <ldh__neg>:
 129   bc:   2d ad 82 3d     ldh fp,@fp || neg r2,fp
 130   c0:   2d ad 02 3d     ldh fp,@fp -> neg r2,fp
 131
 132 000000c4 <ldub__nop>:
 133   c4:   2d 9d f0 00     ldub fp,@fp || nop
 134   c8:   2d 9d f0 00     ldub fp,@fp || nop
 135
 136 000000cc <lduh__not>:
 137   cc:   2d bd 82 bd     lduh fp,@fp || not r2,fp
 138   d0:   2d bd 02 bd     lduh fp,@fp -> not r2,fp
 139
 140 000000d4 <lock__or>:
 141   d4:   2d dd 82 ed     lock fp,@fp || or r2,fp
 142   d8:   2d dd 02 ed     lock fp,@fp -> or r2,fp
 143
 144 000000dc <mvfc__sub>:
 145   dc:   1d 91 82 2d     mvfc fp,cbr || sub r2,fp
 146   e0:   1d 91 02 2d     mvfc fp,cbr -> sub r2,fp
 147
 148 000000e4 <mvtc__subv>:
 149   e4:   10 ad 82 0d     mvtc fp,psw || subv r2,fp
 150   e8:   10 ad 82 0d     mvtc fp,psw || subv r2,fp
 151
 152 000000ec <rte__subx>:
 153   ec:   10 d6 82 1d     rte || subx r2,fp
 154   f0:   10 d6 02 1d     rte -> subx r2,fp
 155
 156 000000f4 <sll__xor>:
 157   f4:   1d 41 82 dd     sll fp,r1 || xor r2,fp
 158   f8:   1d 41 02 dd     sll fp,r1 -> xor r2,fp
 159
 160 000000fc <slli__machi>:
 161   fc:   5d 56 b2 4d     slli fp,#0x16 || machi r2,fp
 162  100:   5d 56 32 4d     slli fp,#0x16 -> machi r2,fp
 163
 164 00000104 <sra__machl1>:
 165  104:   1d 2d d2 cd     sra fp,fp || machl1 r2,fp
 166  108:   1d 2d 52 cd     sra fp,fp -> machl1 r2,fp
 167
 168 0000010c <srai__maclo>:
 169  10c:   5d 36 b2 5d     srai fp,#0x16 || maclo r2,fp
 170  110:   5d 36 32 5d     srai fp,#0x16 -> maclo r2,fp
 171
 172 00000114 <srl__macwhi>:
 173  114:   1d 0d b2 6d     srl fp,fp || macwhi r2,fp
 174  118:   1d 0d 32 6d     srl fp,fp -> macwhi r2,fp
 175
 176 0000011c <srli__macwlo>:
 177  11c:   5d 16 b2 7d     srli fp,#0x16 || macwlo r2,fp
 178  120:   5d 16 32 7d     srli fp,#0x16 -> macwlo r2,fp
 179
 180 00000124 <st__macwu1>:
 181  124:   2d 4d d2 bd     st fp,@fp || macwu1 r2,fp
 182  128:   2d 4d d2 bd     st fp,@fp || macwu1 r2,fp
 183
 184 0000012c <st__msblo>:
 185  12c:   2d 6d d2 dd     st fp,@+fp || msblo r2,fp
 186  130:   2d 6d d2 dd     st fp,@+fp || msblo r2,fp
 187
 188 00000134 <st__mul>:
 189  134:   2d 7d 92 6d     st fp,@-fp || mul r2,fp
 190  138:   2d 7d 92 6d     st fp,@-fp || mul r2,fp
 191
 192 0000013c <stb__mulhi>:
 193  13c:   2d 0d b2 0d     stb fp,@fp || mulhi r2,fp
 194  140:   2d 0d b2 0d     stb fp,@fp || mulhi r2,fp
 195
 196 00000144 <sth__mullo>:
 197  144:   2d 2d b2 1d     sth fp,@fp || mullo r2,fp
 198  148:   2d 2d b2 1d     sth fp,@fp || mullo r2,fp
 199
 200 0000014c <trap__mulwhi>:
 201  14c:   10 f2 b2 2d     trap #0x2 || mulwhi r2,fp
 202  150:   10 f2 f0 00     trap #0x2 || nop
 203  154:   32 2d f0 00     mulwhi r2,fp || nop
 204
 205 00000158 <unlock__mulwlo>:
 206  158:   2d 5d b2 3d     unlock fp,@fp || mulwlo r2,fp
 207  15c:   2d 5d b2 3d     unlock fp,@fp || mulwlo r2,fp
 208
 209 00000160 <add__mulwu1>:
 210  160:   0d ad d2 ad     add fp,fp || mulwu1 r2,fp
 211  164:   0d ad 52 ad     add fp,fp -> mulwu1 r2,fp
 212
 213 00000168 <addi__mvfachi>:
 214  168:   4d 4d d2 f0     addi fp,#77 || mvfachi r2
 215  16c:   4d 4d d2 f0     addi fp,#77 || mvfachi r2
 216
 217 00000170 <addv__mvfaclo>:
 218  170:   0d 8d d2 f5     addv fp,fp || mvfaclo r2,a1
 219  174:   0d 8d d2 f5     addv fp,fp || mvfaclo r2,a1
 220
 221 00000178 <addx__mvfacmi>:
 222  178:   0d 9d d2 f2     addx fp,fp || mvfacmi r2
 223  17c:   0d 9d d2 f2     addx fp,fp || mvfacmi r2
 224
 225 00000180 <and__mvtachi>:
 226  180:   0d cd d2 70     and fp,fp || mvtachi r2
 227  184:   0d cd d2 70     and fp,fp || mvtachi r2
 228
 229 00000188 <cmp__mvtaclo>:
 230  188:   0d 4d d2 71     cmp fp,fp || mvtaclo r2
 231  18c:   0d 4d d2 71     cmp fp,fp || mvtaclo r2
 232
 233 00000190 <cmpeq__rac>:
 234  190:   0d 6d d0 94     cmpeq fp,fp || rac a1
 235  194:   0d 6d d0 94     cmpeq fp,fp || rac a1
 236
 237 00000198 <cmpu__rach>:
 238  198:   0d 5d d0 80     cmpu fp,fp || rach
 239  19c:   0d 5d d0 80     cmpu fp,fp || rach
 240
 241 000001a0 <cmpz__sadd>:
 242  1a0:   00 7d d0 e4     cmpz fp || sadd
 243  1a4:   00 7d d0 e4     cmpz fp || sadd
 244
 245 000001a8 <sc>:
 246  1a8:   74 01 d0 e4     sc || sadd
 247
 248 000001ac <snc>:
 249  1ac:   75 01 d0 e4     snc || sadd
 250
 251 000001b0 <jc>:
 252  1b0:   1c cd f0 00     jc fp || nop
 253
 254 000001b4 <jnc>:
 255  1b4:   1d cd f0 00     *unknown* || nop
 256
 257 000001b8 <pcmpbz>:
 258  1b8:   03 7d f0 00     pcmpbz fp || nop
 259
 260 000001bc <sat>:
 261  1bc:   8d 0d 00 00     sat fp,fp
 262
 263 000001c0 <sath>:
 264  1c0:   8d 0d 02 00     sath fp,fp
 265
 266 000001c4 <jc__pcmpbz>:
 267  1c4:   1c cd 83 7d     jc fp || pcmpbz fp
 268  1c8:   1c cd 03 7d     jc fp -> pcmpbz fp
 269
 270 000001cc <jnc__ldi>:
 271  1cc:   1d cd ed 4d     \*unknown\* || ldi fp,#77
 272  1d0:   1d cd 6d 4d     \*unknown\* -> ldi fp,#77
 273
 274 000001d4 <sc__mv>:
 275  1d4:   74 01 9d 82     sc || mv fp,r2
 276  1d8:   74 01 9d 82     sc || mv fp,r2
 277
 278 000001dc <snc__neg>:
 279  1dc:   75 01 8d 32     snc || neg fp,r2
 280  1e0:   75 01 8d 32     snc || neg fp,r2
 281
 282 000001e4 <nop__sadd>:
 283  1e4:   70 00 d0 e4     nop || sadd
 284
 285 000001e8 <sadd__nop>:
 286  1e8:   70 00 d0 e4     nop || sadd
 287
 288 000001ec <sadd__nop_reverse>:
 289  1ec:   70 00 d0 e4     nop || sadd
 290
 291 000001f0 <add__not>:
 292  1f0:   00 a1 83 b5     add r0,r1 || not r3,r5
 293
 294 000001f4 <add__not_dest_clash>:
 295  1f4:   03 a4 03 b5     add r3,r4 -> not r3,r5
 296
 297 000001f8 <add__not__src_clash>:
 298  1f8:   03 a4 05 b3     add r3,r4 -> not r5,r3
 299
 300 000001fc <add__not__no_clash>:
 301  1fc:   03 a4 84 b5     add r3,r4 || not r4,r5
 302
 303 00000200 <mul__sra>:
 304  200:   13 24 91 62     sra r3,r4 || mul r1,r2
 305
 306 00000204 <mul__sra__reverse_src_clash>:
 307  204:   13 24 91 63     sra r3,r4 || mul r1,r3
 308
 309 00000208 <bc__add_>:
 310  208:   7c f7 01 a2     bc 1e4 <nop__sadd> -> add r1,r2
 311
 312 0000020c <add__bc>:
 313  20c:   7c f6 83 a4     bc 1e4 <nop__sadd> || add r3,r4
 314
 315 00000210 <bc__add__forced_parallel>:
 316  210:   7c f5 85 a6     bc 1e4 <nop__sadd> || add r5,r6
 317
 318 00000214 <add__bc__forced_parallel>:
 319  214:   7c f4 87 a8     bc 1e4 <nop__sadd> || add r7,r8
 320
 321