gas/testsuite/gas/m32r/m32rx.d

   1 #as: -m32rx
   2 #objdump: -dr
   3 #name: m32rx
   4
   5 .*: +file format .*
   6
   7 Disassembly of section .text:
   8
   9 00000000 <bcl>:
  10    0:   78 00 f0 00     bcl 0 <bcl> || nop
  11
  12 00000004 <bncl>:
  13    4:   79 ff f0 00     bncl 0 <bcl> || nop
  14
  15 00000008 <cmpz>:
  16    8:   00 7d f0 00     cmpz fp || nop
  17
  18 0000000c <cmpeq>:
  19    c:   0d 6d f0 00     cmpeq fp,fp || nop
  20
  21 00000010 <machl1>:
  22   10:   5d cd f0 00     machl1 fp,fp || nop
  23
  24 00000014 <msblo>:
  25   14:   5d dd f0 00     msblo fp,fp || nop
  26
  27 00000018 <mulwu1>:
  28   18:   5d ad f0 00     mulwu1 fp,fp || nop
  29
  30 0000001c <macwu1>:
  31   1c:   5d bd f0 00     macwu1 fp,fp || nop
  32
  33 00000020 <sadd>:
  34   20:   50 e4 f0 00     sadd || nop
  35
  36 00000024 <satb>:
  37   24:   8d 0d 01 00     satb fp,fp
  38
  39 00000028 <mulhi>:
  40   28:   3d 8d f0 00      || nop
  41
  42 0000002c <mullo>:
  43   2c:   3d 1d f0 00     mullo fp,fp || nop
  44
  45 00000030 <mulwhi>:
  46   30:   3d ad f0 00      || nop
  47
  48 00000034 <mulwlo>:
  49   34:   3d 3d f0 00     mulwlo fp,fp || nop
  50
  51 00000038 <machi>:
  52   38:   3d cd f0 00      || nop
  53
  54 0000003c <maclo>:
  55   3c:   3d 5d f0 00     maclo fp,fp || nop
  56
  57 00000040 <macwhi>:
  58   40:   3d ed f0 00      || nop
  59
  60 00000044 <macwlo>:
  61   44:   3d 7d f0 00     macwlo fp,fp || nop
  62
  63 00000048 <mvfachi>:
  64   48:   5d f0 f0 00     mvfachi fp || nop
  65
  66 0000004c <mvfacmi>:
  67   4c:   5d f2 f0 00     mvfacmi fp || nop
  68
  69 00000050 <mvfaclo>:
  70   50:   5d f1 f0 00     mvfaclo fp || nop
  71
  72 00000054 <mvtachi>:
  73   54:   5d f0 f0 00     mvfachi fp || nop
  74
  75 00000058 <mvtaclo>:
  76   58:   5d 71 f0 00     mvtaclo fp || nop
  77
  78 0000005c <rac>:
  79   5c:   50 90 f0 00     rac || nop
  80
  81 00000060 <rach>:
  82   60:   50 80 f0 00     rach || nop
  83
  84 00000064 <bc__add>:
  85   64:   7c 00 8d ad     bc 64 <bc__add> || add fp,fp
  86   68:   7c e6           bc 0 <bcl>
  87   6a:   0d ad           add fp,fp
  88
  89 0000006c <bcl__addi>:
  90   6c:   78 00 cd 4d     bcl 6c <bcl__addi> || addi fp,77
  91   70:   4d 4d           addi fp,77
  92   72:   78 e4           bcl 2 <bcl\+0x2>
  93
  94 00000074 <bl__addv>:
  95   74:   7e 00 8d 8d     bl 74 <bl__addv> || addv fp,fp
  96   78:   0d 8d           addv fp,fp
  97   7a:   7e e2           bl 2 <bcl\+0x2>
  98
  99 0000007c <bnc__addx>:
 100   7c:   7d 00 8d 9d     bnc 7c <bnc__addx> || addx fp,fp
 101   80:   7d e0           bnc 0 <bcl>
 102   82:   0d 9d           addx fp,fp
 103
 104 00000084 <bncl__and>:
 105   84:   79 00 8d cd     bncl 84 <bncl__and> || and fp,fp
 106   88:   79 de           bncl 0 <bcl>
 107   8a:   0d cd           and fp,fp
 108
 109 0000008c <bra__cmp>:
 110   8c:   7f 00 8d 4d     bra 8c <bra__cmp> || cmp fp,fp
 111   90:   0d 4d           cmp fp,fp
 112   92:   7f dc           bra 2 <bcl\+0x2>
 113
 114 00000094 <jl__cmpeq>:
 115   94:   1e cd 8d 6d     jl fp || cmpeq fp,fp
 116   98:   0d 6d           cmpeq fp,fp
 117   9a:   1e cd           jl fp
 118
 119 0000009c <jmp__cmpu>:
 120   9c:   1f cd 8d 5d     jmp fp || cmpu fp,fp
 121   a0:   0d 5d           cmpu fp,fp
 122   a2:   1f cd           jmp fp
 123
 124 000000a4 <ld__cmpz>:
 125   a4:   2d cd 80 71     ld fp,@fp || cmpz r1
 126   a8:   00 71           cmpz r1
 127   aa:   2d cd           ld fp,@fp
 128
 129 000000ac <ld__ldi>:
 130   ac:   2d e1 e2 4d     ld fp,@r1\+ || ldi r2,77
 131   b0:   2d e1           ld fp,@r1\+
 132   b2:   62 4d           ldi r2,77
 133
 134 000000b4 <ldb__mv>:
 135   b4:   2d 8d 92 8d     ldb fp,@fp || mv r2,fp
 136   b8:   2d 8d           ldb fp,@fp
 137   ba:   12 8d           mv r2,fp
 138
 139 000000bc <ldh__neg>:
 140   bc:   2d ad 82 3d     ldh fp,@fp || neg r2,fp
 141   c0:   2d ad           ldh fp,@fp
 142   c2:   02 3d           neg r2,fp
 143
 144 000000c4 <ldub__nop>:
 145   c4:   2d 9d f0 00     ldub fp,@fp || nop
 146   c8:   2d 9d           ldub fp,@fp
 147   ca:   70 00           nop
 148
 149 000000cc <lduh__not>:
 150   cc:   2d bd 82 bd     lduh fp,@fp || not r2,fp
 151   d0:   2d bd           lduh fp,@fp
 152   d2:   02 bd           not r2,fp
 153
 154 000000d4 <lock__or>:
 155   d4:   2d dd 82 ed     lock fp,@fp || or r2,fp
 156   d8:   2d dd           lock fp,@fp
 157   da:   02 ed           or r2,fp
 158
 159 000000dc <mvfc__sub>:
 160   dc:   1d 91 82 2d     mvfc fp,cbr || sub r2,fp
 161   e0:   1d 91           mvfc fp,cbr
 162   e2:   02 2d           sub r2,fp
 163
 164 000000e4 <mvtc__subv>:
 165   e4:   10 ad 82 0d     mvtc fp,psw || subv r2,fp
 166   e8:   10 ad           mvtc fp,psw
 167   ea:   02 0d           subv r2,fp
 168
 169 000000ec <rte__subx>:
 170   ec:   10 d6 82 1d     rte || subx r2,fp
 171   f0:   10 d6           rte
 172   f2:   02 1d           subx r2,fp
 173
 174 000000f4 <sll__xor>:
 175   f4:   1d 41 82 dd     sll fp,r1 || xor r2,fp
 176   f8:   1d 41           sll fp,r1
 177   fa:   02 dd           xor r2,fp
 178
 179 000000fc <slli__machi>:
 180   fc:   5d 56 b2 4d     slli fp,0x16 || machi r2,fp
 181  100:   5d 56           slli fp,0x16
 182  102:   32 4d           machi r2,fp
 183
 184 00000104 <sra__machl1>:
 185  104:   1d 2d d2 cd     sra fp,fp || machl1 r2,fp
 186  108:   1d 2d           sra fp,fp
 187  10a:   52 cd           machl1 r2,fp
 188
 189 0000010c <srai__maclo>:
 190  10c:   5d 36 b2 5d     srai fp,0x16 || maclo r2,fp
 191  110:   5d 36           srai fp,0x16
 192  112:   32 5d           maclo r2,fp
 193
 194 00000114 <srl__macwhi>:
 195  114:   1d 0d b2 6d     srl fp,fp || macwhi r2,fp
 196  118:   1d 0d           srl fp,fp
 197  11a:   32 6d           macwhi r2,fp
 198
 199 0000011c <srli__macwlo>:
 200  11c:   5d 16 b2 7d     srli fp,0x16 || macwlo r2,fp
 201  120:   5d 16           srli fp,0x16
 202  122:   32 7d           macwlo r2,fp
 203
 204 00000124 <st__macwu1>:
 205  124:   2d 4d d2 bd     st fp,@fp || macwu1 r2,fp
 206  128:   2d 4d           st fp,@fp
 207  12a:   52 bd           macwu1 r2,fp
 208
 209 0000012c <st__msblo>:
 210  12c:   2d 6d d2 dd     st fp,@\+fp || msblo r2,fp
 211  130:   2d 6d           st fp,@\+fp
 212  132:   52 dd           msblo r2,fp
 213
 214 00000134 <st__mul>:
 215  134:   2d 7d 92 6d     st fp,@-fp || mul r2,fp
 216  138:   2d 7d           st fp,@-fp
 217  13a:   12 6d           mul r2,fp
 218
 219 0000013c <stb__mulhi>:
 220  13c:   2d 0d b2 0d     stb fp,@fp || mulhi r2,fp
 221  140:   2d 0d           stb fp,@fp
 222  142:   32 0d           mulhi r2,fp
 223
 224 00000144 <sth__mullo>:
 225  144:   2d 2d b2 1d     sth fp,@fp || mullo r2,fp
 226  148:   2d 2d           sth fp,@fp
 227  14a:   32 1d           mullo r2,fp
 228
 229 0000014c <trap__mulwhi>:
 230  14c:   10 f2 b2 2d     trap 0x2 || mulwhi r2,fp
 231  150:   10 f2 f0 00     trap 0x2 || nop
 232  154:   32 2d f0 00     mulwhi r2,fp || nop
 233
 234 00000158 <unlock__mulwlo>:
 235  158:   2d 5d b2 3d     unlock fp,@fp || mulwlo r2,fp
 236  15c:   2d 5d           unlock fp,@fp
 237  15e:   32 3d           mulwlo r2,fp
 238
 239 00000160 <add__mulwu1>:
 240  160:   0d ad d2 ad     add fp,fp || mulwu1 r2,fp
 241  164:   0d ad           add fp,fp
 242  166:   52 ad           mulwu1 r2,fp
 243
 244 00000168 <addi__mvfachi>:
 245  168:   4d 4d d2 f0     addi fp,77 || mvfachi r2
 246  16c:   4d 4d           addi fp,77
 247  16e:   52 f0           mvfachi r2
 248
 249 00000170 <addv__mvfaclo>:
 250  170:   0d 8d d2 f1     addv fp,fp || mvfaclo r2
 251  174:   0d 8d           addv fp,fp
 252  176:   52 f1           mvfaclo r2
 253
 254 00000178 <addx__mvfacmi>:
 255  178:   0d 9d d2 f2     addx fp,fp || mvfacmi r2
 256  17c:   0d 9d           addx fp,fp
 257  17e:   52 f2           mvfacmi r2
 258
 259 00000180 <and__mvtachi>:
 260  180:   0d cd d2 70     and fp,fp || mvtachi r2
 261  184:   0d cd           and fp,fp
 262  186:   52 70           mvtachi r2
 263
 264 00000188 <cmp__mvtaclo>:
 265  188:   0d 4d d2 71     cmp fp,fp || mvtaclo r2
 266  18c:   0d 4d           cmp fp,fp
 267  18e:   52 71           mvtaclo r2
 268
 269 00000190 <cmpeq__rac>:
 270  190:   0d 6d d0 90     cmpeq fp,fp || rac
 271  194:   0d 6d           cmpeq fp,fp
 272  196:   50 90           rac
 273
 274 00000198 <cmpu__rach>:
 275  198:   0d 5d d0 80     cmpu fp,fp || rach
 276  19c:   0d 5d           cmpu fp,fp
 277  19e:   50 80           rach
 278
 279 000001a0 <cmpz__sadd>:
 280  1a0:   00 7d d0 e4     cmpz fp || sadd
 281  1a4:   00 7d           cmpz fp
 282  1a6:   50 e4           sadd
 283
 284 000001a8 <sc>:
 285  1a8:   74 01           sc
 286  1aa:   50 e4           sadd
 287
 288 000001ac <snc>:
 289  1ac:   75 01           snc
 290  1ae:   50 e4           sadd
 291
 292 000001b0 <jc>:
 293  1b0:   1c cd f0 00     jc fp || nop
 294
 295 000001b4 <jnc>:
 296  1b4:   1c cd f0 00     jc fp || nop
 297
 298 000001b8 <pcmpbz>:
 299  1b8:   03 7d f0 00     pcmpbz fp || nop
 300
 301 000001bc <sat>:
 302  1bc:   8d 0d 00 00     sat fp,fp
 303
 304 000001c0 <sath>:
 305  1c0:   8d 0d 02 00     sath fp,fp
 306
 307 000001c4 <jc__pcmpbz>:
 308  1c4:   1c cd 83 7d     jc fp || pcmpbz fp
 309  1c8:   1c cd           jc fp
 310  1ca:   03 7d           pcmpbz fp
 311
 312 000001cc <jnc__ldi>:
 313  1cc:   1c cd ed 4d     jc fp || ldi fp,77
 314  1d0:   1c cd           jc fp
 315  1d2:   6d 4d           ldi fp,77
 316
 317 000001d4 <sc__mv>:
 318  1d4:   74 01 9d 82     sc || mv fp,r2
 319  1d8:   74 01           sc
 320  1da:   1d 82           mv fp,r2
 321
 322 000001dc <snc__neg>:
 323  1dc:   75 01 8d 32     snc || neg fp,r2
 324  1e0:   75 01           snc
 325  1e2:   0d32            neg fp,r2
 326
 327 # To be completed once the instructions are in cgen.....
 328