1 # Test new instructions
135 # Test explicitly parallel and implicitly parallel instructions
136 # Including apparent instruction sequence reordering.
141 # Use bc.s here as bc is relaxable and thus a nop will be emitted.
148 bcl bcl || addi fp, #77
150 # Use bcl.s here as bcl is relaxable and thus the parallelization won't happen.
156 bl bcl || addv fp, fp
158 # Use bl.s here as bl is relaxable and thus the parallelization won't happen.
164 bnc bcl || addx fp, fp
165 # Use bnc.s here as bnc is relaxable and thus the parallelization attempt won't
166 # happen. Things still won't be parallelized, but we want this test to try.
173 bncl bcl || and fp, fp
180 bra bcl || cmp fp, fp
182 # Use bra.s here as bra is relaxable and thus the parallelization won't happen.
188 jl fp || cmpeq fp, fp
195 jmp fp || cmpu fp, fp
202 ld fp, @fp || cmpz r1
209 ld fp, @r1+ || ldi r2, #77
216 ldb fp, @fp || mv r2, fp
223 ldh fp, @fp || neg r2, fp
237 lduh fp, @fp || not r2, fp
244 lock fp, @fp || or r2, fp
251 mvfc fp, cr1 || sub r2, fp
258 mvtc fp, cr2 || subv r2, fp
272 sll fp, r1 || xor r2, fp
279 slli fp, #22 || machi r2, fp
286 sra fp, fp || maclh1 r2, fp
293 srai fp, #22 || maclo r2, fp
300 srl fp, fp || macwhi r2, fp
307 srli fp, #22 || macwlo r2, fp
314 st fp, @fp || macwu1 r2, fp
321 st fp, @+fp || msblo r2, fp
328 st fp, @-fp || mul r2, fp
335 stb fp, @fp || mulhi r2, fp
342 sth fp, @fp || mullo r2, fp
349 trap #2 || mulwhi r2, fp
354 .global unlock__mulwlo
356 unlock fp, @fp || mulwlo r2, fp
363 add fp, fp || mulwu1 r2, fp
368 .global addi__mvfachi
370 addi fp, #77 || mvfachi r2, a0
375 .global addv__mvfaclo
377 addv fp, fp || mvfaclo r2, a1
382 .global addx__mvfacmi
384 addx fp, fp || mvfacmi r2, a0
391 and fp, fp || mvtachi r2, a0
398 cmp fp, fp || mvtaclo r2, a0
405 cmpeq fp, fp || rac a1
412 cmpu fp, fp || rach a0, a1
425 # Test private instructions
464 # Test parallel versions of the private instructions
476 jnc fp || ldi fp, #77
494 # Test automatic and explicit parallelisation of instructions
508 .global sadd__nop_reverse
519 .global add__not__dest_clash
525 .global add__not__src_clash
531 .global add__not__no_clash
543 .global mul__sra__reverse_src_clash
544 mul__sra__reverse_src_clash:
561 .global bc__add__forced_parallel
562 bc__add__forced_parallel:
563 bc label || add r5, r6
566 .global add__bc__forced_parallel
567 add__bc__forced_parallel:
568 add r7, r8 || bc label
572 ; Additional testcases.
573 ; These insns were added to the chip later.