change some variable's type to op_err
[deliverable/binutils-gdb.git] / gas / testsuite / gas / m68hc11 / insns-dwarf2.d
1 #objdump: -S
2 #as: -m68hc11 -gdwarf2
3 #name: Dwarf2 test on insns.s
4 #source: insns.s
5
6 # Test handling of basic instructions.
7
8 .*: +file format elf32\-m68hc11
9
10 Disassembly of section .text:
11
12 00000000 <_start>:
13 #...
14 .globl _start
15 .sect .text
16
17 _start:
18 lds #stack\+1024
19 0: 8e 04 00 lds #0x400 <stack_end>
20 ldx #1
21 3: ce 00 01 ldx #0x1 <_start\+0x1>
22
23 0+06 <Loop>:
24 Loop:
25 jsr test
26 6: bd 00 00 jsr 0x0 <_start>
27 dex
28 9: 09 dex
29 bne Loop
30 a: 26 fa bne 0x6 <Loop>
31
32 0000000c <Stop>:
33 c: cd 03 .byte 0xcd, 0x03
34 Stop:
35
36 .byte 0xcd
37 .byte 3
38 bra _start
39 e: 20 f0 bra 0x0 <_start>
40
41 00000010 <test>:
42
43 test:
44 ldd #2
45 10: cc 00 02 ldd #0x2 <_start\+0x2>
46 jsr test2
47 13: bd 00 00 jsr 0x0 <_start>
48 rts
49 16: 39 rts
50
51 00000017 <test2>:
52
53 D_low = 50
54 value = 23
55
56 .globl test2
57 test2:
58 ldx value,y
59 17: cd ee 17 ldx 0x17,y
60 std value,x
61 1a: ed 17 std 0x17,x
62 ldd ,x
63 1c: ec 00 ldd 0x0,x
64 sty ,y
65 1e: 18 ef 00 sty 0x0,y
66 stx ,y
67 21: cd ef 00 stx 0x0,y
68 brclr 6,x,#4,test2
69 24: 1f 06 04 ef brclr 0x6,x, #0x04, 0x17 <test2>
70 brclr 12,x #8 test2
71 28: 1f 0c 08 eb brclr 0xc,x, #0x08, 0x17 <test2>
72 ldd \*ZD1
73 2c: dc 00 ldd \*0x0 <_start>
74 ldx \*ZD1\+2
75 2e: de 02 ldx \*0x2 <_start\+0x2>
76 clr \*ZD2
77 30: 7f 00 00 clr 0x0 <_start>
78 clr \*ZD2\+1
79 33: 7f 00 01 clr 0x1 <_start\+0x1>
80 bne .-4
81 36: 26 fc bne 0x34 <test2\+0x1d>
82 beq .\+2
83 38: 27 02 beq 0x3c <test2\+0x25>
84 bclr \*ZD1\+1, #32
85 3a: 15 01 20 bclr \*0x1 <_start\+0x1>, #0x20
86 brclr \*ZD2\+2, #40, test2
87 3d: 13 02 28 d6 brclr \*0x2 <_start\+0x2>, #0x28, 0x17 <test2>
88 ldy #24\+_start-44
89 41: 18 ce ff ec ldy #0xffec <stack_end\+0xfbec>
90 ldd B_low,y
91 45: 18 ec 0c ldd 0xc,y
92 addd A_low,y
93 48: 18 e3 2c addd 0x2c,y
94 addd D_low,y
95 4b: 18 e3 32 addd 0x32,y
96 subd A_low
97 4e: b3 00 2c subd 0x2c <test2\+0x15>
98 subd #A_low
99 51: 83 00 2c subd #0x2c <test2\+0x15>
100 jmp Stop
101 54: 7e 00 00 jmp 0x0 <_start>
102
103 00000057 <L1>:
104 L1:
105 anda #%lo\(test2\)
106 57: 84 17 anda #0x17
107 andb #%hi\(test2\)
108 59: c4 00 andb #0x0
109 ldab #%page\(test2\) ; Check that the relocs are against symbol
110 5b: c6 00 ldab #0x0
111 ldy #%addr\(test2\) ; otherwise linker relaxation fails
112 5d: 18 ce 00 00 ldy #0x0 <_start>
113 rts
114 61: 39 rts
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