gas/testsuite/gas/m68hc11/opers12-dwarf2.d

   1 #objdump: -S
   2 #as: -m68hc12 -gdwarf2
   3 #name: Dwarf2 test on opers12.s
   4 #source: opers12.s
   5
   6 .*: +file format elf32\-m68hc12
   7
   8 Disassembly of section .text:
   9
  10 0+00 <start>:
  11 #...
  12         sect .text
  13         globl start
  14
  15 start:
  16         anda    \[12,x\]                ; Indexed indirect
  17    0:   a4 e3 00 0c     anda    \[0xc,X\]
  18         ldaa    #10
  19    4:   86 0a           ldaa    #0xa
  20         ldx     L1
  21    6:   fe 00 00        ldx     0x0 <start>
  22
  23 0+09 <L1>:
  24 L1:     ldy     ,x
  25    9:   ed 00           ldy     0x0,X
  26         addd    1,y             ; Offset from register
  27    b:   e3 41           addd    0x1,Y
  28         subd    \-1,y
  29    d:   a3 5f           subd    0xffff,Y
  30         eora    15,y
  31    f:   a8 4f           eora    0xf,Y
  32         eora    \-16,y
  33   11:   a8 50           eora    0xfff0,Y
  34         eorb    16,y
  35   13:   e8 e8 10        eorb    0x10,Y
  36         eorb    \-17,y
  37   16:   e8 e9 ef        eorb    0xffef,Y
  38         oraa    128,sp
  39   19:   aa f0 80        oraa    0x80,SP
  40         orab    \-128,sp
  41   1c:   ea f1 80        orab    0xff80,SP
  42         orab    255,x
  43   1f:   ea e0 ff        orab    0xff,X
  44         orab    \-256,x
  45   22:   ea e1 00        orab    0xff00,X
  46         anda    256,x
  47   25:   a4 e2 01 00     anda    0x100,X
  48         andb    \-257,x
  49   29:   e4 e2 fe ff     andb    0xfeff,X
  50         anda    \[12,x\]                ; Indexed indirect \(16\-bit offset\)
  51   2d:   a4 e3 00 0c     anda    \[0xc,X\]
  52         ldaa    \[257,y\]
  53   31:   a6 eb 01 01     ldaa    \[0x101,Y\]
  54         ldab    \[32767,sp\]
  55   35:   e6 f3 7f ff     ldab    \[0x7fff,SP\]
  56         ldd     \[32768,pc\]
  57   39:   ec fb 80 00     ldd     \[0x8000,PC\]
  58         ldd     L1,pc
  59   3d:   ec f9 c9        ldd     0xffc9,PC \{0x9 <L1>\}
  60         std     a,x             ; Two\-reg index
  61   40:   6c e4           std     A,X
  62         ldx     b,x
  63   42:   ee e5           ldx     B,X
  64         stx     d,y
  65   44:   6e ee           stx     D,Y
  66         addd    1,\+x           ; Pre\-Auto inc
  67   46:   e3 20           addd    1,\+X
  68         addd    2,\+x
  69   48:   e3 21           addd    2,\+X
  70         addd    8,\+x
  71   4a:   e3 27           addd    8,\+X
  72         addd    1,sp\+          ; Post\-Auto inc
  73   4c:   e3 b0           addd    1,SP\+
  74         addd    2,sp\+
  75   4e:   e3 b1           addd    2,SP\+
  76         addd    8,sp\+
  77   50:   e3 b7           addd    8,SP\+
  78         subd    1,\-y           ; Pre\-Auto dec
  79   52:   a3 6f           subd    1,\-Y
  80         subd    2,\-y
  81   54:   a3 6e           subd    2,\-Y
  82         subd    8,\-y
  83   56:   a3 68           subd    8,\-Y
  84         addd    1,y\-           ; Post\-Auto dec
  85   58:   e3 7f           addd    1,Y\-
  86         addd    2,y\-
  87   5a:   e3 7e           addd    2,Y\-
  88         addd    8,y\-
  89   5c:   e3 78           addd    8,Y\-
  90         std     \[d,x\]         ; Indexed indirect with two reg index
  91   5e:   6c e7           std     \[D,X\]
  92         std     \[d,y\]
  93   60:   6c ef           std     \[D,Y\]
  94         std     \[d,sp\]
  95   62:   6c f7           std     \[D,SP\]
  96         std     \[d,pc\]
  97   64:   6c ff           std     \[D,PC\]
  98         beq     L1
  99   66:   27 a1           beq     0x9 <L1>
 100         lbeq    start
 101   68:   18 27 ff 94     lbeq    0x0 <start>
 102         lbcc    L2
 103   6c:   18 24 00 4c     lbcc    0xbc <L2>
 104 ;;
 105 ;; Move insn with various operands
 106 ;;
 107         movb    start, 1,x
 108   70:   18 09 01 00     movb    0x0 <start>, 0x1,X
 109   74:   00
 110         movw    1,x, start
 111   75:   18 05 01 00     movw    0x1,X, 0x0 <start>
 112   79:   00
 113         movb    start, 1,\+x
 114   7a:   18 09 20 00     movb    0x0 <start>, 1,\+X
 115   7e:   00
 116         movb    start, 1,\-x
 117   7f:   18 09 2f 00     movb    0x0 <start>, 1,\-X
 118   83:   00
 119         movb    #23, 1,\-sp
 120   84:   18 08 af 17     movb    #0x17, 1,\-SP
 121         movb    L1, L2
 122   88:   18 0c 00 00     movb    0x0 <start>, 0x0 <start>
 123   8c:   00 00
 124         movb    L1, a,x
 125   8e:   18 09 e4 00     movb    0x0 <start>, A,X
 126   92:   00
 127         movw    L1, b,x
 128   93:   18 01 e5 00     movw    0x0 <start>, B,X
 129   97:   00
 130         movw    L1, d,x
 131   98:   18 01 e6 00     movw    0x0 <start>, D,X
 132   9c:   00
 133         movw    d,x, a,x
 134   9d:   18 02 e6 e4     movw    D,X, A,X
 135         movw    b,sp, d,pc
 136   a1:   18 02 f5 fe     movw    B,SP, D,PC
 137         movw    b,sp, L1
 138   a5:   18 05 f5 00     movw    B,SP, 0x0 <start>
 139   a9:   00
 140         movw    b,sp, 1,x
 141   aa:   18 02 f5 01     movw    B,SP, 0x1,X
 142         movw    d,x, a,y
 143   ae:   18 02 e6 ec     movw    D,X, A,Y
 144         trap    #0x30
 145   b2:   18 30           trap    #0x30
 146         trap    #0x39
 147   b4:   18 39           trap    #0x39
 148         trap    #0x40
 149   b6:   18 40           trap    #0x40
 150         trap    #0x80
 151   b8:   18 80           trap    #0x80
 152         trap    #255
 153   ba:   18 ff           trap    #0xff
 154
 155 0+bc <L2>:
 156 L2:
 157         movw 1,x,2,x
 158   bc:   18 02 01 02     movw    0x1,X, 0x2,X
 159         movw \-1,\-1
 160   c0:   18 04 ff ff     movw    0xffff <bb\+0xd7ff>, 0xffff <bb\+0xd7ff>
 161   c4:   ff ff
 162         movw \-1,1,x
 163   c6:   18 01 01 ff     movw    0xffff <bb\+0xd7ff>, 0x1,X
 164   ca:   ff
 165         movw #\-1,1,x
 166   cb:   18 00 01 ff     movw    #0xffff <bb\+0xd7ff>, 0x1,X
 167   cf:   ff
 168         movw 3,8
 169   d0:   18 04 00 03     movw    0x3 <start\+0x3>, 0x8 <start\+0x8>
 170   d4:   00 08
 171         movw #3,3
 172   d6:   18 03 00 03     movw    #0x3 <start\+0x3>, 0x3 <start\+0x3>
 173   da:   00 03
 174         movw #3,1,x
 175   dc:   18 00 01 00     movw    #0x3 <start\+0x3>, 0x1,X
 176   e0:   03
 177         movw 3,1,x
 178   e1:   18 01 01 00     movw    0x3 <start\+0x3>, 0x1,X
 179   e5:   03
 180         movw 3,\+2,x
 181   e6:   18 01 02 00     movw    0x3 <start\+0x3>, 0x2,X
 182   ea:   03
 183         movw 4,\-2,x
 184   eb:   18 01 1e 00     movw    0x4 <start\+0x4>, 0xfffe,X
 185   ef:   04
 186         rts
 187   f0:   3d              rts
 188
 189 0+f1 <post_indexed_pb>:
 190 ;;
 191 ;; Post\-index byte with relocation
 192 ;;
 193 post_indexed_pb:
 194 t1:
 195         leas    abort,x
 196   f1:   1b e2 00 00     leas    0x0,X
 197
 198 0+f5 <t2>:
 199 t2:
 200         leax    t2\-t1,y
 201   f5:   1a 44           leax    0x4,Y
 202         leax    toto,x
 203   f7:   1a e0 64        leax    0x64,X
 204         leas    toto\+titi,sp
 205   fa:   1b f0 6e        leas    0x6e,SP
 206         leay    titi,x
 207   fd:   19 0a           leay    0xa,X
 208         leas    bb,y
 209   ff:   1b ea 28 00     leas    0x2800,Y
 210         leas    min5b,pc
 211  103:   1b d0           leas    0xfff0,PC \{0xf5 <t2>\}
 212         leas    max5b,pc
 213  105:   1b cf           leas    0xf,PC \{0x116 <t2\+0x21>\}
 214         leas    min9b,pc
 215  107:   1b fa ff 00     leas    0xff00,PC \{0xb <L1\+0x2>\}
 216         leas    max9b,pc
 217  10b:   1b f8 ff        leas    0xff,PC \{0x20d <L0\ 1\+0xd9>\}
 218
 219 ;;
 220 ;; Disassembler bug with movb
 221 ;;
 222         movb    #23,0x2345
 223  10e:   18 0b 17 23     movb    #0x17, 0x2345 <L0\ 1\+0x2211>
 224  112:   45
 225         movb    #40,12,sp
 226  113:   18 08 8c 28     movb    #0x28, 0xc,SP
 227         movb    #39,3,\+sp
 228  117:   18 08 a2 27     movb    #0x27, 3,\+SP
 229         movb    #20,14,sp
 230  11b:   18 08 8e 14     movb    #0x14, 0xe,SP
 231         movw    #0x3210,0x3456
 232  11f:   18 03 32 10     movw    #0x3210 <bb\+0xa10>, 0x3456 <bb\+0xc56>
 233  123:   34 56
 234         movw    #0x4040,12,sp
 235  125:   18 00 8c 40     movw    #0x4040 <bb\+0x1840>, 0xc,SP
 236  129:   40
 237         movw    #0x3900,3,\+sp
 238  12a:   18 00 a2 39     movw    #0x3900 <bb\+0x1100>, 3,\+SP
 239  12e:   00
 240         movw    #0x2000,14,sp
 241  12f:   18 00 8e 20     movw    #0x2000 <L0\ 1\+0x1ecc>, 0xe,SP
 242  133:   00