gas/testsuite/gas/mips/mips16-pcrel-n64-sym32-1.d

   1 #objdump: -dr --prefix-addresses --show-raw-insn
   2 #name: MIPS16 PC-relative operations 1 (n64, sym32)
   3 #as: -64 -msym32
   4 #source: mips16-pcrel-1.s
   5
   6 .*: +file format .*mips.*
   7
   8 Disassembly of section \.text:
   9         \.\.\.
  10 [0-9a-f]+ <[^>]*> fe40          dla     v0,0000000000010000 <foo>
  11 [0-9a-f]+ <[^>]*> 6500          nop
  12 [0-9a-f]+ <[^>]*> fc40          ld      v0,0000000000010000 <foo>
  13 [0-9a-f]+ <[^>]*> 6500          nop
  14 [0-9a-f]+ <[^>]*> fe5f          dla     v0,0000000000010084 <baz\+0x4>
  15 [0-9a-f]+ <[^>]*> 6500          nop
  16 [0-9a-f]+ <[^>]*> fc5f          ld      v0,0000000000010100 <baz\+0x80>
  17 [0-9a-f]+ <[^>]*> 6500          nop
  18 [0-9a-f]+ <[^>]*> f080 fe40     dla     v0,0000000000010090 <baz\+0x10>
  19 [0-9a-f]+ <[^>]*> f100 fc40     ld      v0,0000000000010110 <baz\+0x90>
  20 [0-9a-f]+ <[^>]*> f7ff fe5c     dla     v0,0000000000010014 <foo\+0x14>
  21 [0-9a-f]+ <[^>]*> f7ff fc5c     ld      v0,0000000000010014 <foo\+0x14>
  22 [0-9a-f]+ <[^>]*> f7ef fe5f     dla     v0,000000000001801f <baz\+0x7f9f>
  23 [0-9a-f]+ <[^>]*> f7ef fc5f     ld      v0,000000000001801f <baz\+0x7f9f>
  24 [0-9a-f]+ <[^>]*> f010 fe40     dla     v0,0000000000008028 <bar\+0x8028>
  25 [0-9a-f]+ <[^>]*> f010 fc40     ld      v0,0000000000008028 <bar\+0x8028>
  26 [0-9a-f]+ <[^>]*> f000 6a00     li      v0,0
  27 [       ]*[0-9a-f]+: R_MIPS16_HI16      L0\001\+0x7fff
  28 [       ]*[0-9a-f]+: R_MIPS_NONE        \*ABS\*\+0x7fff
  29 [       ]*[0-9a-f]+: R_MIPS_NONE        \*ABS\*\+0x7fff
  30 [0-9a-f]+ <[^>]*> f400 3240     sll     v0,16
  31 [0-9a-f]+ <[^>]*> f000 fd40     daddiu  v0,0
  32 [       ]*[0-9a-f]+: R_MIPS16_LO16      L0\001\+0x7fff
  33 [       ]*[0-9a-f]+: R_MIPS_NONE        \*ABS\*\+0x7fff
  34 [       ]*[0-9a-f]+: R_MIPS_NONE        \*ABS\*\+0x7fff
  35 [0-9a-f]+ <[^>]*> f000 6a00     li      v0,0
  36 [       ]*[0-9a-f]+: R_MIPS16_HI16      L0\001\+0x7ffb
  37 [       ]*[0-9a-f]+: R_MIPS_NONE        \*ABS\*\+0x7ffb
  38 [       ]*[0-9a-f]+: R_MIPS_NONE        \*ABS\*\+0x7ffb
  39 [0-9a-f]+ <[^>]*> f400 3240     sll     v0,16
  40 [0-9a-f]+ <[^>]*> f000 3a40     ld      v0,0\(v0\)
  41 [       ]*[0-9a-f]+: R_MIPS16_LO16      L0\001\+0x7ffb
  42 [       ]*[0-9a-f]+: R_MIPS_NONE        \*ABS\*\+0x7ffb
  43 [       ]*[0-9a-f]+: R_MIPS_NONE        \*ABS\*\+0x7ffb
  44 [0-9a-f]+ <[^>]*> f000 6a00     li      v0,0
  45 [       ]*[0-9a-f]+: R_MIPS16_HI16      L0\001-0x8002
  46 [       ]*[0-9a-f]+: R_MIPS_NONE        \*ABS\*-0x8002
  47 [       ]*[0-9a-f]+: R_MIPS_NONE        \*ABS\*-0x8002
  48 [0-9a-f]+ <[^>]*> f400 3240     sll     v0,16
  49 [0-9a-f]+ <[^>]*> f000 fd40     daddiu  v0,0
  50 [       ]*[0-9a-f]+: R_MIPS16_LO16      L0\001-0x8002
  51 [       ]*[0-9a-f]+: R_MIPS_NONE        \*ABS\*-0x8002
  52 [       ]*[0-9a-f]+: R_MIPS_NONE        \*ABS\*-0x8002
  53 [0-9a-f]+ <[^>]*> f000 6a00     li      v0,0
  54 [       ]*[0-9a-f]+: R_MIPS16_HI16      L0\001-0x8006
  55 [       ]*[0-9a-f]+: R_MIPS_NONE        \*ABS\*-0x8006
  56 [       ]*[0-9a-f]+: R_MIPS_NONE        \*ABS\*-0x8006
  57 [0-9a-f]+ <[^>]*> f400 3240     sll     v0,16
  58 [0-9a-f]+ <[^>]*> f000 3a40     ld      v0,0\(v0\)
  59 [       ]*[0-9a-f]+: R_MIPS16_LO16      L0\001-0x8006
  60 [       ]*[0-9a-f]+: R_MIPS_NONE        \*ABS\*-0x8006
  61 [       ]*[0-9a-f]+: R_MIPS_NONE        \*ABS\*-0x8006
  62 [0-9a-f]+ <[^>]*> 6500          nop
  63         \.\.\.
  64         \.\.\.