MIPS: Add Global INValidate ASE support
[deliverable/binutils-gdb.git] / gas / testsuite / gas / mips / mips16e2@mips16-pcrel-n64-sym32-0.d
1 #objdump: -dr --prefix-addresses --show-raw-insn
2 #name: MIPS16 PC-relative operations 0 (n64, sym32)
3 #as: -64 -msym32
4 #source: mips16-pcrel-0.s
5
6 .*: +file format .*mips.*
7
8 Disassembly of section \.text:
9 \.\.\.
10 [0-9a-f]+ <[^>]*> 0a00 la v0,0000000000010000 <foo>
11 [0-9a-f]+ <[^>]*> 6500 nop
12 [0-9a-f]+ <[^>]*> b200 lw v0,0000000000010004 <foo\+0x4>
13 [0-9a-f]+ <[^>]*> 6500 nop
14 [0-9a-f]+ <[^>]*> 0aff la v0,0000000000010404 <baz\+0x304>
15 [0-9a-f]+ <[^>]*> 6500 nop
16 [0-9a-f]+ <[^>]*> b2ff lw v0,0000000000010408 <baz\+0x308>
17 [0-9a-f]+ <[^>]*> 6500 nop
18 [0-9a-f]+ <[^>]*> f400 0a00 la v0,0000000000010410 <baz\+0x310>
19 [0-9a-f]+ <[^>]*> f400 b200 lw v0,0000000000010414 <baz\+0x314>
20 [0-9a-f]+ <[^>]*> f7ff 0a1c la v0,0000000000010014 <foo\+0x14>
21 [0-9a-f]+ <[^>]*> f7ff b21c lw v0,0000000000010018 <foo\+0x18>
22 [0-9a-f]+ <[^>]*> f7ef 0a1f la v0,000000000001801f <baz\+0x7f1f>
23 [0-9a-f]+ <[^>]*> f7ef b21f lw v0,0000000000018023 <baz\+0x7f23>
24 [0-9a-f]+ <[^>]*> f010 0a00 la v0,0000000000008028 <bar\+0x8028>
25 [0-9a-f]+ <[^>]*> f010 b200 lw v0,000000000000802c <bar\+0x802c>
26 [0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
27 [ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001\+0x7fff
28 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x7fff
29 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x7fff
30 [0-9a-f]+ <[^>]*> f000 4a00 addiu v0,0
31 [ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001\+0x7fff
32 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x7fff
33 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x7fff
34 [0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
35 [ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001\+0x7fff
36 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x7fff
37 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x7fff
38 [0-9a-f]+ <[^>]*> f000 9a40 lw v0,0\(v0\)
39 [ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001\+0x7fff
40 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x7fff
41 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x7fff
42 [0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
43 [ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001-0x8002
44 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8002
45 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8002
46 [0-9a-f]+ <[^>]*> f000 4a00 addiu v0,0
47 [ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001-0x8002
48 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8002
49 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8002
50 [0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
51 [ ]*[0-9a-f]+: R_MIPS16_HI16 L0\001-0x8002
52 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8002
53 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8002
54 [0-9a-f]+ <[^>]*> f000 9a40 lw v0,0\(v0\)
55 [ ]*[0-9a-f]+: R_MIPS16_LO16 L0\001-0x8002
56 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8002
57 [ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8002
58 [0-9a-f]+ <[^>]*> 6500 nop
59 \.\.\.
60 \.\.\.
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