1 # source file to test assembly of mips32 instructions
9 # unprivileged CPU instructions
24 # unprivileged coprocessor instructions.
25 # these tests use cp2 to avoid other (cp0, fpu, prefetch) opcodes.
35 # XXX other BCzCond encodings not currently expressable
37 cop2 0x1234567 # disassembles as c2 ...
40 mfc2 $4, $5, 0 # disassembles without sel
43 mtc2 $7, $8, 0 # disassembles without sel
47 # privileged instructions
58 wait 0 # disassembles without code
61 # For a while break for the mips32 ISA interpreted a single argument
62 # as a 20-bit code, placing it in the opcode differently to
63 # traditional ISAs. This turned out to cause problems, so it has
64 # been removed. This test is to assure consistent interpretation.
66 break 0 # disassembles without code
68 break 0x48,0x345 # this still specifies a 20-bit code
70 # Instructions in previous ISAs or CPUs which are now slightly
73 sdbbp 0 # disassembles without code
76 # Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ...