1 # source file to test assembly of MIPS DSP ASE for MIPS64 instructions
30 cmpgu.lt.ob $9,$10,$11
31 cmpgu.le.ob $10,$11,$12
62 dextrv_r.w $12,$ac0,$13
63 dextrv_rs.w $13,$ac1,$14
65 dextrv_r.l $15,$ac3,$16
66 dextrv_rs.l $16,$ac0,$17
73 dpaq_sa.l.pw $ac1,$0,$1
74 dpaq_s.w.qh $ac2,$21,$22
75 dpau.h.obl $ac0,$15,$16
76 dpau.h.obr $ac1,$16,$17
77 dpsq_sa.l.pw $ac0,$3,$4
78 dpsq_s.w.qh $ac1,$24,$25
79 dpsu.h.obl $ac2,$17,$18
80 dpsu.h.obr $ac3,$18,$19
85 maq_sa.w.qhll $ac3,$10,$11
86 maq_sa.w.qhlr $ac0,$11,$12
87 maq_sa.w.qhrl $ac1,$12,$13
88 maq_sa.w.qhrr $ac2,$13,$14
89 maq_s.l.pwl $ac1,$16,$17
90 maq_s.l.pwr $ac2,$17,$18
91 maq_s.w.qhll $ac3,$10,$11
92 maq_s.w.qhlr $ac0,$11,$12
93 maq_s.w.qhrl $ac1,$12,$13
94 maq_s.w.qhrr $ac2,$13,$14
95 muleq_s.pw.qhl $11,$12,$13
96 muleq_s.pw.qhr $12,$13,$14
97 muleu_s.qh.obl $4,$5,$6
98 muleu_s.qh.obr $5,$6,$7
101 mulsaq_s.w.qh $ac0,$27,$28
102 mulsaq_s.l.pw $ac2,$29,$30
103 packrl.pw $28,$29,$30
107 preceq.pw.qhl $14,$15
108 preceq.pw.qhr $15,$16
109 preceq.pw.qhla $16,$17
110 preceq.pw.qhra $17,$18
111 preceq.s.l.pwl $18,$19
112 preceq.s.l.pwr $19,$20
113 precequ.pw.qhl $24,$25
114 precequ.pw.qhr $25,$26
115 precequ.pw.qhla $26,$27
116 precequ.pw.qhra $27,$28
117 preceu.qh.obl $28,$29
118 preceu.qh.obr $29,$30
119 preceu.qh.obla $30,$31
120 preceu.qh.obra $31,$0
121 precrq.ob.qh $4,$5,$6
123 precrq.qh.pw $5,$6,$7
124 precrq_rs.qh.pw $6,$7,$8
125 precrqu_s.ob.qh $9,$10,$11
144 shllv_s.qh $11,$12,$13
150 shllv_s.pw $17,$18,$19
167 subq_s.qh $17,$18,$19
169 subq_s.pw $19,$20,$21
171 subu_s.ob $21,$22,$23
173 # Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ...